ad1848_isa.c revision 1.7
1 /* $NetBSD: ad1848_isa.c,v 1.7 1999/02/18 17:27:39 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ken Hornstein and John Kohl. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 /* 39 * Copyright (c) 1994 John Brezak 40 * Copyright (c) 1991-1993 Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the Computer Systems 54 * Engineering Group at Lawrence Berkeley Laboratory. 55 * 4. Neither the name of the University nor of the Laboratory may be used 56 * to endorse or promote products derived from this software without 57 * specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 */ 72 73 /* 74 * Copyright by Hannu Savolainen 1994 75 * 76 * Redistribution and use in source and binary forms, with or without 77 * modification, are permitted provided that the following conditions are 78 * met: 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 2. 80 * Redistributions in binary form must reproduce the above copyright notice, 81 * this list of conditions and the following disclaimer in the documentation 82 * and/or other materials provided with the distribution. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 85 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 86 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 87 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 88 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 */ 97 /* 98 * Portions of this code are from the VOXware support for the ad1848 99 * by Hannu Savolainen <hannu (at) voxware.pp.fi> 100 * 101 * Portions also supplied from the SoundBlaster driver for NetBSD. 102 */ 103 104 #include <sys/param.h> 105 #include <sys/systm.h> 106 #include <sys/errno.h> 107 #include <sys/ioctl.h> 108 #include <sys/syslog.h> 109 #include <sys/device.h> 110 #include <sys/proc.h> 111 #include <sys/buf.h> 112 113 #include <machine/cpu.h> 114 #include <machine/bus.h> 115 116 #include <sys/audioio.h> 117 #include <vm/vm.h> 118 119 #include <dev/audio_if.h> 120 #include <dev/auconv.h> 121 122 #include <dev/isa/isavar.h> 123 #include <dev/isa/isadmavar.h> 124 125 #include <dev/ic/ad1848reg.h> 126 #include <dev/ic/cs4231reg.h> 127 #include <dev/isa/ad1848var.h> 128 #include <dev/isa/cs4231var.h> 129 130 #ifdef AUDIO_DEBUG 131 #define DPRINTF(x) if (ad1848debug) printf x 132 extern int ad1848debug; 133 #else 134 #define DPRINTF(x) 135 #endif 136 137 static int ad1848_isa_read __P(( struct ad1848_softc *, int)); 138 static void ad1848_isa_write __P(( struct ad1848_softc *, int, int)); 139 140 int 141 ad1848_isa_read(sc, index) 142 struct ad1848_softc *sc; 143 int index; 144 { 145 struct ad1848_isa_softc *isc = (struct ad1848_isa_softc *)sc; 146 return (bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, 147 (isc)->sc_iooffs+(index))); 148 } 149 150 void 151 ad1848_isa_write(sc, index, value) 152 struct ad1848_softc *sc; 153 int index; 154 int value; 155 { 156 struct ad1848_isa_softc *isc = (struct ad1848_isa_softc *)sc; 157 bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, 158 (isc)->sc_iooffs+(index), value); 159 } 160 161 /* 162 * Map and probe for the ad1848 chip 163 */ 164 int 165 ad1848_isa_mapprobe(isc, iobase) 166 struct ad1848_isa_softc *isc; 167 int iobase; 168 { 169 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 170 171 if (!AD1848_BASE_VALID(iobase)) { 172 #ifdef AUDIO_DEBUG 173 printf("ad1848: configured iobase %04x invalid\n", iobase); 174 #endif 175 return 0; 176 } 177 178 isc->sc_iooffs = 0; 179 /* Map the AD1848 ports */ 180 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh)) 181 return 0; 182 183 if (!ad1848_isa_probe(isc)) { 184 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 185 return 0; 186 } else 187 return 1; 188 } 189 190 /* 191 * Probe for the ad1848 chip 192 */ 193 int 194 ad1848_isa_probe(isc) 195 struct ad1848_isa_softc *isc; 196 { 197 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 198 u_char tmp, tmp1 = 0xff, tmp2 = 0xff; 199 int i; 200 201 sc->sc_readreg = ad1848_isa_read; 202 sc->sc_writereg = ad1848_isa_write; 203 204 /* Is there an ad1848 chip ? */ 205 sc->MCE_bit = MODE_CHANGE_ENABLE; 206 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */ 207 208 /* 209 * Check that the I/O address is in use. 210 * 211 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the 212 * chip has performed its power-on initialization. Just assume 213 * this has happened before the OS is starting. 214 * 215 * If the I/O address is unused, inb() typically returns 0xff. 216 */ 217 tmp = ADREAD(sc, AD1848_IADDR); 218 if (tmp & SP_IN_INIT) { /* Not a AD1848 */ 219 #if 0 220 DPRINTF(("ad_detect_A %x\n", tmp)); 221 #endif 222 goto bad; 223 } 224 225 /* 226 * Test if it's possible to change contents of the indirect registers. 227 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read 228 * only so try to avoid using it. 229 */ 230 ad_write(sc, 0, 0xaa); 231 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */ 232 233 if ((tmp1 = ad_read(sc, 0)) != 0xaa || 234 (tmp2 = ad_read(sc, 1)) != 0x45) { 235 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); 236 goto bad; 237 } 238 239 ad_write(sc, 0, 0x45); 240 ad_write(sc, 1, 0xaa); 241 242 if ((tmp1 = ad_read(sc, 0)) != 0x45 || 243 (tmp2 = ad_read(sc, 1)) != 0xaa) { 244 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); 245 goto bad; 246 } 247 248 /* 249 * The indirect register I12 has some read only bits. Lets 250 * try to change them. 251 */ 252 tmp = ad_read(sc, SP_MISC_INFO); 253 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f); 254 255 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { 256 DPRINTF(("ad_detect_D (%x)\n", tmp1)); 257 goto bad; 258 } 259 260 /* 261 * MSB and 4 LSBs of the reg I12 tell the chip revision. 262 * 263 * A preliminary version of the AD1846 data sheet stated that it 264 * used an ID field of 0x0B. The current version, however, 265 * states that the AD1846 uses ID 0x0A, just like the AD1848K. 266 * 267 * this switch statement will need updating as newer clones arrive.... 268 */ 269 switch (tmp1 & 0x8f) { 270 case 0x09: 271 sc->chip_name = "AD1848J"; 272 break; 273 case 0x0A: 274 sc->chip_name = "AD1848K"; 275 break; 276 #if 0 /* See above */ 277 case 0x0B: 278 sc->chip_name = "AD1846"; 279 break; 280 #endif 281 case 0x81: 282 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */ 283 break; 284 case 0x89: 285 sc->chip_name = "CS4248"; 286 break; 287 case 0x8A: 288 sc->chip_name = "broken"; /* CS4231/AD1845; see below */ 289 break; 290 default: 291 sc->chip_name = "unknown"; 292 DPRINTF(("ad1848: unknown codec version 0x%02x\n", 293 tmp1 & 0x8f)); 294 break; 295 } 296 297 /* 298 * The original AD1848/CS4248 has just 16 indirect registers. This 299 * means that I0 and I16 should return the same value (etc.). 300 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test 301 * fails with CS4231, AD1845, etc. 302 */ 303 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */ 304 305 for (i = 0; i < 16; i++) 306 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { 307 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); 308 if (i != SP_TEST_AND_INIT) goto bad; 309 } 310 311 /* 312 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit 313 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845. 314 */ 315 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */ 316 317 tmp1 = ad_read(sc, SP_MISC_INFO); 318 if ((tmp1 & 0xc0) == (0x80 | MODE2)) { 319 /* 320 * CS4231 or AD1845 detected - is it? 321 * 322 * Verify that setting I2 doesn't change I18. 323 */ 324 ad_write(sc, 18, 0x88); /* Set I18 to known value */ 325 326 ad_write(sc, 2, 0x45); 327 if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */ 328 ad_write(sc, 2, 0xaa); 329 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */ 330 DPRINTF(("ad_detect_H(%x)\n", tmp2)); 331 goto bad; 332 } 333 334 /* 335 * It's a CS4231, or another clone with 32 registers. 336 * Let's find out which by checking I25. 337 */ 338 if ((tmp1 & 0x8f) == 0x8a) { 339 tmp1 = ad_read(sc, CS_VERSION_ID); 340 switch (tmp1 & 0xe7) { 341 case 0xA0: 342 sc->chip_name = "CS4231A"; 343 break; 344 case 0x80: 345 /* XXX I25 no good, AD1845 same as CS4231 */ 346 sc->chip_name = "CS4231 or AD1845"; 347 break; 348 case 0x82: 349 sc->chip_name = "CS4232"; 350 break; 351 case 0x03: 352 case 0x83: 353 sc->chip_name = "CS4236/CS4236B"; 354 break; 355 } 356 } 357 sc->mode = 2; 358 } 359 } 360 361 /* Wait for 1848 to init */ 362 while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 363 ; 364 365 /* Wait for 1848 to autocal */ 366 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT); 367 while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG) 368 ; 369 370 return 1; 371 bad: 372 return 0; 373 } 374 375 /* Unmap the I/O ports */ 376 void 377 ad1848_isa_unmap(isc) 378 struct ad1848_isa_softc *isc; 379 { 380 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 381 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 382 } 383 384 /* 385 * Attach hardware to driver, attach hardware driver to audio 386 * pseudo-device driver . 387 */ 388 void 389 ad1848_isa_attach(isc) 390 struct ad1848_isa_softc *isc; 391 { 392 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 393 394 sc->sc_readreg = ad1848_isa_read; 395 sc->sc_writereg = ad1848_isa_write; 396 397 isc->sc_playrun = 0; 398 isc->sc_recrun = 0; 399 400 if (isc->sc_playdrq != -1) { 401 if (isa_dmamap_create(isc->sc_ic, isc->sc_playdrq, MAX_ISADMA, 402 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 403 printf("ad1848_attach: can't create map for drq %d\n", 404 isc->sc_playdrq); 405 return; 406 } 407 } 408 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) { 409 if (isa_dmamap_create(isc->sc_ic, isc->sc_recdrq, MAX_ISADMA, 410 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 411 printf("ad1848_attach: can't create map for drq %d\n", 412 isc->sc_recdrq); 413 return; 414 } 415 } 416 417 ad1848_attach(sc); 418 } 419 420 int 421 ad1848_isa_open(addr, flags) 422 void *addr; 423 int flags; 424 { 425 struct ad1848_isa_softc *sc = addr; 426 427 DPRINTF(("ad1848_isa_open: sc=%p\n", sc)); 428 429 sc->sc_intr = 0; 430 431 return (ad1848_open(&sc->sc_ad1848, flags)); 432 } 433 434 /* 435 * Close function is called at splaudio(). 436 */ 437 void 438 ad1848_isa_close(addr) 439 void *addr; 440 { 441 struct ad1848_isa_softc *sc = addr; 442 443 ad1848_isa_halt_output(sc); 444 ad1848_isa_halt_input(sc); 445 446 sc->sc_intr = 0; 447 448 DPRINTF(("ad1848_isa_close: stop DMA\n")); 449 ad1848_close(&sc->sc_ad1848); 450 } 451 452 int 453 ad1848_isa_trigger_input(addr, start, end, blksize, intr, arg, param) 454 void *addr; 455 void *start, *end; 456 int blksize; 457 void (*intr) __P((void *)); 458 void *arg; 459 struct audio_params *param; 460 { 461 struct ad1848_isa_softc *isc = addr; 462 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 463 u_int8_t reg; 464 465 isa_dmastart(isc->sc_ic, isc->sc_recdrq, start, 466 (char *)end - (char *)start, NULL, DMAMODE_READ | DMAMODE_LOOP, 467 BUS_DMA_NOWAIT); 468 469 isc->sc_recrun = 1; 470 isc->sc_intr = intr; 471 isc->sc_arg = arg; 472 473 blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1; 474 475 if (sc->mode == 2) { 476 ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff); 477 ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8); 478 } else { 479 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 480 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 481 } 482 483 reg = ad_read(sc, SP_INTERFACE_CONFIG); 484 ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg); 485 486 return (0); 487 } 488 489 int 490 ad1848_isa_trigger_output(addr, start, end, blksize, intr, arg, param) 491 void *addr; 492 void *start, *end; 493 int blksize; 494 void (*intr) __P((void *)); 495 void *arg; 496 struct audio_params *param; 497 { 498 struct ad1848_isa_softc *isc = addr; 499 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 500 u_int8_t reg; 501 502 isa_dmastart(isc->sc_ic, isc->sc_playdrq, start, 503 (char *)end - (char *)start, NULL, DMAMODE_WRITE | DMAMODE_LOOP, 504 BUS_DMA_NOWAIT); 505 506 isc->sc_playrun = 1; 507 isc->sc_intr = intr; 508 isc->sc_arg = arg; 509 510 blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1; 511 512 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 513 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 514 515 reg = ad_read(sc, SP_INTERFACE_CONFIG); 516 ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg); 517 518 return (0); 519 } 520 521 int 522 ad1848_isa_halt_input(addr) 523 void *addr; 524 { 525 struct ad1848_isa_softc *isc = addr; 526 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 527 528 if (isc->sc_recrun) { 529 ad1848_halt_input(sc); 530 isa_dmaabort(isc->sc_ic, isc->sc_recdrq); 531 isc->sc_recrun = 0; 532 } 533 534 return (0); 535 } 536 537 int 538 ad1848_isa_halt_output(addr) 539 void *addr; 540 { 541 struct ad1848_isa_softc *isc = addr; 542 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 543 544 if (isc->sc_playrun) { 545 ad1848_halt_output(sc); 546 isa_dmaabort(isc->sc_ic, isc->sc_playdrq); 547 isc->sc_playrun = 0; 548 } 549 550 return (0); 551 } 552 553 int 554 ad1848_isa_intr(arg) 555 void *arg; 556 { 557 struct ad1848_isa_softc *isc = arg; 558 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 559 int retval = 0; 560 u_char status; 561 562 /* Get intr status */ 563 status = ADREAD(sc, AD1848_STATUS); 564 565 #ifdef AUDIO_DEBUG 566 if (ad1848debug > 1) 567 printf("ad1848_isa_intr: intr=%p status=%x\n", isc->sc_intr, status); 568 #endif 569 isc->sc_interrupts++; 570 571 /* Handle interrupt */ 572 if (isc->sc_intr && (status & INTERRUPT_STATUS)) { 573 (*isc->sc_intr)(isc->sc_arg); 574 retval = 1; 575 } 576 577 /* clear interrupt */ 578 if (status & INTERRUPT_STATUS) 579 ADWRITE(sc, AD1848_STATUS, 0); 580 581 return(retval); 582 } 583 584 void * 585 ad1848_isa_malloc(addr, direction, size, pool, flags) 586 void *addr; 587 int direction; 588 size_t size; 589 int pool, flags; 590 { 591 struct ad1848_isa_softc *isc = addr; 592 int drq; 593 594 if (direction == AUMODE_PLAY) 595 drq = isc->sc_playdrq; 596 else 597 drq = isc->sc_recdrq; 598 return (isa_malloc(isc->sc_ic, drq, size, pool, flags)); 599 } 600 601 void 602 ad1848_isa_free(addr, ptr, pool) 603 void *addr; 604 void *ptr; 605 int pool; 606 { 607 isa_free(ptr, pool); 608 } 609 610 size_t 611 ad1848_isa_round_buffersize(addr, direction, size) 612 void *addr; 613 int direction; 614 size_t size; 615 { 616 if (size > MAX_ISADMA) 617 size = MAX_ISADMA; 618 return (size); 619 } 620 621 int 622 ad1848_isa_mappage(addr, mem, off, prot) 623 void *addr; 624 void *mem; 625 int off; 626 int prot; 627 { 628 return isa_mappage(mem, off, prot); 629 } 630 631 int 632 ad1848_isa_get_props(addr) 633 void *addr; 634 { 635 struct ad1848_isa_softc *isc = addr; 636 637 return (AUDIO_PROP_MMAP | 638 (isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0)); 639 } 640
Indexes created Fri Sep 26 08:10:20 GMT 2025