ad1848_isa.c revision 1.9
1 /* $NetBSD: ad1848_isa.c,v 1.9 1999/03/22 07:27:46 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ken Hornstein and John Kohl. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 /* 39 * Copyright (c) 1994 John Brezak 40 * Copyright (c) 1991-1993 Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the Computer Systems 54 * Engineering Group at Lawrence Berkeley Laboratory. 55 * 4. Neither the name of the University nor of the Laboratory may be used 56 * to endorse or promote products derived from this software without 57 * specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 */ 72 73 /* 74 * Copyright by Hannu Savolainen 1994 75 * 76 * Redistribution and use in source and binary forms, with or without 77 * modification, are permitted provided that the following conditions are 78 * met: 1. Redistributions of source code must retain the above copyright 79 * notice, this list of conditions and the following disclaimer. 2. 80 * Redistributions in binary form must reproduce the above copyright notice, 81 * this list of conditions and the following disclaimer in the documentation 82 * and/or other materials provided with the distribution. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 85 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 86 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 87 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 88 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 */ 97 /* 98 * Portions of this code are from the VOXware support for the ad1848 99 * by Hannu Savolainen <hannu (at) voxware.pp.fi> 100 * 101 * Portions also supplied from the SoundBlaster driver for NetBSD. 102 */ 103 104 #include <sys/param.h> 105 #include <sys/systm.h> 106 #include <sys/errno.h> 107 #include <sys/ioctl.h> 108 #include <sys/syslog.h> 109 #include <sys/device.h> 110 #include <sys/proc.h> 111 #include <sys/buf.h> 112 113 #include <machine/cpu.h> 114 #include <machine/bus.h> 115 116 #include <sys/audioio.h> 117 #include <vm/vm.h> 118 119 #include <dev/audio_if.h> 120 #include <dev/auconv.h> 121 122 #include <dev/isa/isavar.h> 123 #include <dev/isa/isadmavar.h> 124 125 #include <dev/ic/ad1848reg.h> 126 #include <dev/ic/cs4231reg.h> 127 #include <dev/isa/ad1848var.h> 128 #include <dev/isa/cs4231var.h> 129 130 #ifdef AUDIO_DEBUG 131 #define DPRINTF(x) if (ad1848debug) printf x 132 extern int ad1848debug; 133 #else 134 #define DPRINTF(x) 135 #endif 136 137 static int ad1848_isa_read __P(( struct ad1848_softc *, int)); 138 static void ad1848_isa_write __P(( struct ad1848_softc *, int, int)); 139 140 int 141 ad1848_isa_read(sc, index) 142 struct ad1848_softc *sc; 143 int index; 144 { 145 struct ad1848_isa_softc *isc = (struct ad1848_isa_softc *)sc; 146 return (bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, 147 (isc)->sc_iooffs+(index))); 148 } 149 150 void 151 ad1848_isa_write(sc, index, value) 152 struct ad1848_softc *sc; 153 int index; 154 int value; 155 { 156 struct ad1848_isa_softc *isc = (struct ad1848_isa_softc *)sc; 157 bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, 158 (isc)->sc_iooffs+(index), value); 159 } 160 161 /* 162 * Map and probe for the ad1848 chip 163 */ 164 int 165 ad1848_isa_mapprobe(isc, iobase) 166 struct ad1848_isa_softc *isc; 167 int iobase; 168 { 169 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 170 171 if (!AD1848_BASE_VALID(iobase)) { 172 #ifdef AUDIO_DEBUG 173 printf("ad1848: configured iobase %04x invalid\n", iobase); 174 #endif 175 return 0; 176 } 177 178 isc->sc_iooffs = 0; 179 /* Map the AD1848 ports */ 180 if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh)) 181 return 0; 182 183 if (!ad1848_isa_probe(isc)) { 184 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 185 return 0; 186 } else 187 return 1; 188 } 189 190 /* 191 * Probe for the ad1848 chip 192 */ 193 int 194 ad1848_isa_probe(isc) 195 struct ad1848_isa_softc *isc; 196 { 197 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 198 u_char tmp, tmp1 = 0xff, tmp2 = 0xff; 199 int i; 200 201 sc->sc_readreg = ad1848_isa_read; 202 sc->sc_writereg = ad1848_isa_write; 203 204 /* Is there an ad1848 chip ? */ 205 sc->MCE_bit = MODE_CHANGE_ENABLE; 206 sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */ 207 208 /* 209 * Check that the I/O address is in use. 210 * 211 * The SP_IN_INIT bit of the base I/O port is known to be 0 after the 212 * chip has performed its power-on initialization. Just assume 213 * this has happened before the OS is starting. 214 * 215 * If the I/O address is unused, inb() typically returns 0xff. 216 */ 217 tmp = ADREAD(sc, AD1848_IADDR); 218 if (tmp & SP_IN_INIT) { /* Not a AD1848 */ 219 DPRINTF(("ad_detect_A %x\n", tmp)); 220 goto bad; 221 } 222 223 /* 224 * Test if it's possible to change contents of the indirect registers. 225 * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read 226 * only so try to avoid using it. The bit 0x20 is the mic preamp 227 * enable; on some chips it is always the same in both registers, so 228 * we avoid tests where they are different. 229 */ 230 ad_write(sc, 0, 0x8a); 231 ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */ 232 tmp1 = ad_read(sc, 0); 233 tmp2 = ad_read(sc, 1); 234 235 if (tmp1 != 0x8a || tmp2 != 0x45) { 236 DPRINTF(("ad_detect_B (%x/%x)\n", tmp1, tmp2)); 237 goto bad; 238 } 239 240 ad_write(sc, 0, 0x65); 241 ad_write(sc, 1, 0xaa); 242 tmp1 = ad_read(sc, 0); 243 tmp2 = ad_read(sc, 1); 244 245 if (tmp1 != 0x65 || tmp2 != 0xaa) { 246 DPRINTF(("ad_detect_C (%x/%x)\n", tmp1, tmp2)); 247 goto bad; 248 } 249 250 /* 251 * The indirect register I12 has some read only bits. Lets 252 * try to change them. 253 */ 254 tmp = ad_read(sc, SP_MISC_INFO); 255 ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f); 256 257 if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) { 258 DPRINTF(("ad_detect_D (%x)\n", tmp1)); 259 goto bad; 260 } 261 262 /* 263 * MSB and 4 LSBs of the reg I12 tell the chip revision. 264 * 265 * A preliminary version of the AD1846 data sheet stated that it 266 * used an ID field of 0x0B. The current version, however, 267 * states that the AD1846 uses ID 0x0A, just like the AD1848K. 268 * 269 * this switch statement will need updating as newer clones arrive.... 270 */ 271 switch (tmp1 & 0x8f) { 272 case 0x09: 273 sc->chip_name = "AD1848J"; 274 break; 275 case 0x0A: 276 sc->chip_name = "AD1848K"; 277 break; 278 #if 0 /* See above */ 279 case 0x0B: 280 sc->chip_name = "AD1846"; 281 break; 282 #endif 283 case 0x81: 284 sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */ 285 break; 286 case 0x89: 287 sc->chip_name = "CS4248"; 288 break; 289 case 0x8A: 290 sc->chip_name = "broken"; /* CS4231/AD1845; see below */ 291 break; 292 default: 293 sc->chip_name = "unknown"; 294 DPRINTF(("ad1848: unknown codec version 0x%02x\n", 295 tmp1 & 0x8f)); 296 break; 297 } 298 299 /* 300 * The original AD1848/CS4248 has just 16 indirect registers. This 301 * means that I0 and I16 should return the same value (etc.). 302 * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test 303 * fails with CS4231, AD1845, etc. 304 */ 305 ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */ 306 307 for (i = 0; i < 16; i++) 308 if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) { 309 if (i != SP_TEST_AND_INIT) { 310 DPRINTF(("ad_detect_F(%d/%x/%x)\n", i, tmp1, tmp2)); 311 goto bad; 312 } 313 } 314 315 /* 316 * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit 317 * The bit 0x80 is always 1 in CS4248, CS4231, and AD1845. 318 */ 319 ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */ 320 321 tmp1 = ad_read(sc, SP_MISC_INFO); 322 if ((tmp1 & 0xc0) == (0x80 | MODE2)) { 323 /* 324 * CS4231 or AD1845 detected - is it? 325 * 326 * Verify that setting I2 doesn't change I18. 327 */ 328 ad_write(sc, 18, 0x88); /* Set I18 to known value */ 329 330 ad_write(sc, 2, 0x45); 331 if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */ 332 ad_write(sc, 2, 0xaa); 333 if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */ 334 DPRINTF(("ad_detect_H(%x)\n", tmp2)); 335 goto bad; 336 } 337 338 /* 339 * It's a CS4231, or another clone with 32 registers. 340 * Let's find out which by checking I25. 341 */ 342 if ((tmp1 & 0x8f) == 0x8a) { 343 tmp1 = ad_read(sc, CS_VERSION_ID); 344 switch (tmp1 & 0xe7) { 345 case 0xA0: 346 sc->chip_name = "CS4231A"; 347 break; 348 case 0x80: 349 /* XXX I25 no good, AD1845 same as CS4231 */ 350 sc->chip_name = "CS4231 or AD1845"; 351 break; 352 case 0x82: 353 sc->chip_name = "CS4232"; 354 break; 355 case 0x03: 356 case 0x83: 357 sc->chip_name = "CS4236/CS4236B"; 358 break; 359 } 360 } 361 sc->mode = 2; 362 } 363 } 364 365 /* Wait for 1848 to init */ 366 while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT) 367 ; 368 369 /* Wait for 1848 to autocal */ 370 ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT); 371 while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG) 372 ; 373 374 return 1; 375 bad: 376 return 0; 377 } 378 379 /* Unmap the I/O ports */ 380 void 381 ad1848_isa_unmap(isc) 382 struct ad1848_isa_softc *isc; 383 { 384 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 385 bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT); 386 } 387 388 /* 389 * Attach hardware to driver, attach hardware driver to audio 390 * pseudo-device driver . 391 */ 392 void 393 ad1848_isa_attach(isc) 394 struct ad1848_isa_softc *isc; 395 { 396 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 397 398 sc->sc_readreg = ad1848_isa_read; 399 sc->sc_writereg = ad1848_isa_write; 400 401 isc->sc_playrun = 0; 402 isc->sc_recrun = 0; 403 404 if (isc->sc_playdrq != -1) { 405 if (isa_dmamap_create(isc->sc_ic, isc->sc_playdrq, MAX_ISADMA, 406 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 407 printf("ad1848_attach: can't create map for drq %d\n", 408 isc->sc_playdrq); 409 return; 410 } 411 } 412 if (isc->sc_recdrq != -1 && isc->sc_recdrq != isc->sc_playdrq) { 413 if (isa_dmamap_create(isc->sc_ic, isc->sc_recdrq, MAX_ISADMA, 414 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 415 printf("ad1848_attach: can't create map for drq %d\n", 416 isc->sc_recdrq); 417 return; 418 } 419 } 420 421 ad1848_attach(sc); 422 } 423 424 int 425 ad1848_isa_open(addr, flags) 426 void *addr; 427 int flags; 428 { 429 struct ad1848_isa_softc *sc = addr; 430 431 DPRINTF(("ad1848_isa_open: sc=%p\n", sc)); 432 433 sc->sc_intr = 0; 434 435 return (ad1848_open(&sc->sc_ad1848, flags)); 436 } 437 438 /* 439 * Close function is called at splaudio(). 440 */ 441 void 442 ad1848_isa_close(addr) 443 void *addr; 444 { 445 struct ad1848_isa_softc *sc = addr; 446 447 ad1848_isa_halt_output(sc); 448 ad1848_isa_halt_input(sc); 449 450 sc->sc_intr = 0; 451 452 DPRINTF(("ad1848_isa_close: stop DMA\n")); 453 ad1848_close(&sc->sc_ad1848); 454 } 455 456 int 457 ad1848_isa_trigger_input(addr, start, end, blksize, intr, arg, param) 458 void *addr; 459 void *start, *end; 460 int blksize; 461 void (*intr) __P((void *)); 462 void *arg; 463 struct audio_params *param; 464 { 465 struct ad1848_isa_softc *isc = addr; 466 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 467 u_int8_t reg; 468 469 isa_dmastart(isc->sc_ic, isc->sc_recdrq, start, 470 (char *)end - (char *)start, NULL, 471 DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 472 473 isc->sc_recrun = 1; 474 isc->sc_intr = intr; 475 isc->sc_arg = arg; 476 477 blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1; 478 479 if (sc->mode == 2) { 480 ad_write(sc, CS_LOWER_REC_CNT, blksize & 0xff); 481 ad_write(sc, CS_UPPER_REC_CNT, blksize >> 8); 482 } else { 483 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 484 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 485 } 486 487 reg = ad_read(sc, SP_INTERFACE_CONFIG); 488 ad_write(sc, SP_INTERFACE_CONFIG, CAPTURE_ENABLE|reg); 489 490 return (0); 491 } 492 493 int 494 ad1848_isa_trigger_output(addr, start, end, blksize, intr, arg, param) 495 void *addr; 496 void *start, *end; 497 int blksize; 498 void (*intr) __P((void *)); 499 void *arg; 500 struct audio_params *param; 501 { 502 struct ad1848_isa_softc *isc = addr; 503 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 504 u_int8_t reg; 505 506 isa_dmastart(isc->sc_ic, isc->sc_playdrq, start, 507 (char *)end - (char *)start, NULL, 508 DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT); 509 510 isc->sc_playrun = 1; 511 isc->sc_intr = intr; 512 isc->sc_arg = arg; 513 514 blksize = (blksize * 8) / (param->precision * param->factor * param->channels) - 1; 515 516 ad_write(sc, SP_LOWER_BASE_COUNT, blksize & 0xff); 517 ad_write(sc, SP_UPPER_BASE_COUNT, blksize >> 8); 518 519 reg = ad_read(sc, SP_INTERFACE_CONFIG); 520 ad_write(sc, SP_INTERFACE_CONFIG, PLAYBACK_ENABLE|reg); 521 522 return (0); 523 } 524 525 int 526 ad1848_isa_halt_input(addr) 527 void *addr; 528 { 529 struct ad1848_isa_softc *isc = addr; 530 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 531 532 if (isc->sc_recrun) { 533 ad1848_halt_input(sc); 534 isa_dmaabort(isc->sc_ic, isc->sc_recdrq); 535 isc->sc_recrun = 0; 536 } 537 538 return (0); 539 } 540 541 int 542 ad1848_isa_halt_output(addr) 543 void *addr; 544 { 545 struct ad1848_isa_softc *isc = addr; 546 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 547 548 if (isc->sc_playrun) { 549 ad1848_halt_output(sc); 550 isa_dmaabort(isc->sc_ic, isc->sc_playdrq); 551 isc->sc_playrun = 0; 552 } 553 554 return (0); 555 } 556 557 int 558 ad1848_isa_intr(arg) 559 void *arg; 560 { 561 struct ad1848_isa_softc *isc = arg; 562 struct ad1848_softc *sc = (struct ad1848_softc *)&isc->sc_ad1848; 563 int retval = 0; 564 u_char status; 565 566 /* Get intr status */ 567 status = ADREAD(sc, AD1848_STATUS); 568 569 #ifdef AUDIO_DEBUG 570 if (ad1848debug > 1) 571 printf("ad1848_isa_intr: intr=%p status=%x\n", isc->sc_intr, status); 572 #endif 573 isc->sc_interrupts++; 574 575 /* Handle interrupt */ 576 if (isc->sc_intr && (status & INTERRUPT_STATUS)) { 577 (*isc->sc_intr)(isc->sc_arg); 578 retval = 1; 579 } 580 581 /* clear interrupt */ 582 if (status & INTERRUPT_STATUS) 583 ADWRITE(sc, AD1848_STATUS, 0); 584 585 return(retval); 586 } 587 588 void * 589 ad1848_isa_malloc(addr, direction, size, pool, flags) 590 void *addr; 591 int direction; 592 size_t size; 593 int pool, flags; 594 { 595 struct ad1848_isa_softc *isc = addr; 596 int drq; 597 598 if (direction == AUMODE_PLAY) 599 drq = isc->sc_playdrq; 600 else 601 drq = isc->sc_recdrq; 602 return (isa_malloc(isc->sc_ic, drq, size, pool, flags)); 603 } 604 605 void 606 ad1848_isa_free(addr, ptr, pool) 607 void *addr; 608 void *ptr; 609 int pool; 610 { 611 isa_free(ptr, pool); 612 } 613 614 size_t 615 ad1848_isa_round_buffersize(addr, direction, size) 616 void *addr; 617 int direction; 618 size_t size; 619 { 620 if (size > MAX_ISADMA) 621 size = MAX_ISADMA; 622 return (size); 623 } 624 625 int 626 ad1848_isa_mappage(addr, mem, off, prot) 627 void *addr; 628 void *mem; 629 int off; 630 int prot; 631 { 632 return isa_mappage(mem, off, prot); 633 } 634 635 int 636 ad1848_isa_get_props(addr) 637 void *addr; 638 { 639 struct ad1848_isa_softc *isc = addr; 640 641 return (AUDIO_PROP_MMAP | 642 (isc->sc_playdrq != isc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0)); 643 } 644
Indexes created Mon Sep 29 03:10:08 GMT 2025