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addcom_isa.c revision 1.1
      1 /*	$NetBSD: addcom_isa.c,v 1.1 2000/04/21 17:48:30 explorer Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  * Copyright (c) 1995 Charles M. Hannum.  All rights reserved.
      6  *
      7  * This code is derived from public-domain software written by
      8  * Roland McGrath, and information provided by David Muir Sharnoff.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by Charles M. Hannum.
     21  * 4. The name of the author may not be used to endorse or promote products
     22  *    derived from this software without specific prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     34  */
     35 
     36 /*
     37  * This code was written and tested with the Addonics FlexPort 8S.
     38  * It has 8 ports, using 16650-compatible chips, sharing a single
     39  * interrupt.
     40  *
     41  * An interrupt status register exists at 0x240, according to the
     42  * skimpy documentation supplied, but it isn't clear that the address
     43  * of this register changes if the card base address changes.
     44  * The code assumes it will, this needs to be tested.
     45  *
     46  * This card is different from the boca or other cards in that ports
     47  * 0..5 are from addresses 0x108..0x137, and 6..7 are from 0x200..0x20f,
     48  * making a gap that the other cards do not have.
     49  *
     50  * The addresses which are documented are 0x108, 0x1108, 0x1d08, and
     51  * 0x8508, for the base (port 0) address.
     52  *
     53  * --Michael <explorer (at) netbsd.org> -- April 21, 2000
     54  */
     55 
     56 #include <sys/param.h>
     57 #include <sys/systm.h>
     58 #include <sys/device.h>
     59 #include <sys/termios.h>
     60 
     61 #include <machine/bus.h>
     62 #include <machine/intr.h>
     63 
     64 #include <dev/ic/comreg.h>
     65 #include <dev/ic/comvar.h>
     66 
     67 #include <dev/isa/isavar.h>
     68 #include <dev/isa/com_multi.h>
     69 
     70 #define	NSLAVES	8
     71 
     72 /*
     73  * These may be bogus... XXXMLG
     74  */
     75 #define STATUS_OFFSET	0x138		/* offset from board base address */
     76 #define	STATUS_SIZE	8		/* 8 bytes reserved for irq status */
     77 
     78 struct addcom_softc {
     79 	struct device sc_dev;
     80 	void *sc_ih;
     81 
     82 	bus_space_tag_t sc_iot;
     83 	int sc_iobase;
     84 
     85 	int sc_alive;			/* mask of slave units attached */
     86 	void *sc_slaves[NSLAVES];	/* com device unit numbers */
     87 	bus_space_handle_t sc_slaveioh[NSLAVES];
     88 	bus_space_handle_t sc_statusioh;
     89 };
     90 
     91 #define SLAVE_IOBASE_OFFSET 0x108
     92 static int slave_iobases[8] = {
     93 	0x108,	/* port 0, base port */
     94 	0x110,
     95 	0x118,
     96 	0x120,
     97 	0x128,
     98 	0x130,
     99 	0x200,	/* port 7, note address skip... */
    100 	0x208
    101 };
    102 
    103 int addcomprobe __P((struct device *, struct cfdata *, void *));
    104 void addcomattach __P((struct device *, struct device *, void *));
    105 int addcomintr __P((void *));
    106 int addcomprint __P((void *, const char *));
    107 
    108 struct cfattach addcom_isa_ca = {
    109 	sizeof(struct addcom_softc), addcomprobe, addcomattach,
    110 };
    111 
    112 int
    113 addcomprobe(struct device *parent, struct cfdata *self, void *aux)
    114 {
    115 	struct isa_attach_args *ia = aux;
    116 	int iobase = ia->ia_iobase;
    117 	bus_space_tag_t iot = ia->ia_iot;
    118 	bus_space_handle_t ioh;
    119 	int i, rv = 1;
    120 
    121 	/*
    122 	 * Do the normal com probe for the first UART and assume
    123 	 * its presence, and the ability to map the other UARTS,
    124 	 * means there is a multiport board there.
    125 	 * XXX Needs more robustness.
    126 	 */
    127 
    128 	/* Disallow wildcarded i/o address. */
    129 	if (ia->ia_iobase == ISACF_PORT_DEFAULT)
    130 		return (0);
    131 
    132 	/* if the first port is in use as console, then it. */
    133 	if (com_is_console(iot, iobase, 0))
    134 		goto checkmappings;
    135 
    136 	if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
    137 		rv = 0;
    138 		goto out;
    139 	}
    140 	rv = comprobe1(iot, ioh);
    141 	bus_space_unmap(iot, ioh, COM_NPORTS);
    142 	if (rv == 0)
    143 		goto out;
    144 
    145 checkmappings:
    146 	for (i = 1; i < NSLAVES; i++) {
    147 		iobase += slave_iobases[i] - slave_iobases[i - 1];
    148 
    149 		if (com_is_console(iot, iobase, 0))
    150 			continue;
    151 
    152 		if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
    153 			rv = 0;
    154 			goto out;
    155 		}
    156 		bus_space_unmap(iot, ioh, COM_NPORTS);
    157 	}
    158 
    159 out:
    160 	if (rv)
    161 		ia->ia_iosize = NSLAVES * COM_NPORTS;
    162 	return (rv);
    163 }
    164 
    165 int
    166 addcomprint(void *aux, const char *pnp)
    167 {
    168 	struct commulti_attach_args *ca = aux;
    169 
    170 	if (pnp)
    171 		printf("com at %s", pnp);
    172 	printf(" slave %d", ca->ca_slave);
    173 	return (UNCONF);
    174 }
    175 
    176 void
    177 addcomattach(struct device *parent, struct device *self, void *aux)
    178 {
    179 	struct addcom_softc *sc = (void *)self;
    180 	struct isa_attach_args *ia = aux;
    181 	struct commulti_attach_args ca;
    182 	bus_space_tag_t iot = ia->ia_iot;
    183 	int i, iobase;
    184 
    185 	printf("\n");
    186 
    187 	sc->sc_iot = ia->ia_iot;
    188 	sc->sc_iobase = ia->ia_iobase;
    189 
    190 	for (i = 0; i < NSLAVES; i++) {
    191 		iobase = sc->sc_iobase
    192 			+ slave_iobases[i]
    193 			- SLAVE_IOBASE_OFFSET;
    194 		if (!com_is_console(iot, iobase, &sc->sc_slaveioh[i]) &&
    195 		    bus_space_map(iot, iobase, COM_NPORTS, 0,
    196 				  &sc->sc_slaveioh[i])) {
    197 			printf("%s: can't map i/o space for slave %d\n",
    198 			       sc->sc_dev.dv_xname, i);
    199 			return;
    200 		}
    201 	}
    202 
    203 	if (bus_space_map(iot, sc->sc_iobase + STATUS_OFFSET, STATUS_SIZE,
    204 			  0, &sc->sc_statusioh)) {
    205 		printf("%s: can't map status space\n", sc->sc_dev.dv_xname);
    206 		return;
    207 	}
    208 
    209 	for (i = 0; i < NSLAVES; i++) {
    210 		ca.ca_slave = i;
    211 		ca.ca_iot = sc->sc_iot;
    212 		ca.ca_ioh = sc->sc_slaveioh[i];
    213 		ca.ca_iobase = sc->sc_iobase
    214 			+ slave_iobases[i]
    215 			- SLAVE_IOBASE_OFFSET;
    216 		ca.ca_noien = 0;
    217 
    218 		sc->sc_slaves[i] = config_found(self, &ca, addcomprint);
    219 		if (sc->sc_slaves[i] != NULL)
    220 			sc->sc_alive |= 1 << i;
    221 	}
    222 
    223 	sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
    224 				       IPL_SERIAL, addcomintr, sc);
    225 }
    226 
    227 int
    228 addcomintr(void *arg)
    229 {
    230 	struct addcom_softc *sc = arg;
    231 	bus_space_tag_t iot = sc->sc_iot;
    232 	int alive = sc->sc_alive;
    233 	int bits;
    234 
    235 	bits = bus_space_read_1(iot, sc->sc_statusioh, 0) & alive;
    236 	if (bits == 0)
    237 		return (0);
    238 
    239 	for (;;) {
    240 #define	TRY(n) \
    241 		if (bits & (1 << (n))) \
    242 			comintr(sc->sc_slaves[n]);
    243 		TRY(0);
    244 		TRY(1);
    245 		TRY(2);
    246 		TRY(3);
    247 		TRY(4);
    248 		TRY(5);
    249 		TRY(6);
    250 		TRY(7);
    251 #undef TRY
    252 		bits = bus_space_read_1(iot, sc->sc_statusioh, 0) & alive;
    253 		if (bits == 0)
    254 			return (1);
    255  	}
    256 }
    257