addcom_isa.c revision 1.3
1 /* $NetBSD: addcom_isa.c,v 1.3 2001/11/13 08:01:09 lukem Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Michael Graff. All rights reserved. 5 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 6 * Copyright (c) 1995 Charles M. Hannum. All rights reserved. 7 * 8 * This code is derived from public-domain software written by 9 * Roland McGrath, and information provided by David Muir Sharnoff. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Charles M. Hannum. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 /* 38 * This code was written and tested with the Addonics FlexPort 8S. 39 * It has 8 ports, using 16650-compatible chips, sharing a single 40 * interrupt. 41 * 42 * An interrupt status register exists at 0x240, according to the 43 * skimpy documentation supplied. It doesn't change depending on 44 * io base address, so only one of these cards can ever be used at 45 * a time. 46 * 47 * This card is different from the boca or other cards in that ports 48 * 0..5 are from addresses 0x108..0x137, and 6..7 are from 0x200..0x20f, 49 * making a gap that the other cards do not have. 50 * 51 * The addresses which are documented are 0x108, 0x1108, 0x1d08, and 52 * 0x8508, for the base (port 0) address. 53 * 54 * --Michael <explorer (at) netbsd.org> -- April 21, 2000 55 */ 56 57 #include <sys/cdefs.h> 58 __KERNEL_RCSID(0, "$NetBSD: addcom_isa.c,v 1.3 2001/11/13 08:01:09 lukem Exp $"); 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/device.h> 63 #include <sys/termios.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/ic/comreg.h> 69 #include <dev/ic/comvar.h> 70 71 #include <dev/isa/isavar.h> 72 #include <dev/isa/com_multi.h> 73 74 #define NSLAVES 8 75 76 /* 77 * Grr. This card always uses 0x420 for the status register, regardless 78 * of io base address. 79 */ 80 #define STATUS_IOADDR 0x420 81 #define STATUS_SIZE 8 /* May be bogus... */ 82 83 struct addcom_softc { 84 struct device sc_dev; 85 void *sc_ih; 86 87 bus_space_tag_t sc_iot; 88 int sc_iobase; 89 90 int sc_alive; /* mask of slave units attached */ 91 void *sc_slaves[NSLAVES]; /* com device unit numbers */ 92 bus_space_handle_t sc_slaveioh[NSLAVES]; 93 bus_space_handle_t sc_statusioh; 94 }; 95 96 #define SLAVE_IOBASE_OFFSET 0x108 97 static int slave_iobases[8] = { 98 0x108, /* port 0, base port */ 99 0x110, 100 0x118, 101 0x120, 102 0x128, 103 0x130, 104 0x200, /* port 7, note address skip... */ 105 0x208 106 }; 107 108 int addcomprobe __P((struct device *, struct cfdata *, void *)); 109 void addcomattach __P((struct device *, struct device *, void *)); 110 int addcomintr __P((void *)); 111 int addcomprint __P((void *, const char *)); 112 113 struct cfattach addcom_isa_ca = { 114 sizeof(struct addcom_softc), addcomprobe, addcomattach, 115 }; 116 117 int 118 addcomprobe(struct device *parent, struct cfdata *self, void *aux) 119 { 120 struct isa_attach_args *ia = aux; 121 int iobase = ia->ia_iobase; 122 bus_space_tag_t iot = ia->ia_iot; 123 bus_space_handle_t ioh; 124 int i, rv = 1; 125 126 /* 127 * Do the normal com probe for the first UART and assume 128 * its presence, and the ability to map the other UARTS, 129 * means there is a multiport board there. 130 * XXX Needs more robustness. 131 */ 132 133 /* Disallow wildcarded i/o address. */ 134 if (ia->ia_iobase == ISACF_PORT_DEFAULT) 135 return (0); 136 137 /* if the first port is in use as console, then it. */ 138 if (com_is_console(iot, iobase, 0)) 139 goto checkmappings; 140 141 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) { 142 rv = 0; 143 goto out; 144 } 145 rv = comprobe1(iot, ioh); 146 bus_space_unmap(iot, ioh, COM_NPORTS); 147 if (rv == 0) 148 goto out; 149 150 checkmappings: 151 for (i = 1; i < NSLAVES; i++) { 152 iobase += slave_iobases[i] - slave_iobases[i - 1]; 153 154 if (com_is_console(iot, iobase, 0)) 155 continue; 156 157 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) { 158 rv = 0; 159 goto out; 160 } 161 bus_space_unmap(iot, ioh, COM_NPORTS); 162 } 163 164 out: 165 if (rv) 166 ia->ia_iosize = NSLAVES * COM_NPORTS; 167 return (rv); 168 } 169 170 int 171 addcomprint(void *aux, const char *pnp) 172 { 173 struct commulti_attach_args *ca = aux; 174 175 if (pnp) 176 printf("com at %s", pnp); 177 printf(" slave %d", ca->ca_slave); 178 return (UNCONF); 179 } 180 181 void 182 addcomattach(struct device *parent, struct device *self, void *aux) 183 { 184 struct addcom_softc *sc = (void *)self; 185 struct isa_attach_args *ia = aux; 186 struct commulti_attach_args ca; 187 bus_space_tag_t iot = ia->ia_iot; 188 int i, iobase; 189 190 printf("\n"); 191 192 sc->sc_iot = ia->ia_iot; 193 sc->sc_iobase = ia->ia_iobase; 194 195 if (bus_space_map(iot, STATUS_IOADDR, STATUS_SIZE, 196 0, &sc->sc_statusioh)) { 197 printf("%s: can't map status space\n", sc->sc_dev.dv_xname); 198 return; 199 } 200 201 for (i = 0; i < NSLAVES; i++) { 202 iobase = sc->sc_iobase 203 + slave_iobases[i] 204 - SLAVE_IOBASE_OFFSET; 205 if (!com_is_console(iot, iobase, &sc->sc_slaveioh[i]) && 206 bus_space_map(iot, iobase, COM_NPORTS, 0, 207 &sc->sc_slaveioh[i])) { 208 printf("%s: can't map i/o space for slave %d\n", 209 sc->sc_dev.dv_xname, i); 210 return; 211 } 212 } 213 214 for (i = 0; i < NSLAVES; i++) { 215 ca.ca_slave = i; 216 ca.ca_iot = sc->sc_iot; 217 ca.ca_ioh = sc->sc_slaveioh[i]; 218 ca.ca_iobase = sc->sc_iobase 219 + slave_iobases[i] 220 - SLAVE_IOBASE_OFFSET; 221 ca.ca_noien = 0; 222 223 sc->sc_slaves[i] = config_found(self, &ca, addcomprint); 224 if (sc->sc_slaves[i] != NULL) 225 sc->sc_alive |= 1 << i; 226 } 227 228 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 229 IPL_SERIAL, addcomintr, sc); 230 } 231 232 int 233 addcomintr(void *arg) 234 { 235 struct addcom_softc *sc = arg; 236 bus_space_tag_t iot = sc->sc_iot; 237 int alive = sc->sc_alive; 238 int bits; 239 240 bits = bus_space_read_1(iot, sc->sc_statusioh, 0) & alive; 241 if (bits == 0) 242 return (0); 243 244 for (;;) { 245 #define TRY(n) \ 246 if (bits & (1 << (n))) \ 247 comintr(sc->sc_slaves[n]); 248 TRY(0); 249 TRY(1); 250 TRY(2); 251 TRY(3); 252 TRY(4); 253 TRY(5); 254 TRY(6); 255 TRY(7); 256 #undef TRY 257 bits = bus_space_read_1(iot, sc->sc_statusioh, 0) & alive; 258 if (bits == 0) 259 return (1); 260 } 261 } 262
Indexes created Tue Sep 23 13:09:54 GMT 2025