cs89x0isa.c revision 1.15.16.1
1 /* $NetBSD: cs89x0isa.c,v 1.15.16.1 2012/02/18 07:34:26 mrg Exp $ */ 2 3 /* 4 * Copyright 1997 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36 /* isa DMA routines for cs89x0 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: cs89x0isa.c,v 1.15.16.1 2012/02/18 07:34:26 mrg Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/socket.h> 45 #include <sys/device.h> 46 47 #include <sys/rnd.h> 48 49 #include <net/if.h> 50 #include <net/if_ether.h> 51 #include <net/if_media.h> 52 53 #include <sys/bus.h> 54 55 #include <dev/isa/isareg.h> 56 #include <dev/isa/isavar.h> 57 #include <dev/isa/isadmavar.h> 58 59 #include <dev/ic/cs89x0reg.h> 60 #include <dev/ic/cs89x0var.h> 61 #include <dev/isa/cs89x0isavar.h> 62 63 #define DMA_STATUS_BITS 0x0007 /* bit masks for checking DMA status */ 64 #define DMA_STATUS_OK 0x0004 65 66 void 67 cs_isa_dma_attach(struct cs_softc *sc) 68 { 69 struct cs_softc_isa *isc = (struct cs_softc_isa *)sc; 70 71 if (isc->sc_drq == ISA_UNKNOWN_DRQ) 72 printf("%s: DMA channel unspecified, not using DMA\n", 73 device_xname(sc->sc_dev)); 74 else if (isc->sc_drq < 5 || isc->sc_drq > 7) 75 printf("%s: invalid DMA channel, not using DMA\n", 76 device_xname(sc->sc_dev)); 77 else { 78 bus_size_t maxsize; 79 bus_addr_t dma_addr; 80 81 maxsize = isa_dmamaxsize(isc->sc_ic, isc->sc_drq); 82 if (maxsize < CS8900_DMASIZE) { 83 printf("%s: max DMA size %lu is" 84 " less than required %d\n", 85 device_xname(sc->sc_dev), (u_long)maxsize, 86 CS8900_DMASIZE); 87 goto after_dma_block; 88 } 89 90 if (isa_drq_alloc(isc->sc_ic, isc->sc_drq) != 0) { 91 aprint_error_dev(sc->sc_dev, 92 "unable to reserve drq %d\n", 93 isc->sc_drq); 94 goto after_dma_block; 95 } 96 97 if (isa_dmamap_create(isc->sc_ic, isc->sc_drq, 98 CS8900_DMASIZE, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW) != 0) { 99 aprint_error_dev(sc->sc_dev, 100 "unable to create ISA DMA map\n"); 101 goto after_dma_block; 102 } 103 if (isa_dmamem_alloc(isc->sc_ic, isc->sc_drq, 104 CS8900_DMASIZE, &dma_addr, BUS_DMA_NOWAIT) != 0) { 105 aprint_error_dev(sc->sc_dev, 106 "unable to allocate DMA buffer\n"); 107 goto after_dma_block; 108 } 109 if (isa_dmamem_map(isc->sc_ic, isc->sc_drq, dma_addr, 110 CS8900_DMASIZE, (void **)&isc->sc_dmabase, 111 BUS_DMA_NOWAIT | BUS_DMA_COHERENT /* XXX */ ) != 0) { 112 aprint_error_dev(sc->sc_dev, 113 "unable to map DMA buffer\n"); 114 isa_dmamem_free(isc->sc_ic, isc->sc_drq, dma_addr, 115 CS8900_DMASIZE); 116 goto after_dma_block; 117 } 118 119 isc->sc_dmasize = CS8900_DMASIZE; 120 sc->sc_cfgflags |= CFGFLG_DMA_MODE; 121 isc->sc_dmaaddr = dma_addr; 122 after_dma_block: 123 ; 124 } 125 } 126 127 void cs_isa_dma_chipinit(struct cs_softc *sc) 128 { 129 struct cs_softc_isa *isc = (struct cs_softc_isa *)sc; 130 131 if (sc->sc_cfgflags & CFGFLG_DMA_MODE) { 132 /* 133 * First we program the DMA controller and ensure the memory 134 * buffer is valid. If it isn't then we just go on without 135 * DMA. 136 */ 137 if (isa_dmastart(isc->sc_ic, isc->sc_drq, isc->sc_dmabase, 138 isc->sc_dmasize, NULL, DMAMODE_READ | DMAMODE_LOOPDEMAND, 139 BUS_DMA_NOWAIT)) { 140 /* XXX XXX XXX */ 141 panic("%s: unable to start DMA", 142 device_xname(sc->sc_dev)); 143 } 144 isc->sc_dmacur = isc->sc_dmabase; 145 146 /* interrupt when a DMA'd frame is received */ 147 CS_WRITE_PACKET_PAGE(sc, PKTPG_RX_CFG, 148 RX_CFG_ALL_IE | RX_CFG_RX_DMA_ONLY); 149 150 /* 151 * set the DMA burst bit so we don't tie up the bus for too 152 * long. 153 */ 154 if (isc->sc_dmasize == 16384) { 155 CS_WRITE_PACKET_PAGE(sc, PKTPG_BUS_CTL, 156 ((CS_READ_PACKET_PAGE(sc, PKTPG_BUS_CTL) & 157 ~BUS_CTL_DMA_SIZE) | BUS_CTL_DMA_BURST)); 158 } else { /* use 64K */ 159 CS_WRITE_PACKET_PAGE(sc, PKTPG_BUS_CTL, 160 CS_READ_PACKET_PAGE(sc, PKTPG_BUS_CTL) | 161 BUS_CTL_DMA_SIZE | BUS_CTL_DMA_BURST); 162 } 163 164 CS_WRITE_PACKET_PAGE(sc, PKTPG_DMA_CHANNEL, isc->sc_drq - 5); 165 } 166 } 167 168 void cs_process_rx_dma(struct cs_softc *sc) 169 { 170 struct cs_softc_isa *isc = (struct cs_softc_isa *)sc; 171 struct ifnet *ifp; 172 u_int16_t num_dma_frames; 173 u_int16_t pkt_length; 174 u_int16_t status; 175 u_int to_copy; 176 char *dma_mem_ptr; 177 struct mbuf *m; 178 u_char *pBuff; 179 int pad; 180 181 /* initialise the pointers */ 182 ifp = &sc->sc_ethercom.ec_if; 183 184 /* Read the number of frames DMAed. */ 185 num_dma_frames = CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 186 num_dma_frames &= (u_int16_t) (0x0fff); 187 188 /* 189 * Loop till number of DMA frames ready to read is zero. After 190 * reading the frame out of memory we must check if any have been 191 * received while we were processing 192 */ 193 while (num_dma_frames != 0) { 194 dma_mem_ptr = isc->sc_dmacur; 195 196 /* 197 * process all of the DMA frames in memory 198 * 199 * This loop relies on the dma_mem_ptr variable being set to the 200 * next frames start address. 201 */ 202 for (; num_dma_frames > 0; num_dma_frames--) { 203 204 /* 205 * Get the length and status of the packet. Only the 206 * status is guaranteed to be at dma_mem_ptr, ie need 207 * to check for wraparound before reading the length 208 */ 209 status = *((u_int16_t *) dma_mem_ptr); 210 dma_mem_ptr += 2; 211 if (dma_mem_ptr > (isc->sc_dmabase + isc->sc_dmasize)) { 212 dma_mem_ptr = isc->sc_dmabase; 213 } 214 pkt_length = *((u_int16_t *) dma_mem_ptr); 215 dma_mem_ptr += 2; 216 217 /* Do some sanity checks on the length and status. */ 218 if ((pkt_length > ETHER_MAX_LEN) || 219 ((status & DMA_STATUS_BITS) != DMA_STATUS_OK)) { 220 /* 221 * the SCO driver kills the adapter in this 222 * situation 223 */ 224 /* 225 * should increment the error count and reset 226 * the DMA operation. 227 */ 228 printf("%s: cs_process_rx_dma: " 229 "DMA buffer out of sync about to reset\n", 230 device_xname(sc->sc_dev)); 231 ifp->if_ierrors++; 232 233 /* skip the rest of the DMA buffer */ 234 isa_dmaabort(isc->sc_ic, isc->sc_drq); 235 236 /* now reset the chip and reinitialise */ 237 cs_init(&sc->sc_ethercom.ec_if); 238 return; 239 } 240 /* Check the status of the received packet. */ 241 if (status & RX_EVENT_RX_OK) { 242 /* get a new mbuf */ 243 MGETHDR(m, M_DONTWAIT, MT_DATA); 244 if (m == 0) { 245 printf("%s: cs_process_rx_dma: " 246 "unable to allocate mbuf\n", 247 device_xname(sc->sc_dev)); 248 ifp->if_ierrors++; 249 /* 250 * couldn't allocate an mbuf so 251 * things are not good, may as well 252 * drop all the packets I think. 253 */ 254 CS_READ_PACKET_PAGE(sc, 255 PKTPG_DMA_FRAME_COUNT); 256 257 /* now reset DMA operation */ 258 isa_dmaabort(isc->sc_ic, isc->sc_drq); 259 260 /* 261 * now reset the chip and 262 * reinitialise 263 */ 264 cs_init(&sc->sc_ethercom.ec_if); 265 return; 266 } 267 /* 268 * save processing by always using a mbuf 269 * cluster, guaranteed to fit packet 270 */ 271 MCLGET(m, M_DONTWAIT); 272 if ((m->m_flags & M_EXT) == 0) { 273 /* couldn't allocate an mbuf cluster */ 274 printf("%s: cs_process_rx_dma: " 275 "unable to allocate a cluster\n", 276 device_xname(sc->sc_dev)); 277 m_freem(m); 278 279 /* skip the frame */ 280 CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 281 isa_dmaabort(isc->sc_ic, isc->sc_drq); 282 283 /* 284 * now reset the chip and 285 * reinitialise 286 */ 287 cs_init(&sc->sc_ethercom.ec_if); 288 return; 289 } 290 m->m_pkthdr.rcvif = ifp; 291 m->m_pkthdr.len = pkt_length; 292 m->m_len = pkt_length; 293 294 /* 295 * align ip header on word boundary for 296 * ipintr 297 */ 298 pad = ALIGN(sizeof(struct ether_header)) - 299 sizeof(struct ether_header); 300 m->m_data += pad; 301 302 /* 303 * set up the buffer pointer to point to the 304 * data area 305 */ 306 pBuff = mtod(m, char *); 307 308 /* 309 * Read the frame into free_pktbuf 310 * The buffer is circular buffer, either 311 * 16K or 64K in length. 312 * 313 * need to check where the end of the buffer 314 * is and go back to the start. 315 */ 316 if ((dma_mem_ptr + pkt_length) < 317 (isc->sc_dmabase + isc->sc_dmasize)) { 318 /* 319 * No wrap around. Copy the frame 320 * header 321 */ 322 memcpy(pBuff, dma_mem_ptr, pkt_length); 323 dma_mem_ptr += pkt_length; 324 } else { 325 to_copy = (u_int) 326 ((isc->sc_dmabase + isc->sc_dmasize) - 327 dma_mem_ptr); 328 329 /* Copy the first half of the frame. */ 330 memcpy(pBuff, dma_mem_ptr, to_copy); 331 pBuff += to_copy; 332 333 /* 334 * Rest of the frame is to be read 335 * from the first byte of the DMA 336 * memory. 337 */ 338 /* 339 * Get the number of bytes leftout in 340 * the frame. 341 */ 342 to_copy = pkt_length - to_copy; 343 344 dma_mem_ptr = isc->sc_dmabase; 345 346 /* Copy rest of the frame. */ 347 memcpy(pBuff, dma_mem_ptr, to_copy); 348 dma_mem_ptr += to_copy; 349 } 350 351 cs_ether_input(sc, m); 352 } 353 /* (status & RX_OK) */ 354 else { 355 /* the frame was not received OK */ 356 /* Increment the input error count */ 357 ifp->if_ierrors++; 358 359 /* 360 * If debugging is enabled then log error 361 * messages if we got any. 362 */ 363 if ((ifp->if_flags & IFF_DEBUG) && 364 status != REG_NUM_RX_EVENT) 365 cs_print_rx_errors(sc, status); 366 } 367 /* 368 * now update the current frame pointer. the 369 * dma_mem_ptr should point to the next packet to be 370 * received, without the alignment considerations. 371 * 372 * The cs8900 pads all frames to start at the next 32bit 373 * aligned addres. hence we need to pad our offset 374 * pointer. 375 */ 376 dma_mem_ptr += 3; 377 dma_mem_ptr = (char *) 378 ((long) dma_mem_ptr & 0xfffffffc); 379 if (dma_mem_ptr < (isc->sc_dmabase + isc->sc_dmasize)) { 380 isc->sc_dmacur = dma_mem_ptr; 381 } else { 382 dma_mem_ptr = isc->sc_dmacur = isc->sc_dmabase; 383 } 384 } /* for all frames */ 385 /* Read the number of frames DMAed again. */ 386 num_dma_frames = CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 387 num_dma_frames &= (u_int16_t) (0x0fff); 388 } /* while there are frames left */ 389 } 390
Indexes created Wed Oct 01 15:09:59 GMT 2025