dpt_isa.c revision 1.10
1 /* $NetBSD: dpt_isa.c,v 1.10 2002/10/02 03:10:46 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, 2001 Andrew Doran <ad (at) netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /* 31 * ISA front-end for DPT EATA SCSI driver. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: dpt_isa.c,v 1.10 2002/10/02 03:10:46 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 #include <sys/queue.h> 41 42 #include <machine/bus.h> 43 #include <machine/intr.h> 44 45 #include <dev/scsipi/scsipi_all.h> 46 #include <dev/scsipi/scsiconf.h> 47 48 #include <dev/isa/isareg.h> 49 #include <dev/isa/isavar.h> 50 51 #include <dev/isa/isadmareg.h> 52 #include <dev/isa/isadmavar.h> 53 54 #include <dev/ic/dptreg.h> 55 #include <dev/ic/dptvar.h> 56 57 #define DPT_ISA_IOSIZE 16 58 #define DPT_ISA_MAXCCBS 16 59 60 static void dpt_isa_attach(struct device *, struct device *, void *); 61 static int dpt_isa_match(struct device *, struct cfdata *, void *); 62 static int dpt_isa_probe(struct isa_attach_args *, int); 63 static int dpt_isa_wait(bus_space_handle_t, bus_space_tag_t, u_int8_t, 64 u_int8_t); 65 66 CFATTACH_DECL(dpt_isa, sizeof(struct dpt_softc), 67 dpt_isa_match, dpt_isa_attach, NULL, NULL); 68 69 /* Try 'less intrusive' addresses first */ 70 static const int dpt_isa_iobases[] = { 0x230, 0x330, 0x1f0, 0x170, 0 }; 71 72 /* 73 * Wait for the HBA status register to reach a specific state. 74 */ 75 static int 76 dpt_isa_wait(bus_space_handle_t ioh, bus_space_tag_t iot, u_int8_t mask, 77 u_int8_t state) 78 { 79 int ms; 80 81 for (ms = 2000 * 10; ms; ms--) { 82 if ((bus_space_read_1(iot, ioh, HA_STATUS) & mask) == state) 83 return (0); 84 DELAY(100); 85 } 86 87 return (-1); 88 } 89 90 /* 91 * Match a supported board. 92 */ 93 static int 94 dpt_isa_match(struct device *parent, struct cfdata *match, void *aux) 95 { 96 struct isa_attach_args *ia = aux; 97 int i; 98 99 if (ia->ia_nio < 1) 100 return (0); 101 if (ia->ia_nirq < 1) 102 return (0); 103 if (ia->ia_ndrq < 1) 104 return (0); 105 106 if (ISA_DIRECT_CONFIG(ia)) 107 return (0); 108 109 if (ia->ia_io[0].ir_addr != ISACF_PORT_DEFAULT) 110 return (dpt_isa_probe(ia, ia->ia_io[0].ir_addr)); 111 112 for (i = 0; dpt_isa_iobases[i] != 0; i++) { 113 if (dpt_isa_probe(ia, dpt_isa_iobases[i])) { 114 ia->ia_io[0].ir_addr = dpt_isa_iobases[i]; 115 return (1); 116 } 117 } 118 119 return (0); 120 } 121 122 /* 123 * Probe for a supported board. 124 */ 125 static int 126 dpt_isa_probe(struct isa_attach_args *ia, int iobase) 127 { 128 struct eata_cfg ec; 129 bus_space_handle_t ioh; 130 bus_space_tag_t iot; 131 int i, j, stat, irq, drq; 132 u_int16_t *p; 133 134 iot = ia->ia_iot; 135 136 if (bus_space_map(iot, iobase, DPT_ISA_IOSIZE, 0, &ioh) != 0) 137 return(0); 138 139 /* 140 * Assumuing the DPT BIOS reset the board, we shouldn't need to 141 * re-do it here. The tests below should weed out non-EATA devices 142 * before we start poking any registers. 143 */ 144 for (i = 1000; i; i--) { 145 if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_READY) != 0) 146 break; 147 DELAY(2000); 148 } 149 150 if (i == 0) 151 goto bad; 152 153 while((((stat = bus_space_read_1(iot, ioh, HA_STATUS)) 154 != (HA_ST_READY|HA_ST_SEEK_COMPLETE)) 155 && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR)) 156 && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR|HA_ST_DRQ))) 157 || (dpt_isa_wait(ioh, iot, HA_ST_BUSY, 0))) 158 /* RAID drives still spinning up? */ 159 if (bus_space_read_1(iot, ioh, HA_ERROR) != 'D' || 160 bus_space_read_1(iot, ioh, HA_ERROR + 1) != 'P' || 161 bus_space_read_1(iot, ioh, HA_ERROR + 2) != 'T') 162 goto bad; 163 164 /* 165 * At this point we can be confident that we are dealing with a DPT 166 * HBA. Issue the read-config command and wait for the data to 167 * appear. XXX We shouldn't be doing this with PIO, but it makes it 168 * a lot easier as no DMA setup is required. 169 */ 170 bus_space_write_1(iot, ioh, HA_COMMAND, CP_PIO_GETCFG); 171 memset(&ec, 0, sizeof(ec)); 172 i = ((int)&((struct eata_cfg *)0)->ec_cfglen + 173 sizeof(ec.ec_cfglen)) >> 1; 174 p = (u_int16_t *)&ec; 175 176 if (dpt_isa_wait(ioh, iot, 0xFF, HA_ST_DATA_RDY)) 177 goto bad; 178 179 /* Begin reading */ 180 while (i--) 181 *p++ = bus_space_read_stream_2(iot, ioh, HA_DATA); 182 183 if ((i = ec.ec_cfglen) > (sizeof(struct eata_cfg) 184 - (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) 185 - sizeof(ec.ec_cfglen))) 186 i = sizeof(struct eata_cfg) 187 - (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) 188 - sizeof(ec.ec_cfglen); 189 190 j = i + (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) + 191 sizeof(ec.ec_cfglen); 192 i >>= 1; 193 194 while (i--) 195 *p++ = bus_space_read_stream_2(iot, ioh, HA_DATA); 196 197 /* Flush until we have read 512 bytes. */ 198 i = (512 - j + 1) >> 1; 199 while (i--) 200 bus_space_read_stream_2(iot, ioh, HA_DATA); 201 202 /* Puke if we don't like the returned configuration data. */ 203 if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_ERROR) != 0 || 204 memcmp(ec.ec_eatasig, "EATA", 4) != 0 || 205 (ec.ec_feat0 & (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) != 206 (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) 207 goto bad; 208 209 /* 210 * Which DMA channel to use: if it was hardwired in the kernel 211 * configuration, use that value. If the HBA told us, use that 212 * value. Otherwise, puke. 213 */ 214 if ((drq = ia->ia_drq[0].ir_drq) == ISACF_DRQ_DEFAULT) { 215 int dmanum = ((ec.ec_feat1 & EC_F1_DMA_NUM_MASK) >> 216 EC_F1_DMA_NUM_SHIFT); 217 218 if ((ec.ec_feat0 & EC_F0_DMA_NUM_VALID) == 0 || dmanum > 3) 219 goto bad; 220 drq = "\0\7\6\5"[dmanum]; 221 } 222 223 /* 224 * Which IRQ to use: if it was hardwired in the kernel configuration, 225 * use that value. Otherwise, use what the HBA told us. 226 */ 227 if ((irq = ia->ia_irq[0].ir_irq) == ISACF_IRQ_DEFAULT) 228 irq = ((ec.ec_feat1 & EC_F1_IRQ_NUM_MASK) >> 229 EC_F1_IRQ_NUM_SHIFT); 230 231 ia->ia_nio = 1; 232 ia->ia_io[0].ir_size = DPT_ISA_IOSIZE; 233 234 ia->ia_nirq = 1; 235 ia->ia_irq[0].ir_irq = irq; 236 237 ia->ia_ndrq = 1; 238 ia->ia_drq[0].ir_drq = drq; 239 240 ia->ia_niomem = 0; 241 242 bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE); 243 return (1); 244 bad: 245 bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE); 246 return (0); 247 } 248 249 /* 250 * Attach a matched board. 251 */ 252 static void 253 dpt_isa_attach(struct device *parent, struct device *self, void *aux) 254 { 255 struct isa_attach_args *ia; 256 isa_chipset_tag_t ic; 257 bus_space_handle_t ioh; 258 bus_space_tag_t iot; 259 struct dpt_softc *sc; 260 struct eata_cfg *ec; 261 int error; 262 263 ia = aux; 264 sc = (struct dpt_softc *)self; 265 iot = ia->ia_iot; 266 ic = ia->ia_ic; 267 268 printf(": "); 269 270 if ((error = bus_space_map(iot, ia->ia_io[0].ir_addr, DPT_ISA_IOSIZE, 271 0, &ioh)) != 0) { 272 printf("can't map i/o space, error = %d\n", error); 273 return; 274 } 275 276 sc->sc_iot = iot; 277 sc->sc_ioh = ioh; 278 sc->sc_dmat = ia->ia_dmat; 279 280 if ((error = isa_dmacascade(ic, ia->ia_drq[0].ir_drq)) != 0) { 281 printf("unable to cascade DRQ, error = %d\n", error); 282 return; 283 } 284 285 /* Establish the interrupt. */ 286 sc->sc_ih = isa_intr_establish(ic, ia->ia_irq[0].ir_irq, IST_EDGE, 287 IPL_BIO, dpt_intr, sc); 288 if (sc->sc_ih == NULL) { 289 printf("can't establish interrupt\n"); 290 return; 291 } 292 293 if (dpt_readcfg(sc)) { 294 printf("readcfg failed - see dpt(4)\n"); 295 return; 296 } 297 298 /* 299 * Now attach to the bus-independent code. XXX We need to force 300 * parameters that aren't filled in by some ISA boards. In 301 * particular, due to the limited amount of memory we have to play 302 * with for DMA, clamp the number of CCBs to 16. 303 */ 304 ec = &sc->sc_ec; 305 306 if (be16toh(*(int16_t *)ec->ec_queuedepth) > DPT_ISA_MAXCCBS) 307 *(int16_t *)ec->ec_queuedepth = htobe16(DPT_ISA_MAXCCBS); 308 if (ec->ec_maxlun == 0) 309 ec->ec_maxlun = 7; 310 if ((ec->ec_feat3 & EC_F3_MAX_TARGET_MASK) >> EC_F3_MAX_TARGET_SHIFT 311 == 0) 312 ec->ec_feat3 = (ec->ec_feat3 & ~EC_F3_MAX_TARGET_MASK) | 313 (7 << EC_F3_MAX_TARGET_SHIFT); 314 315 /* Now attach to the bus-independent code. */ 316 dpt_init(sc, NULL); 317 } 318
Indexes created Wed Oct 01 19:09:53 GMT 2025