dpt_isa.c revision 1.18
1 /* $NetBSD: dpt_isa.c,v 1.18 2007/10/19 12:00:15 ad Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, 2001 Andrew Doran <ad (at) NetBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /* 31 * ISA front-end for DPT EATA SCSI driver. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: dpt_isa.c,v 1.18 2007/10/19 12:00:15 ad Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 #include <sys/queue.h> 41 42 #include <sys/bus.h> 43 #include <sys/intr.h> 44 45 #include <dev/scsipi/scsipi_all.h> 46 #include <dev/scsipi/scsiconf.h> 47 48 #include <dev/isa/isareg.h> 49 #include <dev/isa/isavar.h> 50 51 #include <dev/isa/isadmareg.h> 52 #include <dev/isa/isadmavar.h> 53 54 #include <dev/ic/dptreg.h> 55 #include <dev/ic/dptvar.h> 56 57 #include <dev/i2o/dptivar.h> 58 59 #define DPT_ISA_IOSIZE 16 60 #define DPT_ISA_MAXCCBS 16 61 62 static void dpt_isa_attach(struct device *, struct device *, void *); 63 static int dpt_isa_match(struct device *, struct cfdata *, void *); 64 static int dpt_isa_probe(struct isa_attach_args *, int); 65 static int dpt_isa_wait(bus_space_handle_t, bus_space_tag_t, u_int8_t, 66 u_int8_t); 67 68 CFATTACH_DECL(dpt_isa, sizeof(struct dpt_softc), 69 dpt_isa_match, dpt_isa_attach, NULL, NULL); 70 71 /* Try 'less intrusive' addresses first */ 72 static const int dpt_isa_iobases[] = { 0x230, 0x330, 0x1f0, 0x170, 0 }; 73 74 /* 75 * Wait for the HBA status register to reach a specific state. 76 */ 77 static int 78 dpt_isa_wait(bus_space_handle_t ioh, bus_space_tag_t iot, u_int8_t mask, 79 u_int8_t state) 80 { 81 int ms; 82 83 for (ms = 2000 * 10; ms; ms--) { 84 if ((bus_space_read_1(iot, ioh, HA_STATUS) & mask) == state) 85 return (0); 86 DELAY(100); 87 } 88 89 return (-1); 90 } 91 92 /* 93 * Match a supported board. 94 */ 95 static int 96 dpt_isa_match(struct device *parent, struct cfdata *match, 97 void *aux) 98 { 99 struct isa_attach_args *ia = aux; 100 int i; 101 102 if (ia->ia_nio < 1) 103 return (0); 104 if (ia->ia_nirq < 1) 105 return (0); 106 if (ia->ia_ndrq < 1) 107 return (0); 108 109 if (ISA_DIRECT_CONFIG(ia)) 110 return (0); 111 112 if (ia->ia_io[0].ir_addr != ISA_UNKNOWN_PORT) 113 return (dpt_isa_probe(ia, ia->ia_io[0].ir_addr)); 114 115 for (i = 0; dpt_isa_iobases[i] != 0; i++) { 116 if (dpt_isa_probe(ia, dpt_isa_iobases[i])) { 117 ia->ia_io[0].ir_addr = dpt_isa_iobases[i]; 118 return (1); 119 } 120 } 121 122 return (0); 123 } 124 125 /* 126 * Probe for a supported board. 127 */ 128 static int 129 dpt_isa_probe(struct isa_attach_args *ia, int iobase) 130 { 131 struct eata_cfg ec; 132 bus_space_handle_t ioh; 133 bus_space_tag_t iot; 134 int i, j, stat, irq, drq; 135 u_int16_t *p; 136 137 iot = ia->ia_iot; 138 139 if (bus_space_map(iot, iobase, DPT_ISA_IOSIZE, 0, &ioh) != 0) 140 return(0); 141 142 /* 143 * Assumuing the DPT BIOS reset the board, we shouldn't need to 144 * re-do it here. The tests below should weed out non-EATA devices 145 * before we start poking any registers. 146 */ 147 for (i = 1000; i; i--) { 148 if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_READY) != 0) 149 break; 150 DELAY(2000); 151 } 152 153 if (i == 0) 154 goto bad; 155 156 while((((stat = bus_space_read_1(iot, ioh, HA_STATUS)) 157 != (HA_ST_READY|HA_ST_SEEK_COMPLETE)) 158 && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR)) 159 && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR|HA_ST_DRQ))) 160 || (dpt_isa_wait(ioh, iot, HA_ST_BUSY, 0))) 161 /* RAID drives still spinning up? */ 162 if (bus_space_read_1(iot, ioh, HA_ERROR) != 'D' || 163 bus_space_read_1(iot, ioh, HA_ERROR + 1) != 'P' || 164 bus_space_read_1(iot, ioh, HA_ERROR + 2) != 'T') 165 goto bad; 166 167 /* 168 * At this point we can be confident that we are dealing with a DPT 169 * HBA. Issue the read-config command and wait for the data to 170 * appear. XXX We shouldn't be doing this with PIO, but it makes it 171 * a lot easier as no DMA setup is required. 172 */ 173 bus_space_write_1(iot, ioh, HA_COMMAND, CP_PIO_GETCFG); 174 memset(&ec, 0, sizeof(ec)); 175 i = ((int)&((struct eata_cfg *)0)->ec_cfglen + 176 sizeof(ec.ec_cfglen)) >> 1; 177 p = (u_int16_t *)&ec; 178 179 if (dpt_isa_wait(ioh, iot, 0xFF, HA_ST_DATA_RDY)) 180 goto bad; 181 182 /* Begin reading */ 183 while (i--) 184 *p++ = bus_space_read_stream_2(iot, ioh, HA_DATA); 185 186 if ((i = ec.ec_cfglen) > (sizeof(struct eata_cfg) 187 - (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) 188 - sizeof(ec.ec_cfglen))) 189 i = sizeof(struct eata_cfg) 190 - (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) 191 - sizeof(ec.ec_cfglen); 192 193 j = i + (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) + 194 sizeof(ec.ec_cfglen); 195 i >>= 1; 196 197 while (i--) 198 *p++ = bus_space_read_stream_2(iot, ioh, HA_DATA); 199 200 /* Flush until we have read 512 bytes. */ 201 i = (512 - j + 1) >> 1; 202 while (i--) 203 bus_space_read_stream_2(iot, ioh, HA_DATA); 204 205 /* Puke if we don't like the returned configuration data. */ 206 if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_ERROR) != 0 || 207 memcmp(ec.ec_eatasig, "EATA", 4) != 0 || 208 (ec.ec_feat0 & (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) != 209 (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) 210 goto bad; 211 212 /* 213 * Which DMA channel to use: if it was hardwired in the kernel 214 * configuration, use that value. If the HBA told us, use that 215 * value. Otherwise, puke. 216 */ 217 if ((drq = ia->ia_drq[0].ir_drq) == ISA_UNKNOWN_DRQ) { 218 int dmanum = ((ec.ec_feat1 & EC_F1_DMA_NUM_MASK) >> 219 EC_F1_DMA_NUM_SHIFT); 220 221 if ((ec.ec_feat0 & EC_F0_DMA_NUM_VALID) == 0 || dmanum > 3) 222 goto bad; 223 drq = "\0\7\6\5"[dmanum]; 224 } 225 226 /* 227 * Which IRQ to use: if it was hardwired in the kernel configuration, 228 * use that value. Otherwise, use what the HBA told us. 229 */ 230 if ((irq = ia->ia_irq[0].ir_irq) == ISA_UNKNOWN_IRQ) 231 irq = ((ec.ec_feat1 & EC_F1_IRQ_NUM_MASK) >> 232 EC_F1_IRQ_NUM_SHIFT); 233 234 ia->ia_nio = 1; 235 ia->ia_io[0].ir_size = DPT_ISA_IOSIZE; 236 237 ia->ia_nirq = 1; 238 ia->ia_irq[0].ir_irq = irq; 239 240 ia->ia_ndrq = 1; 241 ia->ia_drq[0].ir_drq = drq; 242 243 ia->ia_niomem = 0; 244 245 bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE); 246 return (1); 247 bad: 248 bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE); 249 return (0); 250 } 251 252 /* 253 * Attach a matched board. 254 */ 255 static void 256 dpt_isa_attach(struct device *parent, struct device *self, void *aux) 257 { 258 struct isa_attach_args *ia; 259 isa_chipset_tag_t ic; 260 bus_space_handle_t ioh; 261 bus_space_tag_t iot; 262 struct dpt_softc *sc; 263 struct eata_cfg *ec; 264 int error; 265 266 ia = aux; 267 sc = (struct dpt_softc *)self; 268 iot = ia->ia_iot; 269 ic = ia->ia_ic; 270 271 printf(": "); 272 273 if ((error = bus_space_map(iot, ia->ia_io[0].ir_addr, DPT_ISA_IOSIZE, 274 0, &ioh)) != 0) { 275 printf("can't map i/o space, error = %d\n", error); 276 return; 277 } 278 279 sc->sc_iot = iot; 280 sc->sc_ioh = ioh; 281 sc->sc_dmat = ia->ia_dmat; 282 283 if ((error = isa_dmacascade(ic, ia->ia_drq[0].ir_drq)) != 0) { 284 printf("unable to cascade DRQ, error = %d\n", error); 285 return; 286 } 287 288 /* Establish the interrupt. */ 289 sc->sc_ih = isa_intr_establish(ic, ia->ia_irq[0].ir_irq, IST_EDGE, 290 IPL_BIO, dpt_intr, sc); 291 if (sc->sc_ih == NULL) { 292 printf("can't establish interrupt\n"); 293 return; 294 } 295 296 if (dpt_readcfg(sc)) { 297 printf("readcfg failed - see dpt(4)\n"); 298 return; 299 } 300 301 /* 302 * Now attach to the bus-independent code. XXX We need to force 303 * parameters that aren't filled in by some ISA boards. In 304 * particular, due to the limited amount of memory we have to play 305 * with for DMA, clamp the number of CCBs to 16. 306 */ 307 ec = &sc->sc_ec; 308 309 if (be16toh(*(int16_t *)ec->ec_queuedepth) > DPT_ISA_MAXCCBS) 310 *(int16_t *)ec->ec_queuedepth = htobe16(DPT_ISA_MAXCCBS); 311 if (ec->ec_maxlun == 0) 312 ec->ec_maxlun = 7; 313 if ((ec->ec_feat3 & EC_F3_MAX_TARGET_MASK) >> EC_F3_MAX_TARGET_SHIFT 314 == 0) 315 ec->ec_feat3 = (ec->ec_feat3 & ~EC_F3_MAX_TARGET_MASK) | 316 (7 << EC_F3_MAX_TARGET_SHIFT); 317 318 sc->sc_bustype = SI_ISA_BUS; 319 sc->sc_isaport = ia->ia_io[0].ir_addr; 320 sc->sc_isairq = ia->ia_irq[0].ir_irq; 321 sc->sc_isadrq = ia->ia_drq[0].ir_drq; 322 323 dpt_init(sc, NULL); 324 } 325
Indexes created Wed Oct 01 19:09:53 GMT 2025