dpt_isa.c revision 1.5
1 /* $NetBSD: dpt_isa.c,v 1.5 2001/04/25 17:53:35 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, 2001 Andrew Doran <ad (at) netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /* 31 * ISA front-end for DPT EATA SCSI driver. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/queue.h> 38 39 #include <machine/bus.h> 40 #include <machine/intr.h> 41 42 #include <dev/scsipi/scsipi_all.h> 43 #include <dev/scsipi/scsiconf.h> 44 45 #include <dev/isa/isareg.h> 46 #include <dev/isa/isavar.h> 47 48 #include <dev/isa/isadmareg.h> 49 #include <dev/isa/isadmavar.h> 50 51 #include <dev/ic/dptreg.h> 52 #include <dev/ic/dptvar.h> 53 54 #define DPT_ISA_IOSIZE 16 55 #define DPT_ISA_MAXCCBS 16 56 57 static void dpt_isa_attach(struct device *, struct device *, void *); 58 static int dpt_isa_match(struct device *, struct cfdata *, void *); 59 static int dpt_isa_probe(struct isa_attach_args *, int); 60 static int dpt_isa_wait(bus_space_handle_t, bus_space_tag_t, u_int8_t, 61 u_int8_t); 62 63 struct cfattach dpt_isa_ca = { 64 sizeof(struct dpt_softc), dpt_isa_match, dpt_isa_attach 65 }; 66 67 /* Try 'less intrusive' addresses first */ 68 static const int dpt_isa_iobases[] = { 0x230, 0x330, 0x1f0, 0x170, 0 }; 69 70 /* 71 * Wait for the HBA status register to reach a specific state. 72 */ 73 static int 74 dpt_isa_wait(bus_space_handle_t ioh, bus_space_tag_t iot, u_int8_t mask, 75 u_int8_t state) 76 { 77 int ms; 78 79 for (ms = 2000 * 10; ms; ms--) { 80 if ((bus_space_read_1(iot, ioh, HA_STATUS) & mask) == state) 81 return (0); 82 DELAY(100); 83 } 84 85 return (-1); 86 } 87 88 /* 89 * Match a supported board. 90 */ 91 static int 92 dpt_isa_match(struct device *parent, struct cfdata *match, void *aux) 93 { 94 struct isa_attach_args *ia; 95 int i; 96 97 ia = aux; 98 99 if (ia->ia_iobase != ISACF_PORT_DEFAULT) 100 return (dpt_isa_probe(ia, ia->ia_iobase)); 101 102 for (i = 0; dpt_isa_iobases[i] != 0; i++) 103 if (dpt_isa_probe(ia, dpt_isa_iobases[i])) { 104 ia->ia_iobase = dpt_isa_iobases[i]; 105 return (1); 106 } 107 108 return (0); 109 } 110 111 /* 112 * Probe for a supported board. 113 */ 114 static int 115 dpt_isa_probe(struct isa_attach_args *ia, int iobase) 116 { 117 struct eata_cfg ec; 118 bus_space_handle_t ioh; 119 bus_space_tag_t iot; 120 int i, j, stat; 121 u_int16_t *p; 122 123 iot = ia->ia_iot; 124 125 if (bus_space_map(iot, iobase, DPT_ISA_IOSIZE, 0, &ioh) != 0) 126 return(0); 127 128 /* 129 * Assumuing the DPT BIOS reset the board, we shouldn't need to 130 * re-do it here. The tests below should weed out non-EATA devices 131 * before we start poking any registers. 132 */ 133 for (i = 1000; i; i--) { 134 if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_READY) != 0) 135 break; 136 DELAY(2000); 137 } 138 139 if (i == 0) 140 goto bad; 141 142 while((((stat = bus_space_read_1(iot, ioh, HA_STATUS)) 143 != (HA_ST_READY|HA_ST_SEEK_COMPLETE)) 144 && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR)) 145 && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR|HA_ST_DRQ))) 146 || (dpt_isa_wait(ioh, iot, HA_ST_BUSY, 0))) 147 /* RAID drives still spinning up? */ 148 if (bus_space_read_1(iot, ioh, HA_ERROR) != 'D' || 149 bus_space_read_1(iot, ioh, HA_ERROR + 1) != 'P' || 150 bus_space_read_1(iot, ioh, HA_ERROR + 2) != 'T') 151 goto bad; 152 153 /* 154 * At this point we can be confident that we are dealing with a DPT 155 * HBA. Issue the read-config command and wait for the data to 156 * appear. XXX We shouldn't be doing this with PIO, but it makes it 157 * a lot easier as no DMA setup is required. 158 */ 159 bus_space_write_1(iot, ioh, HA_COMMAND, CP_PIO_GETCFG); 160 memset(&ec, 0, sizeof(ec)); 161 i = ((int)&((struct eata_cfg *)0)->ec_cfglen + 162 sizeof(ec.ec_cfglen)) >> 1; 163 p = (u_int16_t *)&ec; 164 165 if (dpt_isa_wait(ioh, iot, 0xFF, HA_ST_DATA_RDY)) 166 goto bad; 167 168 /* Begin reading */ 169 while (i--) 170 *p++ = bus_space_read_stream_2(iot, ioh, HA_DATA); 171 172 if ((i = ec.ec_cfglen) > (sizeof(struct eata_cfg) 173 - (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) 174 - sizeof(ec.ec_cfglen))) 175 i = sizeof(struct eata_cfg) 176 - (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) 177 - sizeof(ec.ec_cfglen); 178 179 j = i + (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) + 180 sizeof(ec.ec_cfglen); 181 i >>= 1; 182 183 while (i--) 184 *p++ = bus_space_read_stream_2(iot, ioh, HA_DATA); 185 186 /* Flush until we have read 512 bytes. */ 187 i = (512 - j + 1) >> 1; 188 while (i--) 189 bus_space_read_stream_2(iot, ioh, HA_DATA); 190 191 /* Puke if we don't like the returned configuration data. */ 192 if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_ERROR) != 0 || 193 memcmp(ec.ec_eatasig, "EATA", 4) != 0 || 194 (ec.ec_feat0 & (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) != 195 (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) 196 goto bad; 197 198 /* 199 * Which DMA channel to use: if it was hardwired in the kernel 200 * configuration, use that value. If the HBA told us, use that 201 * value. Otherwise, puke. 202 */ 203 if (ia->ia_drq == -1) { 204 int dmanum = ((ec.ec_feat1 & EC_F1_DMA_NUM_MASK) >> 205 EC_F1_DMA_NUM_SHIFT); 206 207 if ((ec.ec_feat0 & EC_F0_DMA_NUM_VALID) == 0 || dmanum > 3) 208 goto bad; 209 ia->ia_drq = "\0\7\6\5"[dmanum]; 210 } 211 212 /* 213 * Which IRQ to use: if it was hardwired in the kernel configuration, 214 * use that value. Otherwise, use what the HBA told us. 215 */ 216 if (ia->ia_irq == -1) 217 ia->ia_irq = ((ec.ec_feat1 & EC_F1_IRQ_NUM_MASK) >> 218 EC_F1_IRQ_NUM_SHIFT); 219 220 ia->ia_msize = 0; 221 ia->ia_iosize = DPT_ISA_IOSIZE; 222 bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE); 223 return (1); 224 bad: 225 bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE); 226 return (0); 227 } 228 229 /* 230 * Attach a matched board. 231 */ 232 static void 233 dpt_isa_attach(struct device *parent, struct device *self, void *aux) 234 { 235 struct isa_attach_args *ia; 236 isa_chipset_tag_t ic; 237 bus_space_handle_t ioh; 238 bus_space_tag_t iot; 239 struct dpt_softc *sc; 240 struct eata_cfg *ec; 241 int error; 242 243 ia = aux; 244 sc = (struct dpt_softc *)self; 245 iot = ia->ia_iot; 246 ic = ia->ia_ic; 247 248 printf(": "); 249 250 if ((error = bus_space_map(iot, ia->ia_iobase, DPT_ISA_IOSIZE, 0, 251 &ioh)) != 0) { 252 printf("can't map i/o space, error = %d\n", error); 253 return; 254 } 255 256 sc->sc_iot = iot; 257 sc->sc_ioh = ioh; 258 sc->sc_dmat = ia->ia_dmat; 259 260 if ((error = isa_dmacascade(ic, ia->ia_drq)) != 0) { 261 printf("unable to cascade DRQ, error = %d\n", error); 262 return; 263 } 264 265 /* Establish the interrupt. */ 266 sc->sc_ih = isa_intr_establish(ic, ia->ia_irq, IST_EDGE, IPL_BIO, 267 dpt_intr, sc); 268 if (sc->sc_ih == NULL) { 269 printf("can't establish interrupt\n"); 270 return; 271 } 272 273 if (dpt_readcfg(sc)) { 274 printf("readcfg failed - see dpt(4)\n"); 275 return; 276 } 277 278 /* 279 * Now attach to the bus-independent code. XXX We need to force 280 * parameters that aren't filled in by some ISA boards. In 281 * particular, due to the limited amount of memory we have to play 282 * with for DMA, clamp the number of CCBs to 16. 283 */ 284 ec = &sc->sc_ec; 285 286 if (be16toh(*(int16_t *)ec->ec_queuedepth) > DPT_ISA_MAXCCBS) 287 *(int16_t *)ec->ec_queuedepth = htobe16(DPT_ISA_MAXCCBS); 288 if (ec->ec_maxlun == 0) 289 ec->ec_maxlun = 7; 290 if ((ec->ec_feat3 & EC_F3_MAX_TARGET_MASK) >> EC_F3_MAX_TARGET_SHIFT 291 == 0) 292 ec->ec_feat3 = (ec->ec_feat3 & ~EC_F3_MAX_TARGET_MASK) | 293 (7 << EC_F3_MAX_TARGET_SHIFT); 294 295 /* Now attach to the bus-independent code. */ 296 dpt_init(sc, NULL); 297 } 298
Indexes created Wed Oct 01 19:09:53 GMT 2025