dpt_isa.c revision 1.7
1 /* $NetBSD: dpt_isa.c,v 1.7 2002/01/07 21:47:04 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, 2001 Andrew Doran <ad (at) netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /* 31 * ISA front-end for DPT EATA SCSI driver. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: dpt_isa.c,v 1.7 2002/01/07 21:47:04 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 #include <sys/queue.h> 41 42 #include <machine/bus.h> 43 #include <machine/intr.h> 44 45 #include <dev/scsipi/scsipi_all.h> 46 #include <dev/scsipi/scsiconf.h> 47 48 #include <dev/isa/isareg.h> 49 #include <dev/isa/isavar.h> 50 51 #include <dev/isa/isadmareg.h> 52 #include <dev/isa/isadmavar.h> 53 54 #include <dev/ic/dptreg.h> 55 #include <dev/ic/dptvar.h> 56 57 #define DPT_ISA_IOSIZE 16 58 #define DPT_ISA_MAXCCBS 16 59 60 static void dpt_isa_attach(struct device *, struct device *, void *); 61 static int dpt_isa_match(struct device *, struct cfdata *, void *); 62 static int dpt_isa_probe(struct isa_attach_args *, int); 63 static int dpt_isa_wait(bus_space_handle_t, bus_space_tag_t, u_int8_t, 64 u_int8_t); 65 66 struct cfattach dpt_isa_ca = { 67 sizeof(struct dpt_softc), dpt_isa_match, dpt_isa_attach 68 }; 69 70 /* Try 'less intrusive' addresses first */ 71 static const int dpt_isa_iobases[] = { 0x230, 0x330, 0x1f0, 0x170, 0 }; 72 73 /* 74 * Wait for the HBA status register to reach a specific state. 75 */ 76 static int 77 dpt_isa_wait(bus_space_handle_t ioh, bus_space_tag_t iot, u_int8_t mask, 78 u_int8_t state) 79 { 80 int ms; 81 82 for (ms = 2000 * 10; ms; ms--) { 83 if ((bus_space_read_1(iot, ioh, HA_STATUS) & mask) == state) 84 return (0); 85 DELAY(100); 86 } 87 88 return (-1); 89 } 90 91 /* 92 * Match a supported board. 93 */ 94 static int 95 dpt_isa_match(struct device *parent, struct cfdata *match, void *aux) 96 { 97 struct isa_attach_args *ia = aux; 98 int i; 99 100 if (ia->ia_nio < 1) 101 return (0); 102 if (ia->ia_nirq < 1) 103 return (0); 104 if (ia->ia_ndrq < 1) 105 return (0); 106 107 if (ISA_DIRECT_CONFIG(ia)) 108 return (0); 109 110 if (ia->ia_io[0].ir_addr != ISACF_PORT_DEFAULT) 111 return (dpt_isa_probe(ia, ia->ia_io[0].ir_addr)); 112 113 for (i = 0; dpt_isa_iobases[i] != 0; i++) { 114 if (dpt_isa_probe(ia, dpt_isa_iobases[i])) { 115 ia->ia_io[0].ir_addr = dpt_isa_iobases[i]; 116 return (1); 117 } 118 } 119 120 return (0); 121 } 122 123 /* 124 * Probe for a supported board. 125 */ 126 static int 127 dpt_isa_probe(struct isa_attach_args *ia, int iobase) 128 { 129 struct eata_cfg ec; 130 bus_space_handle_t ioh; 131 bus_space_tag_t iot; 132 int i, j, stat, irq, drq; 133 u_int16_t *p; 134 135 iot = ia->ia_iot; 136 137 if (bus_space_map(iot, iobase, DPT_ISA_IOSIZE, 0, &ioh) != 0) 138 return(0); 139 140 /* 141 * Assumuing the DPT BIOS reset the board, we shouldn't need to 142 * re-do it here. The tests below should weed out non-EATA devices 143 * before we start poking any registers. 144 */ 145 for (i = 1000; i; i--) { 146 if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_READY) != 0) 147 break; 148 DELAY(2000); 149 } 150 151 if (i == 0) 152 goto bad; 153 154 while((((stat = bus_space_read_1(iot, ioh, HA_STATUS)) 155 != (HA_ST_READY|HA_ST_SEEK_COMPLETE)) 156 && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR)) 157 && (stat != (HA_ST_READY|HA_ST_SEEK_COMPLETE|HA_ST_ERROR|HA_ST_DRQ))) 158 || (dpt_isa_wait(ioh, iot, HA_ST_BUSY, 0))) 159 /* RAID drives still spinning up? */ 160 if (bus_space_read_1(iot, ioh, HA_ERROR) != 'D' || 161 bus_space_read_1(iot, ioh, HA_ERROR + 1) != 'P' || 162 bus_space_read_1(iot, ioh, HA_ERROR + 2) != 'T') 163 goto bad; 164 165 /* 166 * At this point we can be confident that we are dealing with a DPT 167 * HBA. Issue the read-config command and wait for the data to 168 * appear. XXX We shouldn't be doing this with PIO, but it makes it 169 * a lot easier as no DMA setup is required. 170 */ 171 bus_space_write_1(iot, ioh, HA_COMMAND, CP_PIO_GETCFG); 172 memset(&ec, 0, sizeof(ec)); 173 i = ((int)&((struct eata_cfg *)0)->ec_cfglen + 174 sizeof(ec.ec_cfglen)) >> 1; 175 p = (u_int16_t *)&ec; 176 177 if (dpt_isa_wait(ioh, iot, 0xFF, HA_ST_DATA_RDY)) 178 goto bad; 179 180 /* Begin reading */ 181 while (i--) 182 *p++ = bus_space_read_stream_2(iot, ioh, HA_DATA); 183 184 if ((i = ec.ec_cfglen) > (sizeof(struct eata_cfg) 185 - (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) 186 - sizeof(ec.ec_cfglen))) 187 i = sizeof(struct eata_cfg) 188 - (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) 189 - sizeof(ec.ec_cfglen); 190 191 j = i + (int)(&(((struct eata_cfg *)0L)->ec_cfglen)) + 192 sizeof(ec.ec_cfglen); 193 i >>= 1; 194 195 while (i--) 196 *p++ = bus_space_read_stream_2(iot, ioh, HA_DATA); 197 198 /* Flush until we have read 512 bytes. */ 199 i = (512 - j + 1) >> 1; 200 while (i--) 201 bus_space_read_stream_2(iot, ioh, HA_DATA); 202 203 /* Puke if we don't like the returned configuration data. */ 204 if ((bus_space_read_1(iot, ioh, HA_STATUS) & HA_ST_ERROR) != 0 || 205 memcmp(ec.ec_eatasig, "EATA", 4) != 0 || 206 (ec.ec_feat0 & (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) != 207 (EC_F0_HBA_VALID | EC_F0_DMA_SUPPORTED)) 208 goto bad; 209 210 /* 211 * Which DMA channel to use: if it was hardwired in the kernel 212 * configuration, use that value. If the HBA told us, use that 213 * value. Otherwise, puke. 214 */ 215 if ((drq = ia->ia_drq[0].ir_drq) == ISACF_DRQ_DEFAULT) { 216 int dmanum = ((ec.ec_feat1 & EC_F1_DMA_NUM_MASK) >> 217 EC_F1_DMA_NUM_SHIFT); 218 219 if ((ec.ec_feat0 & EC_F0_DMA_NUM_VALID) == 0 || dmanum > 3) 220 goto bad; 221 drq = "\0\7\6\5"[dmanum]; 222 } 223 224 /* 225 * Which IRQ to use: if it was hardwired in the kernel configuration, 226 * use that value. Otherwise, use what the HBA told us. 227 */ 228 if ((irq = ia->ia_irq[0].ir_irq) == ISACF_IRQ_DEFAULT) 229 irq = ((ec.ec_feat1 & EC_F1_IRQ_NUM_MASK) >> 230 EC_F1_IRQ_NUM_SHIFT); 231 232 ia->ia_nio = 1; 233 ia->ia_io[0].ir_size = DPT_ISA_IOSIZE; 234 235 ia->ia_nirq = 1; 236 ia->ia_irq[0].ir_irq = irq; 237 238 ia->ia_ndrq = 1; 239 ia->ia_drq[0].ir_drq = drq; 240 241 ia->ia_niomem = 0; 242 243 bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE); 244 return (1); 245 bad: 246 bus_space_unmap(iot, ioh, DPT_ISA_IOSIZE); 247 return (0); 248 } 249 250 /* 251 * Attach a matched board. 252 */ 253 static void 254 dpt_isa_attach(struct device *parent, struct device *self, void *aux) 255 { 256 struct isa_attach_args *ia; 257 isa_chipset_tag_t ic; 258 bus_space_handle_t ioh; 259 bus_space_tag_t iot; 260 struct dpt_softc *sc; 261 struct eata_cfg *ec; 262 int error; 263 264 ia = aux; 265 sc = (struct dpt_softc *)self; 266 iot = ia->ia_iot; 267 ic = ia->ia_ic; 268 269 printf(": "); 270 271 if ((error = bus_space_map(iot, ia->ia_io[0].ir_addr, DPT_ISA_IOSIZE, 272 0, &ioh)) != 0) { 273 printf("can't map i/o space, error = %d\n", error); 274 return; 275 } 276 277 sc->sc_iot = iot; 278 sc->sc_ioh = ioh; 279 sc->sc_dmat = ia->ia_dmat; 280 281 if ((error = isa_dmacascade(ic, ia->ia_drq[0].ir_drq)) != 0) { 282 printf("unable to cascade DRQ, error = %d\n", error); 283 return; 284 } 285 286 /* Establish the interrupt. */ 287 sc->sc_ih = isa_intr_establish(ic, ia->ia_irq[0].ir_irq, IST_EDGE, 288 IPL_BIO, dpt_intr, sc); 289 if (sc->sc_ih == NULL) { 290 printf("can't establish interrupt\n"); 291 return; 292 } 293 294 if (dpt_readcfg(sc)) { 295 printf("readcfg failed - see dpt(4)\n"); 296 return; 297 } 298 299 /* 300 * Now attach to the bus-independent code. XXX We need to force 301 * parameters that aren't filled in by some ISA boards. In 302 * particular, due to the limited amount of memory we have to play 303 * with for DMA, clamp the number of CCBs to 16. 304 */ 305 ec = &sc->sc_ec; 306 307 if (be16toh(*(int16_t *)ec->ec_queuedepth) > DPT_ISA_MAXCCBS) 308 *(int16_t *)ec->ec_queuedepth = htobe16(DPT_ISA_MAXCCBS); 309 if (ec->ec_maxlun == 0) 310 ec->ec_maxlun = 7; 311 if ((ec->ec_feat3 & EC_F3_MAX_TARGET_MASK) >> EC_F3_MAX_TARGET_SHIFT 312 == 0) 313 ec->ec_feat3 = (ec->ec_feat3 & ~EC_F3_MAX_TARGET_MASK) | 314 (7 << EC_F3_MAX_TARGET_SHIFT); 315 316 /* Now attach to the bus-independent code. */ 317 dpt_init(sc, NULL); 318 } 319
Indexes created Wed Oct 01 19:09:53 GMT 2025