ess.c revision 1.33 1 1.33 nathanw /* $NetBSD: ess.c,v 1.33 1999/03/02 20:36:50 nathanw Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright 1997
5 1.1 augustss * Digital Equipment Corporation. All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This software is furnished under license and may be used and
8 1.1 augustss * copied only in accordance with the following terms and conditions.
9 1.1 augustss * Subject to these conditions, you may download, copy, install,
10 1.1 augustss * use, modify and distribute this software in source and/or binary
11 1.1 augustss * form. No title or ownership is transferred hereby.
12 1.1 augustss *
13 1.1 augustss * 1) Any source code used, modified or distributed must reproduce
14 1.1 augustss * and retain this copyright notice and list of conditions as
15 1.1 augustss * they appear in the source file.
16 1.1 augustss *
17 1.1 augustss * 2) No right is granted to use any trade name, trademark, or logo of
18 1.1 augustss * Digital Equipment Corporation. Neither the "Digital Equipment
19 1.1 augustss * Corporation" name nor any trademark or logo of Digital Equipment
20 1.1 augustss * Corporation may be used to endorse or promote products derived
21 1.1 augustss * from this software without the prior written permission of
22 1.1 augustss * Digital Equipment Corporation.
23 1.1 augustss *
24 1.1 augustss * 3) This software is provided "AS-IS" and any express or implied
25 1.1 augustss * warranties, including but not limited to, any implied warranties
26 1.1 augustss * of merchantability, fitness for a particular purpose, or
27 1.1 augustss * non-infringement are disclaimed. In no event shall DIGITAL be
28 1.1 augustss * liable for any damages whatsoever, and in particular, DIGITAL
29 1.1 augustss * shall not be liable for special, indirect, consequential, or
30 1.1 augustss * incidental damages or damages for lost profits, loss of
31 1.1 augustss * revenue or loss of use, whether such damages arise in contract,
32 1.1 augustss * negligence, tort, under statute, in equity, at law or otherwise,
33 1.1 augustss * even if advised of the possibility of such damage.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss **++
38 1.1 augustss **
39 1.1 augustss ** ess.c
40 1.1 augustss **
41 1.1 augustss ** FACILITY:
42 1.1 augustss **
43 1.1 augustss ** DIGITAL Network Appliance Reference Design (DNARD)
44 1.1 augustss **
45 1.1 augustss ** MODULE DESCRIPTION:
46 1.1 augustss **
47 1.1 augustss ** This module contains the device driver for the ESS
48 1.1 augustss ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
49 1.1 augustss ** used as a reference point when implementing this driver.
50 1.1 augustss **
51 1.1 augustss ** AUTHORS:
52 1.1 augustss **
53 1.1 augustss ** Blair Fidler Software Engineering Australia
54 1.1 augustss ** Gold Coast, Australia.
55 1.1 augustss **
56 1.1 augustss ** CREATION DATE:
57 1.1 augustss **
58 1.1 augustss ** March 10, 1997.
59 1.1 augustss **
60 1.1 augustss ** MODIFICATION HISTORY:
61 1.1 augustss **
62 1.19 mycroft ** Heavily modified by Lennart Augustsson and Charles M. Hannum for
63 1.19 mycroft ** bus_dma, changes to audio interface, and many bug fixes.
64 1.33 nathanw ** Modified by Nathan J. Williams for 1788 support.
65 1.1 augustss **--
66 1.1 augustss */
67 1.1 augustss
68 1.1 augustss #include <sys/param.h>
69 1.1 augustss #include <sys/systm.h>
70 1.1 augustss #include <sys/errno.h>
71 1.1 augustss #include <sys/ioctl.h>
72 1.1 augustss #include <sys/syslog.h>
73 1.1 augustss #include <sys/device.h>
74 1.1 augustss #include <sys/proc.h>
75 1.1 augustss
76 1.1 augustss #include <machine/cpu.h>
77 1.1 augustss #include <machine/intr.h>
78 1.6 augustss #include <machine/bus.h>
79 1.1 augustss
80 1.1 augustss #include <sys/audioio.h>
81 1.1 augustss #include <dev/audio_if.h>
82 1.1 augustss #include <dev/auconv.h>
83 1.1 augustss #include <dev/mulaw.h>
84 1.1 augustss
85 1.1 augustss #include <dev/isa/isavar.h>
86 1.1 augustss #include <dev/isa/isadmavar.h>
87 1.1 augustss
88 1.1 augustss #include <dev/isa/essvar.h>
89 1.1 augustss #include <dev/isa/essreg.h>
90 1.1 augustss
91 1.1 augustss #ifdef AUDIO_DEBUG
92 1.1 augustss #define DPRINTF(x) if (essdebug) printf x
93 1.2 augustss #define DPRINTFN(n,x) if (essdebug>(n)) printf x
94 1.1 augustss int essdebug = 0;
95 1.1 augustss #else
96 1.1 augustss #define DPRINTF(x)
97 1.2 augustss #define DPRINTFN(n,x)
98 1.1 augustss #endif
99 1.1 augustss
100 1.2 augustss #if 0
101 1.2 augustss unsigned uuu;
102 1.2 augustss #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu)
103 1.2 augustss #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d))
104 1.2 augustss #else
105 1.2 augustss #define EREAD1(t, h, a) bus_space_read_1(t, h, a)
106 1.2 augustss #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d)
107 1.2 augustss #endif
108 1.1 augustss
109 1.2 augustss
110 1.2 augustss int ess_setup_sc __P((struct ess_softc *, int));
111 1.1 augustss
112 1.1 augustss int ess_open __P((void *, int));
113 1.33 nathanw void ess_1788_close __P((void *));
114 1.33 nathanw void ess_1888_close __P((void *));
115 1.1 augustss int ess_getdev __P((void *, struct audio_device *));
116 1.1 augustss int ess_drain __P((void *));
117 1.1 augustss
118 1.1 augustss int ess_query_encoding __P((void *, struct audio_encoding *));
119 1.1 augustss
120 1.1 augustss int ess_set_params __P((void *, int, int, struct audio_params *,
121 1.19 mycroft struct audio_params *));
122 1.1 augustss
123 1.1 augustss int ess_round_blocksize __P((void *, int));
124 1.1 augustss
125 1.33 nathanw int ess_1788_trigger_output __P((void *, void *, void *, int, void (*)(void *),
126 1.19 mycroft void *, struct audio_params *));
127 1.33 nathanw int ess_1888_trigger_output __P((void *, void *, void *, int, void (*)(void *),
128 1.19 mycroft void *, struct audio_params *));
129 1.33 nathanw int ess_1788_trigger_input __P((void *, void *, void *, int, void (*)(void *),
130 1.33 nathanw void *, struct audio_params *));
131 1.33 nathanw int ess_1888_trigger_input __P((void *, void *, void *, int, void (*)(void *),
132 1.33 nathanw void *, struct audio_params *));
133 1.33 nathanw int ess_1788_halt_output __P((void *));
134 1.33 nathanw int ess_1888_halt_output __P((void *));
135 1.33 nathanw int ess_1788_halt_input __P((void *));
136 1.33 nathanw int ess_1888_halt_input __P((void *));
137 1.1 augustss
138 1.1 augustss int ess_intr_output __P((void *));
139 1.1 augustss int ess_intr_input __P((void *));
140 1.1 augustss
141 1.1 augustss int ess_speaker_ctl __P((void *, int));
142 1.1 augustss
143 1.1 augustss int ess_getdev __P((void *, struct audio_device *));
144 1.1 augustss
145 1.1 augustss int ess_set_port __P((void *, mixer_ctrl_t *));
146 1.1 augustss int ess_get_port __P((void *, mixer_ctrl_t *));
147 1.1 augustss
148 1.30 mycroft void *ess_malloc __P((void *, int, size_t, int, int));
149 1.4 augustss void ess_free __P((void *, void *, int));
150 1.30 mycroft size_t ess_round_buffersize __P((void *, int, size_t));
151 1.4 augustss int ess_mappage __P((void *, void *, int, int));
152 1.4 augustss
153 1.4 augustss
154 1.1 augustss int ess_query_devinfo __P((void *, mixer_devinfo_t *));
155 1.1 augustss int ess_get_props __P((void *));
156 1.1 augustss
157 1.4 augustss void ess_speaker_on __P((struct ess_softc *));
158 1.4 augustss void ess_speaker_off __P((struct ess_softc *));
159 1.1 augustss
160 1.1 augustss int ess_config_addr __P((struct ess_softc *));
161 1.4 augustss void ess_config_irq __P((struct ess_softc *));
162 1.4 augustss void ess_config_drq __P((struct ess_softc *));
163 1.4 augustss void ess_setup __P((struct ess_softc *));
164 1.1 augustss int ess_identify __P((struct ess_softc *));
165 1.1 augustss
166 1.1 augustss int ess_reset __P((struct ess_softc *));
167 1.1 augustss void ess_set_gain __P((struct ess_softc *, int, int));
168 1.33 nathanw int ess_set_in_port __P((struct ess_softc *, int));
169 1.1 augustss int ess_set_in_ports __P((struct ess_softc *, int));
170 1.1 augustss u_int ess_srtotc __P((u_int));
171 1.1 augustss u_int ess_srtofc __P((u_int));
172 1.1 augustss u_char ess_get_dsp_status __P((struct ess_softc *));
173 1.1 augustss u_char ess_dsp_read_ready __P((struct ess_softc *));
174 1.1 augustss u_char ess_dsp_write_ready __P((struct ess_softc *sc));
175 1.1 augustss int ess_rdsp __P((struct ess_softc *));
176 1.1 augustss int ess_wdsp __P((struct ess_softc *, u_char));
177 1.1 augustss u_char ess_read_x_reg __P((struct ess_softc *, u_char));
178 1.1 augustss int ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
179 1.1 augustss void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
180 1.1 augustss void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
181 1.1 augustss u_char ess_read_mix_reg __P((struct ess_softc *, u_char));
182 1.1 augustss void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
183 1.1 augustss void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
184 1.1 augustss void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
185 1.1 augustss
186 1.1 augustss static char *essmodel[] = {
187 1.1 augustss "unsupported",
188 1.1 augustss "1888",
189 1.1 augustss "1887",
190 1.33 nathanw "888",
191 1.33 nathanw "1788"
192 1.1 augustss };
193 1.1 augustss
194 1.1 augustss struct audio_device ess_device = {
195 1.1 augustss "ESS Technology",
196 1.1 augustss "x",
197 1.1 augustss "ess"
198 1.1 augustss };
199 1.1 augustss
200 1.1 augustss /*
201 1.1 augustss * Define our interface to the higher level audio driver.
202 1.1 augustss */
203 1.1 augustss
204 1.33 nathanw struct audio_hw_if ess_1788_hw_if = {
205 1.1 augustss ess_open,
206 1.33 nathanw ess_1788_close,
207 1.6 augustss ess_drain,
208 1.1 augustss ess_query_encoding,
209 1.1 augustss ess_set_params,
210 1.1 augustss ess_round_blocksize,
211 1.1 augustss NULL,
212 1.19 mycroft NULL,
213 1.19 mycroft NULL,
214 1.19 mycroft NULL,
215 1.19 mycroft NULL,
216 1.33 nathanw ess_1788_halt_output,
217 1.33 nathanw ess_1788_halt_input,
218 1.1 augustss ess_speaker_ctl,
219 1.1 augustss ess_getdev,
220 1.1 augustss NULL,
221 1.1 augustss ess_set_port,
222 1.1 augustss ess_get_port,
223 1.1 augustss ess_query_devinfo,
224 1.4 augustss ess_malloc,
225 1.4 augustss ess_free,
226 1.30 mycroft ess_round_buffersize,
227 1.33 nathanw ess_mappage,
228 1.1 augustss ess_get_props,
229 1.33 nathanw ess_1788_trigger_output,
230 1.33 nathanw ess_1788_trigger_input,
231 1.33 nathanw };
232 1.33 nathanw
233 1.33 nathanw struct audio_hw_if ess_1888_hw_if = {
234 1.33 nathanw ess_open,
235 1.33 nathanw ess_1888_close,
236 1.33 nathanw ess_drain,
237 1.33 nathanw ess_query_encoding,
238 1.33 nathanw ess_set_params,
239 1.33 nathanw ess_round_blocksize,
240 1.33 nathanw NULL,
241 1.33 nathanw NULL,
242 1.33 nathanw NULL,
243 1.33 nathanw NULL,
244 1.33 nathanw NULL,
245 1.33 nathanw ess_1888_halt_output,
246 1.33 nathanw ess_1888_halt_input,
247 1.33 nathanw ess_speaker_ctl,
248 1.33 nathanw ess_getdev,
249 1.33 nathanw NULL,
250 1.33 nathanw ess_set_port,
251 1.33 nathanw ess_get_port,
252 1.33 nathanw ess_query_devinfo,
253 1.33 nathanw ess_malloc,
254 1.33 nathanw ess_free,
255 1.33 nathanw ess_round_buffersize,
256 1.33 nathanw ess_mappage,
257 1.33 nathanw ess_get_props,
258 1.33 nathanw ess_1888_trigger_output,
259 1.33 nathanw ess_1888_trigger_input,
260 1.1 augustss };
261 1.1 augustss
262 1.1 augustss #ifdef AUDIO_DEBUG
263 1.1 augustss void ess_printsc __P((struct ess_softc *));
264 1.1 augustss void ess_dump_mixer __P((struct ess_softc *));
265 1.1 augustss
266 1.1 augustss void
267 1.1 augustss ess_printsc(sc)
268 1.1 augustss struct ess_softc *sc;
269 1.1 augustss {
270 1.1 augustss int i;
271 1.1 augustss
272 1.1 augustss printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
273 1.1 augustss (int)sc->sc_open, sc->sc_iobase, sc->out_port,
274 1.1 augustss sc->in_port, sc->spkr_state ? "on" : "off");
275 1.1 augustss
276 1.1 augustss printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
277 1.1 augustss sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
278 1.1 augustss sc->sc_out.intr, sc->sc_out.arg);
279 1.1 augustss
280 1.1 augustss printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
281 1.1 augustss sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
282 1.1 augustss sc->sc_in.intr, sc->sc_in.arg);
283 1.1 augustss
284 1.1 augustss printf("gain:");
285 1.33 nathanw for (i = 0; i < sc->ndevs; i++)
286 1.1 augustss printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
287 1.1 augustss printf("\n");
288 1.1 augustss }
289 1.1 augustss
290 1.1 augustss void
291 1.1 augustss ess_dump_mixer(sc)
292 1.1 augustss struct ess_softc *sc;
293 1.1 augustss {
294 1.33 nathanw printf("ESS_LEFT_MASTER: mix reg 0x%02x=0x%02x\n",
295 1.33 nathanw 0x60, ess_read_mix_reg(sc, 0x60));
296 1.33 nathanw printf("ESS_RIGHT_MASTER: mix reg 0x%02x=0x%02x\n",
297 1.33 nathanw 0x62, ess_read_mix_reg(sc, 0x62));
298 1.33 nathanw
299 1.1 augustss printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
300 1.33 nathanw 0x14, ess_read_mix_reg(sc, 0x14));
301 1.1 augustss printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
302 1.1 augustss 0x1A, ess_read_mix_reg(sc, 0x1A));
303 1.1 augustss printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
304 1.1 augustss 0x3E, ess_read_mix_reg(sc, 0x3E));
305 1.1 augustss printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
306 1.1 augustss 0x36, ess_read_mix_reg(sc, 0x36));
307 1.1 augustss printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
308 1.1 augustss 0x38, ess_read_mix_reg(sc, 0x38));
309 1.1 augustss printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
310 1.1 augustss 0x3A, ess_read_mix_reg(sc, 0x3A));
311 1.1 augustss printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
312 1.1 augustss 0x32, ess_read_mix_reg(sc, 0x32));
313 1.1 augustss printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
314 1.1 augustss 0x3C, ess_read_mix_reg(sc, 0x3C));
315 1.1 augustss printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
316 1.1 augustss 0x69, ess_read_mix_reg(sc, 0x69));
317 1.1 augustss printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
318 1.1 augustss 0x68, ess_read_mix_reg(sc, 0x68));
319 1.1 augustss printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
320 1.1 augustss 0x6E, ess_read_mix_reg(sc, 0x6E));
321 1.1 augustss printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
322 1.1 augustss 0x6B, ess_read_mix_reg(sc, 0x6B));
323 1.1 augustss printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
324 1.1 augustss 0x6A, ess_read_mix_reg(sc, 0x6A));
325 1.1 augustss printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
326 1.1 augustss 0x6C, ess_read_mix_reg(sc, 0x6C));
327 1.1 augustss printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
328 1.1 augustss 0xB4, ess_read_x_reg(sc, 0xB4));
329 1.1 augustss printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
330 1.1 augustss 0x14, ess_read_mix_reg(sc, 0x14));
331 1.1 augustss
332 1.1 augustss printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
333 1.1 augustss ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
334 1.1 augustss printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
335 1.1 augustss ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
336 1.1 augustss printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
337 1.1 augustss 0x1c, ess_read_mix_reg(sc, 0x1c),
338 1.1 augustss 0x7a, ess_read_mix_reg(sc, 0x7a));
339 1.1 augustss }
340 1.1 augustss
341 1.1 augustss #endif
342 1.1 augustss
343 1.1 augustss /*
344 1.1 augustss * Configure the ESS chip for the desired audio base address.
345 1.1 augustss */
346 1.1 augustss int
347 1.1 augustss ess_config_addr(sc)
348 1.1 augustss struct ess_softc *sc;
349 1.1 augustss {
350 1.1 augustss int iobase = sc->sc_iobase;
351 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
352 1.1 augustss
353 1.1 augustss /*
354 1.1 augustss * Configure using the System Control Register method. This
355 1.1 augustss * method is used when the AMODE line is tied high, which is
356 1.1 augustss * the case for the Shark, but not for the evaluation board.
357 1.1 augustss */
358 1.1 augustss
359 1.1 augustss bus_space_handle_t scr_access_ioh;
360 1.1 augustss bus_space_handle_t scr_ioh;
361 1.1 augustss u_short scr_value;
362 1.1 augustss
363 1.1 augustss /*
364 1.1 augustss * Set the SCR bit to enable audio.
365 1.1 augustss */
366 1.1 augustss scr_value = ESS_SCR_AUDIO_ENABLE;
367 1.1 augustss
368 1.1 augustss /*
369 1.1 augustss * Set the SCR bits necessary to select the specified audio
370 1.1 augustss * base address.
371 1.1 augustss */
372 1.1 augustss switch(iobase) {
373 1.1 augustss case 0x220:
374 1.1 augustss scr_value |= ESS_SCR_AUDIO_220;
375 1.1 augustss break;
376 1.1 augustss case 0x230:
377 1.1 augustss scr_value |= ESS_SCR_AUDIO_230;
378 1.1 augustss break;
379 1.1 augustss case 0x240:
380 1.1 augustss scr_value |= ESS_SCR_AUDIO_240;
381 1.1 augustss break;
382 1.1 augustss case 0x250:
383 1.1 augustss scr_value |= ESS_SCR_AUDIO_250;
384 1.1 augustss break;
385 1.1 augustss default:
386 1.1 augustss printf("ess: configured iobase 0x%x invalid\n", iobase);
387 1.1 augustss return (1);
388 1.1 augustss break;
389 1.1 augustss }
390 1.1 augustss
391 1.1 augustss /*
392 1.1 augustss * Get a mapping for the System Control Register (SCR) access
393 1.1 augustss * registers and the SCR data registers.
394 1.1 augustss */
395 1.1 augustss if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
396 1.1 augustss 0, &scr_access_ioh)) {
397 1.1 augustss printf("ess: can't map SCR access registers\n");
398 1.1 augustss return (1);
399 1.1 augustss }
400 1.1 augustss if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
401 1.1 augustss 0, &scr_ioh)) {
402 1.1 augustss printf("ess: can't map SCR registers\n");
403 1.1 augustss bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
404 1.1 augustss return (1);
405 1.1 augustss }
406 1.1 augustss
407 1.1 augustss /* Unlock the SCR. */
408 1.2 augustss EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
409 1.1 augustss
410 1.1 augustss /* Write the base address information into SCR[0]. */
411 1.2 augustss EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0);
412 1.2 augustss EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
413 1.1 augustss
414 1.1 augustss /* Lock the SCR. */
415 1.2 augustss EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
416 1.1 augustss
417 1.1 augustss /* Unmap the SCR access ports and the SCR data ports. */
418 1.1 augustss bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
419 1.1 augustss bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
420 1.1 augustss
421 1.1 augustss return 0;
422 1.1 augustss }
423 1.1 augustss
424 1.1 augustss
425 1.1 augustss /*
426 1.1 augustss * Configure the ESS chip for the desired IRQ and DMA channels.
427 1.2 augustss * ESS ISA
428 1.2 augustss * --------
429 1.2 augustss * IRQA irq9
430 1.2 augustss * IRQB irq5
431 1.2 augustss * IRQC irq7
432 1.2 augustss * IRQD irq10
433 1.2 augustss * IRQE irq15
434 1.4 augustss *
435 1.2 augustss * DRQA drq0
436 1.2 augustss * DRQB drq1
437 1.2 augustss * DRQC drq3
438 1.2 augustss * DRQD drq5
439 1.1 augustss */
440 1.1 augustss void
441 1.4 augustss ess_config_irq(sc)
442 1.1 augustss struct ess_softc *sc;
443 1.1 augustss {
444 1.4 augustss int v;
445 1.1 augustss
446 1.4 augustss DPRINTFN(2,("ess_config_irq\n"));
447 1.4 augustss
448 1.33 nathanw if (sc->sc_in.irq != sc->sc_out.irq || sc->sc_model == ESS_1788) {
449 1.4 augustss /* Configure Audio 1 (record) for the appropriate IRQ line. */
450 1.4 augustss v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */
451 1.4 augustss switch(sc->sc_in.irq) {
452 1.4 augustss case 5:
453 1.4 augustss v |= ESS_IRQ_CTRL_INTRB;
454 1.4 augustss break;
455 1.4 augustss case 7:
456 1.4 augustss v |= ESS_IRQ_CTRL_INTRC;
457 1.4 augustss break;
458 1.4 augustss case 9:
459 1.4 augustss v |= ESS_IRQ_CTRL_INTRA;
460 1.4 augustss break;
461 1.4 augustss case 10:
462 1.4 augustss v |= ESS_IRQ_CTRL_INTRD;
463 1.4 augustss break;
464 1.4 augustss #ifdef DIAGNOSTIC
465 1.4 augustss default:
466 1.4 augustss printf("ess: configured irq %d not supported for Audio 1\n",
467 1.4 augustss sc->sc_in.irq);
468 1.4 augustss return;
469 1.4 augustss #endif
470 1.4 augustss }
471 1.4 augustss ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v);
472 1.33 nathanw if (sc->sc_model != ESS_1788) {
473 1.33 nathanw /* irq2 is hardwired to 15 in this mode */
474 1.33 nathanw ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
475 1.33 nathanw ESS_AUDIO2_CTRL2_IRQ2_ENABLE);
476 1.33 nathanw /* Use old method. */
477 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888);
478 1.33 nathanw }
479 1.4 augustss } else {
480 1.4 augustss /* Use new method, both interrupts are the same. */
481 1.4 augustss v = ESS_IS_SELECT_IRQ; /* enable intrs */
482 1.4 augustss switch(sc->sc_out.irq) {
483 1.4 augustss case 5:
484 1.4 augustss v |= ESS_IS_INTRB;
485 1.4 augustss break;
486 1.4 augustss case 7:
487 1.4 augustss v |= ESS_IS_INTRC;
488 1.4 augustss break;
489 1.4 augustss case 9:
490 1.4 augustss v |= ESS_IS_INTRA;
491 1.4 augustss break;
492 1.4 augustss case 10:
493 1.4 augustss v |= ESS_IS_INTRD;
494 1.4 augustss break;
495 1.4 augustss case 15:
496 1.4 augustss v |= ESS_IS_INTRE;
497 1.4 augustss break;
498 1.4 augustss #ifdef DIAGNOSTIC
499 1.4 augustss default:
500 1.4 augustss printf("ess_config_irq: configured irq %d not supported for Audio 1\n",
501 1.4 augustss sc->sc_in.irq);
502 1.4 augustss return;
503 1.4 augustss #endif
504 1.4 augustss }
505 1.4 augustss /* Set the IRQ */
506 1.4 augustss ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v);
507 1.4 augustss }
508 1.4 augustss }
509 1.4 augustss
510 1.4 augustss
511 1.4 augustss void
512 1.4 augustss ess_config_drq(sc)
513 1.4 augustss struct ess_softc *sc;
514 1.4 augustss {
515 1.4 augustss int v;
516 1.4 augustss
517 1.4 augustss DPRINTFN(2,("ess_config_drq\n"));
518 1.4 augustss
519 1.4 augustss /* Configure Audio 1 (record) for DMA on the appropriate channel. */
520 1.4 augustss v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT;
521 1.4 augustss switch(sc->sc_in.drq) {
522 1.4 augustss case 0:
523 1.4 augustss v |= ESS_DRQ_CTRL_DRQA;
524 1.1 augustss break;
525 1.4 augustss case 1:
526 1.4 augustss v |= ESS_DRQ_CTRL_DRQB;
527 1.1 augustss break;
528 1.4 augustss case 3:
529 1.4 augustss v |= ESS_DRQ_CTRL_DRQC;
530 1.1 augustss break;
531 1.2 augustss #ifdef DIAGNOSTIC
532 1.1 augustss default:
533 1.4 augustss printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n",
534 1.4 augustss sc->sc_in.drq);
535 1.1 augustss return;
536 1.5 augustss #endif
537 1.4 augustss }
538 1.4 augustss /* Set DRQ1 */
539 1.4 augustss ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v);
540 1.4 augustss
541 1.33 nathanw if (sc->sc_model != ESS_1788) {
542 1.33 nathanw /* Configure DRQ2 */
543 1.33 nathanw v = ESS_AUDIO2_CTRL3_DRQ_PD;
544 1.33 nathanw switch(sc->sc_out.drq) {
545 1.33 nathanw case 0:
546 1.33 nathanw v |= ESS_AUDIO2_CTRL3_DRQA;
547 1.33 nathanw break;
548 1.33 nathanw case 1:
549 1.33 nathanw v |= ESS_AUDIO2_CTRL3_DRQB;
550 1.33 nathanw break;
551 1.33 nathanw case 3:
552 1.33 nathanw v |= ESS_AUDIO2_CTRL3_DRQC;
553 1.33 nathanw break;
554 1.33 nathanw case 5:
555 1.33 nathanw v |= ESS_AUDIO2_CTRL3_DRQD;
556 1.33 nathanw break;
557 1.2 augustss #ifdef DIAGNOSTIC
558 1.33 nathanw default:
559 1.33 nathanw printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n",
560 1.33 nathanw sc->sc_out.drq);
561 1.33 nathanw return;
562 1.5 augustss #endif
563 1.33 nathanw }
564 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v);
565 1.33 nathanw /* Enable DMA 2 */
566 1.33 nathanw ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
567 1.33 nathanw ESS_AUDIO2_CTRL2_DMA_ENABLE);
568 1.1 augustss }
569 1.4 augustss }
570 1.4 augustss
571 1.4 augustss /*
572 1.4 augustss * Set up registers after a reset.
573 1.4 augustss */
574 1.4 augustss void
575 1.4 augustss ess_setup(sc)
576 1.4 augustss struct ess_softc *sc;
577 1.4 augustss {
578 1.18 mycroft
579 1.4 augustss ess_config_irq(sc);
580 1.4 augustss ess_config_drq(sc);
581 1.2 augustss
582 1.4 augustss DPRINTFN(2,("ess_setup: done\n"));
583 1.1 augustss }
584 1.1 augustss
585 1.1 augustss /*
586 1.1 augustss * Determine the model of ESS chip we are talking to. Currently we
587 1.1 augustss * only support ES1888, ES1887 and ES888. The method of determining
588 1.1 augustss * the chip is based on the information on page 27 of the ES1887 data
589 1.1 augustss * sheet.
590 1.1 augustss *
591 1.1 augustss * This routine sets the values of sc->sc_model and sc->sc_version.
592 1.1 augustss */
593 1.1 augustss int
594 1.1 augustss ess_identify(sc)
595 1.1 augustss struct ess_softc *sc;
596 1.1 augustss {
597 1.1 augustss u_char reg1;
598 1.1 augustss u_char reg2;
599 1.1 augustss u_char reg3;
600 1.1 augustss
601 1.1 augustss sc->sc_model = ESS_UNSUPPORTED;
602 1.1 augustss sc->sc_version = 0;
603 1.1 augustss
604 1.1 augustss
605 1.1 augustss /*
606 1.1 augustss * 1. Check legacy ID bytes. These should be 0x68 0x8n, where
607 1.1 augustss * n >= 8 for an ES1887 or an ES888. Other values indicate
608 1.1 augustss * earlier (unsupported) chips.
609 1.1 augustss */
610 1.1 augustss ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
611 1.1 augustss
612 1.1 augustss if ((reg1 = ess_rdsp(sc)) != 0x68) {
613 1.1 augustss printf("ess: First ID byte wrong (0x%02x)\n", reg1);
614 1.1 augustss return 1;
615 1.1 augustss }
616 1.1 augustss
617 1.1 augustss reg2 = ess_rdsp(sc);
618 1.1 augustss if (((reg2 & 0xf0) != 0x80) ||
619 1.1 augustss ((reg2 & 0x0f) < 8)) {
620 1.1 augustss printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
621 1.1 augustss return 1;
622 1.1 augustss }
623 1.1 augustss
624 1.1 augustss /*
625 1.1 augustss * Store the ID bytes as the version.
626 1.1 augustss */
627 1.1 augustss sc->sc_version = (reg1 << 8) + reg2;
628 1.1 augustss
629 1.1 augustss
630 1.1 augustss /*
631 1.1 augustss * 2. Verify we can change bit 2 in mixer register 0x64. This
632 1.1 augustss * should be possible on all supported chips.
633 1.1 augustss */
634 1.33 nathanw reg1 = ess_read_mix_reg(sc, ESS_MREG_VOLUME_CTRL);
635 1.1 augustss reg2 = reg1 ^ 0x04; /* toggle bit 2 */
636 1.1 augustss
637 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_VOLUME_CTRL, reg2);
638 1.1 augustss
639 1.33 nathanw if (ess_read_mix_reg(sc, ESS_MREG_VOLUME_CTRL) != reg2) {
640 1.1 augustss printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
641 1.1 augustss return 1;
642 1.1 augustss }
643 1.1 augustss
644 1.1 augustss /*
645 1.1 augustss * Restore the original value of mixer register 0x64.
646 1.1 augustss */
647 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_VOLUME_CTRL, reg1);
648 1.1 augustss
649 1.1 augustss
650 1.1 augustss /*
651 1.4 augustss * 3. Verify we can change the value of mixer register
652 1.4 augustss * ESS_MREG_SAMPLE_RATE.
653 1.33 nathanw * This is possible on the 1888/1887/888, but not on the 1788.
654 1.4 augustss * It is not necessary to restore the value of this mixer register.
655 1.1 augustss */
656 1.4 augustss reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE);
657 1.1 augustss reg2 = reg1 ^ 0xff; /* toggle all bits */
658 1.1 augustss
659 1.4 augustss ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2);
660 1.1 augustss
661 1.4 augustss if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) {
662 1.33 nathanw /* If we got this far before failing, it's a 1788. */
663 1.33 nathanw sc->sc_model = ESS_1788;
664 1.1 augustss } else {
665 1.1 augustss /*
666 1.33 nathanw * 4. Determine if we can change bit 5 in mixer register 0x64.
667 1.33 nathanw * This determines whether we have an ES1887:
668 1.1 augustss *
669 1.33 nathanw * - can change indicates ES1887
670 1.33 nathanw * - can't change indicates ES1888 or ES888
671 1.1 augustss */
672 1.33 nathanw reg1 = ess_read_mix_reg(sc, ESS_MREG_VOLUME_CTRL);
673 1.33 nathanw reg2 = reg1 ^ 0x20; /* toggle bit 5 */
674 1.33 nathanw
675 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_VOLUME_CTRL, reg2);
676 1.33 nathanw
677 1.33 nathanw if (ess_read_mix_reg(sc, ESS_MREG_VOLUME_CTRL) == reg2) {
678 1.33 nathanw sc->sc_model = ESS_1887;
679 1.1 augustss
680 1.33 nathanw /*
681 1.33 nathanw * Restore the original value of mixer register 0x64.
682 1.33 nathanw */
683 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_VOLUME_CTRL, reg1);
684 1.33 nathanw } else {
685 1.33 nathanw /*
686 1.33 nathanw * 5. Determine if we can change the value of mixer
687 1.33 nathanw * register 0x69 independently of mixer register
688 1.33 nathanw * 0x68. This determines which chip we have:
689 1.33 nathanw *
690 1.33 nathanw * - can modify idependently indicates ES888
691 1.33 nathanw * - register 0x69 is an alias of 0x68 indicates ES1888
692 1.33 nathanw */
693 1.33 nathanw reg1 = ess_read_mix_reg(sc, 0x68);
694 1.33 nathanw reg2 = ess_read_mix_reg(sc, 0x69);
695 1.33 nathanw reg3 = reg2 ^ 0xff; /* toggle all bits */
696 1.33 nathanw
697 1.33 nathanw /*
698 1.33 nathanw * Write different values to each register.
699 1.33 nathanw */
700 1.33 nathanw ess_write_mix_reg(sc, 0x68, reg2);
701 1.33 nathanw ess_write_mix_reg(sc, 0x69, reg3);
702 1.33 nathanw
703 1.33 nathanw if (ess_read_mix_reg(sc, 0x68) == reg2)
704 1.33 nathanw sc->sc_model = ESS_888;
705 1.33 nathanw else
706 1.33 nathanw sc->sc_model = ESS_1888;
707 1.1 augustss
708 1.33 nathanw /*
709 1.33 nathanw * Restore the original value of the registers.
710 1.33 nathanw */
711 1.33 nathanw ess_write_mix_reg(sc, 0x68, reg1);
712 1.33 nathanw ess_write_mix_reg(sc, 0x69, reg2);
713 1.33 nathanw }
714 1.1 augustss }
715 1.1 augustss
716 1.33 nathanw if (sc->sc_model != ESS_UNSUPPORTED) {
717 1.33 nathanw if (sc->sc_model == ESS_1788)
718 1.33 nathanw sc->ndevs = ESS_1788_NDEVS;
719 1.33 nathanw else
720 1.33 nathanw sc->ndevs = ESS_1888_NDEVS;
721 1.33 nathanw }
722 1.33 nathanw
723 1.1 augustss return 0;
724 1.1 augustss }
725 1.1 augustss
726 1.1 augustss
727 1.1 augustss int
728 1.2 augustss ess_setup_sc(sc, doinit)
729 1.1 augustss struct ess_softc *sc;
730 1.1 augustss int doinit;
731 1.1 augustss {
732 1.1 augustss /* Reset the chip. */
733 1.4 augustss if (ess_reset(sc) != 0) {
734 1.4 augustss DPRINTF(("ess_setup_sc: couldn't reset chip\n"));
735 1.1 augustss return (1);
736 1.1 augustss }
737 1.1 augustss
738 1.1 augustss /* Identify the ESS chip, and check that it is supported. */
739 1.1 augustss if (ess_identify(sc)) {
740 1.1 augustss DPRINTF(("ess_setup_sc: couldn't identify\n"));
741 1.1 augustss return (1);
742 1.1 augustss }
743 1.1 augustss
744 1.1 augustss return (0);
745 1.1 augustss }
746 1.1 augustss
747 1.1 augustss /*
748 1.1 augustss * Probe for the ESS hardware.
749 1.1 augustss */
750 1.1 augustss int
751 1.2 augustss essmatch(sc)
752 1.2 augustss struct ess_softc *sc;
753 1.1 augustss {
754 1.2 augustss if (!ESS_BASE_VALID(sc->sc_iobase)) {
755 1.2 augustss printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
756 1.1 augustss return (0);
757 1.1 augustss }
758 1.1 augustss
759 1.4 augustss /* Configure the ESS chip for the desired audio base address. */
760 1.4 augustss if (ess_config_addr(sc))
761 1.4 augustss return (0);
762 1.4 augustss
763 1.2 augustss if (ess_setup_sc(sc, 1))
764 1.2 augustss return (0);
765 1.1 augustss
766 1.1 augustss if (sc->sc_model == ESS_UNSUPPORTED) {
767 1.1 augustss DPRINTF(("ess: Unsupported model\n"));
768 1.4 augustss return (0);
769 1.1 augustss }
770 1.1 augustss
771 1.1 augustss /* Check that requested DMA channels are valid and different. */
772 1.4 augustss if (!ESS_DRQ1_VALID(sc->sc_in.drq)) {
773 1.1 augustss printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
774 1.4 augustss return (0);
775 1.1 augustss }
776 1.33 nathanw /* 1788 only has one DMA channel. */
777 1.33 nathanw if (sc->sc_model != ESS_1788) {
778 1.33 nathanw if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
779 1.33 nathanw printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
780 1.33 nathanw return (0);
781 1.33 nathanw }
782 1.33 nathanw if (sc->sc_in.drq == sc->sc_out.drq) {
783 1.33 nathanw printf("ess: play and record dma chan both %d\n",
784 1.33 nathanw sc->sc_in.drq);
785 1.33 nathanw return (0);
786 1.33 nathanw }
787 1.1 augustss
788 1.33 nathanw if (sc->sc_model == ESS_1887) {
789 1.33 nathanw /*
790 1.33 nathanw * Either use the 1887 interrupt mode with all interrupts
791 1.33 nathanw * mapped to the same irq, or use the 1888 method with
792 1.33 nathanw * irq fixed at 15.
793 1.33 nathanw */
794 1.33 nathanw if (sc->sc_in.irq == sc->sc_out.irq) {
795 1.33 nathanw if (!ESS_IRQ12_VALID(sc->sc_in.irq)) {
796 1.33 nathanw printf("ess: irq %d invalid\n", sc->sc_in.irq);
797 1.33 nathanw return (0);
798 1.33 nathanw }
799 1.33 nathanw goto irq_not1888;
800 1.33 nathanw }
801 1.33 nathanw } else {
802 1.33 nathanw /* Must use separate interrupts */
803 1.33 nathanw if (sc->sc_in.irq == sc->sc_out.irq) {
804 1.33 nathanw printf("ess: play and record irq both %d\n",
805 1.33 nathanw sc->sc_in.irq);
806 1.33 nathanw return (0);
807 1.4 augustss }
808 1.7 matt }
809 1.33 nathanw }
810 1.33 nathanw
811 1.33 nathanw if (sc->sc_model == ESS_1788) {
812 1.33 nathanw /* Check that requested IRQ line is valid.
813 1.33 nathanw */
814 1.33 nathanw if (!ESS_IRQ1_VALID(sc->sc_in.irq)) {
815 1.33 nathanw printf("ess: irq %d invalid\n", sc->sc_in.irq);
816 1.33 nathanw return (0);
817 1.33 nathanw }
818 1.4 augustss } else {
819 1.33 nathanw /* Check that requested IRQ lines are valid. */
820 1.33 nathanw if (!ESS_IRQ1_VALID(sc->sc_in.irq)) {
821 1.33 nathanw printf("ess: record irq %d invalid\n", sc->sc_in.irq);
822 1.33 nathanw return (0);
823 1.33 nathanw }
824 1.33 nathanw if (!ESS_IRQ2_VALID(sc->sc_out.irq)) {
825 1.33 nathanw printf("ess: play irq %d invalid\n", sc->sc_out.irq);
826 1.4 augustss return (0);
827 1.4 augustss }
828 1.4 augustss }
829 1.7 matt irq_not1888:
830 1.1 augustss
831 1.1 augustss /* Check that the DRQs are free. */
832 1.1 augustss if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
833 1.1 augustss !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
834 1.4 augustss return (0);
835 1.33 nathanw
836 1.1 augustss /* XXX should we check IRQs as well? */
837 1.1 augustss
838 1.2 augustss return (1);
839 1.1 augustss }
840 1.1 augustss
841 1.1 augustss
842 1.1 augustss /*
843 1.1 augustss * Attach hardware to driver, attach hardware driver to audio
844 1.4 augustss * pseudo-device driver.
845 1.1 augustss */
846 1.1 augustss void
847 1.2 augustss essattach(sc)
848 1.2 augustss struct ess_softc *sc;
849 1.1 augustss {
850 1.24 augustss struct audio_attach_args arg;
851 1.1 augustss struct audio_params pparams, rparams;
852 1.1 augustss int i;
853 1.1 augustss u_int v;
854 1.1 augustss
855 1.2 augustss if (ess_setup_sc(sc, 0)) {
856 1.1 augustss printf("%s: setup failed\n", sc->sc_dev.dv_xname);
857 1.1 augustss return;
858 1.1 augustss }
859 1.33 nathanw
860 1.33 nathanw /* 1788 only uses one IRQ and DRQ */
861 1.33 nathanw if (sc->sc_model == ESS_1788) {
862 1.33 nathanw sc->sc_out.irq = sc->sc_in.irq;
863 1.33 nathanw sc->sc_out.drq = sc->sc_in.drq;
864 1.33 nathanw }
865 1.1 augustss
866 1.2 augustss sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq,
867 1.2 augustss sc->sc_out.ist, IPL_AUDIO,
868 1.1 augustss ess_intr_output, sc);
869 1.2 augustss sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq,
870 1.2 augustss sc->sc_in.ist, IPL_AUDIO,
871 1.1 augustss ess_intr_input, sc);
872 1.1 augustss
873 1.1 augustss /* Create our DMA maps. */
874 1.1 augustss if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
875 1.33 nathanw MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
876 1.1 augustss printf("%s: can't create map for drq %d\n",
877 1.33 nathanw sc->sc_dev.dv_xname, sc->sc_in.drq);
878 1.1 augustss return;
879 1.1 augustss }
880 1.33 nathanw
881 1.33 nathanw if (sc->sc_model != ESS_1788) {
882 1.33 nathanw if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
883 1.33 nathanw MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
884 1.33 nathanw printf("%s: can't create map for drq %d\n",
885 1.33 nathanw sc->sc_dev.dv_xname, sc->sc_out.drq);
886 1.33 nathanw return;
887 1.33 nathanw }
888 1.1 augustss }
889 1.1 augustss
890 1.1 augustss printf(" ESS Technology ES%s [version 0x%04x]\n",
891 1.1 augustss essmodel[sc->sc_model], sc->sc_version);
892 1.1 augustss
893 1.1 augustss /*
894 1.1 augustss * Set record and play parameters to default values defined in
895 1.1 augustss * generic audio driver.
896 1.1 augustss */
897 1.1 augustss pparams = audio_default;
898 1.1 augustss rparams = audio_default;
899 1.1 augustss ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
900 1.1 augustss
901 1.1 augustss /* Do a hardware reset on the mixer. */
902 1.1 augustss ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
903 1.1 augustss
904 1.33 nathanw if (sc->sc_model != ESS_1788) {
905 1.33 nathanw /*
906 1.33 nathanw * Set volume of Audio 1 to zero and disable Audio 1 DAC input
907 1.33 nathanw * to playback mixer, since playback is always through Audio 2
908 1.33 nathanw * on the 188x.
909 1.33 nathanw */
910 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_VOLUME_VOICE, 0);
911 1.33 nathanw ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
912 1.33 nathanw }
913 1.1 augustss
914 1.33 nathanw if (sc->sc_model == ESS_1788) {
915 1.33 nathanw /*
916 1.33 nathanw * Set record source to mic.
917 1.33 nathanw */
918 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_ADC_SOURCE, ESS_SOURCE_MIC);
919 1.33 nathanw sc->in_port = ESS_SOURCE_MIC;
920 1.33 nathanw } else {
921 1.33 nathanw /*
922 1.33 nathanw * Set hardware record source to use output of the record
923 1.33 nathanw * mixer. We do the selection of record source in software by
924 1.33 nathanw * setting the gain of the unused sources to zero. (See
925 1.33 nathanw * ess_set_in_ports.)
926 1.33 nathanw */
927 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_ADC_SOURCE, ESS_SOURCE_MIXER);
928 1.33 nathanw ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 0x10);
929 1.33 nathanw ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 0x08);
930 1.33 nathanw }
931 1.1 augustss
932 1.1 augustss /*
933 1.1 augustss * Set gain on each mixer device to a sensible value.
934 1.1 augustss * Devices not normally used are turned off, and other devices
935 1.25 augustss * are set to 50% volume.
936 1.1 augustss */
937 1.33 nathanw for (i = 0; i < sc->ndevs; i++) {
938 1.1 augustss switch(i) {
939 1.1 augustss case ESS_MIC_PLAY_VOL:
940 1.1 augustss case ESS_LINE_PLAY_VOL:
941 1.1 augustss case ESS_CD_PLAY_VOL:
942 1.1 augustss case ESS_AUXB_PLAY_VOL:
943 1.1 augustss case ESS_DAC_REC_VOL:
944 1.1 augustss case ESS_LINE_REC_VOL:
945 1.1 augustss case ESS_SYNTH_REC_VOL:
946 1.1 augustss case ESS_CD_REC_VOL:
947 1.1 augustss case ESS_AUXB_REC_VOL:
948 1.1 augustss v = 0;
949 1.1 augustss break;
950 1.1 augustss default:
951 1.25 augustss v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN / 2);
952 1.1 augustss break;
953 1.1 augustss }
954 1.1 augustss sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
955 1.1 augustss ess_set_gain(sc, i, 1);
956 1.1 augustss }
957 1.1 augustss
958 1.4 augustss ess_setup(sc);
959 1.2 augustss
960 1.1 augustss /* Disable the speaker until the device is opened. */
961 1.1 augustss ess_speaker_off(sc);
962 1.1 augustss sc->spkr_state = SPKR_OFF;
963 1.1 augustss
964 1.1 augustss sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
965 1.1 augustss sprintf(ess_device.version, "0x%04x", sc->sc_version);
966 1.1 augustss
967 1.33 nathanw if (sc->sc_model == ESS_1788)
968 1.33 nathanw audio_attach_mi(&ess_1788_hw_if, sc, &sc->sc_dev);
969 1.33 nathanw else
970 1.33 nathanw audio_attach_mi(&ess_1888_hw_if, sc, &sc->sc_dev);
971 1.24 augustss
972 1.24 augustss arg.type = AUDIODEV_TYPE_OPL;
973 1.24 augustss arg.hwif = 0;
974 1.24 augustss arg.hdl = 0;
975 1.24 augustss (void)config_found(&sc->sc_dev, &arg, audioprint);
976 1.2 augustss
977 1.2 augustss #ifdef AUDIO_DEBUG
978 1.26 augustss if (essdebug > 0)
979 1.26 augustss ess_printsc(sc);
980 1.2 augustss #endif
981 1.1 augustss }
982 1.1 augustss
983 1.1 augustss /*
984 1.1 augustss * Various routines to interface to higher level audio driver
985 1.1 augustss */
986 1.1 augustss
987 1.1 augustss int
988 1.1 augustss ess_open(addr, flags)
989 1.1 augustss void *addr;
990 1.1 augustss int flags;
991 1.1 augustss {
992 1.1 augustss struct ess_softc *sc = addr;
993 1.1 augustss
994 1.1 augustss DPRINTF(("ess_open: sc=%p\n", sc));
995 1.1 augustss
996 1.1 augustss if (sc->sc_open != 0 || ess_reset(sc) != 0)
997 1.1 augustss return ENXIO;
998 1.1 augustss
999 1.6 augustss ess_setup(sc); /* because we did a reset */
1000 1.1 augustss
1001 1.1 augustss sc->sc_open = 1;
1002 1.1 augustss
1003 1.1 augustss DPRINTF(("ess_open: opened\n"));
1004 1.1 augustss
1005 1.1 augustss return (0);
1006 1.1 augustss }
1007 1.1 augustss
1008 1.1 augustss void
1009 1.33 nathanw ess_1788_close(addr)
1010 1.1 augustss void *addr;
1011 1.1 augustss {
1012 1.1 augustss struct ess_softc *sc = addr;
1013 1.1 augustss
1014 1.33 nathanw DPRINTF(("ess_1788_close: sc=%p\n", sc));
1015 1.1 augustss
1016 1.1 augustss ess_speaker_off(sc);
1017 1.1 augustss sc->spkr_state = SPKR_OFF;
1018 1.33 nathanw ess_1788_halt_output(sc);
1019 1.33 nathanw ess_1788_halt_input(sc);
1020 1.33 nathanw sc->sc_in.intr = 0;
1021 1.33 nathanw sc->sc_out.intr = 0;
1022 1.33 nathanw sc->sc_open = 0;
1023 1.33 nathanw
1024 1.33 nathanw DPRINTF(("ess_close: closed\n"));
1025 1.33 nathanw }
1026 1.33 nathanw
1027 1.33 nathanw void
1028 1.33 nathanw ess_1888_close(addr)
1029 1.33 nathanw void *addr;
1030 1.33 nathanw {
1031 1.33 nathanw struct ess_softc *sc = addr;
1032 1.31 mycroft
1033 1.33 nathanw DPRINTF(("ess_close: sc=%p\n", sc));
1034 1.31 mycroft
1035 1.33 nathanw ess_speaker_off(sc);
1036 1.33 nathanw sc->spkr_state = SPKR_OFF;
1037 1.33 nathanw ess_1888_halt_output(sc);
1038 1.33 nathanw ess_1888_halt_input(sc);
1039 1.1 augustss sc->sc_in.intr = 0;
1040 1.1 augustss sc->sc_out.intr = 0;
1041 1.31 mycroft sc->sc_open = 0;
1042 1.1 augustss
1043 1.1 augustss DPRINTF(("ess_close: closed\n"));
1044 1.1 augustss }
1045 1.1 augustss
1046 1.6 augustss /*
1047 1.6 augustss * Wait for FIFO to drain, and analog section to settle.
1048 1.33 nathanw * XXX should check FIFO empty bit.
1049 1.6 augustss */
1050 1.6 augustss int
1051 1.6 augustss ess_drain(addr)
1052 1.6 augustss void *addr;
1053 1.6 augustss {
1054 1.6 augustss extern int hz; /* XXX */
1055 1.6 augustss
1056 1.9 mycroft tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */
1057 1.6 augustss return (0);
1058 1.6 augustss }
1059 1.6 augustss
1060 1.25 augustss /* XXX should use reference count */
1061 1.1 augustss int
1062 1.4 augustss ess_speaker_ctl(addr, newstate)
1063 1.4 augustss void *addr;
1064 1.4 augustss int newstate;
1065 1.4 augustss {
1066 1.4 augustss struct ess_softc *sc = addr;
1067 1.4 augustss
1068 1.4 augustss if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
1069 1.4 augustss ess_speaker_on(sc);
1070 1.4 augustss sc->spkr_state = SPKR_ON;
1071 1.4 augustss }
1072 1.4 augustss if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
1073 1.4 augustss ess_speaker_off(sc);
1074 1.4 augustss sc->spkr_state = SPKR_OFF;
1075 1.4 augustss }
1076 1.4 augustss return (0);
1077 1.4 augustss }
1078 1.4 augustss
1079 1.4 augustss int
1080 1.1 augustss ess_getdev(addr, retp)
1081 1.1 augustss void *addr;
1082 1.1 augustss struct audio_device *retp;
1083 1.1 augustss {
1084 1.1 augustss *retp = ess_device;
1085 1.1 augustss return (0);
1086 1.1 augustss }
1087 1.1 augustss
1088 1.1 augustss int
1089 1.1 augustss ess_query_encoding(addr, fp)
1090 1.1 augustss void *addr;
1091 1.1 augustss struct audio_encoding *fp;
1092 1.1 augustss {
1093 1.1 augustss /*struct ess_softc *sc = addr;*/
1094 1.1 augustss
1095 1.1 augustss switch (fp->index) {
1096 1.1 augustss case 0:
1097 1.1 augustss strcpy(fp->name, AudioEulinear);
1098 1.1 augustss fp->encoding = AUDIO_ENCODING_ULINEAR;
1099 1.1 augustss fp->precision = 8;
1100 1.1 augustss fp->flags = 0;
1101 1.1 augustss return (0);
1102 1.1 augustss case 1:
1103 1.1 augustss strcpy(fp->name, AudioEmulaw);
1104 1.1 augustss fp->encoding = AUDIO_ENCODING_ULAW;
1105 1.1 augustss fp->precision = 8;
1106 1.1 augustss fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1107 1.1 augustss return (0);
1108 1.1 augustss case 2:
1109 1.1 augustss strcpy(fp->name, AudioEalaw);
1110 1.4 augustss fp->encoding = AUDIO_ENCODING_ALAW;
1111 1.1 augustss fp->precision = 8;
1112 1.1 augustss fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1113 1.1 augustss return (0);
1114 1.1 augustss case 3:
1115 1.4 augustss strcpy(fp->name, AudioEslinear);
1116 1.4 augustss fp->encoding = AUDIO_ENCODING_SLINEAR;
1117 1.1 augustss fp->precision = 8;
1118 1.1 augustss fp->flags = 0;
1119 1.1 augustss return (0);
1120 1.33 nathanw case 4:
1121 1.1 augustss strcpy(fp->name, AudioEslinear_le);
1122 1.1 augustss fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
1123 1.1 augustss fp->precision = 16;
1124 1.1 augustss fp->flags = 0;
1125 1.1 augustss return (0);
1126 1.1 augustss case 5:
1127 1.1 augustss strcpy(fp->name, AudioEulinear_le);
1128 1.1 augustss fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
1129 1.1 augustss fp->precision = 16;
1130 1.1 augustss fp->flags = 0;
1131 1.1 augustss return (0);
1132 1.1 augustss case 6:
1133 1.1 augustss strcpy(fp->name, AudioEslinear_be);
1134 1.1 augustss fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
1135 1.1 augustss fp->precision = 16;
1136 1.1 augustss fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1137 1.1 augustss return (0);
1138 1.1 augustss case 7:
1139 1.1 augustss strcpy(fp->name, AudioEulinear_be);
1140 1.1 augustss fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
1141 1.1 augustss fp->precision = 16;
1142 1.1 augustss fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1143 1.1 augustss return (0);
1144 1.1 augustss default:
1145 1.1 augustss return EINVAL;
1146 1.1 augustss }
1147 1.1 augustss return (0);
1148 1.1 augustss }
1149 1.1 augustss
1150 1.1 augustss int
1151 1.8 mycroft ess_set_params(addr, setmode, usemode, play, rec)
1152 1.1 augustss void *addr;
1153 1.8 mycroft int setmode, usemode;
1154 1.8 mycroft struct audio_params *play, *rec;
1155 1.1 augustss {
1156 1.1 augustss struct ess_softc *sc = addr;
1157 1.8 mycroft struct audio_params *p;
1158 1.8 mycroft int mode;
1159 1.19 mycroft int rate;
1160 1.1 augustss
1161 1.4 augustss DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode));
1162 1.4 augustss
1163 1.15 mycroft /*
1164 1.15 mycroft * The ES1887 manual (page 39, `Full-Duplex DMA Mode') claims that in
1165 1.15 mycroft * full-duplex operation the sample rates must be the same for both
1166 1.16 mycroft * channels. This appears to be false; the only bit in common is the
1167 1.16 mycroft * clock source selection. However, we'll be conservative here.
1168 1.16 mycroft * - mycroft
1169 1.15 mycroft */
1170 1.19 mycroft if (play->sample_rate != rec->sample_rate &&
1171 1.19 mycroft usemode == (AUMODE_PLAY | AUMODE_RECORD)) {
1172 1.19 mycroft if (setmode == AUMODE_PLAY) {
1173 1.13 mycroft rec->sample_rate = play->sample_rate;
1174 1.13 mycroft setmode |= AUMODE_RECORD;
1175 1.19 mycroft } else if (setmode == AUMODE_RECORD) {
1176 1.13 mycroft play->sample_rate = rec->sample_rate;
1177 1.13 mycroft setmode |= AUMODE_PLAY;
1178 1.13 mycroft } else
1179 1.13 mycroft return (EINVAL);
1180 1.13 mycroft }
1181 1.13 mycroft
1182 1.17 mycroft for (mode = AUMODE_RECORD; mode != -1;
1183 1.17 mycroft mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
1184 1.1 augustss if ((setmode & mode) == 0)
1185 1.1 augustss continue;
1186 1.1 augustss
1187 1.8 mycroft p = mode == AUMODE_PLAY ? play : rec;
1188 1.1 augustss
1189 1.17 mycroft if (p->sample_rate < ESS_MINRATE ||
1190 1.17 mycroft p->sample_rate > ESS_MAXRATE ||
1191 1.17 mycroft (p->precision != 8 && p->precision != 16) ||
1192 1.17 mycroft (p->channels != 1 && p->channels != 2))
1193 1.17 mycroft return (EINVAL);
1194 1.1 augustss
1195 1.17 mycroft p->factor = 1;
1196 1.17 mycroft p->sw_code = 0;
1197 1.1 augustss switch (p->encoding) {
1198 1.1 augustss case AUDIO_ENCODING_SLINEAR_BE:
1199 1.17 mycroft case AUDIO_ENCODING_ULINEAR_BE:
1200 1.1 augustss if (p->precision == 16)
1201 1.17 mycroft p->sw_code = swap_bytes;
1202 1.17 mycroft break;
1203 1.1 augustss case AUDIO_ENCODING_SLINEAR_LE:
1204 1.1 augustss case AUDIO_ENCODING_ULINEAR_LE:
1205 1.1 augustss break;
1206 1.1 augustss case AUDIO_ENCODING_ULAW:
1207 1.17 mycroft if (mode == AUMODE_PLAY) {
1208 1.17 mycroft p->factor = 2;
1209 1.17 mycroft p->sw_code = mulaw_to_ulinear16;
1210 1.17 mycroft } else
1211 1.17 mycroft p->sw_code = ulinear8_to_mulaw;
1212 1.17 mycroft break;
1213 1.1 augustss case AUDIO_ENCODING_ALAW:
1214 1.17 mycroft if (mode == AUMODE_PLAY) {
1215 1.17 mycroft p->factor = 2;
1216 1.17 mycroft p->sw_code = alaw_to_ulinear16;
1217 1.17 mycroft } else
1218 1.17 mycroft p->sw_code = ulinear8_to_alaw;
1219 1.17 mycroft break;
1220 1.1 augustss default:
1221 1.17 mycroft return (EINVAL);
1222 1.17 mycroft }
1223 1.19 mycroft }
1224 1.17 mycroft
1225 1.19 mycroft if (usemode == AUMODE_RECORD)
1226 1.19 mycroft rate = rec->sample_rate;
1227 1.19 mycroft else
1228 1.19 mycroft rate = play->sample_rate;
1229 1.19 mycroft
1230 1.33 nathanw if (sc->sc_model != ESS_1788) {
1231 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(rate));
1232 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(rate));
1233 1.33 nathanw }
1234 1.1 augustss
1235 1.19 mycroft ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(rate));
1236 1.19 mycroft ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(rate));
1237 1.1 augustss
1238 1.1 augustss return (0);
1239 1.1 augustss }
1240 1.1 augustss
1241 1.1 augustss int
1242 1.33 nathanw ess_1788_trigger_output(addr, start, end, blksize, intr, arg, param)
1243 1.33 nathanw void *addr;
1244 1.33 nathanw void *start, *end;
1245 1.33 nathanw int blksize;
1246 1.33 nathanw void (*intr) __P((void *));
1247 1.33 nathanw void *arg;
1248 1.33 nathanw struct audio_params *param;
1249 1.33 nathanw {
1250 1.33 nathanw struct ess_softc *sc = addr;
1251 1.33 nathanw int val;
1252 1.33 nathanw
1253 1.33 nathanw DPRINTFN(1, ("ess_1788_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
1254 1.33 nathanw addr, start, end, blksize, intr, arg));
1255 1.33 nathanw
1256 1.33 nathanw #ifdef DIAGNOSTIC
1257 1.33 nathanw if (param->channels == 2 && (blksize & 1)) {
1258 1.33 nathanw DPRINTF(("stereo playback odd bytes (%d)\n", blksize));
1259 1.33 nathanw return EIO;
1260 1.33 nathanw }
1261 1.33 nathanw if (sc->sc_out.active)
1262 1.33 nathanw panic("ess_1788_trigger_output: already running");
1263 1.33 nathanw #endif
1264 1.33 nathanw sc->sc_out.active = 1;
1265 1.33 nathanw
1266 1.33 nathanw sc->sc_out.intr = intr;
1267 1.33 nathanw sc->sc_out.arg = arg;
1268 1.33 nathanw
1269 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL2,
1270 1.33 nathanw ESS_AUDIO1_CTRL2_AUTO_INIT);
1271 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_DEMAND_CTRL, ESS_DEMAND_CTRL_DEMAND_4);
1272 1.33 nathanw
1273 1.33 nathanw val = 0x90;
1274 1.33 nathanw if (param->encoding == AUDIO_ENCODING_SLINEAR_BE ||
1275 1.33 nathanw param->encoding == AUDIO_ENCODING_SLINEAR_LE) {
1276 1.33 nathanw ess_write_x_reg(sc, ESS_1788_XCMD_AUDIO_CTRL0, ESS_CTRL0_SIGNED);
1277 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1, 0x71);
1278 1.33 nathanw val |= ESS_AUDIO1_CTRL1_FIFO_SIGNED;
1279 1.33 nathanw } else {
1280 1.33 nathanw ess_write_x_reg(sc, ESS_1788_XCMD_AUDIO_CTRL0, ESS_CTRL0_UNSIGNED);
1281 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1, 0x51);
1282 1.33 nathanw }
1283 1.33 nathanw
1284 1.33 nathanw if (param->precision * param->factor == 16)
1285 1.33 nathanw val |= ESS_AUDIO1_CTRL1_FIFO_SIZE;
1286 1.33 nathanw
1287 1.33 nathanw if (param->channels == 2) {
1288 1.33 nathanw ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1289 1.33 nathanw ESS_AUDIO_CTRL_STEREO);
1290 1.33 nathanw ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1291 1.33 nathanw ESS_AUDIO_CTRL_MONO);
1292 1.33 nathanw val |= ESS_AUDIO1_CTRL1_FIFO_STEREO;
1293 1.33 nathanw } else {
1294 1.33 nathanw ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1295 1.33 nathanw ESS_AUDIO_CTRL_MONO);
1296 1.33 nathanw ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1297 1.33 nathanw ESS_AUDIO_CTRL_STEREO);
1298 1.33 nathanw val |= ESS_AUDIO1_CTRL1_FIFO_MONO;
1299 1.33 nathanw }
1300 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1, val);
1301 1.33 nathanw
1302 1.33 nathanw isa_dmastart(sc->sc_ic, sc->sc_out.drq, start,
1303 1.33 nathanw (char *)end - (char *)start, NULL,
1304 1.33 nathanw DMAMODE_WRITE | DMAMODE_LOOP,
1305 1.33 nathanw BUS_DMA_NOWAIT);
1306 1.33 nathanw
1307 1.33 nathanw /* Program transfer count registers with 2's complement of count. */
1308 1.33 nathanw blksize = -blksize;
1309 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, blksize);
1310 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, blksize >> 8);
1311 1.33 nathanw
1312 1.33 nathanw /* Enable audio */
1313 1.33 nathanw ess_wdsp(sc, ESS_ACMD_ENABLE_SPKR);
1314 1.33 nathanw
1315 1.33 nathanw /* Start auto-init DMA */
1316 1.33 nathanw ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1317 1.33 nathanw ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1318 1.33 nathanw
1319 1.33 nathanw return (0);
1320 1.33 nathanw }
1321 1.33 nathanw
1322 1.33 nathanw int
1323 1.33 nathanw ess_1888_trigger_output(addr, start, end, blksize, intr, arg, param)
1324 1.1 augustss void *addr;
1325 1.19 mycroft void *start, *end;
1326 1.19 mycroft int blksize;
1327 1.19 mycroft void (*intr) __P((void *));
1328 1.19 mycroft void *arg;
1329 1.19 mycroft struct audio_params *param;
1330 1.1 augustss {
1331 1.1 augustss struct ess_softc *sc = addr;
1332 1.1 augustss
1333 1.19 mycroft DPRINTFN(1, ("ess_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
1334 1.33 nathanw addr, start, end, blksize, intr, arg));
1335 1.19 mycroft
1336 1.19 mycroft #ifdef DIAGNOSTIC
1337 1.19 mycroft if (param->channels == 2 && (blksize & 1)) {
1338 1.19 mycroft DPRINTF(("stereo playback odd bytes (%d)\n", blksize));
1339 1.19 mycroft return EIO;
1340 1.19 mycroft }
1341 1.19 mycroft if (sc->sc_out.active)
1342 1.19 mycroft panic("ess_trigger_output: already running");
1343 1.20 matthias #endif
1344 1.19 mycroft sc->sc_out.active = 1;
1345 1.19 mycroft
1346 1.19 mycroft sc->sc_out.intr = intr;
1347 1.19 mycroft sc->sc_out.arg = arg;
1348 1.1 augustss
1349 1.19 mycroft if (param->precision * param->factor == 16)
1350 1.17 mycroft ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1351 1.33 nathanw ESS_AUDIO2_CTRL2_FIFO_SIZE);
1352 1.17 mycroft else
1353 1.1 augustss ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1354 1.33 nathanw ESS_AUDIO2_CTRL2_FIFO_SIZE);
1355 1.1 augustss
1356 1.19 mycroft if (param->channels == 2)
1357 1.1 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1358 1.33 nathanw ESS_AUDIO2_CTRL2_CHANNELS);
1359 1.17 mycroft else
1360 1.1 augustss ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1361 1.33 nathanw ESS_AUDIO2_CTRL2_CHANNELS);
1362 1.1 augustss
1363 1.19 mycroft if (param->encoding == AUDIO_ENCODING_SLINEAR_BE ||
1364 1.33 nathanw param->encoding == AUDIO_ENCODING_SLINEAR_LE)
1365 1.1 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1366 1.33 nathanw ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1367 1.17 mycroft else
1368 1.17 mycroft ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1369 1.33 nathanw ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1370 1.6 augustss
1371 1.28 augustss isa_dmastart(sc->sc_ic, sc->sc_out.drq, start,
1372 1.33 nathanw (char *)end - (char *)start, NULL,
1373 1.33 nathanw DMAMODE_WRITE | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
1374 1.1 augustss
1375 1.6 augustss if (IS16BITDRQ(sc->sc_out.drq))
1376 1.19 mycroft blksize >>= 1; /* use word count for 16 bit DMA */
1377 1.6 augustss /* Program transfer count registers with 2's complement of count. */
1378 1.19 mycroft blksize = -blksize;
1379 1.19 mycroft ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, blksize);
1380 1.19 mycroft ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, blksize >> 8);
1381 1.1 augustss
1382 1.18 mycroft if (IS16BITDRQ(sc->sc_out.drq))
1383 1.33 nathanw ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1384 1.33 nathanw ESS_AUDIO2_CTRL1_XFER_SIZE);
1385 1.18 mycroft else
1386 1.33 nathanw ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1387 1.33 nathanw ESS_AUDIO2_CTRL1_XFER_SIZE);
1388 1.18 mycroft
1389 1.18 mycroft /* Use 8 bytes per output DMA. */
1390 1.18 mycroft ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1391 1.33 nathanw ESS_AUDIO2_CTRL1_DEMAND_8);
1392 1.18 mycroft
1393 1.6 augustss /* Start auto-init DMA */
1394 1.1 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1395 1.33 nathanw ESS_AUDIO2_CTRL1_DAC_ENABLE |
1396 1.33 nathanw ESS_AUDIO2_CTRL1_FIFO_ENABLE |
1397 1.33 nathanw ESS_AUDIO2_CTRL1_AUTO_INIT);
1398 1.33 nathanw return (0);
1399 1.33 nathanw
1400 1.33 nathanw }
1401 1.33 nathanw
1402 1.33 nathanw int
1403 1.33 nathanw ess_1788_trigger_input(addr, start, end, blksize, intr, arg, param)
1404 1.33 nathanw void *addr;
1405 1.33 nathanw void *start, *end;
1406 1.33 nathanw int blksize;
1407 1.33 nathanw void (*intr) __P((void *));
1408 1.33 nathanw void *arg;
1409 1.33 nathanw struct audio_params *param;
1410 1.33 nathanw {
1411 1.33 nathanw struct ess_softc *sc = addr;
1412 1.33 nathanw int val;
1413 1.33 nathanw
1414 1.33 nathanw DPRINTFN(1, ("ess_1788_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
1415 1.33 nathanw addr, start, end, blksize, intr, arg));
1416 1.33 nathanw
1417 1.33 nathanw #ifdef DIAGNOSTIC
1418 1.33 nathanw if (param->channels == 2 && (blksize & 1)) {
1419 1.33 nathanw DPRINTF(("stereo record odd bytes (%d)\n", blksize));
1420 1.33 nathanw return EIO;
1421 1.33 nathanw }
1422 1.33 nathanw if (sc->sc_in.active)
1423 1.33 nathanw panic("ess_trigger_input: already running");
1424 1.33 nathanw #endif
1425 1.33 nathanw sc->sc_in.active = 1;
1426 1.33 nathanw
1427 1.33 nathanw sc->sc_in.intr = intr;
1428 1.33 nathanw sc->sc_in.arg = arg;
1429 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL2,
1430 1.33 nathanw ESS_AUDIO1_CTRL2_AUTO_INIT |
1431 1.33 nathanw ESS_AUDIO1_CTRL2_DMA_READ |
1432 1.33 nathanw ESS_AUDIO1_CTRL2_ADC_ENABLE);
1433 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_DEMAND_CTRL, ESS_DEMAND_CTRL_DEMAND_4);
1434 1.33 nathanw
1435 1.33 nathanw val = 0x90;
1436 1.33 nathanw if (param->encoding == AUDIO_ENCODING_SLINEAR_BE ||
1437 1.33 nathanw param->encoding == AUDIO_ENCODING_SLINEAR_LE) {
1438 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1, 0x71);
1439 1.33 nathanw val |= ESS_AUDIO1_CTRL1_FIFO_SIGNED;
1440 1.33 nathanw } else {
1441 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1, 0x51);
1442 1.33 nathanw }
1443 1.33 nathanw
1444 1.33 nathanw if (param->precision * param->factor == 16)
1445 1.33 nathanw val |= ESS_AUDIO1_CTRL1_FIFO_SIZE;
1446 1.33 nathanw
1447 1.33 nathanw if (param->channels == 2) {
1448 1.33 nathanw ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1449 1.33 nathanw ESS_AUDIO_CTRL_STEREO);
1450 1.33 nathanw ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1451 1.33 nathanw ESS_AUDIO_CTRL_MONO);
1452 1.33 nathanw val |= ESS_AUDIO1_CTRL1_FIFO_STEREO;
1453 1.33 nathanw } else {
1454 1.33 nathanw ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1455 1.33 nathanw ESS_AUDIO_CTRL_MONO);
1456 1.33 nathanw ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1457 1.33 nathanw ESS_AUDIO_CTRL_STEREO);
1458 1.33 nathanw val |= ESS_AUDIO1_CTRL1_FIFO_MONO;
1459 1.33 nathanw }
1460 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1, val);
1461 1.33 nathanw
1462 1.33 nathanw isa_dmastart(sc->sc_ic, sc->sc_in.drq, start,
1463 1.33 nathanw (char *)end - (char *)start, NULL,
1464 1.33 nathanw DMAMODE_READ | DMAMODE_LOOP,
1465 1.33 nathanw BUS_DMA_NOWAIT);
1466 1.33 nathanw
1467 1.33 nathanw /* Program transfer count registers with 2's complement of count. */
1468 1.33 nathanw blksize = -blksize;
1469 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, blksize);
1470 1.33 nathanw ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, blksize >> 8);
1471 1.33 nathanw
1472 1.33 nathanw /* Start auto-init DMA */
1473 1.33 nathanw ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1474 1.33 nathanw ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1475 1.10 mycroft
1476 1.1 augustss return (0);
1477 1.1 augustss
1478 1.1 augustss }
1479 1.1 augustss
1480 1.1 augustss int
1481 1.33 nathanw ess_1888_trigger_input(addr, start, end, blksize, intr, arg, param)
1482 1.10 mycroft void *addr;
1483 1.19 mycroft void *start, *end;
1484 1.19 mycroft int blksize;
1485 1.19 mycroft void (*intr) __P((void *));
1486 1.19 mycroft void *arg;
1487 1.19 mycroft struct audio_params *param;
1488 1.10 mycroft {
1489 1.10 mycroft struct ess_softc *sc = addr;
1490 1.10 mycroft
1491 1.33 nathanw DPRINTFN(1, ("ess_1888_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
1492 1.33 nathanw addr, start, end, blksize, intr, arg));
1493 1.19 mycroft
1494 1.19 mycroft #ifdef DIAGNOSTIC
1495 1.19 mycroft if (param->channels == 2 && (blksize & 1)) {
1496 1.19 mycroft DPRINTF(("stereo record odd bytes (%d)\n", blksize));
1497 1.19 mycroft return EIO;
1498 1.19 mycroft }
1499 1.19 mycroft if (sc->sc_in.active)
1500 1.33 nathanw panic("ess_1888_trigger_input: already running");
1501 1.20 matthias #endif
1502 1.19 mycroft sc->sc_in.active = 1;
1503 1.17 mycroft
1504 1.19 mycroft sc->sc_in.intr = intr;
1505 1.19 mycroft sc->sc_in.arg = arg;
1506 1.19 mycroft
1507 1.19 mycroft if (param->precision * param->factor == 16)
1508 1.17 mycroft ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1509 1.33 nathanw ESS_AUDIO1_CTRL1_FIFO_SIZE);
1510 1.17 mycroft else
1511 1.17 mycroft ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1512 1.33 nathanw ESS_AUDIO1_CTRL1_FIFO_SIZE);
1513 1.17 mycroft
1514 1.19 mycroft if (param->channels == 2) {
1515 1.17 mycroft ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL,
1516 1.33 nathanw (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) |
1517 1.33 nathanw ESS_AUDIO_CTRL_STEREO) &~ ESS_AUDIO_CTRL_MONO);
1518 1.17 mycroft ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1519 1.33 nathanw ESS_AUDIO1_CTRL1_FIFO_STEREO);
1520 1.17 mycroft } else {
1521 1.17 mycroft ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL,
1522 1.33 nathanw (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) |
1523 1.33 nathanw ESS_AUDIO_CTRL_MONO) &~ ESS_AUDIO_CTRL_STEREO);
1524 1.17 mycroft ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1525 1.33 nathanw ESS_AUDIO1_CTRL1_FIFO_STEREO);
1526 1.17 mycroft }
1527 1.17 mycroft
1528 1.19 mycroft if (param->encoding == AUDIO_ENCODING_SLINEAR_BE ||
1529 1.33 nathanw param->encoding == AUDIO_ENCODING_SLINEAR_LE)
1530 1.17 mycroft ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1531 1.33 nathanw ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1532 1.17 mycroft else
1533 1.17 mycroft ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1534 1.33 nathanw ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1535 1.17 mycroft
1536 1.17 mycroft /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
1537 1.17 mycroft ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1538 1.33 nathanw ESS_AUDIO1_CTRL1_FIFO_CONNECT);
1539 1.17 mycroft
1540 1.28 augustss isa_dmastart(sc->sc_ic, sc->sc_in.drq, start,
1541 1.33 nathanw (char *)end - (char *)start, NULL,
1542 1.33 nathanw DMAMODE_READ | DMAMODE_LOOPDEMAND, BUS_DMA_NOWAIT);
1543 1.11 mycroft
1544 1.17 mycroft if (IS16BITDRQ(sc->sc_in.drq))
1545 1.19 mycroft blksize >>= 1; /* use word count for 16 bit DMA */
1546 1.10 mycroft /* Program transfer count registers with 2's complement of count. */
1547 1.19 mycroft blksize = -blksize;
1548 1.19 mycroft ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, blksize);
1549 1.19 mycroft ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, blksize >> 8);
1550 1.1 augustss
1551 1.18 mycroft /* Use 4 bytes per input DMA. */
1552 1.18 mycroft ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL,
1553 1.33 nathanw ESS_DEMAND_CTRL_DEMAND_4);
1554 1.18 mycroft
1555 1.10 mycroft /* Start auto-init DMA */
1556 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1557 1.10 mycroft ESS_AUDIO1_CTRL2_DMA_READ |
1558 1.10 mycroft ESS_AUDIO1_CTRL2_ADC_ENABLE |
1559 1.10 mycroft ESS_AUDIO1_CTRL2_FIFO_ENABLE |
1560 1.10 mycroft ESS_AUDIO1_CTRL2_AUTO_INIT);
1561 1.1 augustss
1562 1.1 augustss return (0);
1563 1.1 augustss
1564 1.1 augustss }
1565 1.1 augustss
1566 1.33 nathanw int ess_1788_halt_output(addr)
1567 1.33 nathanw void *addr;
1568 1.33 nathanw {
1569 1.33 nathanw struct ess_softc *sc = addr;
1570 1.33 nathanw
1571 1.33 nathanw DPRINTF(("ess_1788_halt_output: sc=%p\n", sc));
1572 1.33 nathanw if (sc->sc_out.active) {
1573 1.33 nathanw ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1574 1.33 nathanw ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1575 1.33 nathanw ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
1576 1.33 nathanw isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
1577 1.33 nathanw sc->sc_out.active = 0;
1578 1.33 nathanw }
1579 1.33 nathanw
1580 1.33 nathanw return (0);
1581 1.33 nathanw }
1582 1.33 nathanw
1583 1.1 augustss int
1584 1.33 nathanw ess_1888_halt_output(addr)
1585 1.1 augustss void *addr;
1586 1.1 augustss {
1587 1.1 augustss struct ess_softc *sc = addr;
1588 1.1 augustss
1589 1.33 nathanw DPRINTF(("ess_1888_halt_output: sc=%p\n", sc));
1590 1.31 mycroft if (sc->sc_out.active) {
1591 1.31 mycroft ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1592 1.31 mycroft ESS_AUDIO2_CTRL1_DAC_ENABLE |
1593 1.31 mycroft ESS_AUDIO2_CTRL1_FIFO_ENABLE);
1594 1.31 mycroft isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
1595 1.31 mycroft sc->sc_out.active = 0;
1596 1.31 mycroft }
1597 1.18 mycroft
1598 1.1 augustss return (0);
1599 1.1 augustss }
1600 1.1 augustss
1601 1.1 augustss int
1602 1.33 nathanw ess_1788_halt_input(addr)
1603 1.33 nathanw void *addr;
1604 1.33 nathanw {
1605 1.33 nathanw struct ess_softc *sc = addr;
1606 1.33 nathanw
1607 1.33 nathanw DPRINTF(("ess_halt_input: sc=%p\n", sc));
1608 1.33 nathanw
1609 1.33 nathanw if (sc->sc_in.active) {
1610 1.33 nathanw ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1611 1.33 nathanw ESS_AUDIO2_CTRL1_FIFO_ENABLE);
1612 1.33 nathanw isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
1613 1.33 nathanw sc->sc_in.active = 0;
1614 1.33 nathanw }
1615 1.33 nathanw
1616 1.33 nathanw return (0);
1617 1.33 nathanw }
1618 1.33 nathanw
1619 1.33 nathanw
1620 1.33 nathanw int
1621 1.33 nathanw ess_1888_halt_input(addr)
1622 1.1 augustss void *addr;
1623 1.1 augustss {
1624 1.1 augustss struct ess_softc *sc = addr;
1625 1.1 augustss
1626 1.1 augustss DPRINTF(("ess_halt_input: sc=%p\n", sc));
1627 1.1 augustss
1628 1.31 mycroft if (sc->sc_in.active) {
1629 1.31 mycroft ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1630 1.31 mycroft ESS_AUDIO1_CTRL2_ADC_ENABLE |
1631 1.31 mycroft ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1632 1.31 mycroft isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
1633 1.31 mycroft sc->sc_in.active = 0;
1634 1.31 mycroft }
1635 1.18 mycroft
1636 1.1 augustss return (0);
1637 1.1 augustss }
1638 1.1 augustss
1639 1.1 augustss int
1640 1.1 augustss ess_intr_output(arg)
1641 1.1 augustss void *arg;
1642 1.1 augustss {
1643 1.1 augustss struct ess_softc *sc = arg;
1644 1.33 nathanw bus_space_tag_t iot = sc->sc_iot;
1645 1.33 nathanw bus_space_handle_t ioh = sc->sc_ioh;
1646 1.33 nathanw int irq;
1647 1.1 augustss
1648 1.2 augustss DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr));
1649 1.1 augustss
1650 1.33 nathanw irq = EREAD1(iot, ioh, ESS_DSP_READ_STATUS);
1651 1.33 nathanw if ((irq & (ESS_DSP_READ_ANYIRQ)) == 0) {
1652 1.33 nathanw DPRINTF(("ess_intr_output: spurious interrupt %02x\n", irq));
1653 1.33 nathanw return (0);
1654 1.33 nathanw }
1655 1.10 mycroft
1656 1.33 nathanw if (sc->sc_out.intr == 0)
1657 1.33 nathanw return (0);
1658 1.1 augustss
1659 1.33 nathanw /* clear interrupt on Audio channel */
1660 1.33 nathanw if (sc->sc_model == ESS_1788)
1661 1.33 nathanw EREAD1(iot, ioh, ESS_CLEAR_INTR);
1662 1.6 augustss else
1663 1.33 nathanw ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1664 1.33 nathanw ESS_AUDIO2_CTRL2_IRQ_LATCH);
1665 1.33 nathanw sc->sc_out.nintr++;
1666 1.33 nathanw (*sc->sc_out.intr)(sc->sc_out.arg);
1667 1.1 augustss
1668 1.4 augustss return (1);
1669 1.1 augustss }
1670 1.1 augustss
1671 1.1 augustss int
1672 1.1 augustss ess_intr_input(arg)
1673 1.1 augustss void *arg;
1674 1.1 augustss {
1675 1.1 augustss struct ess_softc *sc = arg;
1676 1.33 nathanw bus_space_tag_t iot = sc->sc_iot;
1677 1.33 nathanw bus_space_handle_t ioh = sc->sc_ioh;
1678 1.33 nathanw int irq;
1679 1.1 augustss
1680 1.2 augustss DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr));
1681 1.1 augustss
1682 1.33 nathanw irq = EREAD1(iot, ioh, ESS_DSP_READ_STATUS);
1683 1.33 nathanw if ((irq & (ESS_DSP_READ_ANYIRQ)) == 0) {
1684 1.33 nathanw DPRINTF(("ess_intr_input: spurious interrupt 0x%02x\n", irq));
1685 1.33 nathanw return (0);
1686 1.33 nathanw }
1687 1.33 nathanw if (sc->sc_in.intr == 0)
1688 1.33 nathanw return (0);
1689 1.33 nathanw
1690 1.1 augustss /* clear interrupt on Audio channel 1*/
1691 1.33 nathanw EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
1692 1.1 augustss sc->sc_in.nintr++;
1693 1.33 nathanw (*sc->sc_in.intr)(sc->sc_in.arg);
1694 1.1 augustss
1695 1.1 augustss return (1);
1696 1.1 augustss }
1697 1.1 augustss
1698 1.1 augustss int
1699 1.1 augustss ess_round_blocksize(addr, blk)
1700 1.1 augustss void *addr;
1701 1.1 augustss int blk;
1702 1.1 augustss {
1703 1.4 augustss return (blk & -8); /* round for max DMA size */
1704 1.1 augustss }
1705 1.1 augustss
1706 1.1 augustss int
1707 1.1 augustss ess_set_port(addr, cp)
1708 1.1 augustss void *addr;
1709 1.1 augustss mixer_ctrl_t *cp;
1710 1.1 augustss {
1711 1.1 augustss struct ess_softc *sc = addr;
1712 1.1 augustss int lgain, rgain;
1713 1.1 augustss
1714 1.4 augustss DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n",
1715 1.4 augustss cp->dev, cp->un.value.num_channels));
1716 1.1 augustss
1717 1.1 augustss switch (cp->dev) {
1718 1.1 augustss /*
1719 1.1 augustss * The following mixer ports are all stereo. If we get a
1720 1.1 augustss * single-channel gain value passed in, then we duplicate it
1721 1.1 augustss * to both left and right channels.
1722 1.1 augustss */
1723 1.33 nathanw case ESS_DAC_REC_VOL:
1724 1.33 nathanw case ESS_MIC_REC_VOL:
1725 1.33 nathanw case ESS_LINE_REC_VOL:
1726 1.33 nathanw case ESS_SYNTH_REC_VOL:
1727 1.33 nathanw case ESS_CD_REC_VOL:
1728 1.33 nathanw case ESS_AUXB_REC_VOL:
1729 1.33 nathanw if (sc->sc_model == ESS_1788)
1730 1.33 nathanw return EINVAL;
1731 1.1 augustss case ESS_MASTER_VOL:
1732 1.1 augustss case ESS_DAC_PLAY_VOL:
1733 1.1 augustss case ESS_MIC_PLAY_VOL:
1734 1.1 augustss case ESS_LINE_PLAY_VOL:
1735 1.1 augustss case ESS_SYNTH_PLAY_VOL:
1736 1.1 augustss case ESS_CD_PLAY_VOL:
1737 1.1 augustss case ESS_AUXB_PLAY_VOL:
1738 1.1 augustss case ESS_RECORD_VOL:
1739 1.1 augustss if (cp->type != AUDIO_MIXER_VALUE)
1740 1.1 augustss return EINVAL;
1741 1.1 augustss
1742 1.1 augustss switch (cp->un.value.num_channels) {
1743 1.1 augustss case 1:
1744 1.1 augustss lgain = rgain = ESS_4BIT_GAIN(
1745 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1746 1.1 augustss break;
1747 1.1 augustss case 2:
1748 1.1 augustss lgain = ESS_4BIT_GAIN(
1749 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
1750 1.1 augustss rgain = ESS_4BIT_GAIN(
1751 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
1752 1.1 augustss break;
1753 1.1 augustss default:
1754 1.1 augustss return EINVAL;
1755 1.1 augustss }
1756 1.1 augustss
1757 1.1 augustss sc->gain[cp->dev][ESS_LEFT] = lgain;
1758 1.1 augustss sc->gain[cp->dev][ESS_RIGHT] = rgain;
1759 1.1 augustss
1760 1.1 augustss ess_set_gain(sc, cp->dev, 1);
1761 1.1 augustss break;
1762 1.1 augustss
1763 1.1 augustss
1764 1.1 augustss /*
1765 1.1 augustss * The PC speaker port is mono. If we get a stereo gain value
1766 1.1 augustss * passed in, then we return EINVAL.
1767 1.1 augustss */
1768 1.1 augustss case ESS_PCSPEAKER_VOL:
1769 1.1 augustss if (cp->un.value.num_channels != 1)
1770 1.1 augustss return EINVAL;
1771 1.1 augustss
1772 1.1 augustss sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
1773 1.1 augustss ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1774 1.1 augustss ess_set_gain(sc, cp->dev, 1);
1775 1.1 augustss break;
1776 1.1 augustss
1777 1.1 augustss
1778 1.1 augustss case ESS_MIC_PREAMP:
1779 1.1 augustss if (cp->type != AUDIO_MIXER_ENUM)
1780 1.1 augustss return EINVAL;
1781 1.1 augustss
1782 1.1 augustss if (cp->un.ord)
1783 1.1 augustss /* Enable microphone preamp */
1784 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1785 1.1 augustss ESS_PREAMP_CTRL_ENABLE);
1786 1.1 augustss else
1787 1.1 augustss /* Disable microphone preamp */
1788 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1789 1.1 augustss ESS_PREAMP_CTRL_ENABLE);
1790 1.1 augustss break;
1791 1.1 augustss
1792 1.1 augustss case ESS_RECORD_SOURCE:
1793 1.33 nathanw if (cp->type == AUDIO_MIXER_ENUM)
1794 1.33 nathanw return ess_set_in_port(sc, cp->un.ord);
1795 1.33 nathanw else if (cp->type == AUDIO_MIXER_SET)
1796 1.1 augustss return ess_set_in_ports(sc, cp->un.mask);
1797 1.1 augustss else
1798 1.1 augustss return EINVAL;
1799 1.1 augustss break;
1800 1.1 augustss
1801 1.1 augustss case ESS_RECORD_MONITOR:
1802 1.1 augustss if (cp->type != AUDIO_MIXER_ENUM)
1803 1.1 augustss return EINVAL;
1804 1.1 augustss
1805 1.1 augustss if (cp->un.ord)
1806 1.1 augustss /* Enable monitor */
1807 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1808 1.1 augustss ESS_AUDIO_CTRL_MONITOR);
1809 1.1 augustss else
1810 1.1 augustss /* Disable monitor */
1811 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1812 1.1 augustss ESS_AUDIO_CTRL_MONITOR);
1813 1.1 augustss break;
1814 1.1 augustss
1815 1.1 augustss default:
1816 1.1 augustss return EINVAL;
1817 1.1 augustss }
1818 1.1 augustss
1819 1.1 augustss return (0);
1820 1.1 augustss }
1821 1.1 augustss
1822 1.1 augustss int
1823 1.1 augustss ess_get_port(addr, cp)
1824 1.1 augustss void *addr;
1825 1.1 augustss mixer_ctrl_t *cp;
1826 1.1 augustss {
1827 1.1 augustss struct ess_softc *sc = addr;
1828 1.1 augustss
1829 1.4 augustss DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev));
1830 1.1 augustss
1831 1.1 augustss switch (cp->dev) {
1832 1.33 nathanw case ESS_DAC_REC_VOL:
1833 1.33 nathanw case ESS_MIC_REC_VOL:
1834 1.33 nathanw case ESS_LINE_REC_VOL:
1835 1.33 nathanw case ESS_SYNTH_REC_VOL:
1836 1.33 nathanw case ESS_CD_REC_VOL:
1837 1.33 nathanw case ESS_AUXB_REC_VOL:
1838 1.33 nathanw if (sc->sc_model == ESS_1788)
1839 1.33 nathanw return EINVAL;
1840 1.1 augustss case ESS_DAC_PLAY_VOL:
1841 1.1 augustss case ESS_MIC_PLAY_VOL:
1842 1.1 augustss case ESS_LINE_PLAY_VOL:
1843 1.1 augustss case ESS_SYNTH_PLAY_VOL:
1844 1.1 augustss case ESS_CD_PLAY_VOL:
1845 1.1 augustss case ESS_AUXB_PLAY_VOL:
1846 1.1 augustss case ESS_MASTER_VOL:
1847 1.1 augustss case ESS_PCSPEAKER_VOL:
1848 1.1 augustss case ESS_RECORD_VOL:
1849 1.1 augustss if (cp->dev == ESS_PCSPEAKER_VOL &&
1850 1.1 augustss cp->un.value.num_channels != 1)
1851 1.1 augustss return EINVAL;
1852 1.1 augustss
1853 1.1 augustss switch (cp->un.value.num_channels) {
1854 1.1 augustss case 1:
1855 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1856 1.1 augustss sc->gain[cp->dev][ESS_LEFT];
1857 1.1 augustss break;
1858 1.1 augustss case 2:
1859 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1860 1.1 augustss sc->gain[cp->dev][ESS_LEFT];
1861 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1862 1.1 augustss sc->gain[cp->dev][ESS_RIGHT];
1863 1.1 augustss break;
1864 1.1 augustss default:
1865 1.1 augustss return EINVAL;
1866 1.1 augustss }
1867 1.1 augustss break;
1868 1.1 augustss
1869 1.1 augustss case ESS_MIC_PREAMP:
1870 1.33 nathanw if (sc->sc_model == ESS_1788)
1871 1.33 nathanw return EINVAL;
1872 1.1 augustss cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
1873 1.1 augustss ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
1874 1.1 augustss break;
1875 1.1 augustss
1876 1.1 augustss case ESS_RECORD_SOURCE:
1877 1.33 nathanw if (sc->sc_model == ESS_1788)
1878 1.33 nathanw cp->un.ord = sc->in_port;
1879 1.33 nathanw else
1880 1.33 nathanw cp->un.mask = sc->in_mask;
1881 1.1 augustss break;
1882 1.1 augustss
1883 1.1 augustss case ESS_RECORD_MONITOR:
1884 1.1 augustss cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
1885 1.1 augustss ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
1886 1.1 augustss break;
1887 1.1 augustss
1888 1.1 augustss default:
1889 1.1 augustss return EINVAL;
1890 1.1 augustss }
1891 1.1 augustss
1892 1.1 augustss return (0);
1893 1.1 augustss }
1894 1.1 augustss
1895 1.1 augustss int
1896 1.1 augustss ess_query_devinfo(addr, dip)
1897 1.1 augustss void *addr;
1898 1.1 augustss mixer_devinfo_t *dip;
1899 1.1 augustss {
1900 1.1 augustss struct ess_softc *sc = addr;
1901 1.1 augustss
1902 1.4 augustss DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n",
1903 1.4 augustss sc->sc_model, dip->index));
1904 1.1 augustss
1905 1.1 augustss /*
1906 1.1 augustss * REVISIT: There are some slight differences between the
1907 1.1 augustss * mixers on the different ESS chips, which can
1908 1.1 augustss * be sorted out using the chip model rather than a
1909 1.1 augustss * separate mixer model.
1910 1.1 augustss * This is currently coded assuming an ES1887; we
1911 1.1 augustss * need to work out which bits are not applicable to
1912 1.1 augustss * the other models (1888 and 888).
1913 1.1 augustss */
1914 1.1 augustss switch (dip->index) {
1915 1.1 augustss case ESS_DAC_PLAY_VOL:
1916 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1917 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
1918 1.1 augustss strcpy(dip->label.name, AudioNdac);
1919 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
1920 1.1 augustss dip->un.v.num_channels = 2;
1921 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1922 1.1 augustss return (0);
1923 1.1 augustss
1924 1.1 augustss case ESS_MIC_PLAY_VOL:
1925 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1926 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1927 1.33 nathanw if (sc->sc_model == ESS_1788)
1928 1.33 nathanw dip->next = AUDIO_MIXER_LAST;
1929 1.33 nathanw else
1930 1.33 nathanw dip->next = ESS_MIC_PREAMP;
1931 1.1 augustss strcpy(dip->label.name, AudioNmicrophone);
1932 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
1933 1.1 augustss dip->un.v.num_channels = 2;
1934 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1935 1.1 augustss return (0);
1936 1.1 augustss
1937 1.1 augustss case ESS_LINE_PLAY_VOL:
1938 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1939 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
1940 1.1 augustss strcpy(dip->label.name, AudioNline);
1941 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
1942 1.1 augustss dip->un.v.num_channels = 2;
1943 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1944 1.1 augustss return (0);
1945 1.1 augustss
1946 1.1 augustss case ESS_SYNTH_PLAY_VOL:
1947 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1948 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
1949 1.1 augustss strcpy(dip->label.name, AudioNfmsynth);
1950 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
1951 1.1 augustss dip->un.v.num_channels = 2;
1952 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1953 1.1 augustss return (0);
1954 1.1 augustss
1955 1.1 augustss case ESS_CD_PLAY_VOL:
1956 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1957 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
1958 1.1 augustss strcpy(dip->label.name, AudioNcd);
1959 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
1960 1.1 augustss dip->un.v.num_channels = 2;
1961 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1962 1.1 augustss return (0);
1963 1.1 augustss
1964 1.1 augustss case ESS_AUXB_PLAY_VOL:
1965 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1966 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
1967 1.1 augustss strcpy(dip->label.name, "auxb");
1968 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
1969 1.1 augustss dip->un.v.num_channels = 2;
1970 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1971 1.1 augustss return (0);
1972 1.1 augustss
1973 1.1 augustss case ESS_INPUT_CLASS:
1974 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1975 1.1 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
1976 1.1 augustss strcpy(dip->label.name, AudioCinputs);
1977 1.27 mycroft dip->type = AUDIO_MIXER_CLASS;
1978 1.1 augustss return (0);
1979 1.1 augustss
1980 1.1 augustss case ESS_MASTER_VOL:
1981 1.1 augustss dip->mixer_class = ESS_OUTPUT_CLASS;
1982 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
1983 1.1 augustss strcpy(dip->label.name, AudioNmaster);
1984 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
1985 1.1 augustss dip->un.v.num_channels = 2;
1986 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1987 1.1 augustss return (0);
1988 1.1 augustss
1989 1.1 augustss case ESS_PCSPEAKER_VOL:
1990 1.1 augustss dip->mixer_class = ESS_OUTPUT_CLASS;
1991 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
1992 1.1 augustss strcpy(dip->label.name, "pc_speaker");
1993 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
1994 1.1 augustss dip->un.v.num_channels = 1;
1995 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1996 1.1 augustss return (0);
1997 1.1 augustss
1998 1.1 augustss case ESS_OUTPUT_CLASS:
1999 1.1 augustss dip->mixer_class = ESS_OUTPUT_CLASS;
2000 1.1 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
2001 1.1 augustss strcpy(dip->label.name, AudioCoutputs);
2002 1.27 mycroft dip->type = AUDIO_MIXER_CLASS;
2003 1.1 augustss return (0);
2004 1.1 augustss
2005 1.1 augustss case ESS_DAC_REC_VOL:
2006 1.33 nathanw if (sc->sc_model == ESS_1788)
2007 1.33 nathanw break;
2008 1.33 nathanw dip->mixer_class = ESS_RECORD_CLASS;
2009 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
2010 1.1 augustss strcpy(dip->label.name, AudioNdac);
2011 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
2012 1.1 augustss dip->un.v.num_channels = 2;
2013 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
2014 1.1 augustss return (0);
2015 1.1 augustss
2016 1.1 augustss case ESS_MIC_REC_VOL:
2017 1.33 nathanw if (sc->sc_model == ESS_1788)
2018 1.33 nathanw break;
2019 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
2020 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
2021 1.1 augustss strcpy(dip->label.name, AudioNmicrophone);
2022 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
2023 1.1 augustss dip->un.v.num_channels = 2;
2024 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
2025 1.1 augustss return (0);
2026 1.1 augustss
2027 1.1 augustss case ESS_LINE_REC_VOL:
2028 1.33 nathanw if (sc->sc_model == ESS_1788)
2029 1.33 nathanw break;
2030 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
2031 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
2032 1.1 augustss strcpy(dip->label.name, AudioNline);
2033 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
2034 1.1 augustss dip->un.v.num_channels = 2;
2035 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
2036 1.1 augustss return (0);
2037 1.1 augustss
2038 1.1 augustss case ESS_SYNTH_REC_VOL:
2039 1.33 nathanw if (sc->sc_model == ESS_1788)
2040 1.33 nathanw break;
2041 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
2042 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
2043 1.1 augustss strcpy(dip->label.name, AudioNfmsynth);
2044 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
2045 1.1 augustss dip->un.v.num_channels = 2;
2046 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
2047 1.1 augustss return (0);
2048 1.1 augustss
2049 1.1 augustss case ESS_CD_REC_VOL:
2050 1.33 nathanw if (sc->sc_model == ESS_1788)
2051 1.33 nathanw break;
2052 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
2053 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
2054 1.1 augustss strcpy(dip->label.name, AudioNcd);
2055 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
2056 1.1 augustss dip->un.v.num_channels = 2;
2057 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
2058 1.1 augustss return (0);
2059 1.1 augustss
2060 1.1 augustss case ESS_AUXB_REC_VOL:
2061 1.33 nathanw if (sc->sc_model == ESS_1788)
2062 1.33 nathanw break;
2063 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
2064 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
2065 1.1 augustss strcpy(dip->label.name, "auxb");
2066 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
2067 1.1 augustss dip->un.v.num_channels = 2;
2068 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
2069 1.1 augustss return (0);
2070 1.1 augustss
2071 1.1 augustss case ESS_MIC_PREAMP:
2072 1.33 nathanw if (sc->sc_model == ESS_1788)
2073 1.33 nathanw break;
2074 1.22 mycroft dip->mixer_class = ESS_INPUT_CLASS;
2075 1.22 mycroft dip->prev = ESS_MIC_PLAY_VOL;
2076 1.1 augustss dip->next = AUDIO_MIXER_LAST;
2077 1.21 mycroft strcpy(dip->label.name, AudioNpreamp);
2078 1.27 mycroft dip->type = AUDIO_MIXER_ENUM;
2079 1.1 augustss dip->un.e.num_mem = 2;
2080 1.1 augustss strcpy(dip->un.e.member[0].label.name, AudioNoff);
2081 1.1 augustss dip->un.e.member[0].ord = 0;
2082 1.1 augustss strcpy(dip->un.e.member[1].label.name, AudioNon);
2083 1.1 augustss dip->un.e.member[1].ord = 1;
2084 1.1 augustss return (0);
2085 1.1 augustss
2086 1.1 augustss case ESS_RECORD_VOL:
2087 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
2088 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
2089 1.1 augustss strcpy(dip->label.name, AudioNrecord);
2090 1.27 mycroft dip->type = AUDIO_MIXER_VALUE;
2091 1.1 augustss dip->un.v.num_channels = 2;
2092 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
2093 1.1 augustss return (0);
2094 1.1 augustss
2095 1.1 augustss case ESS_RECORD_SOURCE:
2096 1.27 mycroft dip->next = dip->prev = AUDIO_MIXER_LAST;
2097 1.1 augustss strcpy(dip->label.name, AudioNsource);
2098 1.27 mycroft dip->mixer_class = ESS_RECORD_CLASS;
2099 1.33 nathanw if (sc->sc_model == ESS_1788) {
2100 1.33 nathanw /* The 1788 doesn't use the input mixer control that the 1888 uses,
2101 1.33 nathanw * because it's a pain when you only have one mixer.
2102 1.33 nathanw * Perhaps it could be emulated by keeping both sets of gain
2103 1.33 nathanw * values, and doing a `context switch' of the mixer registers
2104 1.33 nathanw * when shifting from playing to recording. Yuk.
2105 1.33 nathanw */
2106 1.33 nathanw dip->type = AUDIO_MIXER_ENUM;
2107 1.33 nathanw dip->un.e.num_mem = 4;
2108 1.33 nathanw strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
2109 1.33 nathanw dip->un.e.member[0].ord = ESS_SOURCE_MIC;
2110 1.33 nathanw strcpy(dip->un.e.member[1].label.name, AudioNline);
2111 1.33 nathanw dip->un.e.member[1].ord = ESS_SOURCE_LINE;
2112 1.33 nathanw strcpy(dip->un.e.member[2].label.name, AudioNcd);
2113 1.33 nathanw dip->un.e.member[2].ord = ESS_SOURCE_CD;
2114 1.33 nathanw strcpy(dip->un.e.member[3].label.name, AudioNmixerout);
2115 1.33 nathanw dip->un.e.member[3].ord = ESS_SOURCE_MIXER;
2116 1.33 nathanw } else {
2117 1.33 nathanw dip->type = AUDIO_MIXER_SET;
2118 1.33 nathanw dip->un.s.num_mem = 6;
2119 1.33 nathanw strcpy(dip->un.s.member[0].label.name, AudioNdac);
2120 1.33 nathanw dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
2121 1.33 nathanw strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
2122 1.33 nathanw dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
2123 1.33 nathanw strcpy(dip->un.s.member[2].label.name, AudioNline);
2124 1.33 nathanw dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
2125 1.33 nathanw strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
2126 1.33 nathanw dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
2127 1.33 nathanw strcpy(dip->un.s.member[4].label.name, AudioNcd);
2128 1.33 nathanw dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
2129 1.33 nathanw strcpy(dip->un.s.member[5].label.name, "auxb");
2130 1.33 nathanw dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
2131 1.33 nathanw }
2132 1.1 augustss return (0);
2133 1.1 augustss
2134 1.1 augustss case ESS_RECORD_CLASS:
2135 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
2136 1.1 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
2137 1.1 augustss strcpy(dip->label.name, AudioCrecord);
2138 1.27 mycroft dip->type = AUDIO_MIXER_CLASS;
2139 1.1 augustss return (0);
2140 1.1 augustss
2141 1.1 augustss case ESS_RECORD_MONITOR:
2142 1.1 augustss dip->prev = dip->next = AUDIO_MIXER_LAST;
2143 1.1 augustss strcpy(dip->label.name, AudioNmonitor);
2144 1.1 augustss dip->type = AUDIO_MIXER_ENUM;
2145 1.27 mycroft dip->mixer_class = ESS_MONITOR_CLASS;
2146 1.1 augustss dip->un.e.num_mem = 2;
2147 1.1 augustss strcpy(dip->un.e.member[0].label.name, AudioNoff);
2148 1.1 augustss dip->un.e.member[0].ord = 0;
2149 1.1 augustss strcpy(dip->un.e.member[1].label.name, AudioNon);
2150 1.1 augustss dip->un.e.member[1].ord = 1;
2151 1.1 augustss return (0);
2152 1.1 augustss
2153 1.1 augustss case ESS_MONITOR_CLASS:
2154 1.1 augustss dip->mixer_class = ESS_MONITOR_CLASS;
2155 1.1 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
2156 1.1 augustss strcpy(dip->label.name, AudioCmonitor);
2157 1.27 mycroft dip->type = AUDIO_MIXER_CLASS;
2158 1.1 augustss return (0);
2159 1.1 augustss }
2160 1.1 augustss
2161 1.4 augustss return (ENXIO);
2162 1.4 augustss }
2163 1.4 augustss
2164 1.4 augustss void *
2165 1.30 mycroft ess_malloc(addr, direction, size, pool, flags)
2166 1.4 augustss void *addr;
2167 1.30 mycroft int direction;
2168 1.30 mycroft size_t size;
2169 1.30 mycroft int pool, flags;
2170 1.4 augustss {
2171 1.4 augustss struct ess_softc *sc = addr;
2172 1.30 mycroft int drq;
2173 1.4 augustss
2174 1.30 mycroft if (direction == AUMODE_PLAY)
2175 1.30 mycroft drq = sc->sc_out.drq;
2176 1.30 mycroft else
2177 1.30 mycroft drq = sc->sc_in.drq;
2178 1.30 mycroft return (isa_malloc(sc->sc_ic, drq, size, pool, flags));
2179 1.4 augustss }
2180 1.4 augustss
2181 1.4 augustss void
2182 1.4 augustss ess_free(addr, ptr, pool)
2183 1.4 augustss void *addr;
2184 1.4 augustss void *ptr;
2185 1.4 augustss int pool;
2186 1.4 augustss {
2187 1.4 augustss isa_free(ptr, pool);
2188 1.4 augustss }
2189 1.4 augustss
2190 1.30 mycroft size_t
2191 1.30 mycroft ess_round_buffersize(addr, direction, size)
2192 1.4 augustss void *addr;
2193 1.30 mycroft int direction;
2194 1.30 mycroft size_t size;
2195 1.4 augustss {
2196 1.4 augustss if (size > MAX_ISADMA)
2197 1.4 augustss size = MAX_ISADMA;
2198 1.30 mycroft return (size);
2199 1.4 augustss }
2200 1.4 augustss
2201 1.4 augustss int
2202 1.4 augustss ess_mappage(addr, mem, off, prot)
2203 1.4 augustss void *addr;
2204 1.4 augustss void *mem;
2205 1.4 augustss int off;
2206 1.4 augustss int prot;
2207 1.4 augustss {
2208 1.4 augustss return (isa_mappage(mem, off, prot));
2209 1.1 augustss }
2210 1.1 augustss
2211 1.1 augustss int
2212 1.1 augustss ess_get_props(addr)
2213 1.1 augustss void *addr;
2214 1.1 augustss {
2215 1.4 augustss struct ess_softc *sc = addr;
2216 1.14 mycroft
2217 1.14 mycroft return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
2218 1.4 augustss (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0));
2219 1.1 augustss }
2220 1.1 augustss
2221 1.1 augustss /* ============================================
2222 1.1 augustss * Generic functions for ess, not used by audio h/w i/f
2223 1.1 augustss * =============================================
2224 1.1 augustss */
2225 1.1 augustss
2226 1.1 augustss /*
2227 1.1 augustss * Reset the chip.
2228 1.1 augustss * Return non-zero if the chip isn't detected.
2229 1.1 augustss */
2230 1.1 augustss int
2231 1.1 augustss ess_reset(sc)
2232 1.1 augustss struct ess_softc *sc;
2233 1.1 augustss {
2234 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2235 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2236 1.1 augustss
2237 1.1 augustss sc->sc_in.intr = 0;
2238 1.1 augustss
2239 1.1 augustss sc->sc_out.intr = 0;
2240 1.1 augustss
2241 1.4 augustss EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT);
2242 1.1 augustss delay(10000);
2243 1.2 augustss EWRITE1(iot, ioh, ESS_DSP_RESET, 0);
2244 1.1 augustss if (ess_rdsp(sc) != ESS_MAGIC)
2245 1.4 augustss return (1);
2246 1.1 augustss
2247 1.4 augustss /* Enable access to the ESS extension commands. */
2248 1.1 augustss ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
2249 1.1 augustss
2250 1.1 augustss return (0);
2251 1.1 augustss }
2252 1.1 augustss
2253 1.1 augustss void
2254 1.1 augustss ess_set_gain(sc, port, on)
2255 1.1 augustss struct ess_softc *sc;
2256 1.1 augustss int port;
2257 1.1 augustss int on;
2258 1.1 augustss {
2259 1.1 augustss int gain, left, right;
2260 1.1 augustss int mix;
2261 1.1 augustss int src;
2262 1.1 augustss int stereo;
2263 1.1 augustss
2264 1.1 augustss /*
2265 1.1 augustss * Most gain controls are found in the mixer registers and
2266 1.1 augustss * are stereo. Any that are not, must set mix and stereo as
2267 1.1 augustss * required.
2268 1.1 augustss */
2269 1.1 augustss mix = 1;
2270 1.1 augustss stereo = 1;
2271 1.1 augustss
2272 1.1 augustss switch (port) {
2273 1.1 augustss case ESS_MASTER_VOL:
2274 1.33 nathanw src = ESS_MREG_VOLUME_MASTER;
2275 1.1 augustss break;
2276 1.1 augustss case ESS_DAC_PLAY_VOL:
2277 1.33 nathanw if (sc->sc_model == ESS_1788)
2278 1.33 nathanw src = ESS_MREG_VOLUME_VOICE;
2279 1.33 nathanw else
2280 1.33 nathanw src = 0x7C;
2281 1.1 augustss break;
2282 1.1 augustss case ESS_MIC_PLAY_VOL:
2283 1.33 nathanw src = ESS_MREG_VOLUME_MIC;
2284 1.1 augustss break;
2285 1.1 augustss case ESS_LINE_PLAY_VOL:
2286 1.33 nathanw src = ESS_MREG_VOLUME_LINE;
2287 1.1 augustss break;
2288 1.1 augustss case ESS_SYNTH_PLAY_VOL:
2289 1.33 nathanw src = ESS_MREG_VOLUME_SYNTH;
2290 1.1 augustss break;
2291 1.1 augustss case ESS_CD_PLAY_VOL:
2292 1.33 nathanw src = ESS_MREG_VOLUME_CD;
2293 1.1 augustss break;
2294 1.1 augustss case ESS_AUXB_PLAY_VOL:
2295 1.33 nathanw src = ESS_MREG_VOLUME_AUXB;
2296 1.1 augustss break;
2297 1.1 augustss case ESS_PCSPEAKER_VOL:
2298 1.33 nathanw src = ESS_MREG_VOLUME_PCSPKR;
2299 1.1 augustss stereo = 0;
2300 1.1 augustss break;
2301 1.1 augustss case ESS_DAC_REC_VOL:
2302 1.1 augustss src = 0x69;
2303 1.1 augustss break;
2304 1.1 augustss case ESS_MIC_REC_VOL:
2305 1.1 augustss src = 0x68;
2306 1.1 augustss break;
2307 1.1 augustss case ESS_LINE_REC_VOL:
2308 1.1 augustss src = 0x6E;
2309 1.1 augustss break;
2310 1.1 augustss case ESS_SYNTH_REC_VOL:
2311 1.1 augustss src = 0x6B;
2312 1.1 augustss break;
2313 1.1 augustss case ESS_CD_REC_VOL:
2314 1.1 augustss src = 0x6A;
2315 1.1 augustss break;
2316 1.1 augustss case ESS_AUXB_REC_VOL:
2317 1.1 augustss src = 0x6C;
2318 1.1 augustss break;
2319 1.1 augustss case ESS_RECORD_VOL:
2320 1.33 nathanw src = ESS_XCMD_VOLIN_CTRL;
2321 1.1 augustss mix = 0;
2322 1.1 augustss break;
2323 1.1 augustss default:
2324 1.1 augustss return;
2325 1.1 augustss }
2326 1.1 augustss
2327 1.33 nathanw /* 1788 doesn't have a separate recording mixer */
2328 1.33 nathanw if (sc->sc_model == ESS_1788 && mix == 1 && src > 0x62)
2329 1.33 nathanw return;
2330 1.33 nathanw
2331 1.1 augustss if (on) {
2332 1.1 augustss left = sc->gain[port][ESS_LEFT];
2333 1.1 augustss right = sc->gain[port][ESS_RIGHT];
2334 1.1 augustss } else {
2335 1.1 augustss left = right = 0;
2336 1.1 augustss }
2337 1.1 augustss
2338 1.1 augustss if (stereo)
2339 1.1 augustss gain = ESS_STEREO_GAIN(left, right);
2340 1.1 augustss else
2341 1.1 augustss gain = ESS_MONO_GAIN(left);
2342 1.1 augustss
2343 1.1 augustss if (mix)
2344 1.1 augustss ess_write_mix_reg(sc, src, gain);
2345 1.1 augustss else
2346 1.1 augustss ess_write_x_reg(sc, src, gain);
2347 1.1 augustss }
2348 1.1 augustss
2349 1.33 nathanw /* Set the input device on devices without an input mixer. */
2350 1.33 nathanw int
2351 1.33 nathanw ess_set_in_port(sc, ord)
2352 1.33 nathanw struct ess_softc *sc;
2353 1.33 nathanw int ord;
2354 1.33 nathanw {
2355 1.33 nathanw mixer_devinfo_t di;
2356 1.33 nathanw int i, val;
2357 1.33 nathanw
2358 1.33 nathanw DPRINTF(("ess_set_in_port: ord=0x%x\n", ord));
2359 1.33 nathanw
2360 1.33 nathanw /*
2361 1.33 nathanw * Get the device info for the record source control,
2362 1.33 nathanw * including the list of available sources.
2363 1.33 nathanw */
2364 1.33 nathanw di.index = ESS_RECORD_SOURCE;
2365 1.33 nathanw if (ess_query_devinfo(sc, &di))
2366 1.33 nathanw return EINVAL;
2367 1.33 nathanw
2368 1.33 nathanw val = -1;
2369 1.33 nathanw for (i = 0; i < di.un.e.num_mem; i++) {
2370 1.33 nathanw if (ord == di.un.e.member[i].ord) {
2371 1.33 nathanw val = ord;
2372 1.33 nathanw break;
2373 1.33 nathanw }
2374 1.33 nathanw }
2375 1.33 nathanw
2376 1.33 nathanw /* See if the given ord value was anywhere in the list. */
2377 1.33 nathanw if (val == -1)
2378 1.33 nathanw return EINVAL;
2379 1.33 nathanw
2380 1.33 nathanw ess_write_mix_reg(sc, ESS_MREG_ADC_SOURCE, val);
2381 1.33 nathanw sc->in_port = val;
2382 1.33 nathanw
2383 1.33 nathanw return (0);
2384 1.33 nathanw }
2385 1.33 nathanw
2386 1.33 nathanw /* Set the input device levels on input-mixer-enabled devices. */
2387 1.1 augustss int
2388 1.1 augustss ess_set_in_ports(sc, mask)
2389 1.1 augustss struct ess_softc *sc;
2390 1.1 augustss int mask;
2391 1.1 augustss {
2392 1.1 augustss mixer_devinfo_t di;
2393 1.1 augustss int i;
2394 1.1 augustss int port;
2395 1.1 augustss int tmp;
2396 1.1 augustss
2397 1.1 augustss DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
2398 1.1 augustss
2399 1.1 augustss /*
2400 1.1 augustss * Get the device info for the record source control,
2401 1.1 augustss * including the list of available sources.
2402 1.1 augustss */
2403 1.1 augustss di.index = ESS_RECORD_SOURCE;
2404 1.1 augustss if (ess_query_devinfo(sc, &di))
2405 1.1 augustss return EINVAL;
2406 1.1 augustss
2407 1.1 augustss /*
2408 1.1 augustss * Set or disable the record volume control for each of the
2409 1.1 augustss * possible sources.
2410 1.1 augustss */
2411 1.33 nathanw for (i = 0; i < di.un.s.num_mem; i++) {
2412 1.1 augustss /*
2413 1.1 augustss * Calculate the source port number from its mask.
2414 1.1 augustss */
2415 1.1 augustss tmp = di.un.s.member[i].mask >> 1;
2416 1.1 augustss for (port = 0; tmp; port++) {
2417 1.1 augustss tmp >>= 1;
2418 1.1 augustss }
2419 1.1 augustss
2420 1.1 augustss /*
2421 1.1 augustss * Set the source gain:
2422 1.1 augustss * to the current value if source is enabled
2423 1.1 augustss * to zero if source is disabled
2424 1.1 augustss */
2425 1.1 augustss ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
2426 1.1 augustss }
2427 1.1 augustss
2428 1.1 augustss sc->in_mask = mask;
2429 1.1 augustss
2430 1.1 augustss /*
2431 1.1 augustss * We have to fake a single port since the upper layer expects
2432 1.1 augustss * one only. We choose the lowest numbered port that is enabled.
2433 1.1 augustss */
2434 1.1 augustss for(i = 0; i < ESS_NPORT; i++) {
2435 1.1 augustss if (mask & (1 << i)) {
2436 1.1 augustss sc->in_port = i;
2437 1.1 augustss break;
2438 1.1 augustss }
2439 1.1 augustss }
2440 1.1 augustss
2441 1.1 augustss return (0);
2442 1.1 augustss }
2443 1.1 augustss
2444 1.1 augustss void
2445 1.1 augustss ess_speaker_on(sc)
2446 1.1 augustss struct ess_softc *sc;
2447 1.1 augustss {
2448 1.1 augustss /* Disable mute on left- and right-master volume. */
2449 1.33 nathanw ess_clear_mreg_bits(sc, ESS_MREG_VOLUME_LEFT, ESS_VOLUME_MUTE);
2450 1.33 nathanw ess_clear_mreg_bits(sc, ESS_MREG_VOLUME_RIGHT, ESS_VOLUME_MUTE);
2451 1.1 augustss }
2452 1.1 augustss
2453 1.1 augustss void
2454 1.1 augustss ess_speaker_off(sc)
2455 1.1 augustss struct ess_softc *sc;
2456 1.1 augustss {
2457 1.1 augustss /* Enable mute on left- and right-master volume. */
2458 1.33 nathanw ess_set_mreg_bits(sc, ESS_MREG_VOLUME_LEFT, ESS_VOLUME_MUTE);
2459 1.33 nathanw ess_set_mreg_bits(sc, ESS_MREG_VOLUME_RIGHT, ESS_VOLUME_MUTE);
2460 1.1 augustss }
2461 1.1 augustss
2462 1.1 augustss /*
2463 1.1 augustss * Calculate the time constant for the requested sampling rate.
2464 1.1 augustss */
2465 1.1 augustss u_int
2466 1.1 augustss ess_srtotc(rate)
2467 1.1 augustss u_int rate;
2468 1.1 augustss {
2469 1.1 augustss u_int tc;
2470 1.1 augustss
2471 1.1 augustss /* The following formulae are from the ESS data sheet. */
2472 1.12 mycroft if (rate <= 22050)
2473 1.1 augustss tc = 128 - 397700L / rate;
2474 1.1 augustss else
2475 1.1 augustss tc = 256 - 795500L / rate;
2476 1.1 augustss
2477 1.1 augustss return (tc);
2478 1.1 augustss }
2479 1.1 augustss
2480 1.1 augustss
2481 1.1 augustss /*
2482 1.1 augustss * Calculate the filter constant for the reuqested sampling rate.
2483 1.1 augustss */
2484 1.1 augustss u_int
2485 1.1 augustss ess_srtofc(rate)
2486 1.1 augustss u_int rate;
2487 1.1 augustss {
2488 1.1 augustss /*
2489 1.1 augustss * The following formula is derived from the information in
2490 1.1 augustss * the ES1887 data sheet, based on a roll-off frequency of
2491 1.1 augustss * 87%.
2492 1.1 augustss */
2493 1.1 augustss return (256 - 200279L / rate);
2494 1.1 augustss }
2495 1.1 augustss
2496 1.1 augustss
2497 1.1 augustss /*
2498 1.1 augustss * Return the status of the DSP.
2499 1.1 augustss */
2500 1.1 augustss u_char
2501 1.1 augustss ess_get_dsp_status(sc)
2502 1.1 augustss struct ess_softc *sc;
2503 1.1 augustss {
2504 1.33 nathanw return (EREAD1(sc->sc_iot, sc->sc_ioh, ESS_DSP_READ_STATUS));
2505 1.1 augustss }
2506 1.1 augustss
2507 1.1 augustss
2508 1.1 augustss /*
2509 1.1 augustss * Return the read status of the DSP: 1 -> DSP ready for reading
2510 1.1 augustss * 0 -> DSP not ready for reading
2511 1.1 augustss */
2512 1.1 augustss u_char
2513 1.1 augustss ess_dsp_read_ready(sc)
2514 1.1 augustss struct ess_softc *sc;
2515 1.1 augustss {
2516 1.33 nathanw return (((ess_get_dsp_status(sc) & ESS_DSP_READ_READY) ==
2517 1.1 augustss ESS_DSP_READ_READY) ? 1 : 0);
2518 1.1 augustss }
2519 1.1 augustss
2520 1.1 augustss
2521 1.1 augustss /*
2522 1.1 augustss * Return the write status of the DSP: 1 -> DSP ready for writing
2523 1.1 augustss * 0 -> DSP not ready for writing
2524 1.1 augustss */
2525 1.1 augustss u_char
2526 1.1 augustss ess_dsp_write_ready(sc)
2527 1.1 augustss struct ess_softc *sc;
2528 1.1 augustss {
2529 1.1 augustss return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
2530 1.1 augustss ESS_DSP_WRITE_READY) ? 1 : 0);
2531 1.1 augustss }
2532 1.1 augustss
2533 1.1 augustss
2534 1.1 augustss /*
2535 1.1 augustss * Read a byte from the DSP.
2536 1.1 augustss */
2537 1.1 augustss int
2538 1.1 augustss ess_rdsp(sc)
2539 1.1 augustss struct ess_softc *sc;
2540 1.1 augustss {
2541 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2542 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2543 1.1 augustss int i;
2544 1.1 augustss
2545 1.1 augustss for (i = ESS_READ_TIMEOUT; i > 0; --i) {
2546 1.1 augustss if (ess_dsp_read_ready(sc)) {
2547 1.2 augustss i = EREAD1(iot, ioh, ESS_DSP_READ);
2548 1.2 augustss DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i));
2549 1.1 augustss return i;
2550 1.1 augustss } else
2551 1.1 augustss delay(10);
2552 1.1 augustss }
2553 1.1 augustss
2554 1.1 augustss DPRINTF(("ess_rdsp: timed out\n"));
2555 1.1 augustss return (-1);
2556 1.1 augustss }
2557 1.1 augustss
2558 1.1 augustss /*
2559 1.1 augustss * Write a byte to the DSP.
2560 1.1 augustss */
2561 1.1 augustss int
2562 1.1 augustss ess_wdsp(sc, v)
2563 1.1 augustss struct ess_softc *sc;
2564 1.1 augustss u_char v;
2565 1.1 augustss {
2566 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2567 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2568 1.1 augustss int i;
2569 1.2 augustss
2570 1.2 augustss DPRINTFN(8,("ess_wdsp(0x%02x)\n", v));
2571 1.2 augustss
2572 1.1 augustss for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
2573 1.1 augustss if (ess_dsp_write_ready(sc)) {
2574 1.2 augustss EWRITE1(iot, ioh, ESS_DSP_WRITE, v);
2575 1.1 augustss return (0);
2576 1.1 augustss } else
2577 1.1 augustss delay(10);
2578 1.1 augustss }
2579 1.1 augustss
2580 1.1 augustss DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
2581 1.1 augustss return (-1);
2582 1.1 augustss }
2583 1.1 augustss
2584 1.1 augustss /*
2585 1.1 augustss * Write a value to one of the ESS extended registers.
2586 1.1 augustss */
2587 1.1 augustss int
2588 1.1 augustss ess_write_x_reg(sc, reg, val)
2589 1.1 augustss struct ess_softc *sc;
2590 1.1 augustss u_char reg;
2591 1.1 augustss u_char val;
2592 1.1 augustss {
2593 1.1 augustss int error;
2594 1.1 augustss
2595 1.2 augustss DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2596 1.1 augustss if ((error = ess_wdsp(sc, reg)) == 0)
2597 1.1 augustss error = ess_wdsp(sc, val);
2598 1.1 augustss
2599 1.1 augustss return error;
2600 1.1 augustss }
2601 1.1 augustss
2602 1.1 augustss /*
2603 1.1 augustss * Read the value of one of the ESS extended registers.
2604 1.1 augustss */
2605 1.1 augustss u_char
2606 1.1 augustss ess_read_x_reg(sc, reg)
2607 1.1 augustss struct ess_softc *sc;
2608 1.1 augustss u_char reg;
2609 1.1 augustss {
2610 1.1 augustss int error;
2611 1.2 augustss int val;
2612 1.1 augustss
2613 1.1 augustss if ((error = ess_wdsp(sc, 0xC0)) == 0)
2614 1.1 augustss error = ess_wdsp(sc, reg);
2615 1.1 augustss if (error)
2616 1.1 augustss DPRINTF(("Error reading extended register 0x%02x\n", reg));
2617 1.1 augustss /* REVISIT: what if an error is returned above? */
2618 1.2 augustss val = ess_rdsp(sc);
2619 1.33 nathanw DPRINTFN(2,("ess_read_x_reg: %02x=%02x\n", reg, val));
2620 1.2 augustss return val;
2621 1.1 augustss }
2622 1.1 augustss
2623 1.1 augustss void
2624 1.1 augustss ess_clear_xreg_bits(sc, reg, mask)
2625 1.1 augustss struct ess_softc *sc;
2626 1.1 augustss u_char reg;
2627 1.1 augustss u_char mask;
2628 1.1 augustss {
2629 1.1 augustss if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
2630 1.1 augustss DPRINTF(("Error clearing bits in extended register 0x%02x\n",
2631 1.1 augustss reg));
2632 1.1 augustss }
2633 1.1 augustss
2634 1.1 augustss void
2635 1.1 augustss ess_set_xreg_bits(sc, reg, mask)
2636 1.1 augustss struct ess_softc *sc;
2637 1.1 augustss u_char reg;
2638 1.1 augustss u_char mask;
2639 1.1 augustss {
2640 1.1 augustss if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
2641 1.1 augustss DPRINTF(("Error setting bits in extended register 0x%02x\n",
2642 1.1 augustss reg));
2643 1.1 augustss }
2644 1.1 augustss
2645 1.1 augustss
2646 1.1 augustss /*
2647 1.1 augustss * Write a value to one of the ESS mixer registers.
2648 1.1 augustss */
2649 1.1 augustss void
2650 1.1 augustss ess_write_mix_reg(sc, reg, val)
2651 1.1 augustss struct ess_softc *sc;
2652 1.1 augustss u_char reg;
2653 1.1 augustss u_char val;
2654 1.1 augustss {
2655 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2656 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2657 1.1 augustss int s;
2658 1.1 augustss
2659 1.2 augustss DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));
2660 1.4 augustss
2661 1.1 augustss s = splaudio();
2662 1.2 augustss EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2663 1.2 augustss EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);
2664 1.1 augustss splx(s);
2665 1.1 augustss }
2666 1.1 augustss
2667 1.1 augustss /*
2668 1.1 augustss * Read the value of one of the ESS mixer registers.
2669 1.1 augustss */
2670 1.1 augustss u_char
2671 1.1 augustss ess_read_mix_reg(sc, reg)
2672 1.1 augustss struct ess_softc *sc;
2673 1.1 augustss u_char reg;
2674 1.1 augustss {
2675 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2676 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2677 1.1 augustss int s;
2678 1.1 augustss u_char val;
2679 1.1 augustss
2680 1.1 augustss s = splaudio();
2681 1.2 augustss EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2682 1.2 augustss val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);
2683 1.4 augustss splx(s);
2684 1.1 augustss
2685 1.2 augustss DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));
2686 1.1 augustss return val;
2687 1.1 augustss }
2688 1.1 augustss
2689 1.1 augustss void
2690 1.1 augustss ess_clear_mreg_bits(sc, reg, mask)
2691 1.1 augustss struct ess_softc *sc;
2692 1.1 augustss u_char reg;
2693 1.1 augustss u_char mask;
2694 1.1 augustss {
2695 1.1 augustss ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
2696 1.1 augustss }
2697 1.1 augustss
2698 1.1 augustss void
2699 1.1 augustss ess_set_mreg_bits(sc, reg, mask)
2700 1.1 augustss struct ess_softc *sc;
2701 1.1 augustss u_char reg;
2702 1.1 augustss u_char mask;
2703 1.1 augustss {
2704 1.1 augustss ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
2705 1.1 augustss }
2706