ess.c revision 1.5 1 1.5 augustss /* $NetBSD: ess.c,v 1.5 1998/07/31 23:54:09 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright 1997
5 1.1 augustss * Digital Equipment Corporation. All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This software is furnished under license and may be used and
8 1.1 augustss * copied only in accordance with the following terms and conditions.
9 1.1 augustss * Subject to these conditions, you may download, copy, install,
10 1.1 augustss * use, modify and distribute this software in source and/or binary
11 1.1 augustss * form. No title or ownership is transferred hereby.
12 1.1 augustss *
13 1.1 augustss * 1) Any source code used, modified or distributed must reproduce
14 1.1 augustss * and retain this copyright notice and list of conditions as
15 1.1 augustss * they appear in the source file.
16 1.1 augustss *
17 1.1 augustss * 2) No right is granted to use any trade name, trademark, or logo of
18 1.1 augustss * Digital Equipment Corporation. Neither the "Digital Equipment
19 1.1 augustss * Corporation" name nor any trademark or logo of Digital Equipment
20 1.1 augustss * Corporation may be used to endorse or promote products derived
21 1.1 augustss * from this software without the prior written permission of
22 1.1 augustss * Digital Equipment Corporation.
23 1.1 augustss *
24 1.1 augustss * 3) This software is provided "AS-IS" and any express or implied
25 1.1 augustss * warranties, including but not limited to, any implied warranties
26 1.1 augustss * of merchantability, fitness for a particular purpose, or
27 1.1 augustss * non-infringement are disclaimed. In no event shall DIGITAL be
28 1.1 augustss * liable for any damages whatsoever, and in particular, DIGITAL
29 1.1 augustss * shall not be liable for special, indirect, consequential, or
30 1.1 augustss * incidental damages or damages for lost profits, loss of
31 1.1 augustss * revenue or loss of use, whether such damages arise in contract,
32 1.1 augustss * negligence, tort, under statute, in equity, at law or otherwise,
33 1.1 augustss * even if advised of the possibility of such damage.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss **++
38 1.1 augustss **
39 1.1 augustss ** ess.c
40 1.1 augustss **
41 1.1 augustss ** FACILITY:
42 1.1 augustss **
43 1.1 augustss ** DIGITAL Network Appliance Reference Design (DNARD)
44 1.1 augustss **
45 1.1 augustss ** MODULE DESCRIPTION:
46 1.1 augustss **
47 1.1 augustss ** This module contains the device driver for the ESS
48 1.1 augustss ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
49 1.1 augustss ** used as a reference point when implementing this driver.
50 1.1 augustss **
51 1.1 augustss ** AUTHORS:
52 1.1 augustss **
53 1.1 augustss ** Blair Fidler Software Engineering Australia
54 1.1 augustss ** Gold Coast, Australia.
55 1.1 augustss **
56 1.1 augustss ** CREATION DATE:
57 1.1 augustss **
58 1.1 augustss ** March 10, 1997.
59 1.1 augustss **
60 1.1 augustss ** MODIFICATION HISTORY:
61 1.1 augustss **
62 1.1 augustss **--
63 1.1 augustss */
64 1.1 augustss
65 1.1 augustss /*
66 1.1 augustss * Modification by Lennart Augustsson:
67 1.1 augustss * Adapt for bus dma.
68 1.1 augustss * Change to 1.3 audio interface.
69 1.4 augustss * Major cleanup.
70 1.1 augustss */
71 1.1 augustss
72 1.1 augustss /*
73 1.1 augustss * TODO (falling priority):
74 1.1 augustss * - add looping DMA (copy from sbdsp.c).
75 1.1 augustss * - avoid using wired in IRQ/DRQ levels.
76 1.1 augustss * - look over how the two channels are set up, it's rather messy now.
77 1.1 augustss */
78 1.1 augustss
79 1.1 augustss #include <sys/param.h>
80 1.1 augustss #include <sys/systm.h>
81 1.1 augustss #include <sys/errno.h>
82 1.1 augustss #include <sys/ioctl.h>
83 1.1 augustss #include <sys/syslog.h>
84 1.1 augustss #include <sys/device.h>
85 1.1 augustss #include <sys/proc.h>
86 1.1 augustss
87 1.1 augustss #include <machine/cpu.h>
88 1.1 augustss #include <machine/intr.h>
89 1.1 augustss #include <machine/pio.h>
90 1.1 augustss
91 1.1 augustss #include <sys/audioio.h>
92 1.1 augustss #include <dev/audio_if.h>
93 1.1 augustss #include <dev/auconv.h>
94 1.1 augustss #include <dev/mulaw.h>
95 1.1 augustss
96 1.1 augustss #include <dev/isa/isavar.h>
97 1.1 augustss #include <dev/isa/isadmavar.h>
98 1.1 augustss
99 1.1 augustss #include <dev/isa/essvar.h>
100 1.1 augustss #include <dev/isa/essreg.h>
101 1.1 augustss
102 1.1 augustss #ifdef AUDIO_DEBUG
103 1.1 augustss #define DPRINTF(x) if (essdebug) printf x
104 1.2 augustss #define DPRINTFN(n,x) if (essdebug>(n)) printf x
105 1.1 augustss int essdebug = 0;
106 1.1 augustss #else
107 1.1 augustss #define DPRINTF(x)
108 1.2 augustss #define DPRINTFN(n,x)
109 1.1 augustss #endif
110 1.1 augustss
111 1.2 augustss #if 0
112 1.2 augustss unsigned uuu;
113 1.2 augustss #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu)
114 1.2 augustss #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d))
115 1.2 augustss #else
116 1.2 augustss #define EREAD1(t, h, a) bus_space_read_1(t, h, a)
117 1.2 augustss #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d)
118 1.2 augustss #endif
119 1.1 augustss
120 1.2 augustss
121 1.2 augustss int ess_setup_sc __P((struct ess_softc *, int));
122 1.1 augustss
123 1.1 augustss int ess_open __P((void *, int));
124 1.1 augustss void ess_close __P((void *));
125 1.1 augustss int ess_getdev __P((void *, struct audio_device *));
126 1.1 augustss int ess_drain __P((void *));
127 1.1 augustss
128 1.1 augustss int ess_query_encoding __P((void *, struct audio_encoding *));
129 1.1 augustss
130 1.1 augustss int ess_set_params __P((void *, int, int, struct audio_params *,
131 1.1 augustss struct audio_params *));
132 1.1 augustss int ess_set_in_sr __P((void *, u_long));
133 1.1 augustss int ess_set_out_sr __P((void *, u_long));
134 1.1 augustss int ess_set_in_precision __P((void *, u_int));
135 1.1 augustss int ess_set_out_precision __P((void *, u_int));
136 1.1 augustss int ess_set_in_channels __P((void *, int));
137 1.1 augustss int ess_set_out_channels __P((void *, int));
138 1.1 augustss
139 1.1 augustss int ess_round_blocksize __P((void *, int));
140 1.1 augustss
141 1.1 augustss int ess_dma_output __P((void *, void *, int, void (*)(void *), void *));
142 1.1 augustss int ess_dma_input __P((void *, void *, int, void (*)(void *), void *));
143 1.1 augustss int ess_halt_output __P((void *));
144 1.1 augustss int ess_halt_input __P((void *));
145 1.1 augustss
146 1.1 augustss int ess_intr_output __P((void *));
147 1.1 augustss int ess_intr_input __P((void *));
148 1.1 augustss
149 1.1 augustss int ess_speaker_ctl __P((void *, int));
150 1.1 augustss
151 1.1 augustss int ess_getdev __P((void *, struct audio_device *));
152 1.1 augustss
153 1.1 augustss int ess_set_port __P((void *, mixer_ctrl_t *));
154 1.1 augustss int ess_get_port __P((void *, mixer_ctrl_t *));
155 1.1 augustss
156 1.4 augustss void *ess_malloc __P((void *, unsigned long, int, int));
157 1.4 augustss void ess_free __P((void *, void *, int));
158 1.4 augustss unsigned long ess_round __P((void *, unsigned long));
159 1.4 augustss int ess_mappage __P((void *, void *, int, int));
160 1.4 augustss
161 1.4 augustss
162 1.1 augustss int ess_query_devinfo __P((void *, mixer_devinfo_t *));
163 1.1 augustss int ess_get_props __P((void *));
164 1.1 augustss
165 1.4 augustss void ess_speaker_on __P((struct ess_softc *));
166 1.4 augustss void ess_speaker_off __P((struct ess_softc *));
167 1.1 augustss
168 1.1 augustss int ess_config_addr __P((struct ess_softc *));
169 1.4 augustss void ess_config_irq __P((struct ess_softc *));
170 1.4 augustss void ess_config_drq __P((struct ess_softc *));
171 1.4 augustss void ess_setup __P((struct ess_softc *));
172 1.1 augustss int ess_identify __P((struct ess_softc *));
173 1.1 augustss
174 1.1 augustss int ess_reset __P((struct ess_softc *));
175 1.1 augustss void ess_set_gain __P((struct ess_softc *, int, int));
176 1.1 augustss int ess_set_in_ports __P((struct ess_softc *, int));
177 1.1 augustss u_int ess_srtotc __P((u_int));
178 1.1 augustss u_int ess_srtofc __P((u_int));
179 1.1 augustss u_char ess_get_dsp_status __P((struct ess_softc *));
180 1.1 augustss u_char ess_dsp_read_ready __P((struct ess_softc *));
181 1.1 augustss u_char ess_dsp_write_ready __P((struct ess_softc *sc));
182 1.1 augustss int ess_rdsp __P((struct ess_softc *));
183 1.1 augustss int ess_wdsp __P((struct ess_softc *, u_char));
184 1.1 augustss u_char ess_read_x_reg __P((struct ess_softc *, u_char));
185 1.1 augustss int ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
186 1.1 augustss void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
187 1.1 augustss void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
188 1.1 augustss u_char ess_read_mix_reg __P((struct ess_softc *, u_char));
189 1.1 augustss void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
190 1.1 augustss void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
191 1.1 augustss void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
192 1.1 augustss
193 1.1 augustss static char *essmodel[] = {
194 1.1 augustss "unsupported",
195 1.1 augustss "1888",
196 1.1 augustss "1887",
197 1.1 augustss "888"
198 1.1 augustss };
199 1.1 augustss
200 1.1 augustss struct audio_device ess_device = {
201 1.1 augustss "ESS Technology",
202 1.1 augustss "x",
203 1.1 augustss "ess"
204 1.1 augustss };
205 1.1 augustss
206 1.1 augustss /*
207 1.1 augustss * Define our interface to the higher level audio driver.
208 1.1 augustss */
209 1.1 augustss
210 1.1 augustss struct audio_hw_if ess_hw_if = {
211 1.1 augustss ess_open,
212 1.1 augustss ess_close,
213 1.1 augustss NULL,
214 1.1 augustss ess_query_encoding,
215 1.1 augustss ess_set_params,
216 1.1 augustss ess_round_blocksize,
217 1.1 augustss NULL,
218 1.1 augustss NULL,
219 1.1 augustss NULL,
220 1.1 augustss ess_dma_output,
221 1.1 augustss ess_dma_input,
222 1.1 augustss ess_halt_output,
223 1.1 augustss ess_halt_input,
224 1.1 augustss ess_speaker_ctl,
225 1.1 augustss ess_getdev,
226 1.1 augustss NULL,
227 1.1 augustss ess_set_port,
228 1.1 augustss ess_get_port,
229 1.1 augustss ess_query_devinfo,
230 1.4 augustss ess_malloc,
231 1.4 augustss ess_free,
232 1.4 augustss ess_round,
233 1.4 augustss ess_mappage,
234 1.1 augustss ess_get_props,
235 1.1 augustss };
236 1.1 augustss
237 1.1 augustss #ifdef AUDIO_DEBUG
238 1.1 augustss void ess_printsc __P((struct ess_softc *));
239 1.1 augustss void ess_dump_mixer __P((struct ess_softc *));
240 1.1 augustss
241 1.1 augustss void
242 1.1 augustss ess_printsc(sc)
243 1.1 augustss struct ess_softc *sc;
244 1.1 augustss {
245 1.1 augustss int i;
246 1.1 augustss
247 1.1 augustss printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
248 1.1 augustss (int)sc->sc_open, sc->sc_iobase, sc->out_port,
249 1.1 augustss sc->in_port, sc->spkr_state ? "on" : "off");
250 1.1 augustss
251 1.1 augustss printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
252 1.1 augustss sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
253 1.1 augustss sc->sc_out.intr, sc->sc_out.arg);
254 1.1 augustss
255 1.1 augustss printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
256 1.1 augustss sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
257 1.1 augustss sc->sc_in.intr, sc->sc_in.arg);
258 1.1 augustss
259 1.1 augustss printf("gain:");
260 1.1 augustss for (i = 0; i < ESS_NDEVS; i++)
261 1.1 augustss printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
262 1.1 augustss printf("\n");
263 1.1 augustss }
264 1.1 augustss
265 1.1 augustss void
266 1.1 augustss ess_dump_mixer(sc)
267 1.1 augustss struct ess_softc *sc;
268 1.1 augustss {
269 1.1 augustss printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
270 1.1 augustss 0x7C, ess_read_mix_reg(sc, 0x7C));
271 1.1 augustss printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
272 1.1 augustss 0x1A, ess_read_mix_reg(sc, 0x1A));
273 1.1 augustss printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
274 1.1 augustss 0x3E, ess_read_mix_reg(sc, 0x3E));
275 1.1 augustss printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
276 1.1 augustss 0x36, ess_read_mix_reg(sc, 0x36));
277 1.1 augustss printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
278 1.1 augustss 0x38, ess_read_mix_reg(sc, 0x38));
279 1.1 augustss printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
280 1.1 augustss 0x3A, ess_read_mix_reg(sc, 0x3A));
281 1.1 augustss printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
282 1.1 augustss 0x32, ess_read_mix_reg(sc, 0x32));
283 1.1 augustss printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
284 1.1 augustss 0x3C, ess_read_mix_reg(sc, 0x3C));
285 1.1 augustss printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
286 1.1 augustss 0x69, ess_read_mix_reg(sc, 0x69));
287 1.1 augustss printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
288 1.1 augustss 0x68, ess_read_mix_reg(sc, 0x68));
289 1.1 augustss printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
290 1.1 augustss 0x6E, ess_read_mix_reg(sc, 0x6E));
291 1.1 augustss printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
292 1.1 augustss 0x6B, ess_read_mix_reg(sc, 0x6B));
293 1.1 augustss printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
294 1.1 augustss 0x6A, ess_read_mix_reg(sc, 0x6A));
295 1.1 augustss printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
296 1.1 augustss 0x6C, ess_read_mix_reg(sc, 0x6C));
297 1.1 augustss printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
298 1.1 augustss 0xB4, ess_read_x_reg(sc, 0xB4));
299 1.1 augustss printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
300 1.1 augustss 0x14, ess_read_mix_reg(sc, 0x14));
301 1.1 augustss
302 1.1 augustss printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
303 1.1 augustss ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
304 1.1 augustss printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
305 1.1 augustss ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
306 1.1 augustss printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
307 1.1 augustss 0x1c, ess_read_mix_reg(sc, 0x1c),
308 1.1 augustss 0x7a, ess_read_mix_reg(sc, 0x7a));
309 1.1 augustss }
310 1.1 augustss
311 1.1 augustss #endif
312 1.1 augustss
313 1.1 augustss /*
314 1.1 augustss * Configure the ESS chip for the desired audio base address.
315 1.1 augustss */
316 1.1 augustss int
317 1.1 augustss ess_config_addr(sc)
318 1.1 augustss struct ess_softc *sc;
319 1.1 augustss {
320 1.1 augustss int iobase = sc->sc_iobase;
321 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
322 1.1 augustss
323 1.1 augustss /*
324 1.1 augustss * Configure using the System Control Register method. This
325 1.1 augustss * method is used when the AMODE line is tied high, which is
326 1.1 augustss * the case for the Shark, but not for the evaluation board.
327 1.1 augustss */
328 1.1 augustss
329 1.1 augustss bus_space_handle_t scr_access_ioh;
330 1.1 augustss bus_space_handle_t scr_ioh;
331 1.1 augustss u_short scr_value;
332 1.1 augustss
333 1.1 augustss /*
334 1.1 augustss * Set the SCR bit to enable audio.
335 1.1 augustss */
336 1.1 augustss scr_value = ESS_SCR_AUDIO_ENABLE;
337 1.1 augustss
338 1.1 augustss /*
339 1.1 augustss * Set the SCR bits necessary to select the specified audio
340 1.1 augustss * base address.
341 1.1 augustss */
342 1.1 augustss switch(iobase) {
343 1.1 augustss case 0x220:
344 1.1 augustss scr_value |= ESS_SCR_AUDIO_220;
345 1.1 augustss break;
346 1.1 augustss case 0x230:
347 1.1 augustss scr_value |= ESS_SCR_AUDIO_230;
348 1.1 augustss break;
349 1.1 augustss case 0x240:
350 1.1 augustss scr_value |= ESS_SCR_AUDIO_240;
351 1.1 augustss break;
352 1.1 augustss case 0x250:
353 1.1 augustss scr_value |= ESS_SCR_AUDIO_250;
354 1.1 augustss break;
355 1.1 augustss default:
356 1.1 augustss printf("ess: configured iobase 0x%x invalid\n", iobase);
357 1.1 augustss return (1);
358 1.1 augustss break;
359 1.1 augustss }
360 1.1 augustss
361 1.1 augustss /*
362 1.1 augustss * Get a mapping for the System Control Register (SCR) access
363 1.1 augustss * registers and the SCR data registers.
364 1.1 augustss */
365 1.1 augustss if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
366 1.1 augustss 0, &scr_access_ioh)) {
367 1.1 augustss printf("ess: can't map SCR access registers\n");
368 1.1 augustss return (1);
369 1.1 augustss }
370 1.1 augustss if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
371 1.1 augustss 0, &scr_ioh)) {
372 1.1 augustss printf("ess: can't map SCR registers\n");
373 1.1 augustss bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
374 1.1 augustss return (1);
375 1.1 augustss }
376 1.1 augustss
377 1.1 augustss /* Unlock the SCR. */
378 1.2 augustss EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
379 1.1 augustss
380 1.1 augustss /* Write the base address information into SCR[0]. */
381 1.2 augustss EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0);
382 1.2 augustss EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
383 1.1 augustss
384 1.1 augustss /* Lock the SCR. */
385 1.2 augustss EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
386 1.1 augustss
387 1.1 augustss /* Unmap the SCR access ports and the SCR data ports. */
388 1.1 augustss bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
389 1.1 augustss bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
390 1.1 augustss
391 1.1 augustss return 0;
392 1.1 augustss }
393 1.1 augustss
394 1.1 augustss
395 1.1 augustss /*
396 1.1 augustss * Configure the ESS chip for the desired IRQ and DMA channels.
397 1.2 augustss * ESS ISA
398 1.2 augustss * --------
399 1.2 augustss * IRQA irq9
400 1.2 augustss * IRQB irq5
401 1.2 augustss * IRQC irq7
402 1.2 augustss * IRQD irq10
403 1.2 augustss * IRQE irq15
404 1.4 augustss *
405 1.2 augustss * DRQA drq0
406 1.2 augustss * DRQB drq1
407 1.2 augustss * DRQC drq3
408 1.2 augustss * DRQD drq5
409 1.1 augustss */
410 1.1 augustss void
411 1.4 augustss ess_config_irq(sc)
412 1.1 augustss struct ess_softc *sc;
413 1.1 augustss {
414 1.4 augustss int v;
415 1.1 augustss
416 1.4 augustss DPRINTFN(2,("ess_config_irq\n"));
417 1.4 augustss
418 1.4 augustss if (sc->sc_in.irq != sc->sc_out.irq) {
419 1.4 augustss /* Configure Audio 1 (record) for the appropriate IRQ line. */
420 1.4 augustss v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */
421 1.4 augustss switch(sc->sc_in.irq) {
422 1.4 augustss case 5:
423 1.4 augustss v |= ESS_IRQ_CTRL_INTRB;
424 1.4 augustss break;
425 1.4 augustss case 7:
426 1.4 augustss v |= ESS_IRQ_CTRL_INTRC;
427 1.4 augustss break;
428 1.4 augustss case 9:
429 1.4 augustss v |= ESS_IRQ_CTRL_INTRA;
430 1.4 augustss break;
431 1.4 augustss case 10:
432 1.4 augustss v |= ESS_IRQ_CTRL_INTRD;
433 1.4 augustss break;
434 1.4 augustss #ifdef DIAGNOSTIC
435 1.4 augustss default:
436 1.4 augustss printf("ess: configured irq %d not supported for Audio 1\n",
437 1.4 augustss sc->sc_in.irq);
438 1.4 augustss return;
439 1.4 augustss #endif
440 1.4 augustss }
441 1.4 augustss ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v);
442 1.4 augustss /* irq2 is hardwired to 15 in this mode */
443 1.4 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
444 1.4 augustss ESS_AUDIO2_CTRL2_IRQ2_ENABLE);
445 1.4 augustss /* Use old method. */
446 1.4 augustss ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888);
447 1.4 augustss } else {
448 1.4 augustss /* Use new method, both interrupts are the same. */
449 1.4 augustss v = ESS_IS_SELECT_IRQ; /* enable intrs */
450 1.4 augustss switch(sc->sc_out.irq) {
451 1.4 augustss case 5:
452 1.4 augustss v |= ESS_IS_INTRB;
453 1.4 augustss break;
454 1.4 augustss case 7:
455 1.4 augustss v |= ESS_IS_INTRC;
456 1.4 augustss break;
457 1.4 augustss case 9:
458 1.4 augustss v |= ESS_IS_INTRA;
459 1.4 augustss break;
460 1.4 augustss case 10:
461 1.4 augustss v |= ESS_IS_INTRD;
462 1.4 augustss break;
463 1.4 augustss case 15:
464 1.4 augustss v |= ESS_IS_INTRE;
465 1.4 augustss break;
466 1.4 augustss #ifdef DIAGNOSTIC
467 1.4 augustss default:
468 1.4 augustss printf("ess_config_irq: configured irq %d not supported for Audio 1\n",
469 1.4 augustss sc->sc_in.irq);
470 1.4 augustss return;
471 1.4 augustss #endif
472 1.4 augustss }
473 1.4 augustss /* Set the IRQ */
474 1.4 augustss ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v);
475 1.4 augustss }
476 1.4 augustss }
477 1.4 augustss
478 1.4 augustss
479 1.4 augustss void
480 1.4 augustss ess_config_drq(sc)
481 1.4 augustss struct ess_softc *sc;
482 1.4 augustss {
483 1.4 augustss int v;
484 1.4 augustss
485 1.4 augustss DPRINTFN(2,("ess_config_drq\n"));
486 1.4 augustss
487 1.4 augustss /* Configure Audio 1 (record) for DMA on the appropriate channel. */
488 1.4 augustss v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT;
489 1.4 augustss switch(sc->sc_in.drq) {
490 1.4 augustss case 0:
491 1.4 augustss v |= ESS_DRQ_CTRL_DRQA;
492 1.1 augustss break;
493 1.4 augustss case 1:
494 1.4 augustss v |= ESS_DRQ_CTRL_DRQB;
495 1.1 augustss break;
496 1.4 augustss case 3:
497 1.4 augustss v |= ESS_DRQ_CTRL_DRQC;
498 1.1 augustss break;
499 1.2 augustss #ifdef DIAGNOSTIC
500 1.1 augustss default:
501 1.4 augustss printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n",
502 1.4 augustss sc->sc_in.drq);
503 1.1 augustss return;
504 1.5 augustss #endif
505 1.4 augustss }
506 1.4 augustss /* Set DRQ1 */
507 1.4 augustss ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v);
508 1.4 augustss
509 1.4 augustss /* Configure DRQ2 */
510 1.4 augustss v = ESS_AUDIO2_CTRL3_DRQ_PD;
511 1.4 augustss switch(sc->sc_out.drq) {
512 1.1 augustss case 0:
513 1.4 augustss v |= ESS_AUDIO2_CTRL3_DRQA;
514 1.1 augustss break;
515 1.1 augustss case 1:
516 1.4 augustss v |= ESS_AUDIO2_CTRL3_DRQB;
517 1.1 augustss break;
518 1.1 augustss case 3:
519 1.4 augustss v |= ESS_AUDIO2_CTRL3_DRQC;
520 1.4 augustss break;
521 1.4 augustss case 5:
522 1.4 augustss v |= ESS_AUDIO2_CTRL3_DRQC;
523 1.1 augustss break;
524 1.2 augustss #ifdef DIAGNOSTIC
525 1.1 augustss default:
526 1.4 augustss printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n",
527 1.4 augustss sc->sc_out.drq);
528 1.1 augustss return;
529 1.5 augustss #endif
530 1.1 augustss }
531 1.4 augustss ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v);
532 1.4 augustss /* Enable DMA 2 */
533 1.4 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
534 1.4 augustss ESS_AUDIO2_CTRL2_DMA_ENABLE);
535 1.4 augustss }
536 1.4 augustss
537 1.4 augustss /*
538 1.4 augustss * Set up registers after a reset.
539 1.4 augustss */
540 1.4 augustss void
541 1.4 augustss ess_setup(sc)
542 1.4 augustss struct ess_softc *sc;
543 1.4 augustss {
544 1.4 augustss ess_config_irq(sc);
545 1.4 augustss ess_config_drq(sc);
546 1.4 augustss if (sc->sc_out.drq >= 4)
547 1.4 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
548 1.4 augustss ESS_AUDIO2_CTRL1_XFER_SIZE);
549 1.4 augustss else
550 1.4 augustss ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
551 1.4 augustss ESS_AUDIO2_CTRL1_XFER_SIZE);
552 1.4 augustss #if 0
553 1.4 augustss /* Use 8 byte per DMA */
554 1.4 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 0xc0);
555 1.4 augustss #endif
556 1.2 augustss
557 1.4 augustss DPRINTFN(2,("ess_setup: done\n"));
558 1.1 augustss }
559 1.1 augustss
560 1.1 augustss /*
561 1.1 augustss * Determine the model of ESS chip we are talking to. Currently we
562 1.1 augustss * only support ES1888, ES1887 and ES888. The method of determining
563 1.1 augustss * the chip is based on the information on page 27 of the ES1887 data
564 1.1 augustss * sheet.
565 1.1 augustss *
566 1.1 augustss * This routine sets the values of sc->sc_model and sc->sc_version.
567 1.1 augustss */
568 1.1 augustss int
569 1.1 augustss ess_identify(sc)
570 1.1 augustss struct ess_softc *sc;
571 1.1 augustss {
572 1.1 augustss u_char reg1;
573 1.1 augustss u_char reg2;
574 1.1 augustss u_char reg3;
575 1.1 augustss
576 1.1 augustss sc->sc_model = ESS_UNSUPPORTED;
577 1.1 augustss sc->sc_version = 0;
578 1.1 augustss
579 1.1 augustss
580 1.1 augustss /*
581 1.1 augustss * 1. Check legacy ID bytes. These should be 0x68 0x8n, where
582 1.1 augustss * n >= 8 for an ES1887 or an ES888. Other values indicate
583 1.1 augustss * earlier (unsupported) chips.
584 1.1 augustss */
585 1.1 augustss ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
586 1.1 augustss
587 1.1 augustss if ((reg1 = ess_rdsp(sc)) != 0x68) {
588 1.1 augustss printf("ess: First ID byte wrong (0x%02x)\n", reg1);
589 1.1 augustss return 1;
590 1.1 augustss }
591 1.1 augustss
592 1.1 augustss reg2 = ess_rdsp(sc);
593 1.1 augustss if (((reg2 & 0xf0) != 0x80) ||
594 1.1 augustss ((reg2 & 0x0f) < 8)) {
595 1.1 augustss printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
596 1.1 augustss return 1;
597 1.1 augustss }
598 1.1 augustss
599 1.1 augustss /*
600 1.1 augustss * Store the ID bytes as the version.
601 1.1 augustss */
602 1.1 augustss sc->sc_version = (reg1 << 8) + reg2;
603 1.1 augustss
604 1.1 augustss
605 1.1 augustss /*
606 1.1 augustss * 2. Verify we can change bit 2 in mixer register 0x64. This
607 1.1 augustss * should be possible on all supported chips.
608 1.1 augustss */
609 1.1 augustss reg1 = ess_read_mix_reg(sc, 0x64);
610 1.1 augustss reg2 = reg1 ^ 0x04; /* toggle bit 2 */
611 1.1 augustss
612 1.1 augustss ess_write_mix_reg(sc, 0x64, reg2);
613 1.1 augustss
614 1.1 augustss if (ess_read_mix_reg(sc, 0x64) != reg2) {
615 1.1 augustss printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
616 1.1 augustss return 1;
617 1.1 augustss }
618 1.1 augustss
619 1.1 augustss /*
620 1.1 augustss * Restore the original value of mixer register 0x64.
621 1.1 augustss */
622 1.1 augustss ess_write_mix_reg(sc, 0x64, reg1);
623 1.1 augustss
624 1.1 augustss
625 1.1 augustss /*
626 1.4 augustss * 3. Verify we can change the value of mixer register
627 1.4 augustss * ESS_MREG_SAMPLE_RATE.
628 1.1 augustss * This should be possible on all supported chips.
629 1.4 augustss * It is not necessary to restore the value of this mixer register.
630 1.1 augustss */
631 1.4 augustss reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE);
632 1.1 augustss reg2 = reg1 ^ 0xff; /* toggle all bits */
633 1.1 augustss
634 1.4 augustss ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2);
635 1.1 augustss
636 1.4 augustss if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) {
637 1.1 augustss printf("ess: Hardware error (unable to change mixer register 0x70)\n");
638 1.1 augustss return 1;
639 1.1 augustss }
640 1.1 augustss
641 1.1 augustss /*
642 1.1 augustss * 4. Determine if we can change bit 5 in mixer register 0x64.
643 1.1 augustss * This determines whether we have an ES1887:
644 1.1 augustss *
645 1.1 augustss * - can change indicates ES1887
646 1.1 augustss * - can't change indicates ES1888 or ES888
647 1.1 augustss */
648 1.1 augustss reg1 = ess_read_mix_reg(sc, 0x64);
649 1.1 augustss reg2 = reg1 ^ 0x20; /* toggle bit 5 */
650 1.1 augustss
651 1.1 augustss ess_write_mix_reg(sc, 0x64, reg2);
652 1.1 augustss
653 1.1 augustss if (ess_read_mix_reg(sc, 0x64) == reg2) {
654 1.1 augustss sc->sc_model = ESS_1887;
655 1.1 augustss
656 1.1 augustss /*
657 1.1 augustss * Restore the original value of mixer register 0x64.
658 1.1 augustss */
659 1.1 augustss ess_write_mix_reg(sc, 0x64, reg1);
660 1.1 augustss } else {
661 1.1 augustss /*
662 1.1 augustss * 5. Determine if we can change the value of mixer
663 1.1 augustss * register 0x69 independently of mixer register
664 1.1 augustss * 0x68. This determines which chip we have:
665 1.1 augustss *
666 1.1 augustss * - can modify idependently indicates ES888
667 1.1 augustss * - register 0x69 is an alias of 0x68 indicates ES1888
668 1.1 augustss */
669 1.1 augustss reg1 = ess_read_mix_reg(sc, 0x68);
670 1.1 augustss reg2 = ess_read_mix_reg(sc, 0x69);
671 1.1 augustss reg3 = reg2 ^ 0xff; /* toggle all bits */
672 1.1 augustss
673 1.1 augustss /*
674 1.1 augustss * Write different values to each register.
675 1.1 augustss */
676 1.1 augustss ess_write_mix_reg(sc, 0x68, reg2);
677 1.1 augustss ess_write_mix_reg(sc, 0x69, reg3);
678 1.1 augustss
679 1.1 augustss if (ess_read_mix_reg(sc, 0x68) == reg2)
680 1.1 augustss sc->sc_model = ESS_888;
681 1.1 augustss else
682 1.1 augustss sc->sc_model = ESS_1888;
683 1.1 augustss
684 1.1 augustss /*
685 1.1 augustss * Restore the original value of the registers.
686 1.1 augustss */
687 1.1 augustss ess_write_mix_reg(sc, 0x68, reg1);
688 1.1 augustss ess_write_mix_reg(sc, 0x69, reg2);
689 1.1 augustss }
690 1.1 augustss
691 1.1 augustss return 0;
692 1.1 augustss }
693 1.1 augustss
694 1.1 augustss
695 1.1 augustss int
696 1.2 augustss ess_setup_sc(sc, doinit)
697 1.1 augustss struct ess_softc *sc;
698 1.1 augustss int doinit;
699 1.1 augustss {
700 1.1 augustss /* Reset the chip. */
701 1.4 augustss if (ess_reset(sc) != 0) {
702 1.4 augustss DPRINTF(("ess_setup_sc: couldn't reset chip\n"));
703 1.1 augustss return (1);
704 1.1 augustss }
705 1.1 augustss
706 1.1 augustss /* Identify the ESS chip, and check that it is supported. */
707 1.1 augustss if (ess_identify(sc)) {
708 1.1 augustss DPRINTF(("ess_setup_sc: couldn't identify\n"));
709 1.1 augustss return (1);
710 1.1 augustss }
711 1.1 augustss
712 1.1 augustss return (0);
713 1.1 augustss }
714 1.1 augustss
715 1.1 augustss /*
716 1.1 augustss * Probe for the ESS hardware.
717 1.1 augustss */
718 1.1 augustss int
719 1.2 augustss essmatch(sc)
720 1.2 augustss struct ess_softc *sc;
721 1.1 augustss {
722 1.2 augustss if (!ESS_BASE_VALID(sc->sc_iobase)) {
723 1.2 augustss printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
724 1.1 augustss return (0);
725 1.1 augustss }
726 1.1 augustss
727 1.4 augustss /* Configure the ESS chip for the desired audio base address. */
728 1.4 augustss if (ess_config_addr(sc))
729 1.4 augustss return (0);
730 1.4 augustss
731 1.2 augustss if (ess_setup_sc(sc, 1))
732 1.2 augustss return (0);
733 1.1 augustss
734 1.1 augustss if (sc->sc_model == ESS_UNSUPPORTED) {
735 1.1 augustss DPRINTF(("ess: Unsupported model\n"));
736 1.4 augustss return (0);
737 1.1 augustss }
738 1.1 augustss
739 1.1 augustss /* Check that requested DMA channels are valid and different. */
740 1.4 augustss if (!ESS_DRQ1_VALID(sc->sc_in.drq)) {
741 1.1 augustss printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
742 1.4 augustss return (0);
743 1.1 augustss }
744 1.1 augustss if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
745 1.1 augustss printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
746 1.4 augustss return (0);
747 1.1 augustss }
748 1.1 augustss if (sc->sc_in.drq == sc->sc_out.drq) {
749 1.1 augustss printf("ess: play and record dma chan both %d\n",
750 1.1 augustss sc->sc_in.drq);
751 1.4 augustss return (0);
752 1.1 augustss }
753 1.1 augustss
754 1.4 augustss if (sc->sc_model == ESS_1887) {
755 1.4 augustss /*
756 1.4 augustss * Either use the 1887 interrupt mode with all interrupts
757 1.4 augustss * mapped to the same irq, or use the 1888 method with
758 1.4 augustss * irq fixed at 15.
759 1.4 augustss */
760 1.4 augustss if (sc->sc_in.irq == sc->sc_out.irq) {
761 1.4 augustss if (!ESS_IRQ12_VALID(sc->sc_in.irq)) {
762 1.4 augustss printf("ess: irq %d invalid\n", sc->sc_in.irq);
763 1.4 augustss return (0);
764 1.4 augustss }
765 1.4 augustss } else
766 1.4 augustss goto irq1888;
767 1.4 augustss } else {
768 1.4 augustss /* Must use separate interrupts */
769 1.4 augustss if (sc->sc_in.irq == sc->sc_out.irq) {
770 1.4 augustss printf("ess: play and record irq both %d\n",
771 1.4 augustss sc->sc_in.irq);
772 1.4 augustss return (0);
773 1.4 augustss }
774 1.4 augustss }
775 1.4 augustss
776 1.4 augustss irq1888:
777 1.1 augustss /* Check that requested IRQ lines are valid and different. */
778 1.4 augustss if (!ESS_IRQ1_VALID(sc->sc_in.irq)) {
779 1.1 augustss printf("ess: record irq %d invalid\n", sc->sc_in.irq);
780 1.4 augustss return (0);
781 1.1 augustss }
782 1.4 augustss if (!ESS_IRQ2_VALID(sc->sc_out.irq)) {
783 1.1 augustss printf("ess: play irq %d invalid\n", sc->sc_out.irq);
784 1.4 augustss return (0);
785 1.1 augustss }
786 1.1 augustss
787 1.1 augustss /* Check that the DRQs are free. */
788 1.1 augustss if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
789 1.1 augustss !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
790 1.4 augustss return (0);
791 1.1 augustss /* XXX should we check IRQs as well? */
792 1.1 augustss
793 1.2 augustss return (1);
794 1.1 augustss }
795 1.1 augustss
796 1.1 augustss
797 1.1 augustss /*
798 1.1 augustss * Attach hardware to driver, attach hardware driver to audio
799 1.4 augustss * pseudo-device driver.
800 1.1 augustss */
801 1.1 augustss void
802 1.2 augustss essattach(sc)
803 1.2 augustss struct ess_softc *sc;
804 1.1 augustss {
805 1.1 augustss struct audio_params pparams, rparams;
806 1.1 augustss int i;
807 1.1 augustss u_int v;
808 1.1 augustss
809 1.2 augustss if (ess_setup_sc(sc, 0)) {
810 1.1 augustss printf("%s: setup failed\n", sc->sc_dev.dv_xname);
811 1.1 augustss return;
812 1.1 augustss }
813 1.1 augustss
814 1.2 augustss sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq,
815 1.2 augustss sc->sc_out.ist, IPL_AUDIO,
816 1.1 augustss ess_intr_output, sc);
817 1.2 augustss sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq,
818 1.2 augustss sc->sc_in.ist, IPL_AUDIO,
819 1.1 augustss ess_intr_input, sc);
820 1.1 augustss
821 1.1 augustss /* Create our DMA maps. */
822 1.1 augustss if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
823 1.1 augustss MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
824 1.1 augustss printf("%s: can't create map for drq %d\n",
825 1.1 augustss sc->sc_dev.dv_xname, sc->sc_in.drq);
826 1.1 augustss return;
827 1.1 augustss }
828 1.1 augustss if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
829 1.1 augustss MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
830 1.1 augustss printf("%s: can't create map for drq %d\n",
831 1.1 augustss sc->sc_dev.dv_xname, sc->sc_out.drq);
832 1.1 augustss return;
833 1.1 augustss }
834 1.1 augustss
835 1.1 augustss printf(" ESS Technology ES%s [version 0x%04x]\n",
836 1.1 augustss essmodel[sc->sc_model], sc->sc_version);
837 1.1 augustss
838 1.1 augustss /*
839 1.1 augustss * Set record and play parameters to default values defined in
840 1.1 augustss * generic audio driver.
841 1.1 augustss */
842 1.1 augustss pparams = audio_default;
843 1.1 augustss rparams = audio_default;
844 1.1 augustss ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
845 1.1 augustss
846 1.1 augustss /* Do a hardware reset on the mixer. */
847 1.1 augustss ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
848 1.1 augustss
849 1.1 augustss /*
850 1.1 augustss * Set volume of Audio 1 to zero and disable Audio 1 DAC input
851 1.1 augustss * to playback mixer, since playback is always through Audio 2.
852 1.1 augustss */
853 1.1 augustss ess_write_mix_reg(sc, 0x14, 0);
854 1.1 augustss ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
855 1.1 augustss
856 1.1 augustss /*
857 1.1 augustss * Set hardware record source to use output of the record
858 1.1 augustss * mixer. We do the selection of record source in software by
859 1.1 augustss * setting the gain of the unused sources to zero. (See
860 1.1 augustss * ess_set_in_ports.)
861 1.1 augustss */
862 1.1 augustss ess_set_mreg_bits(sc, 0x1c, 0x07);
863 1.1 augustss ess_clear_mreg_bits(sc, 0x7a, 0x10);
864 1.1 augustss ess_set_mreg_bits(sc, 0x7a, 0x08);
865 1.1 augustss
866 1.1 augustss /*
867 1.1 augustss * Set gain on each mixer device to a sensible value.
868 1.1 augustss * Devices not normally used are turned off, and other devices
869 1.1 augustss * are set to 75% volume.
870 1.1 augustss */
871 1.1 augustss for (i = 0; i < ESS_NDEVS; i++) {
872 1.1 augustss switch(i) {
873 1.1 augustss case ESS_MIC_PLAY_VOL:
874 1.1 augustss case ESS_LINE_PLAY_VOL:
875 1.1 augustss case ESS_CD_PLAY_VOL:
876 1.1 augustss case ESS_AUXB_PLAY_VOL:
877 1.1 augustss case ESS_DAC_REC_VOL:
878 1.1 augustss case ESS_LINE_REC_VOL:
879 1.1 augustss case ESS_SYNTH_REC_VOL:
880 1.1 augustss case ESS_CD_REC_VOL:
881 1.1 augustss case ESS_AUXB_REC_VOL:
882 1.1 augustss v = 0;
883 1.1 augustss break;
884 1.1 augustss default:
885 1.1 augustss v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4);
886 1.1 augustss break;
887 1.1 augustss }
888 1.1 augustss sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
889 1.1 augustss ess_set_gain(sc, i, 1);
890 1.1 augustss }
891 1.1 augustss
892 1.4 augustss ess_setup(sc);
893 1.2 augustss
894 1.1 augustss /* Disable the speaker until the device is opened. */
895 1.1 augustss ess_speaker_off(sc);
896 1.1 augustss sc->spkr_state = SPKR_OFF;
897 1.1 augustss
898 1.1 augustss sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
899 1.1 augustss sprintf(ess_device.version, "0x%04x", sc->sc_version);
900 1.1 augustss
901 1.1 augustss audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev);
902 1.2 augustss
903 1.2 augustss #ifdef AUDIO_DEBUG
904 1.2 augustss ess_printsc(sc);
905 1.2 augustss #endif
906 1.1 augustss }
907 1.1 augustss
908 1.1 augustss /*
909 1.1 augustss * Various routines to interface to higher level audio driver
910 1.1 augustss */
911 1.1 augustss
912 1.1 augustss int
913 1.1 augustss ess_open(addr, flags)
914 1.1 augustss void *addr;
915 1.1 augustss int flags;
916 1.1 augustss {
917 1.1 augustss struct ess_softc *sc = addr;
918 1.1 augustss
919 1.1 augustss DPRINTF(("ess_open: sc=%p\n", sc));
920 1.1 augustss
921 1.1 augustss if (sc->sc_open != 0 || ess_reset(sc) != 0)
922 1.1 augustss return ENXIO;
923 1.1 augustss
924 1.4 augustss ess_setup(sc);
925 1.1 augustss
926 1.1 augustss sc->sc_open = 1;
927 1.1 augustss
928 1.1 augustss DPRINTF(("ess_open: opened\n"));
929 1.1 augustss
930 1.1 augustss return (0);
931 1.1 augustss }
932 1.1 augustss
933 1.1 augustss void
934 1.1 augustss ess_close(addr)
935 1.1 augustss void *addr;
936 1.1 augustss {
937 1.1 augustss struct ess_softc *sc = addr;
938 1.1 augustss
939 1.1 augustss DPRINTF(("ess_close: sc=%p\n", sc));
940 1.1 augustss
941 1.1 augustss sc->sc_open = 0;
942 1.1 augustss ess_speaker_off(sc);
943 1.1 augustss sc->spkr_state = SPKR_OFF;
944 1.1 augustss sc->sc_in.intr = 0;
945 1.1 augustss sc->sc_out.intr = 0;
946 1.1 augustss ess_halt_output(sc);
947 1.1 augustss ess_halt_input(sc);
948 1.1 augustss
949 1.1 augustss DPRINTF(("ess_close: closed\n"));
950 1.1 augustss }
951 1.1 augustss
952 1.1 augustss int
953 1.4 augustss ess_speaker_ctl(addr, newstate)
954 1.4 augustss void *addr;
955 1.4 augustss int newstate;
956 1.4 augustss {
957 1.4 augustss struct ess_softc *sc = addr;
958 1.4 augustss
959 1.4 augustss if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
960 1.4 augustss ess_speaker_on(sc);
961 1.4 augustss sc->spkr_state = SPKR_ON;
962 1.4 augustss }
963 1.4 augustss if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
964 1.4 augustss ess_speaker_off(sc);
965 1.4 augustss sc->spkr_state = SPKR_OFF;
966 1.4 augustss }
967 1.4 augustss return (0);
968 1.4 augustss }
969 1.4 augustss
970 1.4 augustss int
971 1.1 augustss ess_getdev(addr, retp)
972 1.1 augustss void *addr;
973 1.1 augustss struct audio_device *retp;
974 1.1 augustss {
975 1.1 augustss *retp = ess_device;
976 1.1 augustss return (0);
977 1.1 augustss }
978 1.1 augustss
979 1.1 augustss int
980 1.1 augustss ess_query_encoding(addr, fp)
981 1.1 augustss void *addr;
982 1.1 augustss struct audio_encoding *fp;
983 1.1 augustss {
984 1.1 augustss /*struct ess_softc *sc = addr;*/
985 1.1 augustss
986 1.1 augustss switch (fp->index) {
987 1.1 augustss case 0:
988 1.1 augustss strcpy(fp->name, AudioEulinear);
989 1.1 augustss fp->encoding = AUDIO_ENCODING_ULINEAR;
990 1.1 augustss fp->precision = 8;
991 1.1 augustss fp->flags = 0;
992 1.1 augustss return (0);
993 1.1 augustss case 1:
994 1.1 augustss strcpy(fp->name, AudioEmulaw);
995 1.1 augustss fp->encoding = AUDIO_ENCODING_ULAW;
996 1.1 augustss fp->precision = 8;
997 1.1 augustss fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
998 1.1 augustss return (0);
999 1.1 augustss case 2:
1000 1.1 augustss strcpy(fp->name, AudioEalaw);
1001 1.4 augustss fp->encoding = AUDIO_ENCODING_ALAW;
1002 1.1 augustss fp->precision = 8;
1003 1.1 augustss fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1004 1.1 augustss return (0);
1005 1.1 augustss case 3:
1006 1.4 augustss strcpy(fp->name, AudioEslinear);
1007 1.4 augustss fp->encoding = AUDIO_ENCODING_SLINEAR;
1008 1.1 augustss fp->precision = 8;
1009 1.1 augustss fp->flags = 0;
1010 1.1 augustss return (0);
1011 1.1 augustss case 4:
1012 1.1 augustss strcpy(fp->name, AudioEslinear_le);
1013 1.1 augustss fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
1014 1.1 augustss fp->precision = 16;
1015 1.1 augustss fp->flags = 0;
1016 1.1 augustss return (0);
1017 1.1 augustss case 5:
1018 1.1 augustss strcpy(fp->name, AudioEulinear_le);
1019 1.1 augustss fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
1020 1.1 augustss fp->precision = 16;
1021 1.1 augustss fp->flags = 0;
1022 1.1 augustss return (0);
1023 1.1 augustss case 6:
1024 1.1 augustss strcpy(fp->name, AudioEslinear_be);
1025 1.1 augustss fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
1026 1.1 augustss fp->precision = 16;
1027 1.1 augustss fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1028 1.1 augustss return (0);
1029 1.1 augustss case 7:
1030 1.1 augustss strcpy(fp->name, AudioEulinear_be);
1031 1.1 augustss fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
1032 1.1 augustss fp->precision = 16;
1033 1.1 augustss fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1034 1.1 augustss return (0);
1035 1.1 augustss default:
1036 1.1 augustss return EINVAL;
1037 1.1 augustss }
1038 1.1 augustss return (0);
1039 1.1 augustss }
1040 1.1 augustss
1041 1.1 augustss int
1042 1.1 augustss ess_set_params(addr, setmode, usemode, p, q)
1043 1.1 augustss void *addr;
1044 1.1 augustss int setmode;
1045 1.1 augustss int usemode;
1046 1.1 augustss struct audio_params *p;
1047 1.1 augustss struct audio_params *q;
1048 1.1 augustss {
1049 1.1 augustss struct ess_softc *sc = addr;
1050 1.1 augustss void (*swcode) __P((void *, u_char *buf, int cnt));
1051 1.1 augustss int mode = setmode; /* XXX */
1052 1.1 augustss
1053 1.4 augustss DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode));
1054 1.4 augustss
1055 1.1 augustss /* Set first record info, then play info */
1056 1.1 augustss for(mode = AUMODE_RECORD; mode != -1;
1057 1.1 augustss mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
1058 1.1 augustss if ((setmode & mode) == 0)
1059 1.1 augustss continue;
1060 1.1 augustss
1061 1.1 augustss switch (mode) {
1062 1.1 augustss case AUMODE_PLAY:
1063 1.1 augustss if (ess_set_out_sr(sc, p->sample_rate) != 0 ||
1064 1.1 augustss ess_set_out_precision(sc, p->precision) != 0 ||
1065 1.1 augustss ess_set_out_channels(sc, p->channels) != 0) {
1066 1.4 augustss return (EINVAL);
1067 1.1 augustss }
1068 1.1 augustss break;
1069 1.1 augustss
1070 1.1 augustss case AUMODE_RECORD:
1071 1.1 augustss if (ess_set_in_sr(sc, p->sample_rate) != 0 ||
1072 1.1 augustss ess_set_in_precision(sc, p->precision) != 0 ||
1073 1.1 augustss ess_set_in_channels(sc, p->channels) != 0) {
1074 1.4 augustss return (EINVAL);
1075 1.1 augustss }
1076 1.1 augustss break;
1077 1.1 augustss }
1078 1.1 augustss
1079 1.1 augustss swcode = 0;
1080 1.1 augustss
1081 1.1 augustss switch (p->encoding) {
1082 1.1 augustss case AUDIO_ENCODING_SLINEAR_BE:
1083 1.1 augustss if (p->precision == 16)
1084 1.1 augustss swcode = swap_bytes;
1085 1.1 augustss /* fall into */
1086 1.1 augustss case AUDIO_ENCODING_SLINEAR_LE:
1087 1.1 augustss if (mode == AUMODE_PLAY)
1088 1.1 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1089 1.1 augustss ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1090 1.1 augustss else
1091 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1092 1.1 augustss ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1093 1.1 augustss break;
1094 1.1 augustss case AUDIO_ENCODING_ULINEAR_BE:
1095 1.1 augustss if (p->precision == 16)
1096 1.1 augustss swcode = swap_bytes;
1097 1.1 augustss /* fall into */
1098 1.1 augustss case AUDIO_ENCODING_ULINEAR_LE:
1099 1.4 augustss ulin8:
1100 1.1 augustss if (mode == AUMODE_PLAY)
1101 1.1 augustss ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1102 1.1 augustss ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1103 1.1 augustss else
1104 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1105 1.1 augustss ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1106 1.1 augustss break;
1107 1.1 augustss case AUDIO_ENCODING_ULAW:
1108 1.1 augustss swcode = mode == AUMODE_PLAY ?
1109 1.1 augustss mulaw_to_ulinear8 : ulinear8_to_mulaw;
1110 1.4 augustss goto ulin8;
1111 1.1 augustss case AUDIO_ENCODING_ALAW:
1112 1.1 augustss swcode = mode == AUMODE_PLAY ?
1113 1.1 augustss alaw_to_ulinear8 : ulinear8_to_alaw;
1114 1.4 augustss goto ulin8;
1115 1.1 augustss default:
1116 1.1 augustss return EINVAL;
1117 1.1 augustss }
1118 1.1 augustss p->sw_code = swcode;
1119 1.1 augustss }
1120 1.1 augustss
1121 1.1 augustss sc->sc_in.active = 0;
1122 1.1 augustss sc->sc_out.active = 0;
1123 1.1 augustss
1124 1.1 augustss return (0);
1125 1.1 augustss }
1126 1.1 augustss int
1127 1.1 augustss ess_set_in_sr(addr, sr)
1128 1.1 augustss void *addr;
1129 1.1 augustss u_long sr;
1130 1.1 augustss {
1131 1.1 augustss struct ess_softc *sc = addr;
1132 1.1 augustss
1133 1.1 augustss if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
1134 1.1 augustss return (EINVAL);
1135 1.1 augustss /*
1136 1.1 augustss * Program the sample rate and filter clock for the record
1137 1.1 augustss * channel (Audio 1).
1138 1.1 augustss */
1139 1.4 augustss DPRINTF(("ess_set_in_sr: %ld\n", sr));
1140 1.1 augustss ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(sr));
1141 1.1 augustss ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(sr));
1142 1.1 augustss
1143 1.1 augustss return (0);
1144 1.1 augustss }
1145 1.1 augustss
1146 1.1 augustss int
1147 1.1 augustss ess_set_out_sr(addr, sr)
1148 1.1 augustss void *addr;
1149 1.1 augustss u_long sr;
1150 1.1 augustss {
1151 1.1 augustss struct ess_softc *sc = addr;
1152 1.1 augustss
1153 1.1 augustss if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
1154 1.1 augustss return (EINVAL);
1155 1.1 augustss /*
1156 1.1 augustss * Program the sample rate and filter clock for the playback
1157 1.1 augustss * channel (Audio 2).
1158 1.1 augustss */
1159 1.4 augustss DPRINTF(("ess_set_out_sr: %ld\n", sr));
1160 1.4 augustss ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(sr));
1161 1.4 augustss ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(sr));
1162 1.1 augustss
1163 1.1 augustss return (0);
1164 1.1 augustss }
1165 1.1 augustss
1166 1.1 augustss int
1167 1.1 augustss ess_set_in_precision(addr, precision)
1168 1.1 augustss void *addr;
1169 1.1 augustss u_int precision;
1170 1.1 augustss {
1171 1.1 augustss struct ess_softc *sc = addr;
1172 1.1 augustss
1173 1.1 augustss /*
1174 1.1 augustss * REVISIT: Should we set DMA transfer type to 2-byte or
1175 1.1 augustss * 4-byte demand? This would probably better be done
1176 1.1 augustss * when configuring the DMA channel. See xreg 0xB9.
1177 1.1 augustss */
1178 1.4 augustss DPRINTF(("ess_set_in_precision: %d\n", precision));
1179 1.1 augustss switch (precision) {
1180 1.1 augustss case 8:
1181 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1182 1.1 augustss ESS_AUDIO1_CTRL1_FIFO_SIZE);
1183 1.1 augustss break;
1184 1.1 augustss
1185 1.1 augustss case 16:
1186 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1187 1.1 augustss ESS_AUDIO1_CTRL1_FIFO_SIZE);
1188 1.1 augustss break;
1189 1.1 augustss
1190 1.1 augustss default:
1191 1.4 augustss return (EINVAL);
1192 1.1 augustss }
1193 1.4 augustss return (0);
1194 1.1 augustss }
1195 1.1 augustss
1196 1.1 augustss int
1197 1.1 augustss ess_set_out_precision(addr, precision)
1198 1.1 augustss void *addr;
1199 1.1 augustss u_int precision;
1200 1.1 augustss {
1201 1.1 augustss struct ess_softc *sc = addr;
1202 1.4 augustss
1203 1.4 augustss DPRINTF(("ess_set_in_precision: %d\n", precision));
1204 1.1 augustss switch (precision) {
1205 1.1 augustss case 8:
1206 1.1 augustss ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1207 1.1 augustss ESS_AUDIO2_CTRL2_FIFO_SIZE);
1208 1.1 augustss break;
1209 1.1 augustss
1210 1.1 augustss case 16:
1211 1.1 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1212 1.1 augustss ESS_AUDIO2_CTRL2_FIFO_SIZE);
1213 1.1 augustss break;
1214 1.1 augustss
1215 1.1 augustss default:
1216 1.4 augustss return (EINVAL);
1217 1.1 augustss }
1218 1.4 augustss return (0);
1219 1.1 augustss }
1220 1.1 augustss
1221 1.1 augustss int
1222 1.1 augustss ess_set_in_channels(addr, channels)
1223 1.1 augustss void *addr;
1224 1.1 augustss int channels;
1225 1.1 augustss {
1226 1.1 augustss struct ess_softc *sc = addr;
1227 1.1 augustss
1228 1.1 augustss switch(channels) {
1229 1.1 augustss case 1:
1230 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1231 1.1 augustss ESS_AUDIO_CTRL_MONO);
1232 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1233 1.1 augustss ESS_AUDIO_CTRL_STEREO);
1234 1.1 augustss break;
1235 1.1 augustss
1236 1.1 augustss case 2:
1237 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1238 1.1 augustss ESS_AUDIO_CTRL_STEREO);
1239 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1240 1.1 augustss ESS_AUDIO_CTRL_MONO);
1241 1.1 augustss break;
1242 1.1 augustss
1243 1.1 augustss default:
1244 1.4 augustss return (EINVAL);
1245 1.1 augustss break;
1246 1.1 augustss }
1247 1.1 augustss
1248 1.1 augustss sc->sc_in.channels = channels;
1249 1.1 augustss
1250 1.4 augustss return (0);
1251 1.1 augustss }
1252 1.1 augustss
1253 1.1 augustss int
1254 1.1 augustss ess_set_out_channels(addr, channels)
1255 1.1 augustss void *addr;
1256 1.1 augustss int channels;
1257 1.1 augustss {
1258 1.1 augustss struct ess_softc *sc = addr;
1259 1.1 augustss
1260 1.1 augustss switch(channels) {
1261 1.1 augustss case 1:
1262 1.1 augustss ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1263 1.1 augustss ESS_AUDIO2_CTRL2_CHANNELS);
1264 1.1 augustss break;
1265 1.1 augustss
1266 1.1 augustss case 2:
1267 1.1 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1268 1.1 augustss ESS_AUDIO2_CTRL2_CHANNELS);
1269 1.1 augustss break;
1270 1.1 augustss
1271 1.1 augustss default:
1272 1.4 augustss return (EINVAL);
1273 1.1 augustss break;
1274 1.1 augustss }
1275 1.1 augustss
1276 1.1 augustss sc->sc_out.channels = channels;
1277 1.1 augustss
1278 1.4 augustss return (0);
1279 1.1 augustss }
1280 1.1 augustss
1281 1.1 augustss int
1282 1.1 augustss ess_dma_output(addr, p, cc, intr, arg)
1283 1.1 augustss void *addr;
1284 1.1 augustss void *p;
1285 1.1 augustss int cc;
1286 1.1 augustss void (*intr) __P((void *));
1287 1.1 augustss void *arg;
1288 1.1 augustss {
1289 1.1 augustss struct ess_softc *sc = addr;
1290 1.1 augustss
1291 1.2 augustss DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg));
1292 1.1 augustss #ifdef DIAGNOSTIC
1293 1.1 augustss if (sc->sc_out.channels == 2 && (cc & 1)) {
1294 1.1 augustss DPRINTF(("stereo playback odd bytes (%d)\n", cc));
1295 1.1 augustss return EIO;
1296 1.1 augustss }
1297 1.1 augustss #endif
1298 1.1 augustss
1299 1.1 augustss isa_dmastart(sc->sc_ic, sc->sc_out.drq, p, cc,
1300 1.1 augustss NULL, DMAMODE_WRITE, BUS_DMA_NOWAIT);
1301 1.2 augustss
1302 1.1 augustss sc->sc_out.active = 1;
1303 1.1 augustss sc->sc_out.intr = intr;
1304 1.1 augustss sc->sc_out.arg = arg;
1305 1.1 augustss sc->sc_out.dmaflags = DMAMODE_WRITE;
1306 1.1 augustss sc->sc_out.dmaaddr = p;
1307 1.1 augustss
1308 1.1 augustss if (sc->sc_out.dmacnt != cc) {
1309 1.1 augustss sc->sc_out.dmacnt = cc;
1310 1.1 augustss
1311 1.1 augustss /*
1312 1.1 augustss * If doing 16-bit DMA transfers, then the number of
1313 1.1 augustss * transfers required is half the number of bytes to
1314 1.1 augustss * be transferred.
1315 1.1 augustss */
1316 1.4 augustss if (sc->sc_out.drq >= 4)
1317 1.1 augustss cc >>= 1;
1318 1.1 augustss
1319 1.1 augustss /*
1320 1.1 augustss * Program transfer count registers with 2's
1321 1.1 augustss * complement of count.
1322 1.1 augustss */
1323 1.1 augustss cc = -cc;
1324 1.1 augustss ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc);
1325 1.1 augustss ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8);
1326 1.1 augustss }
1327 1.1 augustss
1328 1.1 augustss /* REVISIT: is it really necessary to clear then set these bits to get
1329 1.1 augustss the next lot of DMA to happen? Would it be sufficient to set the bits
1330 1.1 augustss the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
1331 1.1 augustss */
1332 1.1 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1333 1.1 augustss ESS_AUDIO2_CTRL1_DAC_ENABLE);/* REVISIT: once only */
1334 1.1 augustss ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1335 1.1 augustss ESS_AUDIO2_CTRL1_FIFO_ENABLE);
1336 1.4 augustss #if 0
1337 1.1 augustss /* REVISIT: seems like the 888 and 1888 have an interlock that
1338 1.1 augustss * prevents audio2 channel from working if audio1 channel is not
1339 1.1 augustss * connected to the FIFO.
1340 1.1 augustss */
1341 1.1 augustss ess_set_xreg_bits(sc, 0xB7, 0x80);
1342 1.1 augustss #endif
1343 1.1 augustss return (0);
1344 1.1 augustss
1345 1.1 augustss }
1346 1.1 augustss
1347 1.1 augustss int
1348 1.1 augustss ess_dma_input(addr, p, cc, intr, arg)
1349 1.1 augustss void *addr;
1350 1.1 augustss void *p;
1351 1.1 augustss int cc;
1352 1.1 augustss void (*intr) __P((void *));
1353 1.1 augustss void *arg;
1354 1.1 augustss {
1355 1.1 augustss struct ess_softc *sc = addr;
1356 1.1 augustss
1357 1.2 augustss DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg));
1358 1.1 augustss /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
1359 1.1 augustss ess_set_xreg_bits(sc, 0xB7, 0x80);
1360 1.1 augustss
1361 1.1 augustss #ifdef DIAGNOSTIC
1362 1.1 augustss if (sc->sc_in.channels == 2 && (cc & 1)) {
1363 1.1 augustss DPRINTF(("stereo record odd bytes (%d)\n", cc));
1364 1.1 augustss return EIO;
1365 1.1 augustss }
1366 1.1 augustss #endif
1367 1.1 augustss
1368 1.1 augustss isa_dmastart(sc->sc_ic, sc->sc_in.drq, p,
1369 1.1 augustss cc, NULL, DMAMODE_READ, BUS_DMA_NOWAIT);
1370 1.1 augustss sc->sc_in.active = 1;
1371 1.1 augustss sc->sc_in.intr = intr;
1372 1.1 augustss sc->sc_in.arg = arg;
1373 1.1 augustss sc->sc_in.dmaflags = DMAMODE_READ;
1374 1.1 augustss sc->sc_in.dmaaddr = p;
1375 1.1 augustss
1376 1.1 augustss if (sc->sc_in.dmacnt != cc)
1377 1.1 augustss {
1378 1.1 augustss sc->sc_in.dmacnt = cc;
1379 1.1 augustss
1380 1.1 augustss /*
1381 1.1 augustss * If doing 16-bit DMA transfers, then the number of
1382 1.1 augustss * transfers required is half the number of bytes to
1383 1.1 augustss * be transferred.
1384 1.1 augustss */
1385 1.4 augustss if (sc->sc_out.drq >= 4)
1386 1.1 augustss cc >>= 1;
1387 1.1 augustss
1388 1.1 augustss /*
1389 1.1 augustss * Program transfer count registers with 2's
1390 1.1 augustss * complement of count.
1391 1.1 augustss */
1392 1.1 augustss cc = -cc;
1393 1.1 augustss ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc);
1394 1.1 augustss ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8);
1395 1.1 augustss }
1396 1.1 augustss
1397 1.1 augustss /* REVISIT: is it really necessary to clear then set these bits to get
1398 1.1 augustss the next lot of DMA to happen? Would it be sufficient to set the bits
1399 1.1 augustss the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
1400 1.1 augustss */
1401 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1402 1.1 augustss ESS_AUDIO1_CTRL2_DMA_READ | /* REVISIT: once only */
1403 1.1 augustss ESS_AUDIO1_CTRL2_ADC_ENABLE |/* REVISIT: once only */
1404 1.1 augustss ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1405 1.1 augustss
1406 1.1 augustss return (0);
1407 1.1 augustss
1408 1.1 augustss }
1409 1.1 augustss
1410 1.1 augustss int
1411 1.1 augustss ess_halt_output(addr)
1412 1.1 augustss void *addr;
1413 1.1 augustss {
1414 1.1 augustss struct ess_softc *sc = addr;
1415 1.1 augustss
1416 1.1 augustss DPRINTF(("ess_halt_output: sc=%p\n", sc));
1417 1.1 augustss
1418 1.1 augustss ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1419 1.1 augustss ESS_AUDIO2_CTRL2_DMA_ENABLE);
1420 1.1 augustss return (0);
1421 1.1 augustss }
1422 1.1 augustss
1423 1.1 augustss int
1424 1.1 augustss ess_halt_input(addr)
1425 1.1 augustss void *addr;
1426 1.1 augustss {
1427 1.1 augustss struct ess_softc *sc = addr;
1428 1.1 augustss
1429 1.1 augustss DPRINTF(("ess_halt_input: sc=%p\n", sc));
1430 1.1 augustss
1431 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1432 1.1 augustss ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1433 1.1 augustss return (0);
1434 1.1 augustss }
1435 1.1 augustss
1436 1.1 augustss int
1437 1.1 augustss ess_intr_output(arg)
1438 1.1 augustss void *arg;
1439 1.1 augustss {
1440 1.1 augustss struct ess_softc *sc = arg;
1441 1.1 augustss
1442 1.2 augustss DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr));
1443 1.1 augustss
1444 1.4 augustss /* clear interrupt on Audio channel 2 */
1445 1.4 augustss ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1446 1.4 augustss ESS_AUDIO2_CTRL2_IRQ_LATCH);
1447 1.1 augustss
1448 1.1 augustss sc->sc_out.nintr++;
1449 1.1 augustss
1450 1.1 augustss if (sc->sc_out.intr != 0) {
1451 1.1 augustss isa_dmadone(sc->sc_ic, sc->sc_out.drq);
1452 1.1 augustss (*sc->sc_out.intr)(sc->sc_out.arg);
1453 1.1 augustss } else
1454 1.4 augustss return (0);
1455 1.1 augustss
1456 1.4 augustss return (1);
1457 1.1 augustss }
1458 1.1 augustss
1459 1.1 augustss int
1460 1.1 augustss ess_intr_input(arg)
1461 1.1 augustss void *arg;
1462 1.1 augustss {
1463 1.1 augustss struct ess_softc *sc = arg;
1464 1.1 augustss u_char x;
1465 1.1 augustss
1466 1.2 augustss DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr));
1467 1.1 augustss
1468 1.1 augustss /*
1469 1.1 augustss * Disable DMA for Audio 1; it will be enabled again the next
1470 1.1 augustss * time ess_dma_input is called. Note that for single DMAs,
1471 1.1 augustss * this bit must be toggled for each DMA. For auto-initialize
1472 1.1 augustss * DMAs, this bit should be left high.
1473 1.1 augustss */
1474 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1475 1.1 augustss ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1476 1.1 augustss
1477 1.1 augustss /* clear interrupt on Audio channel 1*/
1478 1.2 augustss x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
1479 1.1 augustss
1480 1.1 augustss sc->sc_in.nintr++;
1481 1.1 augustss
1482 1.1 augustss if (sc->sc_in.intr != 0) {
1483 1.1 augustss isa_dmadone(sc->sc_ic, sc->sc_in.drq);
1484 1.1 augustss (*sc->sc_in.intr)(sc->sc_in.arg);
1485 1.1 augustss } else
1486 1.4 augustss return (0);
1487 1.1 augustss
1488 1.1 augustss return (1);
1489 1.1 augustss }
1490 1.1 augustss
1491 1.1 augustss int
1492 1.1 augustss ess_round_blocksize(addr, blk)
1493 1.1 augustss void *addr;
1494 1.1 augustss int blk;
1495 1.1 augustss {
1496 1.4 augustss return (blk & -8); /* round for max DMA size */
1497 1.1 augustss }
1498 1.1 augustss
1499 1.1 augustss int
1500 1.1 augustss ess_set_port(addr, cp)
1501 1.1 augustss void *addr;
1502 1.1 augustss mixer_ctrl_t *cp;
1503 1.1 augustss {
1504 1.1 augustss struct ess_softc *sc = addr;
1505 1.1 augustss int lgain, rgain;
1506 1.1 augustss
1507 1.4 augustss DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n",
1508 1.4 augustss cp->dev, cp->un.value.num_channels));
1509 1.1 augustss
1510 1.1 augustss switch (cp->dev) {
1511 1.1 augustss /*
1512 1.1 augustss * The following mixer ports are all stereo. If we get a
1513 1.1 augustss * single-channel gain value passed in, then we duplicate it
1514 1.1 augustss * to both left and right channels.
1515 1.1 augustss */
1516 1.1 augustss case ESS_MASTER_VOL:
1517 1.1 augustss case ESS_DAC_PLAY_VOL:
1518 1.1 augustss case ESS_MIC_PLAY_VOL:
1519 1.1 augustss case ESS_LINE_PLAY_VOL:
1520 1.1 augustss case ESS_SYNTH_PLAY_VOL:
1521 1.1 augustss case ESS_CD_PLAY_VOL:
1522 1.1 augustss case ESS_AUXB_PLAY_VOL:
1523 1.1 augustss case ESS_DAC_REC_VOL:
1524 1.1 augustss case ESS_MIC_REC_VOL:
1525 1.1 augustss case ESS_LINE_REC_VOL:
1526 1.1 augustss case ESS_SYNTH_REC_VOL:
1527 1.1 augustss case ESS_CD_REC_VOL:
1528 1.1 augustss case ESS_AUXB_REC_VOL:
1529 1.1 augustss case ESS_RECORD_VOL:
1530 1.1 augustss if (cp->type != AUDIO_MIXER_VALUE)
1531 1.1 augustss return EINVAL;
1532 1.1 augustss
1533 1.1 augustss switch (cp->un.value.num_channels) {
1534 1.1 augustss case 1:
1535 1.1 augustss lgain = rgain = ESS_4BIT_GAIN(
1536 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1537 1.1 augustss break;
1538 1.1 augustss case 2:
1539 1.1 augustss lgain = ESS_4BIT_GAIN(
1540 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
1541 1.1 augustss rgain = ESS_4BIT_GAIN(
1542 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
1543 1.1 augustss break;
1544 1.1 augustss default:
1545 1.1 augustss return EINVAL;
1546 1.1 augustss }
1547 1.1 augustss
1548 1.1 augustss sc->gain[cp->dev][ESS_LEFT] = lgain;
1549 1.1 augustss sc->gain[cp->dev][ESS_RIGHT] = rgain;
1550 1.1 augustss
1551 1.1 augustss ess_set_gain(sc, cp->dev, 1);
1552 1.1 augustss break;
1553 1.1 augustss
1554 1.1 augustss
1555 1.1 augustss /*
1556 1.1 augustss * The PC speaker port is mono. If we get a stereo gain value
1557 1.1 augustss * passed in, then we return EINVAL.
1558 1.1 augustss */
1559 1.1 augustss case ESS_PCSPEAKER_VOL:
1560 1.1 augustss if (cp->un.value.num_channels != 1)
1561 1.1 augustss return EINVAL;
1562 1.1 augustss
1563 1.1 augustss sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
1564 1.1 augustss ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1565 1.1 augustss ess_set_gain(sc, cp->dev, 1);
1566 1.1 augustss break;
1567 1.1 augustss
1568 1.1 augustss
1569 1.1 augustss case ESS_MIC_PREAMP:
1570 1.1 augustss if (cp->type != AUDIO_MIXER_ENUM)
1571 1.1 augustss return EINVAL;
1572 1.1 augustss
1573 1.1 augustss if (cp->un.ord)
1574 1.1 augustss /* Enable microphone preamp */
1575 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1576 1.1 augustss ESS_PREAMP_CTRL_ENABLE);
1577 1.1 augustss else
1578 1.1 augustss /* Disable microphone preamp */
1579 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1580 1.1 augustss ESS_PREAMP_CTRL_ENABLE);
1581 1.1 augustss break;
1582 1.1 augustss
1583 1.1 augustss case ESS_RECORD_SOURCE:
1584 1.1 augustss if (cp->type == AUDIO_MIXER_SET)
1585 1.1 augustss return ess_set_in_ports(sc, cp->un.mask);
1586 1.1 augustss else
1587 1.1 augustss return EINVAL;
1588 1.1 augustss break;
1589 1.1 augustss
1590 1.1 augustss case ESS_RECORD_MONITOR:
1591 1.1 augustss if (cp->type != AUDIO_MIXER_ENUM)
1592 1.1 augustss return EINVAL;
1593 1.1 augustss
1594 1.1 augustss if (cp->un.ord)
1595 1.1 augustss /* Enable monitor */
1596 1.1 augustss ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1597 1.1 augustss ESS_AUDIO_CTRL_MONITOR);
1598 1.1 augustss else
1599 1.1 augustss /* Disable monitor */
1600 1.1 augustss ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1601 1.1 augustss ESS_AUDIO_CTRL_MONITOR);
1602 1.1 augustss break;
1603 1.1 augustss
1604 1.1 augustss default:
1605 1.1 augustss return EINVAL;
1606 1.1 augustss }
1607 1.1 augustss
1608 1.1 augustss return (0);
1609 1.1 augustss }
1610 1.1 augustss
1611 1.1 augustss int
1612 1.1 augustss ess_get_port(addr, cp)
1613 1.1 augustss void *addr;
1614 1.1 augustss mixer_ctrl_t *cp;
1615 1.1 augustss {
1616 1.1 augustss struct ess_softc *sc = addr;
1617 1.1 augustss
1618 1.4 augustss DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev));
1619 1.1 augustss
1620 1.1 augustss switch (cp->dev) {
1621 1.1 augustss case ESS_DAC_PLAY_VOL:
1622 1.1 augustss case ESS_MIC_PLAY_VOL:
1623 1.1 augustss case ESS_LINE_PLAY_VOL:
1624 1.1 augustss case ESS_SYNTH_PLAY_VOL:
1625 1.1 augustss case ESS_CD_PLAY_VOL:
1626 1.1 augustss case ESS_AUXB_PLAY_VOL:
1627 1.1 augustss case ESS_MASTER_VOL:
1628 1.1 augustss case ESS_PCSPEAKER_VOL:
1629 1.1 augustss case ESS_DAC_REC_VOL:
1630 1.1 augustss case ESS_MIC_REC_VOL:
1631 1.1 augustss case ESS_LINE_REC_VOL:
1632 1.1 augustss case ESS_SYNTH_REC_VOL:
1633 1.1 augustss case ESS_CD_REC_VOL:
1634 1.1 augustss case ESS_AUXB_REC_VOL:
1635 1.1 augustss case ESS_RECORD_VOL:
1636 1.1 augustss if (cp->dev == ESS_PCSPEAKER_VOL &&
1637 1.1 augustss cp->un.value.num_channels != 1)
1638 1.1 augustss return EINVAL;
1639 1.1 augustss
1640 1.1 augustss switch (cp->un.value.num_channels) {
1641 1.1 augustss case 1:
1642 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1643 1.1 augustss sc->gain[cp->dev][ESS_LEFT];
1644 1.1 augustss break;
1645 1.1 augustss case 2:
1646 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1647 1.1 augustss sc->gain[cp->dev][ESS_LEFT];
1648 1.1 augustss cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1649 1.1 augustss sc->gain[cp->dev][ESS_RIGHT];
1650 1.1 augustss break;
1651 1.1 augustss default:
1652 1.1 augustss return EINVAL;
1653 1.1 augustss }
1654 1.1 augustss break;
1655 1.1 augustss
1656 1.1 augustss case ESS_MIC_PREAMP:
1657 1.1 augustss cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
1658 1.1 augustss ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
1659 1.1 augustss break;
1660 1.1 augustss
1661 1.1 augustss case ESS_RECORD_SOURCE:
1662 1.1 augustss cp->un.mask = sc->in_mask;
1663 1.1 augustss break;
1664 1.1 augustss
1665 1.1 augustss case ESS_RECORD_MONITOR:
1666 1.1 augustss cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
1667 1.1 augustss ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
1668 1.1 augustss break;
1669 1.1 augustss
1670 1.1 augustss default:
1671 1.1 augustss return EINVAL;
1672 1.1 augustss }
1673 1.1 augustss
1674 1.1 augustss return (0);
1675 1.1 augustss }
1676 1.1 augustss
1677 1.1 augustss int
1678 1.1 augustss ess_query_devinfo(addr, dip)
1679 1.1 augustss void *addr;
1680 1.1 augustss mixer_devinfo_t *dip;
1681 1.1 augustss {
1682 1.3 thorpej #ifdef AUDIO_DEBUG
1683 1.1 augustss struct ess_softc *sc = addr;
1684 1.3 thorpej #endif
1685 1.1 augustss
1686 1.4 augustss DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n",
1687 1.4 augustss sc->sc_model, dip->index));
1688 1.1 augustss
1689 1.1 augustss /*
1690 1.1 augustss * REVISIT: There are some slight differences between the
1691 1.1 augustss * mixers on the different ESS chips, which can
1692 1.1 augustss * be sorted out using the chip model rather than a
1693 1.1 augustss * separate mixer model.
1694 1.1 augustss * This is currently coded assuming an ES1887; we
1695 1.1 augustss * need to work out which bits are not applicable to
1696 1.1 augustss * the other models (1888 and 888).
1697 1.1 augustss */
1698 1.1 augustss switch (dip->index) {
1699 1.1 augustss case ESS_DAC_PLAY_VOL:
1700 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1701 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1702 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1703 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1704 1.1 augustss strcpy(dip->label.name, AudioNdac);
1705 1.1 augustss dip->un.v.num_channels = 2;
1706 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1707 1.1 augustss return (0);
1708 1.1 augustss
1709 1.1 augustss case ESS_MIC_PLAY_VOL:
1710 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1711 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1712 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1713 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1714 1.1 augustss strcpy(dip->label.name, AudioNmicrophone);
1715 1.1 augustss dip->un.v.num_channels = 2;
1716 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1717 1.1 augustss return (0);
1718 1.1 augustss
1719 1.1 augustss case ESS_LINE_PLAY_VOL:
1720 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1721 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1722 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1723 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1724 1.1 augustss strcpy(dip->label.name, AudioNline);
1725 1.1 augustss dip->un.v.num_channels = 2;
1726 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1727 1.1 augustss return (0);
1728 1.1 augustss
1729 1.1 augustss case ESS_SYNTH_PLAY_VOL:
1730 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1731 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1732 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1733 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1734 1.1 augustss strcpy(dip->label.name, AudioNfmsynth);
1735 1.1 augustss dip->un.v.num_channels = 2;
1736 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1737 1.1 augustss return (0);
1738 1.1 augustss
1739 1.1 augustss case ESS_CD_PLAY_VOL:
1740 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1741 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1742 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1743 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1744 1.1 augustss strcpy(dip->label.name, AudioNcd);
1745 1.1 augustss dip->un.v.num_channels = 2;
1746 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1747 1.1 augustss return (0);
1748 1.1 augustss
1749 1.1 augustss case ESS_AUXB_PLAY_VOL:
1750 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1751 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1752 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1753 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1754 1.1 augustss strcpy(dip->label.name, "auxb");
1755 1.1 augustss dip->un.v.num_channels = 2;
1756 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1757 1.1 augustss return (0);
1758 1.1 augustss
1759 1.1 augustss case ESS_INPUT_CLASS:
1760 1.1 augustss dip->type = AUDIO_MIXER_CLASS;
1761 1.1 augustss dip->mixer_class = ESS_INPUT_CLASS;
1762 1.1 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
1763 1.1 augustss strcpy(dip->label.name, AudioCinputs);
1764 1.1 augustss return (0);
1765 1.1 augustss
1766 1.1 augustss
1767 1.1 augustss case ESS_MASTER_VOL:
1768 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1769 1.1 augustss dip->mixer_class = ESS_OUTPUT_CLASS;
1770 1.1 augustss dip->prev = dip->next = AUDIO_MIXER_LAST;
1771 1.1 augustss strcpy(dip->label.name, AudioNmaster);
1772 1.1 augustss dip->un.v.num_channels = 2;
1773 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1774 1.1 augustss return (0);
1775 1.1 augustss
1776 1.1 augustss case ESS_PCSPEAKER_VOL:
1777 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1778 1.1 augustss dip->mixer_class = ESS_OUTPUT_CLASS;
1779 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1780 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1781 1.1 augustss strcpy(dip->label.name, "pc_speaker");
1782 1.1 augustss dip->un.v.num_channels = 1;
1783 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1784 1.1 augustss return (0);
1785 1.1 augustss
1786 1.1 augustss case ESS_OUTPUT_CLASS:
1787 1.1 augustss dip->type = AUDIO_MIXER_CLASS;
1788 1.1 augustss dip->mixer_class = ESS_OUTPUT_CLASS;
1789 1.1 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
1790 1.1 augustss strcpy(dip->label.name, AudioCoutputs);
1791 1.1 augustss return (0);
1792 1.1 augustss
1793 1.1 augustss
1794 1.1 augustss case ESS_DAC_REC_VOL:
1795 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1796 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1797 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1798 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1799 1.1 augustss strcpy(dip->label.name, AudioNdac);
1800 1.1 augustss dip->un.v.num_channels = 2;
1801 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1802 1.1 augustss return (0);
1803 1.1 augustss
1804 1.1 augustss case ESS_MIC_REC_VOL:
1805 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1806 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1807 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1808 1.1 augustss dip->next = ESS_MIC_PREAMP;
1809 1.1 augustss strcpy(dip->label.name, AudioNmicrophone);
1810 1.1 augustss dip->un.v.num_channels = 2;
1811 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1812 1.1 augustss return (0);
1813 1.1 augustss
1814 1.1 augustss case ESS_LINE_REC_VOL:
1815 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1816 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1817 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1818 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1819 1.1 augustss strcpy(dip->label.name, AudioNline);
1820 1.1 augustss dip->un.v.num_channels = 2;
1821 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1822 1.1 augustss return (0);
1823 1.1 augustss
1824 1.1 augustss case ESS_SYNTH_REC_VOL:
1825 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1826 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1827 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1828 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1829 1.1 augustss strcpy(dip->label.name, AudioNfmsynth);
1830 1.1 augustss dip->un.v.num_channels = 2;
1831 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1832 1.1 augustss return (0);
1833 1.1 augustss
1834 1.1 augustss case ESS_CD_REC_VOL:
1835 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1836 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1837 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1838 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1839 1.1 augustss strcpy(dip->label.name, AudioNcd);
1840 1.1 augustss dip->un.v.num_channels = 2;
1841 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1842 1.1 augustss return (0);
1843 1.1 augustss
1844 1.1 augustss case ESS_AUXB_REC_VOL:
1845 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1846 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1847 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1848 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1849 1.1 augustss strcpy(dip->label.name, "auxb");
1850 1.1 augustss dip->un.v.num_channels = 2;
1851 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1852 1.1 augustss return (0);
1853 1.1 augustss
1854 1.1 augustss case ESS_MIC_PREAMP:
1855 1.1 augustss dip->type = AUDIO_MIXER_ENUM;
1856 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1857 1.1 augustss dip->prev = ESS_MIC_REC_VOL;
1858 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1859 1.1 augustss strcpy(dip->label.name, AudioNenhanced);
1860 1.1 augustss dip->un.e.num_mem = 2;
1861 1.1 augustss strcpy(dip->un.e.member[0].label.name, AudioNoff);
1862 1.1 augustss dip->un.e.member[0].ord = 0;
1863 1.1 augustss strcpy(dip->un.e.member[1].label.name, AudioNon);
1864 1.1 augustss dip->un.e.member[1].ord = 1;
1865 1.1 augustss return (0);
1866 1.1 augustss
1867 1.1 augustss case ESS_RECORD_VOL:
1868 1.1 augustss dip->type = AUDIO_MIXER_VALUE;
1869 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1870 1.1 augustss dip->prev = AUDIO_MIXER_LAST;
1871 1.1 augustss dip->next = AUDIO_MIXER_LAST;
1872 1.1 augustss strcpy(dip->label.name, AudioNrecord);
1873 1.1 augustss dip->un.v.num_channels = 2;
1874 1.1 augustss strcpy(dip->un.v.units.name, AudioNvolume);
1875 1.1 augustss return (0);
1876 1.1 augustss
1877 1.1 augustss case ESS_RECORD_SOURCE:
1878 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1879 1.1 augustss dip->prev = dip->next = AUDIO_MIXER_LAST;
1880 1.1 augustss strcpy(dip->label.name, AudioNsource);
1881 1.1 augustss dip->type = AUDIO_MIXER_SET;
1882 1.1 augustss dip->un.s.num_mem = 6;
1883 1.1 augustss strcpy(dip->un.s.member[0].label.name, AudioNdac);
1884 1.1 augustss dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
1885 1.1 augustss strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
1886 1.1 augustss dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
1887 1.1 augustss strcpy(dip->un.s.member[2].label.name, AudioNline);
1888 1.1 augustss dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
1889 1.1 augustss strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
1890 1.1 augustss dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
1891 1.1 augustss strcpy(dip->un.s.member[4].label.name, AudioNcd);
1892 1.1 augustss dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
1893 1.1 augustss strcpy(dip->un.s.member[5].label.name, "auxb");
1894 1.1 augustss dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
1895 1.1 augustss return (0);
1896 1.1 augustss
1897 1.1 augustss case ESS_RECORD_CLASS:
1898 1.1 augustss dip->type = AUDIO_MIXER_CLASS;
1899 1.1 augustss dip->mixer_class = ESS_RECORD_CLASS;
1900 1.1 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
1901 1.1 augustss strcpy(dip->label.name, AudioCrecord);
1902 1.1 augustss return (0);
1903 1.1 augustss
1904 1.1 augustss
1905 1.1 augustss case ESS_RECORD_MONITOR:
1906 1.1 augustss dip->mixer_class = ESS_MONITOR_CLASS;
1907 1.1 augustss dip->prev = dip->next = AUDIO_MIXER_LAST;
1908 1.1 augustss strcpy(dip->label.name, AudioNmonitor);
1909 1.1 augustss dip->type = AUDIO_MIXER_ENUM;
1910 1.1 augustss dip->un.e.num_mem = 2;
1911 1.1 augustss strcpy(dip->un.e.member[0].label.name, AudioNoff);
1912 1.1 augustss dip->un.e.member[0].ord = 0;
1913 1.1 augustss strcpy(dip->un.e.member[1].label.name, AudioNon);
1914 1.1 augustss dip->un.e.member[1].ord = 1;
1915 1.1 augustss return (0);
1916 1.1 augustss
1917 1.1 augustss case ESS_MONITOR_CLASS:
1918 1.1 augustss dip->type = AUDIO_MIXER_CLASS;
1919 1.1 augustss dip->mixer_class = ESS_MONITOR_CLASS;
1920 1.1 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
1921 1.1 augustss strcpy(dip->label.name, AudioCmonitor);
1922 1.1 augustss return (0);
1923 1.1 augustss }
1924 1.1 augustss
1925 1.4 augustss return (ENXIO);
1926 1.4 augustss }
1927 1.4 augustss
1928 1.4 augustss void *
1929 1.4 augustss ess_malloc(addr, size, pool, flags)
1930 1.4 augustss void *addr;
1931 1.4 augustss unsigned long size;
1932 1.4 augustss int pool;
1933 1.4 augustss int flags;
1934 1.4 augustss {
1935 1.4 augustss struct ess_softc *sc = addr;
1936 1.4 augustss
1937 1.4 augustss return isa_malloc(sc->sc_ic, 4, size, pool, flags);
1938 1.4 augustss }
1939 1.4 augustss
1940 1.4 augustss void
1941 1.4 augustss ess_free(addr, ptr, pool)
1942 1.4 augustss void *addr;
1943 1.4 augustss void *ptr;
1944 1.4 augustss int pool;
1945 1.4 augustss {
1946 1.4 augustss isa_free(ptr, pool);
1947 1.4 augustss }
1948 1.4 augustss
1949 1.4 augustss unsigned long
1950 1.4 augustss ess_round(addr, size)
1951 1.4 augustss void *addr;
1952 1.4 augustss unsigned long size;
1953 1.4 augustss {
1954 1.4 augustss if (size > MAX_ISADMA)
1955 1.4 augustss size = MAX_ISADMA;
1956 1.4 augustss return size;
1957 1.4 augustss }
1958 1.4 augustss
1959 1.4 augustss int
1960 1.4 augustss ess_mappage(addr, mem, off, prot)
1961 1.4 augustss void *addr;
1962 1.4 augustss void *mem;
1963 1.4 augustss int off;
1964 1.4 augustss int prot;
1965 1.4 augustss {
1966 1.4 augustss return (isa_mappage(mem, off, prot));
1967 1.1 augustss }
1968 1.1 augustss
1969 1.1 augustss int
1970 1.1 augustss ess_get_props(addr)
1971 1.1 augustss void *addr;
1972 1.1 augustss {
1973 1.4 augustss struct ess_softc *sc = addr;
1974 1.4 augustss return (AUDIO_PROP_MMAP |
1975 1.4 augustss (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0));
1976 1.1 augustss }
1977 1.1 augustss
1978 1.1 augustss /* ============================================
1979 1.1 augustss * Generic functions for ess, not used by audio h/w i/f
1980 1.1 augustss * =============================================
1981 1.1 augustss */
1982 1.1 augustss
1983 1.1 augustss /*
1984 1.1 augustss * Reset the chip.
1985 1.1 augustss * Return non-zero if the chip isn't detected.
1986 1.1 augustss */
1987 1.1 augustss int
1988 1.1 augustss ess_reset(sc)
1989 1.1 augustss struct ess_softc *sc;
1990 1.1 augustss {
1991 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
1992 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
1993 1.1 augustss
1994 1.1 augustss sc->sc_in.intr = 0;
1995 1.1 augustss sc->sc_in.dmacnt = 0;
1996 1.1 augustss if (sc->sc_in.active) {
1997 1.1 augustss isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
1998 1.1 augustss sc->sc_in.active = 0;
1999 1.1 augustss }
2000 1.1 augustss
2001 1.1 augustss sc->sc_out.intr = 0;
2002 1.1 augustss sc->sc_out.dmacnt = 0;
2003 1.1 augustss if (sc->sc_out.active) {
2004 1.1 augustss isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
2005 1.1 augustss sc->sc_out.active = 0;
2006 1.1 augustss }
2007 1.1 augustss
2008 1.4 augustss EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT);
2009 1.1 augustss delay(10000);
2010 1.2 augustss EWRITE1(iot, ioh, ESS_DSP_RESET, 0);
2011 1.1 augustss if (ess_rdsp(sc) != ESS_MAGIC)
2012 1.4 augustss return (1);
2013 1.1 augustss
2014 1.4 augustss /* Enable access to the ESS extension commands. */
2015 1.1 augustss ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
2016 1.1 augustss
2017 1.1 augustss return (0);
2018 1.1 augustss }
2019 1.1 augustss
2020 1.1 augustss void
2021 1.1 augustss ess_set_gain(sc, port, on)
2022 1.1 augustss struct ess_softc *sc;
2023 1.1 augustss int port;
2024 1.1 augustss int on;
2025 1.1 augustss {
2026 1.1 augustss int gain, left, right;
2027 1.1 augustss int mix;
2028 1.1 augustss int src;
2029 1.1 augustss int stereo;
2030 1.1 augustss
2031 1.1 augustss /*
2032 1.1 augustss * Most gain controls are found in the mixer registers and
2033 1.1 augustss * are stereo. Any that are not, must set mix and stereo as
2034 1.1 augustss * required.
2035 1.1 augustss */
2036 1.1 augustss mix = 1;
2037 1.1 augustss stereo = 1;
2038 1.1 augustss
2039 1.1 augustss switch (port) {
2040 1.1 augustss case ESS_MASTER_VOL:
2041 1.1 augustss src = 0x32;
2042 1.1 augustss break;
2043 1.1 augustss case ESS_DAC_PLAY_VOL:
2044 1.1 augustss src = 0x7C;
2045 1.1 augustss break;
2046 1.1 augustss case ESS_MIC_PLAY_VOL:
2047 1.1 augustss src = 0x1A;
2048 1.1 augustss break;
2049 1.1 augustss case ESS_LINE_PLAY_VOL:
2050 1.1 augustss src = 0x3E;
2051 1.1 augustss break;
2052 1.1 augustss case ESS_SYNTH_PLAY_VOL:
2053 1.1 augustss src = 0x36;
2054 1.1 augustss break;
2055 1.1 augustss case ESS_CD_PLAY_VOL:
2056 1.1 augustss src = 0x38;
2057 1.1 augustss break;
2058 1.1 augustss case ESS_AUXB_PLAY_VOL:
2059 1.1 augustss src = 0x3A;
2060 1.1 augustss break;
2061 1.1 augustss case ESS_PCSPEAKER_VOL:
2062 1.1 augustss src = 0x3C;
2063 1.1 augustss stereo = 0;
2064 1.1 augustss break;
2065 1.1 augustss case ESS_DAC_REC_VOL:
2066 1.1 augustss src = 0x69;
2067 1.1 augustss break;
2068 1.1 augustss case ESS_MIC_REC_VOL:
2069 1.1 augustss src = 0x68;
2070 1.1 augustss break;
2071 1.1 augustss case ESS_LINE_REC_VOL:
2072 1.1 augustss src = 0x6E;
2073 1.1 augustss break;
2074 1.1 augustss case ESS_SYNTH_REC_VOL:
2075 1.1 augustss src = 0x6B;
2076 1.1 augustss break;
2077 1.1 augustss case ESS_CD_REC_VOL:
2078 1.1 augustss src = 0x6A;
2079 1.1 augustss break;
2080 1.1 augustss case ESS_AUXB_REC_VOL:
2081 1.1 augustss src = 0x6C;
2082 1.1 augustss break;
2083 1.1 augustss case ESS_RECORD_VOL:
2084 1.1 augustss src = 0xB4;
2085 1.1 augustss mix = 0;
2086 1.1 augustss break;
2087 1.1 augustss default:
2088 1.1 augustss return;
2089 1.1 augustss }
2090 1.1 augustss
2091 1.1 augustss if (on) {
2092 1.1 augustss left = sc->gain[port][ESS_LEFT];
2093 1.1 augustss right = sc->gain[port][ESS_RIGHT];
2094 1.1 augustss } else {
2095 1.1 augustss left = right = 0;
2096 1.1 augustss }
2097 1.1 augustss
2098 1.1 augustss if (stereo)
2099 1.1 augustss gain = ESS_STEREO_GAIN(left, right);
2100 1.1 augustss else
2101 1.1 augustss gain = ESS_MONO_GAIN(left);
2102 1.1 augustss
2103 1.1 augustss if (mix)
2104 1.1 augustss ess_write_mix_reg(sc, src, gain);
2105 1.1 augustss else
2106 1.1 augustss ess_write_x_reg(sc, src, gain);
2107 1.1 augustss }
2108 1.1 augustss
2109 1.1 augustss int
2110 1.1 augustss ess_set_in_ports(sc, mask)
2111 1.1 augustss struct ess_softc *sc;
2112 1.1 augustss int mask;
2113 1.1 augustss {
2114 1.1 augustss mixer_devinfo_t di;
2115 1.1 augustss int i;
2116 1.1 augustss int port;
2117 1.1 augustss int tmp;
2118 1.1 augustss
2119 1.1 augustss DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
2120 1.1 augustss
2121 1.1 augustss /*
2122 1.1 augustss * Get the device info for the record source control,
2123 1.1 augustss * including the list of available sources.
2124 1.1 augustss */
2125 1.1 augustss di.index = ESS_RECORD_SOURCE;
2126 1.1 augustss if (ess_query_devinfo(sc, &di))
2127 1.1 augustss return EINVAL;
2128 1.1 augustss
2129 1.1 augustss /*
2130 1.1 augustss * Set or disable the record volume control for each of the
2131 1.1 augustss * possible sources.
2132 1.1 augustss */
2133 1.1 augustss for (i = 0; i < di.un.s.num_mem; i++)
2134 1.1 augustss {
2135 1.1 augustss /*
2136 1.1 augustss * Calculate the source port number from its mask.
2137 1.1 augustss */
2138 1.1 augustss tmp = di.un.s.member[i].mask >> 1;
2139 1.1 augustss for (port = 0; tmp; port++) {
2140 1.1 augustss tmp >>= 1;
2141 1.1 augustss }
2142 1.1 augustss
2143 1.1 augustss /*
2144 1.1 augustss * Set the source gain:
2145 1.1 augustss * to the current value if source is enabled
2146 1.1 augustss * to zero if source is disabled
2147 1.1 augustss */
2148 1.1 augustss ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
2149 1.1 augustss }
2150 1.1 augustss
2151 1.1 augustss sc->in_mask = mask;
2152 1.1 augustss
2153 1.1 augustss /*
2154 1.1 augustss * We have to fake a single port since the upper layer expects
2155 1.1 augustss * one only. We choose the lowest numbered port that is enabled.
2156 1.1 augustss */
2157 1.1 augustss for(i = 0; i < ESS_NPORT; i++) {
2158 1.1 augustss if (mask & (1 << i)) {
2159 1.1 augustss sc->in_port = i;
2160 1.1 augustss break;
2161 1.1 augustss }
2162 1.1 augustss }
2163 1.1 augustss
2164 1.1 augustss return (0);
2165 1.1 augustss }
2166 1.1 augustss
2167 1.1 augustss void
2168 1.1 augustss ess_speaker_on(sc)
2169 1.1 augustss struct ess_softc *sc;
2170 1.1 augustss {
2171 1.1 augustss /* Disable mute on left- and right-master volume. */
2172 1.1 augustss ess_clear_mreg_bits(sc, 0x60, 0x40);
2173 1.1 augustss ess_clear_mreg_bits(sc, 0x62, 0x40);
2174 1.1 augustss }
2175 1.1 augustss
2176 1.1 augustss void
2177 1.1 augustss ess_speaker_off(sc)
2178 1.1 augustss struct ess_softc *sc;
2179 1.1 augustss {
2180 1.1 augustss /* Enable mute on left- and right-master volume. */
2181 1.1 augustss ess_set_mreg_bits(sc, 0x60, 0x40);
2182 1.1 augustss ess_set_mreg_bits(sc, 0x62, 0x40);
2183 1.1 augustss }
2184 1.1 augustss
2185 1.1 augustss /*
2186 1.1 augustss * Calculate the time constant for the requested sampling rate.
2187 1.1 augustss */
2188 1.1 augustss u_int
2189 1.1 augustss ess_srtotc(rate)
2190 1.1 augustss u_int rate;
2191 1.1 augustss {
2192 1.1 augustss u_int tc;
2193 1.1 augustss
2194 1.1 augustss /* The following formulae are from the ESS data sheet. */
2195 1.1 augustss if (rate < 22050)
2196 1.1 augustss tc = 128 - 397700L / rate;
2197 1.1 augustss else
2198 1.1 augustss tc = 256 - 795500L / rate;
2199 1.1 augustss
2200 1.1 augustss return (tc);
2201 1.1 augustss }
2202 1.1 augustss
2203 1.1 augustss
2204 1.1 augustss /*
2205 1.1 augustss * Calculate the filter constant for the reuqested sampling rate.
2206 1.1 augustss */
2207 1.1 augustss u_int
2208 1.1 augustss ess_srtofc(rate)
2209 1.1 augustss u_int rate;
2210 1.1 augustss {
2211 1.1 augustss /*
2212 1.1 augustss * The following formula is derived from the information in
2213 1.1 augustss * the ES1887 data sheet, based on a roll-off frequency of
2214 1.1 augustss * 87%.
2215 1.1 augustss */
2216 1.1 augustss return (256 - 200279L / rate);
2217 1.1 augustss }
2218 1.1 augustss
2219 1.1 augustss
2220 1.1 augustss /*
2221 1.1 augustss * Return the status of the DSP.
2222 1.1 augustss */
2223 1.1 augustss u_char
2224 1.1 augustss ess_get_dsp_status(sc)
2225 1.1 augustss struct ess_softc *sc;
2226 1.1 augustss {
2227 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2228 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2229 1.1 augustss
2230 1.2 augustss return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS));
2231 1.1 augustss }
2232 1.1 augustss
2233 1.1 augustss
2234 1.1 augustss /*
2235 1.1 augustss * Return the read status of the DSP: 1 -> DSP ready for reading
2236 1.1 augustss * 0 -> DSP not ready for reading
2237 1.1 augustss */
2238 1.1 augustss u_char
2239 1.1 augustss ess_dsp_read_ready(sc)
2240 1.1 augustss struct ess_softc *sc;
2241 1.1 augustss {
2242 1.1 augustss return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) ==
2243 1.1 augustss ESS_DSP_READ_READY) ? 1 : 0);
2244 1.1 augustss }
2245 1.1 augustss
2246 1.1 augustss
2247 1.1 augustss /*
2248 1.1 augustss * Return the write status of the DSP: 1 -> DSP ready for writing
2249 1.1 augustss * 0 -> DSP not ready for writing
2250 1.1 augustss */
2251 1.1 augustss u_char
2252 1.1 augustss ess_dsp_write_ready(sc)
2253 1.1 augustss struct ess_softc *sc;
2254 1.1 augustss {
2255 1.1 augustss return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
2256 1.1 augustss ESS_DSP_WRITE_READY) ? 1 : 0);
2257 1.1 augustss }
2258 1.1 augustss
2259 1.1 augustss
2260 1.1 augustss /*
2261 1.1 augustss * Read a byte from the DSP.
2262 1.1 augustss */
2263 1.1 augustss int
2264 1.1 augustss ess_rdsp(sc)
2265 1.1 augustss struct ess_softc *sc;
2266 1.1 augustss {
2267 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2268 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2269 1.1 augustss int i;
2270 1.1 augustss
2271 1.1 augustss for (i = ESS_READ_TIMEOUT; i > 0; --i) {
2272 1.1 augustss if (ess_dsp_read_ready(sc)) {
2273 1.2 augustss i = EREAD1(iot, ioh, ESS_DSP_READ);
2274 1.2 augustss DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i));
2275 1.1 augustss return i;
2276 1.1 augustss } else
2277 1.1 augustss delay(10);
2278 1.1 augustss }
2279 1.1 augustss
2280 1.1 augustss DPRINTF(("ess_rdsp: timed out\n"));
2281 1.1 augustss return (-1);
2282 1.1 augustss }
2283 1.1 augustss
2284 1.1 augustss /*
2285 1.1 augustss * Write a byte to the DSP.
2286 1.1 augustss */
2287 1.1 augustss int
2288 1.1 augustss ess_wdsp(sc, v)
2289 1.1 augustss struct ess_softc *sc;
2290 1.1 augustss u_char v;
2291 1.1 augustss {
2292 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2293 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2294 1.1 augustss int i;
2295 1.2 augustss
2296 1.2 augustss DPRINTFN(8,("ess_wdsp(0x%02x)\n", v));
2297 1.2 augustss
2298 1.1 augustss for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
2299 1.1 augustss if (ess_dsp_write_ready(sc)) {
2300 1.2 augustss EWRITE1(iot, ioh, ESS_DSP_WRITE, v);
2301 1.1 augustss return (0);
2302 1.1 augustss } else
2303 1.1 augustss delay(10);
2304 1.1 augustss }
2305 1.1 augustss
2306 1.1 augustss DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
2307 1.1 augustss return (-1);
2308 1.1 augustss }
2309 1.1 augustss
2310 1.1 augustss /*
2311 1.1 augustss * Write a value to one of the ESS extended registers.
2312 1.1 augustss */
2313 1.1 augustss int
2314 1.1 augustss ess_write_x_reg(sc, reg, val)
2315 1.1 augustss struct ess_softc *sc;
2316 1.1 augustss u_char reg;
2317 1.1 augustss u_char val;
2318 1.1 augustss {
2319 1.1 augustss int error;
2320 1.1 augustss
2321 1.2 augustss DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2322 1.1 augustss if ((error = ess_wdsp(sc, reg)) == 0)
2323 1.1 augustss error = ess_wdsp(sc, val);
2324 1.1 augustss
2325 1.1 augustss return error;
2326 1.1 augustss }
2327 1.1 augustss
2328 1.1 augustss /*
2329 1.1 augustss * Read the value of one of the ESS extended registers.
2330 1.1 augustss */
2331 1.1 augustss u_char
2332 1.1 augustss ess_read_x_reg(sc, reg)
2333 1.1 augustss struct ess_softc *sc;
2334 1.1 augustss u_char reg;
2335 1.1 augustss {
2336 1.1 augustss int error;
2337 1.2 augustss int val;
2338 1.1 augustss
2339 1.1 augustss if ((error = ess_wdsp(sc, 0xC0)) == 0)
2340 1.1 augustss error = ess_wdsp(sc, reg);
2341 1.1 augustss if (error)
2342 1.1 augustss DPRINTF(("Error reading extended register 0x%02x\n", reg));
2343 1.1 augustss /* REVISIT: what if an error is returned above? */
2344 1.2 augustss val = ess_rdsp(sc);
2345 1.2 augustss DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2346 1.2 augustss return val;
2347 1.1 augustss }
2348 1.1 augustss
2349 1.1 augustss void
2350 1.1 augustss ess_clear_xreg_bits(sc, reg, mask)
2351 1.1 augustss struct ess_softc *sc;
2352 1.1 augustss u_char reg;
2353 1.1 augustss u_char mask;
2354 1.1 augustss {
2355 1.1 augustss if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
2356 1.1 augustss DPRINTF(("Error clearing bits in extended register 0x%02x\n",
2357 1.1 augustss reg));
2358 1.1 augustss }
2359 1.1 augustss
2360 1.1 augustss void
2361 1.1 augustss ess_set_xreg_bits(sc, reg, mask)
2362 1.1 augustss struct ess_softc *sc;
2363 1.1 augustss u_char reg;
2364 1.1 augustss u_char mask;
2365 1.1 augustss {
2366 1.1 augustss if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
2367 1.1 augustss DPRINTF(("Error setting bits in extended register 0x%02x\n",
2368 1.1 augustss reg));
2369 1.1 augustss }
2370 1.1 augustss
2371 1.1 augustss
2372 1.1 augustss /*
2373 1.1 augustss * Write a value to one of the ESS mixer registers.
2374 1.1 augustss */
2375 1.1 augustss void
2376 1.1 augustss ess_write_mix_reg(sc, reg, val)
2377 1.1 augustss struct ess_softc *sc;
2378 1.1 augustss u_char reg;
2379 1.1 augustss u_char val;
2380 1.1 augustss {
2381 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2382 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2383 1.1 augustss int s;
2384 1.1 augustss
2385 1.2 augustss DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));
2386 1.4 augustss
2387 1.1 augustss s = splaudio();
2388 1.2 augustss EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2389 1.2 augustss EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);
2390 1.1 augustss splx(s);
2391 1.1 augustss }
2392 1.1 augustss
2393 1.1 augustss /*
2394 1.1 augustss * Read the value of one of the ESS mixer registers.
2395 1.1 augustss */
2396 1.1 augustss u_char
2397 1.1 augustss ess_read_mix_reg(sc, reg)
2398 1.1 augustss struct ess_softc *sc;
2399 1.1 augustss u_char reg;
2400 1.1 augustss {
2401 1.1 augustss bus_space_tag_t iot = sc->sc_iot;
2402 1.1 augustss bus_space_handle_t ioh = sc->sc_ioh;
2403 1.1 augustss int s;
2404 1.1 augustss u_char val;
2405 1.1 augustss
2406 1.1 augustss s = splaudio();
2407 1.2 augustss EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2408 1.2 augustss val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);
2409 1.4 augustss splx(s);
2410 1.1 augustss
2411 1.2 augustss DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));
2412 1.1 augustss return val;
2413 1.1 augustss }
2414 1.1 augustss
2415 1.1 augustss void
2416 1.1 augustss ess_clear_mreg_bits(sc, reg, mask)
2417 1.1 augustss struct ess_softc *sc;
2418 1.1 augustss u_char reg;
2419 1.1 augustss u_char mask;
2420 1.1 augustss {
2421 1.1 augustss ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
2422 1.1 augustss }
2423 1.1 augustss
2424 1.1 augustss void
2425 1.1 augustss ess_set_mreg_bits(sc, reg, mask)
2426 1.1 augustss struct ess_softc *sc;
2427 1.1 augustss u_char reg;
2428 1.1 augustss u_char mask;
2429 1.1 augustss {
2430 1.1 augustss ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
2431 1.1 augustss }
2432