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ess.c revision 1.1
      1 /*	$NetBSD: ess.c,v 1.1 1998/06/29 20:56:21 augustss Exp $	*/
      2 
      3 /*
      4  * Copyright 1997
      5  * Digital Equipment Corporation. All rights reserved.
      6  *
      7  * This software is furnished under license and may be used and
      8  * copied only in accordance with the following terms and conditions.
      9  * Subject to these conditions, you may download, copy, install,
     10  * use, modify and distribute this software in source and/or binary
     11  * form. No title or ownership is transferred hereby.
     12  *
     13  * 1) Any source code used, modified or distributed must reproduce
     14  *    and retain this copyright notice and list of conditions as
     15  *    they appear in the source file.
     16  *
     17  * 2) No right is granted to use any trade name, trademark, or logo of
     18  *    Digital Equipment Corporation. Neither the "Digital Equipment
     19  *    Corporation" name nor any trademark or logo of Digital Equipment
     20  *    Corporation may be used to endorse or promote products derived
     21  *    from this software without the prior written permission of
     22  *    Digital Equipment Corporation.
     23  *
     24  * 3) This software is provided "AS-IS" and any express or implied
     25  *    warranties, including but not limited to, any implied warranties
     26  *    of merchantability, fitness for a particular purpose, or
     27  *    non-infringement are disclaimed. In no event shall DIGITAL be
     28  *    liable for any damages whatsoever, and in particular, DIGITAL
     29  *    shall not be liable for special, indirect, consequential, or
     30  *    incidental damages or damages for lost profits, loss of
     31  *    revenue or loss of use, whether such damages arise in contract,
     32  *    negligence, tort, under statute, in equity, at law or otherwise,
     33  *    even if advised of the possibility of such damage.
     34  */
     35 
     36 /*
     37 **++
     38 **
     39 **  ess.c
     40 **
     41 **  FACILITY:
     42 **
     43 **	DIGITAL Network Appliance Reference Design (DNARD)
     44 **
     45 **  MODULE DESCRIPTION:
     46 **
     47 **      This module contains the device driver for the ESS
     48 **      Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
     49 **	used as a reference point when implementing this driver.
     50 **
     51 **  AUTHORS:
     52 **
     53 **	Blair Fidler	Software Engineering Australia
     54 **			Gold Coast, Australia.
     55 **
     56 **  CREATION DATE:
     57 **
     58 **	March 10, 1997.
     59 **
     60 **  MODIFICATION HISTORY:
     61 **
     62 **--
     63 */
     64 
     65 /*
     66  * Modification by Lennart Augustsson:
     67  * Adapt for bus dma.
     68  * Change to 1.3 audio interface.
     69  */
     70 
     71 /*
     72  * TODO (falling priority):
     73  * - test and get it to run.
     74  * - split off ISA probe/attach to ess_isa.c.
     75  * - add looping DMA (copy from sbdsp.c).
     76  * - avoid using wired in IRQ/DRQ levels.
     77  * - look over how the two channels are set up, it's rather messy now.
     78  * - make a lot of #define for magic constants in the code.
     79  */
     80 
     81 #include <sys/param.h>
     82 #include <sys/systm.h>
     83 #include <sys/errno.h>
     84 #include <sys/ioctl.h>
     85 #include <sys/syslog.h>
     86 #include <sys/device.h>
     87 #include <sys/proc.h>
     88 
     89 #include <machine/cpu.h>
     90 #include <machine/intr.h>
     91 #include <machine/pio.h>
     92 
     93 #include <sys/audioio.h>
     94 #include <dev/audio_if.h>
     95 #include <dev/auconv.h>
     96 #include <dev/mulaw.h>
     97 
     98 #include <dev/isa/isavar.h>
     99 #include <dev/isa/isadmavar.h>
    100 
    101 #include <dev/isa/essvar.h>
    102 #include <dev/isa/essreg.h>
    103 
    104 #ifdef AUDIO_DEBUG
    105 #define DPRINTF(x)	if (essdebug) printf x
    106 int	essdebug = 0;
    107 #else
    108 #define DPRINTF(x)
    109 #endif
    110 
    111 int	ess_setup_sc __P((struct ess_softc *, struct isa_attach_args *, int));
    112 
    113 int	ess_probe __P((struct device *, struct cfdata *, void *));
    114 void	ess_attach __P((struct device *, struct device *, void *));
    115 
    116 int	ess_open __P((void *, int));
    117 void	ess_close __P((void *));
    118 int	ess_getdev __P((void *, struct audio_device *));
    119 int	ess_drain __P((void *));
    120 
    121 int	ess_query_encoding __P((void *, struct audio_encoding *));
    122 
    123 int	ess_set_params __P((void *, int, int, struct audio_params *,
    124 			    struct audio_params *));
    125 int	ess_set_in_sr __P((void *, u_long));
    126 int	ess_set_out_sr __P((void *, u_long));
    127 int	ess_set_in_precision __P((void *, u_int));
    128 int	ess_set_out_precision __P((void *, u_int));
    129 int	ess_set_in_channels __P((void *, int));
    130 int	ess_set_out_channels __P((void *, int));
    131 
    132 int	ess_round_blocksize __P((void *, int));
    133 
    134 int	ess_dma_output __P((void *, void *, int, void (*)(void *), void *));
    135 int	ess_dma_input __P((void *, void *, int, void (*)(void *), void *));
    136 int	ess_halt_output __P((void *));
    137 int	ess_halt_input __P((void *));
    138 
    139 int	ess_intr_output __P((void *));
    140 int	ess_intr_input __P((void *));
    141 
    142 int	ess_speaker_ctl __P((void *, int));
    143 
    144 int	ess_getdev __P((void *, struct audio_device *));
    145 
    146 int	ess_set_port __P((void *, mixer_ctrl_t *));
    147 int	ess_get_port __P((void *, mixer_ctrl_t *));
    148 
    149 int	ess_query_devinfo __P((void *, mixer_devinfo_t *));
    150 int	ess_get_props __P((void *));
    151 
    152 
    153 int	ess_config_addr __P((struct ess_softc *));
    154 void	ess_config_intr __P((struct ess_softc *));
    155 int	ess_identify __P((struct ess_softc *));
    156 
    157 int	ess_reset __P((struct ess_softc *));
    158 void	ess_set_gain __P((struct ess_softc *, int, int));
    159 int	ess_set_in_ports __P((struct ess_softc *, int));
    160 void	ess_speaker_on __P((struct ess_softc *));
    161 void	ess_speaker_off __P((struct ess_softc *));
    162 u_int	ess_srtotc __P((u_int));
    163 u_int	ess_srtofc __P((u_int));
    164 u_char	ess_get_dsp_status __P((struct ess_softc *));
    165 u_char	ess_dsp_read_ready __P((struct ess_softc *));
    166 u_char	ess_dsp_write_ready __P((struct ess_softc *sc));
    167 int	ess_rdsp __P((struct ess_softc *));
    168 int	ess_wdsp __P((struct ess_softc *, u_char));
    169 u_char	ess_read_x_reg __P((struct ess_softc *, u_char));
    170 int	ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
    171 void	ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
    172 void	ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
    173 u_char	ess_read_mix_reg __P((struct ess_softc *, u_char));
    174 void	ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
    175 void	ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
    176 void	ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
    177 
    178 
    179 struct cfattach ess_ca = {
    180 	sizeof(struct ess_softc), ess_probe, ess_attach
    181 };
    182 
    183 #if 0
    184 struct cfdriver ess_cd = {
    185 	NULL, "ess", DV_DULL
    186 };
    187 #endif
    188 
    189 static char *essmodel[] = {
    190 	"unsupported",
    191 	"1888",
    192 	"1887",
    193 	"888"
    194 };
    195 
    196 struct audio_device ess_device = {
    197 	"ESS Technology",
    198 	"x",
    199 	"ess"
    200 };
    201 
    202 /*
    203  * Define our interface to the higher level audio driver.
    204  */
    205 
    206 struct audio_hw_if ess_hw_if = {
    207 	ess_open,
    208 	ess_close,
    209 	NULL,
    210 	ess_query_encoding,
    211 	ess_set_params,
    212 	ess_round_blocksize,
    213 	NULL,
    214 	NULL,
    215 	NULL,
    216 	ess_dma_output,
    217 	ess_dma_input,
    218 	ess_halt_output,
    219 	ess_halt_input,
    220 	ess_speaker_ctl,
    221 	ess_getdev,
    222 	NULL,
    223 	ess_set_port,
    224 	ess_get_port,
    225 	ess_query_devinfo,
    226 	NULL,
    227 	NULL,
    228 	NULL,
    229 	NULL,
    230 	ess_get_props,
    231 };
    232 
    233 #ifdef AUDIO_DEBUG
    234 void ess_printsc __P((struct ess_softc *));
    235 void ess_dump_mixer __P((struct ess_softc *));
    236 
    237 void
    238 ess_printsc(sc)
    239 	struct ess_softc *sc;
    240 {
    241 	int i;
    242 
    243 	printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
    244 	       (int)sc->sc_open, sc->sc_iobase, sc->out_port,
    245 	       sc->in_port, sc->spkr_state ? "on" : "off");
    246 
    247 	printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
    248 	       sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
    249 	       sc->sc_out.intr, sc->sc_out.arg);
    250 
    251 	printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
    252 	       sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
    253 	       sc->sc_in.intr, sc->sc_in.arg);
    254 
    255 	printf("gain:");
    256 	for (i = 0; i < ESS_NDEVS; i++)
    257 		printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
    258 	printf("\n");
    259 }
    260 
    261 void
    262 ess_dump_mixer(sc)
    263 	struct ess_softc *sc;
    264 {
    265 	printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
    266 	       0x7C, ess_read_mix_reg(sc, 0x7C));
    267 	printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
    268 	       0x1A, ess_read_mix_reg(sc, 0x1A));
    269 	printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
    270 	       0x3E, ess_read_mix_reg(sc, 0x3E));
    271 	printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
    272 	       0x36, ess_read_mix_reg(sc, 0x36));
    273 	printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
    274 	       0x38, ess_read_mix_reg(sc, 0x38));
    275 	printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
    276 	       0x3A, ess_read_mix_reg(sc, 0x3A));
    277 	printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
    278 	       0x32, ess_read_mix_reg(sc, 0x32));
    279 	printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
    280 	       0x3C, ess_read_mix_reg(sc, 0x3C));
    281 	printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
    282 	       0x69, ess_read_mix_reg(sc, 0x69));
    283 	printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
    284 	       0x68, ess_read_mix_reg(sc, 0x68));
    285 	printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
    286 	       0x6E, ess_read_mix_reg(sc, 0x6E));
    287 	printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
    288 	       0x6B, ess_read_mix_reg(sc, 0x6B));
    289 	printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
    290 	       0x6A, ess_read_mix_reg(sc, 0x6A));
    291 	printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
    292 	       0x6C, ess_read_mix_reg(sc, 0x6C));
    293 	printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
    294 	       0xB4, ess_read_x_reg(sc, 0xB4));
    295 	printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
    296 	       0x14, ess_read_mix_reg(sc, 0x14));
    297 
    298 	printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
    299 	       ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
    300 	printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
    301 	       ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
    302 	printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
    303 	       0x1c, ess_read_mix_reg(sc, 0x1c),
    304 	       0x7a, ess_read_mix_reg(sc, 0x7a));
    305 }
    306 
    307 #endif
    308 
    309 /*
    310  * Configure the ESS chip for the desired audio base address.
    311  */
    312 int
    313 ess_config_addr(sc)
    314 	struct ess_softc *sc;
    315 {
    316 	int iobase = sc->sc_iobase;
    317 	bus_space_tag_t iot = sc->sc_iot;
    318 
    319 /* XXX make this a runtime choice */
    320 #ifdef ESS_AMODE_LOW
    321 	/*
    322 	 * Configure using the Read-Sequence-Key method.  This method
    323 	 * is used when the AMODE line is tied low, which is the case
    324 	 * for the evaluation board, but not for the Shark.  First we
    325 	 * read a magic sequence of registers, then we read from the
    326 	 * desired base addresses.  See page 21 of ES1887 data sheet
    327 	 * for details.
    328 	 */
    329 
    330 	bus_space_handle_t ioh;
    331 
    332 	/*
    333 	 * Get a mapping for the configuration key registers.
    334 	 */
    335 	if (bus_space_map(iot, ESS_CONFIG_KEY_BASE, ESS_CONFIG_KEY_PORTS,
    336 			  0, &ioh)) {
    337 		printf("ess: can't map configuration key registers\n");
    338 		return (1);
    339 	}
    340 
    341 	/*
    342 	 * Read the magic key sequence.
    343 	 */
    344 	bus_space_read_1(iot, ioh, 0);
    345 	bus_space_read_1(iot, ioh, 0);
    346 	bus_space_read_1(iot, ioh, 0);
    347 
    348 	bus_space_read_1(iot, ioh, 2);
    349 	bus_space_read_1(iot, ioh, 0);
    350 	bus_space_read_1(iot, ioh, 2);
    351 	bus_space_read_1(iot, ioh, 0);
    352 	bus_space_read_1(iot, ioh, 0);
    353 	bus_space_read_1(iot, ioh, 2);
    354 	bus_space_read_1(iot, ioh, 0);
    355 
    356 	/*
    357 	 * Unmap the configuration key registers.
    358 	 */
    359 	bus_space_unmap(iot, ioh, ESS_CONFIG_KEY_PORTS);
    360 
    361 
    362 	/*
    363 	 * Get a mapping for the audio base address.
    364 	 */
    365 	if (bus_space_map(iot, iobase, 1, 0, &ioh)) {
    366 		printf("ess: can't map audio base address (0x%x)\n", iobase);
    367 		return (1);
    368 	}
    369 
    370 	/*
    371 	 * Read from the audio base address.
    372 	 */
    373 	bus_space_read_1(iot, ioh, 0);
    374 
    375 	/*
    376 	 * Unmap the audio base address
    377 	 */
    378 	bus_space_unmap(iot, ioh, 1);
    379 #else
    380 	/*
    381 	 * Configure using the System Control Register method.  This
    382 	 * method is used when the AMODE line is tied high, which is
    383 	 * the case for the Shark, but not for the evaluation board.
    384 	 */
    385 
    386 	bus_space_handle_t scr_access_ioh;
    387 	bus_space_handle_t scr_ioh;
    388 	u_short scr_value;
    389 
    390 	/*
    391 	 * Set the SCR bit to enable audio.
    392 	 */
    393 	scr_value = ESS_SCR_AUDIO_ENABLE;
    394 
    395 	/*
    396 	 * Set the SCR bits necessary to select the specified audio
    397 	 * base address.
    398 	 */
    399 	switch(iobase) {
    400 	case 0x220:
    401 		scr_value |= ESS_SCR_AUDIO_220;
    402 		break;
    403 	case 0x230:
    404 		scr_value |= ESS_SCR_AUDIO_230;
    405 		break;
    406 	case 0x240:
    407 		scr_value |= ESS_SCR_AUDIO_240;
    408 		break;
    409 	case 0x250:
    410 		scr_value |= ESS_SCR_AUDIO_250;
    411 		break;
    412 	default:
    413 		printf("ess: configured iobase 0x%x invalid\n", iobase);
    414 		return (1);
    415 		break;
    416 	}
    417 
    418 	/*
    419 	 * Get a mapping for the System Control Register (SCR) access
    420 	 * registers and the SCR data registers.
    421 	 */
    422 	if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
    423 			  0, &scr_access_ioh)) {
    424 		printf("ess: can't map SCR access registers\n");
    425 		return (1);
    426 	}
    427 	if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
    428 			  0, &scr_ioh)) {
    429 		printf("ess: can't map SCR registers\n");
    430 		bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
    431 		return (1);
    432 	}
    433 
    434 	/* Unlock the SCR. */
    435 	bus_space_write_1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
    436 
    437 	/* Write the base address information into SCR[0]. */
    438 	bus_space_write_1(iot, scr_ioh, ESS_SCR_INDEX, 0);
    439 	bus_space_write_1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
    440 
    441 	/* Lock the SCR. */
    442 	bus_space_write_1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
    443 
    444 	/* Unmap the SCR access ports and the SCR data ports. */
    445 	bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
    446 	bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
    447 #endif
    448 
    449 	return 0;
    450 }
    451 
    452 
    453 /*
    454  * Configure the ESS chip for the desired IRQ and DMA channels.
    455  */
    456 void
    457 ess_config_intr(sc)
    458 	struct ess_softc *sc;
    459 {
    460 	int v;
    461 
    462 	/*
    463 	 * Configure Audio 1 (record) for the appropriate IRQ line.
    464 	 */
    465 	switch(sc->sc_in.irq) {
    466 	case 5:
    467 		v = 0x54;
    468 		break;
    469 	case 7:
    470 		v = 0x58;
    471 		break;
    472 	case 9:
    473 		v = 0x50;
    474 		break;
    475 	case 10:
    476 		v = 0x5c;
    477 		break;
    478 	default:
    479 		printf("ess: configured irq %d not supported for Audio 1\n",
    480 		       sc->sc_in.irq);
    481 		return;
    482 	}
    483 	ess_wdsp(sc, 0xb1);
    484 	ess_wdsp(sc, v);
    485 
    486 
    487 	/* REVISIT: tidy up following which enables DMA, IRQ for Audio 2 */
    488 	/* note that for 1888/888 IRQ must be 15 and DRQ must be 5 */
    489 	ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 0x60);
    490 
    491 #if 0
    492 	/*
    493 	 * REVISIT: Only the ES1887 supports register 0x7d - for all
    494 	 *          other chips, DRQ is hardwired to 5 anyway.
    495 	 */
    496 	/* REVISIT: tidy up following which hardcodes DRQ to 5 */
    497 	if (sc->sc_model = ESS_1887) {
    498 		ess_set_mreg_bits(sc, 0x7d, 0x03);
    499 	}
    500 
    501 	/* REVISIT: Only the ES1887 supports register 0x7f */
    502 	/* REVISIT: tidy up following which hardcodes IRQ to 15 for Audio 2*/
    503 	ess_set_mreg_bits(sc, 0x7f, 0x03);
    504 	ess_clear_mreg_bits(sc, 0x7f, 0x0c);
    505 #endif
    506 
    507 	/*
    508 	 * Configure Audio 1 (record) for DMA on the appropriate
    509 	 * channel.
    510 	 */
    511 	/*
    512 	 * REVISIT: Does bit 4 really need to be set? Reading the data
    513 	 *          sheet, it seems that this is only necessary for
    514 	 *          compatibility mode.
    515 	 */
    516 	switch(sc->sc_in.drq)
    517 	{
    518 	case 0:
    519 		v = 0x54;
    520 		break;
    521 	case 1:
    522 		v = 0x58;
    523 		break;
    524 	case 3:
    525 		v = 0x5c;
    526 		break;
    527 	default:
    528 		printf("essdsp: configured dma chan %d not supported for Audio 1\n",
    529 		       sc->sc_in.drq);
    530 		return;
    531 	}
    532 	ess_wdsp(sc, 0xb2);
    533 	ess_wdsp(sc, v);
    534 }
    535 
    536 
    537 /*
    538  * Determine the model of ESS chip we are talking to.  Currently we
    539  * only support ES1888, ES1887 and ES888.  The method of determining
    540  * the chip is based on the information on page 27 of the ES1887 data
    541  * sheet.
    542  *
    543  * This routine sets the values of sc->sc_model and sc->sc_version.
    544  */
    545 int
    546 ess_identify(sc)
    547 	struct ess_softc *sc;
    548 {
    549 	u_char reg1;
    550 	u_char reg2;
    551 	u_char reg3;
    552 
    553 	sc->sc_model = ESS_UNSUPPORTED;
    554 	sc->sc_version = 0;
    555 
    556 
    557 	/*
    558 	 * 1. Check legacy ID bytes.  These should be 0x68 0x8n, where
    559 	 *    n >= 8 for an ES1887 or an ES888.  Other values indicate
    560 	 *    earlier (unsupported) chips.
    561 	 */
    562 	ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
    563 
    564 	if ((reg1 = ess_rdsp(sc)) != 0x68) {
    565 		printf("ess: First ID byte wrong (0x%02x)\n", reg1);
    566 		return 1;
    567 	}
    568 
    569 	reg2 = ess_rdsp(sc);
    570 	if (((reg2 & 0xf0) != 0x80) ||
    571 	    ((reg2 & 0x0f) < 8)) {
    572 		printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
    573 		return 1;
    574 	}
    575 
    576 	/*
    577 	 * Store the ID bytes as the version.
    578 	 */
    579 	sc->sc_version = (reg1 << 8) + reg2;
    580 
    581 
    582 	/*
    583 	 * 2. Verify we can change bit 2 in mixer register 0x64.  This
    584 	 *    should be possible on all supported chips.
    585 	 */
    586 	reg1 = ess_read_mix_reg(sc, 0x64);
    587 	reg2 = reg1 ^ 0x04;  /* toggle bit 2 */
    588 
    589 	ess_write_mix_reg(sc, 0x64, reg2);
    590 
    591 	if (ess_read_mix_reg(sc, 0x64) != reg2) {
    592 		printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
    593 		return 1;
    594 	}
    595 
    596 	/*
    597 	 * Restore the original value of mixer register 0x64.
    598 	 */
    599 	ess_write_mix_reg(sc, 0x64, reg1);
    600 
    601 
    602 	/*
    603 	 * 3. Verify we can change the value of mixer register 0x70.
    604 	 *    This should be possible on all supported chips.
    605 	 */
    606 	reg1 = ess_read_mix_reg(sc, 0x70);
    607 	reg2 = reg1 ^ 0xff;  /* toggle all bits */
    608 
    609 	ess_write_mix_reg(sc, 0x70, reg2);
    610 
    611 	if (ess_read_mix_reg(sc, 0x70) != reg2) {
    612 		printf("ess: Hardware error (unable to change mixer register 0x70)\n");
    613 		return 1;
    614 	}
    615 
    616 	/*
    617 	 * It is not necessary to restore the value of mixer register 0x70.
    618 	 */
    619 
    620 
    621 	/*
    622 	 * 4. Determine if we can change bit 5 in mixer register 0x64.
    623 	 *    This determines whether we have an ES1887:
    624 	 *
    625 	 *    - can change indicates ES1887
    626 	 *    - can't change indicates ES1888 or ES888
    627 	 */
    628 	reg1 = ess_read_mix_reg(sc, 0x64);
    629 	reg2 = reg1 ^ 0x20;  /* toggle bit 5 */
    630 
    631 	ess_write_mix_reg(sc, 0x64, reg2);
    632 
    633 	if (ess_read_mix_reg(sc, 0x64) == reg2) {
    634 		sc->sc_model = ESS_1887;
    635 
    636 		/*
    637 		 * Restore the original value of mixer register 0x64.
    638 		 */
    639 		ess_write_mix_reg(sc, 0x64, reg1);
    640 	} else {
    641 		/*
    642 		 * 5. Determine if we can change the value of mixer
    643 		 *    register 0x69 independently of mixer register
    644 		 *    0x68. This determines which chip we have:
    645 		 *
    646 		 *    - can modify idependently indicates ES888
    647 		 *    - register 0x69 is an alias of 0x68 indicates ES1888
    648 		 */
    649 		reg1 = ess_read_mix_reg(sc, 0x68);
    650 		reg2 = ess_read_mix_reg(sc, 0x69);
    651 		reg3 = reg2 ^ 0xff;  /* toggle all bits */
    652 
    653 		/*
    654 		 * Write different values to each register.
    655 		 */
    656 		ess_write_mix_reg(sc, 0x68, reg2);
    657 		ess_write_mix_reg(sc, 0x69, reg3);
    658 
    659 		if (ess_read_mix_reg(sc, 0x68) == reg2)
    660 			sc->sc_model = ESS_888;
    661 		else
    662 			sc->sc_model = ESS_1888;
    663 
    664 		/*
    665 		 * Restore the original value of the registers.
    666 		 */
    667 		ess_write_mix_reg(sc, 0x68, reg1);
    668 		ess_write_mix_reg(sc, 0x69, reg2);
    669 	}
    670 
    671 	return 0;
    672 }
    673 
    674 
    675 /*
    676  * Probe / attach routines.
    677  */
    678 
    679 int
    680 ess_setup_sc(sc, ia, doinit)
    681 	struct ess_softc *sc;
    682 	struct isa_attach_args *ia;
    683 	int doinit;
    684 {
    685 	/*
    686 	 * Map the device-specific address space. If the mapping
    687 	 * fails, then we can't talk to the device.
    688 	 */
    689 	if (bus_space_map(sc->sc_iot, sc->sc_iobase,
    690 			  ia->ia_iosize, 0, &sc->sc_ioh)) {
    691 		DPRINTF(("ess: can't map I/O space for device\n"));
    692 		return (1);
    693 	}
    694 
    695 	/*
    696 	 * Copy the appropriate ISA attach arguments to the ess softc
    697 	 * structure.
    698 	 */
    699 	sc->sc_iot = ia->ia_iot;
    700 	sc->sc_iobase = ia->ia_iobase;
    701 	/* REVISIT: how do we properly get IRQ/DRQ for record channel */
    702 	sc->sc_in.irq = 9;
    703 	sc->sc_in.drq = 0;
    704 	sc->sc_in.mode = ESS_DMA_SIZE(sc->sc_in.drq);
    705 	sc->sc_out.irq = ia->ia_irq;
    706 	sc->sc_out.drq = ia->ia_drq;
    707 	sc->sc_out.mode = ESS_DMA_SIZE(sc->sc_out.drq);
    708 	sc->sc_ic = ia->ia_ic;
    709 
    710 	/* Configure the ESS chip for the desired audio base address. */
    711 	if (doinit && ess_config_addr(sc))
    712 		return (1);
    713 
    714 	/* Reset the chip. */
    715 	if (ess_reset(sc) < 0) {
    716 		DPRINTF(("ess_config_addr: couldn't reset chip\n"));
    717 		return (1);
    718 	}
    719 
    720 	/* Identify the ESS chip, and check that it is supported. */
    721 	if (ess_identify(sc)) {
    722 		DPRINTF(("ess_setup_sc: couldn't identify\n"));
    723 		return (1);
    724 	}
    725 
    726 	return (0);
    727 }
    728 
    729 /*
    730  * Probe for the ESS hardware.
    731  */
    732 int
    733 ess_probe(parent, cf, aux)
    734 	struct device *parent;
    735 	struct cfdata *cf;
    736 	void *aux;
    737 {
    738 	struct ess_softc tempsc;
    739 	struct ess_softc *sc = &tempsc;
    740 	struct isa_attach_args *ia = aux;
    741 	int r = 0;
    742 
    743 	if (!ESS_BASE_VALID(ia->ia_iobase)) {
    744 		printf("ess: configured iobase 0x%x invalid\n", ia->ia_iobase);
    745 		return (0);
    746 	}
    747 
    748 	if (ess_setup_sc(sc, ia, 1))
    749 		goto ret0;
    750 
    751 	if (sc->sc_model == ESS_UNSUPPORTED) {
    752 		DPRINTF(("ess: Unsupported model\n"));
    753 		goto ret0;
    754 	}
    755 
    756 	/* Check that requested DMA channels are valid and different. */
    757 	if (!ESS_DRQ1_VALID(sc->sc_in.drq, sc->sc_model)) {
    758 		printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
    759 		goto ret0;
    760 	}
    761 	if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
    762 		printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
    763 		goto ret0;
    764 	}
    765 	if (sc->sc_in.drq == sc->sc_out.drq) {
    766 		printf("ess: play and record dma chan both %d\n",
    767 		       sc->sc_in.drq);
    768 		goto ret0;
    769 	}
    770 
    771 	/* Check that requested IRQ lines are valid and different. */
    772 	if (!ESS_IRQ1_VALID(sc->sc_in.irq, sc->sc_model)) {
    773 		printf("ess: record irq %d invalid\n", sc->sc_in.irq);
    774 		goto ret0;
    775 	}
    776 	if (!ESS_IRQ2_VALID(sc->sc_out.irq, sc->sc_model)) {
    777 		printf("ess: play irq %d invalid\n", sc->sc_out.irq);
    778 		goto ret0;
    779 	}
    780 	if (sc->sc_in.irq == sc->sc_out.irq) {
    781 		printf("ess: play and record irq both %d\n",
    782 		       sc->sc_in.irq);
    783 		goto ret0;
    784 	}
    785 
    786 	/* Check that the DRQs are free. */
    787 	if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
    788 	    !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
    789 		goto ret0;
    790 	/* XXX should we check IRQs as well? */
    791 
    792 	r = 1;
    793 
    794  ret0:
    795 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, ia->ia_iosize);
    796 
    797 	return (r);
    798 }
    799 
    800 
    801 /*
    802  * Attach hardware to driver, attach hardware driver to audio
    803  * pseudo-device driver .
    804  */
    805 void
    806 ess_attach(parent, self, aux)
    807 	struct device *parent;
    808 	struct device *self;
    809 	void *aux;
    810 {
    811 	struct ess_softc *sc = (struct ess_softc *)self;
    812 	struct isa_attach_args *ia = (struct isa_attach_args *)aux;
    813 	struct audio_params pparams, rparams;
    814         int i;
    815         u_int v;
    816 
    817 	if (ess_setup_sc(sc, ia, 0)) {
    818 		printf("%s: setup failed\n", sc->sc_dev.dv_xname);
    819 		return;
    820 	}
    821 
    822 	/*
    823 	 * Establish interrupt handlers for Audio 1 (record) and
    824 	 * Audio 2 (playback).  (This must be done before configuring
    825 	 * the chip for interrupts, otherwise we might get a stray
    826 	 * interrupt.
    827 	 */
    828 	sc->sc_out.ih = isa_intr_establish(ia->ia_ic, sc->sc_out.irq,
    829 					   IST_LEVEL, IPL_AUDIO,
    830 					   ess_intr_output, sc);
    831 	sc->sc_in.ih = isa_intr_establish(ia->ia_ic, sc->sc_in.irq,
    832 					  IST_LEVEL, IPL_AUDIO,
    833 					  ess_intr_input, sc);
    834 
    835 	/* Create our DMA maps. */
    836 	if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
    837 			      MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
    838 		printf("%s: can't create map for drq %d\n",
    839 		       sc->sc_dev.dv_xname, sc->sc_in.drq);
    840 		return;
    841 	}
    842 	if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
    843 			      MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
    844 		printf("%s: can't create map for drq %d\n",
    845 		       sc->sc_dev.dv_xname, sc->sc_out.drq);
    846 		return;
    847 	}
    848 
    849 	printf(" ESS Technology ES%s [version 0x%04x]\n",
    850 	       essmodel[sc->sc_model], sc->sc_version);
    851 
    852 	/*
    853 	 * Set record and play parameters to default values defined in
    854 	 * generic audio driver.
    855 	 */
    856 	pparams = audio_default;
    857 	rparams = audio_default;
    858         ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
    859 
    860 	/* Do a hardware reset on the mixer. */
    861 	ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
    862 
    863 	/*
    864 	 * Set volume of Audio 1 to zero and disable Audio 1 DAC input
    865 	 * to playback mixer, since playback is always through Audio 2.
    866 	 */
    867 	ess_write_mix_reg(sc, 0x14, 0);
    868 	ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
    869 
    870 	/*
    871 	 * Set hardware record source to use output of the record
    872 	 * mixer. We do the selection of record source in software by
    873 	 * setting the gain of the unused sources to zero. (See
    874 	 * ess_set_in_ports.)
    875 	 */
    876 	ess_set_mreg_bits(sc, 0x1c, 0x07);
    877 	ess_clear_mreg_bits(sc, 0x7a, 0x10);
    878 	ess_set_mreg_bits(sc, 0x7a, 0x08);
    879 
    880 	/*
    881 	 * Set gain on each mixer device to a sensible value.
    882 	 * Devices not normally used are turned off, and other devices
    883 	 * are set to 75% volume.
    884 	 */
    885 	for (i = 0; i < ESS_NDEVS; i++) {
    886 		switch(i) {
    887 		case ESS_MIC_PLAY_VOL:
    888 		case ESS_LINE_PLAY_VOL:
    889 		case ESS_CD_PLAY_VOL:
    890 		case ESS_AUXB_PLAY_VOL:
    891 		case ESS_DAC_REC_VOL:
    892 		case ESS_LINE_REC_VOL:
    893 		case ESS_SYNTH_REC_VOL:
    894 		case ESS_CD_REC_VOL:
    895 		case ESS_AUXB_REC_VOL:
    896 			v = 0;
    897 			break;
    898 		default:
    899 			v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4);
    900 			break;
    901 		}
    902 		sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
    903 		ess_set_gain(sc, i, 1);
    904 	}
    905 
    906 	/* Disable the speaker until the device is opened.  */
    907 	ess_speaker_off(sc);
    908 	sc->spkr_state = SPKR_OFF;
    909 
    910 	sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
    911 	sprintf(ess_device.version, "0x%04x", sc->sc_version);
    912 
    913 	audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev);
    914 }
    915 
    916 /*
    917  * Various routines to interface to higher level audio driver
    918  */
    919 
    920 int
    921 ess_open(addr, flags)
    922 	void *addr;
    923 	int flags;
    924 {
    925 	struct ess_softc *sc = addr;
    926 
    927         DPRINTF(("ess_open: sc=%p\n", sc));
    928 
    929 	if (sc->sc_open != 0 || ess_reset(sc) != 0)
    930 		return ENXIO;
    931 
    932 	/*
    933 	 * Configure the ESS chip for the desired IRQ and DMA channel.
    934 	 * XXX
    935 	 */
    936 	ess_config_intr(sc);
    937 
    938 	sc->sc_open = 1;
    939 
    940 	DPRINTF(("ess_open: opened\n"));
    941 
    942 	return (0);
    943 }
    944 
    945 void
    946 ess_close(addr)
    947 	void *addr;
    948 {
    949 	struct ess_softc *sc = addr;
    950 
    951         DPRINTF(("ess_close: sc=%p\n", sc));
    952 
    953 	sc->sc_open = 0;
    954 	ess_speaker_off(sc);
    955 	sc->spkr_state = SPKR_OFF;
    956 	sc->sc_in.intr = 0;
    957 	sc->sc_out.intr = 0;
    958 	ess_halt_output(sc);
    959 	ess_halt_input(sc);
    960 
    961 	DPRINTF(("ess_close: closed\n"));
    962 }
    963 
    964 int
    965 ess_getdev(addr, retp)
    966 	void *addr;
    967 	struct audio_device *retp;
    968 {
    969 	*retp = ess_device;
    970 	return (0);
    971 }
    972 
    973 int
    974 ess_query_encoding(addr, fp)
    975 	void *addr;
    976 	struct audio_encoding *fp;
    977 {
    978 	/*struct ess_softc *sc = addr;*/
    979 
    980 	switch (fp->index) {
    981 	case 0:
    982 		strcpy(fp->name, AudioEulinear);
    983 		fp->encoding = AUDIO_ENCODING_ULINEAR;
    984 		fp->precision = 8;
    985 		fp->flags = 0;
    986 		return (0);
    987 	case 1:
    988 		strcpy(fp->name, AudioEmulaw);
    989 		fp->encoding = AUDIO_ENCODING_ULAW;
    990 		fp->precision = 8;
    991 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    992 		return (0);
    993 	case 2:
    994 		strcpy(fp->name, AudioEalaw);
    995 		fp->encoding = AUDIO_ENCODING_ULAW;
    996 		fp->precision = 8;
    997 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
    998 		return (0);
    999 	case 3:
   1000 		strcpy(fp->name, AudioEulinear);
   1001 		fp->encoding = AUDIO_ENCODING_ULINEAR;
   1002 		fp->precision = 8;
   1003 		fp->flags = 0;
   1004 		return (0);
   1005         case 4:
   1006 		strcpy(fp->name, AudioEslinear_le);
   1007 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
   1008 		fp->precision = 16;
   1009 		fp->flags = 0;
   1010 		return (0);
   1011 	case 5:
   1012 		strcpy(fp->name, AudioEulinear_le);
   1013 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
   1014 		fp->precision = 16;
   1015 		fp->flags = 0;
   1016 		return (0);
   1017 	case 6:
   1018 		strcpy(fp->name, AudioEslinear_be);
   1019 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
   1020 		fp->precision = 16;
   1021 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
   1022 		return (0);
   1023 	case 7:
   1024 		strcpy(fp->name, AudioEulinear_be);
   1025 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
   1026 		fp->precision = 16;
   1027 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
   1028 		return (0);
   1029 	default:
   1030 		return EINVAL;
   1031 	}
   1032 	return (0);
   1033 }
   1034 
   1035 int
   1036 ess_set_params(addr, setmode, usemode, p, q)
   1037 	void *addr;
   1038 	int setmode;
   1039 	int usemode;
   1040 	struct audio_params *p;
   1041 	struct audio_params *q;
   1042 {
   1043 	struct ess_softc *sc = addr;
   1044 	void (*swcode) __P((void *, u_char *buf, int cnt));
   1045 	int mode = setmode; /* XXX */
   1046 
   1047 	/* Set first record info, then play info */
   1048 	for(mode = AUMODE_RECORD; mode != -1;
   1049 	    mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
   1050 		if ((setmode & mode) == 0)
   1051 			continue;
   1052 
   1053 		switch (mode) {
   1054 		case AUMODE_PLAY:
   1055 			if (ess_set_out_sr(sc, p->sample_rate) != 0 ||
   1056 			    ess_set_out_precision(sc, p->precision) != 0 ||
   1057 			    ess_set_out_channels(sc, p->channels) != 0)	{
   1058 				return EINVAL;
   1059 			}
   1060 			break;
   1061 
   1062 		case AUMODE_RECORD:
   1063 			if (ess_set_in_sr(sc, p->sample_rate) != 0 ||
   1064 			    ess_set_in_precision(sc, p->precision) != 0 ||
   1065 			    ess_set_in_channels(sc, p->channels) != 0) {
   1066 				return EINVAL;
   1067 			}
   1068 			break;
   1069 
   1070 		default:
   1071 			return EINVAL;
   1072 			break;
   1073 		}
   1074 
   1075 		swcode = 0;
   1076 
   1077 		switch (p->encoding) {
   1078 		case AUDIO_ENCODING_SLINEAR_BE:
   1079 			if (p->precision == 16)
   1080 				swcode = swap_bytes;
   1081 			/* fall into */
   1082 		case AUDIO_ENCODING_SLINEAR_LE:
   1083 			if (mode == AUMODE_PLAY)
   1084 				ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1085 						 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
   1086 			else
   1087 				ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
   1088 						 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
   1089 			break;
   1090 		case AUDIO_ENCODING_ULINEAR_BE:
   1091 			if (p->precision == 16)
   1092 				swcode = swap_bytes;
   1093 			/* fall into */
   1094 		case AUDIO_ENCODING_ULINEAR_LE:
   1095 			if (mode == AUMODE_PLAY)
   1096 				ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1097 						 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
   1098 			else
   1099 				ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
   1100 						 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
   1101 			break;
   1102 		case AUDIO_ENCODING_ULAW:
   1103 			swcode = mode == AUMODE_PLAY ?
   1104 				mulaw_to_ulinear8 : ulinear8_to_mulaw;
   1105 			if (mode == AUMODE_PLAY)
   1106 				ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1107 						 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
   1108 			else
   1109 				ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
   1110 						 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
   1111 			break;
   1112 		case AUDIO_ENCODING_ALAW:
   1113 			swcode = mode == AUMODE_PLAY ?
   1114 				alaw_to_ulinear8 : ulinear8_to_alaw;
   1115 			if (mode == AUMODE_PLAY)
   1116 				ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1117 						 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
   1118 			else
   1119 				ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
   1120 						 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
   1121 			break;
   1122 		default:
   1123 			return EINVAL;
   1124 		}
   1125 		p->sw_code = swcode;
   1126 	}
   1127 
   1128 	sc->sc_in.active = 0;
   1129 	sc->sc_out.active = 0;
   1130 
   1131 	return (0);
   1132 }
   1133 int
   1134 ess_set_in_sr(addr, sr)
   1135 	void *addr;
   1136 	u_long sr;
   1137 {
   1138 	struct ess_softc *sc = addr;
   1139 
   1140 	if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
   1141 		return (EINVAL);
   1142 	/*
   1143 	 * Program the sample rate and filter clock for the record
   1144 	 * channel (Audio 1).
   1145 	 */
   1146 	ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(sr));
   1147 	ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(sr));
   1148 
   1149 	return (0);
   1150 }
   1151 
   1152 int
   1153 ess_set_out_sr(addr, sr)
   1154 	void *addr;
   1155 	u_long sr;
   1156 {
   1157 	struct ess_softc *sc = addr;
   1158 
   1159 	if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
   1160 		return (EINVAL);
   1161 	/*
   1162 	 * Program the sample rate and filter clock for the playback
   1163 	 * channel (Audio 2).
   1164 	 */
   1165 	ess_write_mix_reg(sc, 0x70, ess_srtotc(sr));
   1166 	ess_write_mix_reg(sc, 0x72, ess_srtofc(sr));
   1167 
   1168 	return (0);
   1169 }
   1170 
   1171 int
   1172 ess_set_in_precision(addr, precision)
   1173 	void *addr;
   1174 	u_int precision;
   1175 {
   1176 	struct ess_softc *sc = addr;
   1177 	int error = 0;
   1178 
   1179 	/*
   1180 	 * REVISIT: Should we set DMA transfer type to 2-byte or
   1181 	 *          4-byte demand? This would probably better be done
   1182 	 *          when configuring the DMA channel. See xreg 0xB9.
   1183 	 */
   1184 	switch (precision) {
   1185 	case 8:
   1186 		ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
   1187 				    ESS_AUDIO1_CTRL1_FIFO_SIZE);
   1188 		break;
   1189 
   1190 	case 16:
   1191 		ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
   1192 				  ESS_AUDIO1_CTRL1_FIFO_SIZE);
   1193 		break;
   1194 
   1195 	default:
   1196 		error = EINVAL;
   1197 		break;
   1198 	}
   1199 	return error;
   1200 }
   1201 
   1202 int
   1203 ess_set_out_precision(addr, precision)
   1204 	void *addr;
   1205 	u_int precision;
   1206 {
   1207 	struct ess_softc *sc = addr;
   1208 	int error = 0;
   1209 	switch (precision) {
   1210 	case 8:
   1211 		ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1212 				    ESS_AUDIO2_CTRL2_FIFO_SIZE);
   1213 		break;
   1214 
   1215 	case 16:
   1216 		ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1217 				  ESS_AUDIO2_CTRL2_FIFO_SIZE);
   1218 		break;
   1219 
   1220 	default:
   1221 		error = EINVAL;
   1222 		break;
   1223 	}
   1224 
   1225 	/*
   1226 	 * REVISIT: This actually sets transfer size to 16
   1227 	 *          bits. Should this really be hard-coded? This would
   1228 	 *          probably better be done when configuring the DMA
   1229 	 *          channel.
   1230 	 */
   1231 	ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
   1232 			  ESS_AUDIO2_CTRL1_XFER_SIZE);
   1233 
   1234 #if 0
   1235 	/*
   1236 	 * REVISIT: Should we set DMA transfer type to 2-byte,
   1237 	 *          4-byte, or 8-byte demand? (Following does 8-byte.)
   1238 	 *          This would probably better be done when
   1239 	 *          configuring the DMA channel.
   1240 	 */
   1241 	ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
   1242 			  0xc0);
   1243 #endif
   1244 	return error;
   1245 }
   1246 
   1247 int
   1248 ess_set_in_channels(addr, channels)
   1249 	void *addr;
   1250 	int channels;
   1251 {
   1252 	struct ess_softc *sc = addr;
   1253 	int error = 0;
   1254 
   1255 	switch(channels) {
   1256 	case 1:
   1257 		ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
   1258 				  ESS_AUDIO_CTRL_MONO);
   1259 		ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
   1260 				    ESS_AUDIO_CTRL_STEREO);
   1261 		break;
   1262 
   1263 	case 2:
   1264 		ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
   1265 				  ESS_AUDIO_CTRL_STEREO);
   1266 		ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
   1267 				    ESS_AUDIO_CTRL_MONO);
   1268 		break;
   1269 
   1270 	default:
   1271 		error = EINVAL;
   1272 		break;
   1273 	}
   1274 
   1275 	sc->sc_in.active = 0;
   1276 	sc->sc_in.channels = channels;
   1277 
   1278 	return error;
   1279 }
   1280 
   1281 int
   1282 ess_set_out_channels(addr, channels)
   1283 	void *addr;
   1284 	int channels;
   1285 {
   1286 	struct ess_softc *sc = addr;
   1287 	int error = 0;
   1288 
   1289 	switch(channels) {
   1290 	case 1:
   1291 		ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1292 				    ESS_AUDIO2_CTRL2_CHANNELS);
   1293 		break;
   1294 
   1295 	case 2:
   1296 		ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1297 				  ESS_AUDIO2_CTRL2_CHANNELS);
   1298 		break;
   1299 
   1300 	default:
   1301 		error = EINVAL;
   1302 		break;
   1303 	}
   1304 
   1305 	sc->sc_out.active = 0;
   1306 	sc->sc_out.channels = channels;
   1307 
   1308 	return error;
   1309 }
   1310 
   1311 int
   1312 ess_dma_output(addr, p, cc, intr, arg)
   1313 	void *addr;
   1314 	void *p;
   1315 	int cc;
   1316 	void (*intr) __P((void *));
   1317 	void *arg;
   1318 {
   1319 	struct ess_softc *sc = addr;
   1320 
   1321 #ifdef AUDIO_DEBUG
   1322 	if (essdebug > 1)
   1323 		printf("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg);
   1324 #endif
   1325 #ifdef DIAGNOSTIC
   1326 	if (sc->sc_out.channels == 2 && (cc & 1)) {
   1327 		DPRINTF(("stereo playback odd bytes (%d)\n", cc));
   1328 		return EIO;
   1329 	}
   1330 #endif
   1331 
   1332 	isa_dmastart(sc->sc_ic, sc->sc_out.drq, p, cc,
   1333 		     NULL, DMAMODE_WRITE, BUS_DMA_NOWAIT);
   1334 #if 0
   1335 XXXXX
   1336 	isa_dmastart(DMAMODE_WRITE, p, cc, sc->sc_out.drq);
   1337 #endif
   1338 	sc->sc_out.active = 1;
   1339 	sc->sc_out.intr = intr;
   1340 	sc->sc_out.arg = arg;
   1341 	sc->sc_out.dmaflags = DMAMODE_WRITE;
   1342 	sc->sc_out.dmaaddr = p;
   1343 
   1344 	if (sc->sc_out.dmacnt != cc) {
   1345 		sc->sc_out.dmacnt = cc;
   1346 
   1347 		/*
   1348 		 * If doing 16-bit DMA transfers, then the number of
   1349 		 * transfers required is half the number of bytes to
   1350 		 * be transferred.
   1351 		 */
   1352 		if (sc->sc_out.mode == ESS_MODE_16BIT)
   1353 			cc >>= 1;
   1354 
   1355 		/*
   1356 		 * Program transfer count registers with 2's
   1357 		 * complement of count.
   1358 		 */
   1359 		cc = -cc;
   1360 		ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc);
   1361 		ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8);
   1362 	}
   1363 
   1364 /* REVISIT: is it really necessary to clear then set these bits to get
   1365 the next lot of DMA to happen?  Would it be sufficient to set the bits
   1366 the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
   1367 */
   1368 	ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
   1369 			  ESS_AUDIO2_CTRL1_DAC_ENABLE);/* REVISIT: once only */
   1370 	ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
   1371 			  ESS_AUDIO2_CTRL1_FIFO_ENABLE);
   1372 #if 1
   1373 /* REVISIT: seems like the 888 and 1888 have an interlock that
   1374  * prevents audio2 channel from working if audio1 channel is not
   1375  * connected to the FIFO.
   1376  */
   1377 	ess_set_xreg_bits(sc, 0xB7, 0x80);
   1378 #endif
   1379 	return (0);
   1380 
   1381 }
   1382 
   1383 int
   1384 ess_dma_input(addr, p, cc, intr, arg)
   1385 	void *addr;
   1386 	void *p;
   1387 	int cc;
   1388 	void (*intr) __P((void *));
   1389 	void *arg;
   1390 {
   1391 	struct ess_softc *sc = addr;
   1392 
   1393 #ifdef AUDIO_DEBUG
   1394 	if (essdebug > 1)
   1395 		printf("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg);
   1396 #endif
   1397 	/* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
   1398 	ess_set_xreg_bits(sc, 0xB7, 0x80);
   1399 
   1400 #ifdef DIAGNOSTIC
   1401 	if (sc->sc_in.channels == 2 && (cc & 1)) {
   1402 		DPRINTF(("stereo record odd bytes (%d)\n", cc));
   1403 		return EIO;
   1404 	}
   1405 #endif
   1406 
   1407 	isa_dmastart(sc->sc_ic, sc->sc_in.drq, p,
   1408 		     cc, NULL, DMAMODE_READ, BUS_DMA_NOWAIT);
   1409 	sc->sc_in.active = 1;
   1410 	sc->sc_in.intr = intr;
   1411 	sc->sc_in.arg = arg;
   1412 	sc->sc_in.dmaflags = DMAMODE_READ;
   1413 	sc->sc_in.dmaaddr = p;
   1414 
   1415 	if (sc->sc_in.dmacnt != cc)
   1416 	{
   1417 		sc->sc_in.dmacnt = cc;
   1418 
   1419 		/*
   1420 		 * If doing 16-bit DMA transfers, then the number of
   1421 		 * transfers required is half the number of bytes to
   1422 		 * be transferred.
   1423 		 */
   1424 		if (sc->sc_in.mode == ESS_MODE_16BIT)
   1425 		{
   1426 			cc >>= 1;
   1427 		}
   1428 
   1429 		/*
   1430 		 * Program transfer count registers with 2's
   1431 		 * complement of count.
   1432 		 */
   1433 		cc = -cc;
   1434 		ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc);
   1435 		ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8);
   1436 	}
   1437 
   1438 /* REVISIT: is it really necessary to clear then set these bits to get
   1439 the next lot of DMA to happen?  Would it be sufficient to set the bits
   1440 the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
   1441 */
   1442 	ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
   1443 			  ESS_AUDIO1_CTRL2_DMA_READ |  /* REVISIT: once only */
   1444 			  ESS_AUDIO1_CTRL2_ADC_ENABLE |/* REVISIT: once only */
   1445 			  ESS_AUDIO1_CTRL2_FIFO_ENABLE);
   1446 
   1447 	return (0);
   1448 
   1449 }
   1450 
   1451 int
   1452 ess_halt_output(addr)
   1453 	void *addr;
   1454 {
   1455 	struct ess_softc *sc = addr;
   1456 
   1457 	DPRINTF(("ess_halt_output: sc=%p\n", sc));
   1458 
   1459 	ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
   1460 			    ESS_AUDIO2_CTRL2_DMA_ENABLE);
   1461 	return (0);
   1462 }
   1463 
   1464 int
   1465 ess_halt_input(addr)
   1466 	void *addr;
   1467 {
   1468 	struct ess_softc *sc = addr;
   1469 
   1470 	DPRINTF(("ess_halt_input: sc=%p\n", sc));
   1471 
   1472 	ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
   1473 			    ESS_AUDIO1_CTRL2_FIFO_ENABLE);
   1474 	return (0);
   1475 }
   1476 
   1477 int
   1478 ess_speaker_ctl(addr, newstate)
   1479 	void *addr;
   1480 	int newstate;
   1481 {
   1482 	struct ess_softc *sc = addr;
   1483 
   1484 	if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
   1485 		ess_speaker_on(sc);
   1486 		sc->spkr_state = SPKR_ON;
   1487 	}
   1488 	if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
   1489 		ess_speaker_off(sc);
   1490 		sc->spkr_state = SPKR_OFF;
   1491 	}
   1492 	return (0);
   1493 }
   1494 
   1495 int
   1496 ess_intr_output(arg)
   1497 	void *arg;
   1498 {
   1499 	struct ess_softc *sc = arg;
   1500 
   1501 #ifdef AUDIO_DEBUG
   1502 	if (essdebug > 1)
   1503 		printf("ess_intr_output: intr=%p\n", sc->sc_out.intr);
   1504 #endif
   1505 
   1506 	/* clear interrupt on Audio channel 2*/
   1507 	ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 0x80);
   1508 
   1509 	sc->sc_out.nintr++;
   1510 
   1511 	if (sc->sc_out.intr != 0) {
   1512 		isa_dmadone(sc->sc_ic, sc->sc_out.drq);
   1513 		(*sc->sc_out.intr)(sc->sc_out.arg);
   1514 	} else
   1515 		return 1;	/* revisit: was 0 */
   1516 
   1517 	return 1;
   1518 }
   1519 
   1520 int
   1521 ess_intr_input(arg)
   1522 	void *arg;
   1523 {
   1524 	struct ess_softc *sc = arg;
   1525 	u_char x;
   1526 
   1527 #ifdef AUDIO_DEBUG
   1528 	if (essdebug > 1)
   1529 		printf("ess_intr_input: intr=%p\n", sc->sc_in.intr);
   1530 #endif
   1531 
   1532 	/*
   1533 	 * Disable DMA for Audio 1; it will be enabled again the next
   1534 	 * time ess_dma_input is called. Note that for single DMAs,
   1535 	 * this bit must be toggled for each DMA. For auto-initialize
   1536 	 * DMAs, this bit should be left high.
   1537 	 */
   1538 	ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
   1539 			    ESS_AUDIO1_CTRL2_FIFO_ENABLE);
   1540 
   1541 	/* clear interrupt on Audio channel 1*/
   1542 	x = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
   1543 
   1544 	sc->sc_in.nintr++;
   1545 
   1546 	if (sc->sc_in.intr != 0) {
   1547 		isa_dmadone(sc->sc_ic, sc->sc_in.drq);
   1548 		(*sc->sc_in.intr)(sc->sc_in.arg);
   1549 	} else
   1550 		return (1);
   1551 
   1552 	return (1);
   1553 }
   1554 
   1555 int
   1556 ess_round_blocksize(addr, blk)
   1557 	void *addr;
   1558 	int blk;
   1559 {
   1560 	return (blk & -4);
   1561 }
   1562 
   1563 int
   1564 ess_set_port(addr, cp)
   1565 	void *addr;
   1566 	mixer_ctrl_t *cp;
   1567 {
   1568 	struct ess_softc *sc = addr;
   1569 	int lgain, rgain;
   1570 
   1571 	DPRINTF(("ess_set_port: port=%d num_channels=%d\n",
   1572 		 cp->dev, cp->un.value.num_channels));
   1573 
   1574 	switch (cp->dev) {
   1575 	/*
   1576 	 * The following mixer ports are all stereo. If we get a
   1577 	 * single-channel gain value passed in, then we duplicate it
   1578 	 * to both left and right channels.
   1579 	 */
   1580 	case ESS_MASTER_VOL:
   1581 	case ESS_DAC_PLAY_VOL:
   1582 	case ESS_MIC_PLAY_VOL:
   1583 	case ESS_LINE_PLAY_VOL:
   1584 	case ESS_SYNTH_PLAY_VOL:
   1585 	case ESS_CD_PLAY_VOL:
   1586 	case ESS_AUXB_PLAY_VOL:
   1587 	case ESS_DAC_REC_VOL:
   1588 	case ESS_MIC_REC_VOL:
   1589 	case ESS_LINE_REC_VOL:
   1590 	case ESS_SYNTH_REC_VOL:
   1591 	case ESS_CD_REC_VOL:
   1592 	case ESS_AUXB_REC_VOL:
   1593 	case ESS_RECORD_VOL:
   1594 		if (cp->type != AUDIO_MIXER_VALUE)
   1595 			return EINVAL;
   1596 
   1597 		switch (cp->un.value.num_channels) {
   1598 		case 1:
   1599 			lgain = rgain = ESS_4BIT_GAIN(
   1600 			  cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
   1601 			break;
   1602 		case 2:
   1603 			lgain = ESS_4BIT_GAIN(
   1604 			  cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
   1605 			rgain = ESS_4BIT_GAIN(
   1606 			  cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
   1607 			break;
   1608 		default:
   1609 			return EINVAL;
   1610 		}
   1611 
   1612 		sc->gain[cp->dev][ESS_LEFT]  = lgain;
   1613 		sc->gain[cp->dev][ESS_RIGHT] = rgain;
   1614 
   1615 		ess_set_gain(sc, cp->dev, 1);
   1616 		break;
   1617 
   1618 
   1619 	/*
   1620 	 * The PC speaker port is mono. If we get a stereo gain value
   1621 	 * passed in, then we return EINVAL.
   1622 	 */
   1623 	case ESS_PCSPEAKER_VOL:
   1624 		if (cp->un.value.num_channels != 1)
   1625 			return EINVAL;
   1626 
   1627 		sc->gain[cp->dev][ESS_LEFT]  = sc->gain[cp->dev][ESS_RIGHT] =
   1628 		  ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
   1629 		ess_set_gain(sc, cp->dev, 1);
   1630 		break;
   1631 
   1632 
   1633 	case ESS_MIC_PREAMP:
   1634 		if (cp->type != AUDIO_MIXER_ENUM)
   1635 			return EINVAL;
   1636 
   1637 		if (cp->un.ord)
   1638 			/* Enable microphone preamp */
   1639 			ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
   1640 					  ESS_PREAMP_CTRL_ENABLE);
   1641 		else
   1642 			/* Disable microphone preamp */
   1643 			ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
   1644 					  ESS_PREAMP_CTRL_ENABLE);
   1645 		break;
   1646 
   1647 	case ESS_RECORD_SOURCE:
   1648 		if (cp->type == AUDIO_MIXER_SET)
   1649 			return ess_set_in_ports(sc, cp->un.mask);
   1650 		else
   1651 			return EINVAL;
   1652 		break;
   1653 
   1654 	case ESS_RECORD_MONITOR:
   1655 		if (cp->type != AUDIO_MIXER_ENUM)
   1656 			return EINVAL;
   1657 
   1658 		if (cp->un.ord)
   1659 			/* Enable monitor */
   1660 			ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
   1661 					  ESS_AUDIO_CTRL_MONITOR);
   1662 		else
   1663 			/* Disable monitor */
   1664 			ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
   1665 					    ESS_AUDIO_CTRL_MONITOR);
   1666 		break;
   1667 
   1668 	default:
   1669 		return EINVAL;
   1670 	}
   1671 
   1672 	return (0);
   1673 }
   1674 
   1675 int
   1676 ess_get_port(addr, cp)
   1677 	void *addr;
   1678 	mixer_ctrl_t *cp;
   1679 {
   1680 	struct ess_softc *sc = addr;
   1681 
   1682 	DPRINTF(("ess_get_port: port=%d\n", cp->dev));
   1683 
   1684 	switch (cp->dev) {
   1685 	case ESS_DAC_PLAY_VOL:
   1686 	case ESS_MIC_PLAY_VOL:
   1687 	case ESS_LINE_PLAY_VOL:
   1688 	case ESS_SYNTH_PLAY_VOL:
   1689 	case ESS_CD_PLAY_VOL:
   1690 	case ESS_AUXB_PLAY_VOL:
   1691 	case ESS_MASTER_VOL:
   1692 	case ESS_PCSPEAKER_VOL:
   1693 	case ESS_DAC_REC_VOL:
   1694 	case ESS_MIC_REC_VOL:
   1695 	case ESS_LINE_REC_VOL:
   1696 	case ESS_SYNTH_REC_VOL:
   1697 	case ESS_CD_REC_VOL:
   1698 	case ESS_AUXB_REC_VOL:
   1699 	case ESS_RECORD_VOL:
   1700 		if (cp->dev == ESS_PCSPEAKER_VOL &&
   1701 		    cp->un.value.num_channels != 1)
   1702 			return EINVAL;
   1703 
   1704 		switch (cp->un.value.num_channels) {
   1705 		case 1:
   1706 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
   1707 				sc->gain[cp->dev][ESS_LEFT];
   1708 			break;
   1709 		case 2:
   1710 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
   1711 				sc->gain[cp->dev][ESS_LEFT];
   1712 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
   1713 				sc->gain[cp->dev][ESS_RIGHT];
   1714 			break;
   1715 		default:
   1716 			return EINVAL;
   1717 		}
   1718 		break;
   1719 
   1720 	case ESS_MIC_PREAMP:
   1721 		cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
   1722 			      ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
   1723 		break;
   1724 
   1725 	case ESS_RECORD_SOURCE:
   1726 		cp->un.mask = sc->in_mask;
   1727 		break;
   1728 
   1729 	case ESS_RECORD_MONITOR:
   1730 		cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
   1731 			      ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
   1732 		break;
   1733 
   1734 	default:
   1735 		return EINVAL;
   1736 	}
   1737 
   1738 	return (0);
   1739 }
   1740 
   1741 int
   1742 ess_query_devinfo(addr, dip)
   1743 	void *addr;
   1744 	mixer_devinfo_t *dip;
   1745 {
   1746 	struct ess_softc *sc = addr;
   1747 
   1748 	DPRINTF(("ess_query_devinfo: model=%d index=%d\n",
   1749 		 sc->sc_model, dip->index));
   1750 
   1751 	/*
   1752 	 * REVISIT: There are some slight differences between the
   1753 	 *          mixers on the different ESS chips, which can
   1754 	 *          be sorted out using the chip model rather than a
   1755 	 *          separate mixer model.
   1756 	 *          This is currently coded assuming an ES1887; we
   1757 	 *          need to work out which bits are not applicable to
   1758 	 *          the other models (1888 and 888).
   1759 	 */
   1760 	switch (dip->index) {
   1761 	case ESS_DAC_PLAY_VOL:
   1762 		dip->type = AUDIO_MIXER_VALUE;
   1763 		dip->mixer_class = ESS_INPUT_CLASS;
   1764 		dip->prev = AUDIO_MIXER_LAST;
   1765 		dip->next = AUDIO_MIXER_LAST;
   1766 		strcpy(dip->label.name, AudioNdac);
   1767 		dip->un.v.num_channels = 2;
   1768 		strcpy(dip->un.v.units.name, AudioNvolume);
   1769 		return (0);
   1770 
   1771 	case ESS_MIC_PLAY_VOL:
   1772 		dip->type = AUDIO_MIXER_VALUE;
   1773 		dip->mixer_class = ESS_INPUT_CLASS;
   1774 		dip->prev = AUDIO_MIXER_LAST;
   1775 		dip->next = AUDIO_MIXER_LAST;
   1776 		strcpy(dip->label.name, AudioNmicrophone);
   1777 		dip->un.v.num_channels = 2;
   1778 		strcpy(dip->un.v.units.name, AudioNvolume);
   1779 		return (0);
   1780 
   1781 	case ESS_LINE_PLAY_VOL:
   1782 		dip->type = AUDIO_MIXER_VALUE;
   1783 		dip->mixer_class = ESS_INPUT_CLASS;
   1784 		dip->prev = AUDIO_MIXER_LAST;
   1785 		dip->next = AUDIO_MIXER_LAST;
   1786 		strcpy(dip->label.name, AudioNline);
   1787 		dip->un.v.num_channels = 2;
   1788 		strcpy(dip->un.v.units.name, AudioNvolume);
   1789 		return (0);
   1790 
   1791 	case ESS_SYNTH_PLAY_VOL:
   1792 		dip->type = AUDIO_MIXER_VALUE;
   1793 		dip->mixer_class = ESS_INPUT_CLASS;
   1794 		dip->prev = AUDIO_MIXER_LAST;
   1795 		dip->next = AUDIO_MIXER_LAST;
   1796 		strcpy(dip->label.name, AudioNfmsynth);
   1797 		dip->un.v.num_channels = 2;
   1798 		strcpy(dip->un.v.units.name, AudioNvolume);
   1799 		return (0);
   1800 
   1801 	case ESS_CD_PLAY_VOL:
   1802 		dip->type = AUDIO_MIXER_VALUE;
   1803 		dip->mixer_class = ESS_INPUT_CLASS;
   1804 		dip->prev = AUDIO_MIXER_LAST;
   1805 		dip->next = AUDIO_MIXER_LAST;
   1806 		strcpy(dip->label.name, AudioNcd);
   1807 		dip->un.v.num_channels = 2;
   1808 		strcpy(dip->un.v.units.name, AudioNvolume);
   1809 		return (0);
   1810 
   1811 	case ESS_AUXB_PLAY_VOL:
   1812 		dip->type = AUDIO_MIXER_VALUE;
   1813 		dip->mixer_class = ESS_INPUT_CLASS;
   1814 		dip->prev = AUDIO_MIXER_LAST;
   1815 		dip->next = AUDIO_MIXER_LAST;
   1816 		strcpy(dip->label.name, "auxb");
   1817 		dip->un.v.num_channels = 2;
   1818 		strcpy(dip->un.v.units.name, AudioNvolume);
   1819 		return (0);
   1820 
   1821 	case ESS_INPUT_CLASS:
   1822 		dip->type = AUDIO_MIXER_CLASS;
   1823 		dip->mixer_class = ESS_INPUT_CLASS;
   1824 		dip->next = dip->prev = AUDIO_MIXER_LAST;
   1825 		strcpy(dip->label.name, AudioCinputs);
   1826 		return (0);
   1827 
   1828 
   1829 	case ESS_MASTER_VOL:
   1830 		dip->type = AUDIO_MIXER_VALUE;
   1831 		dip->mixer_class = ESS_OUTPUT_CLASS;
   1832 		dip->prev = dip->next = AUDIO_MIXER_LAST;
   1833 		strcpy(dip->label.name, AudioNmaster);
   1834 		dip->un.v.num_channels = 2;
   1835 		strcpy(dip->un.v.units.name, AudioNvolume);
   1836 		return (0);
   1837 
   1838 	case ESS_PCSPEAKER_VOL:
   1839 		dip->type = AUDIO_MIXER_VALUE;
   1840 		dip->mixer_class = ESS_OUTPUT_CLASS;
   1841 		dip->prev = AUDIO_MIXER_LAST;
   1842 		dip->next = AUDIO_MIXER_LAST;
   1843 		strcpy(dip->label.name, "pc_speaker");
   1844 		dip->un.v.num_channels = 1;
   1845 		strcpy(dip->un.v.units.name, AudioNvolume);
   1846 		return (0);
   1847 
   1848 	case ESS_OUTPUT_CLASS:
   1849 		dip->type = AUDIO_MIXER_CLASS;
   1850 		dip->mixer_class = ESS_OUTPUT_CLASS;
   1851 		dip->next = dip->prev = AUDIO_MIXER_LAST;
   1852 		strcpy(dip->label.name, AudioCoutputs);
   1853 		return (0);
   1854 
   1855 
   1856 	case ESS_DAC_REC_VOL:
   1857 		dip->type = AUDIO_MIXER_VALUE;
   1858 		dip->mixer_class = ESS_RECORD_CLASS;
   1859 		dip->prev = AUDIO_MIXER_LAST;
   1860 		dip->next = AUDIO_MIXER_LAST;
   1861 		strcpy(dip->label.name, AudioNdac);
   1862 		dip->un.v.num_channels = 2;
   1863 		strcpy(dip->un.v.units.name, AudioNvolume);
   1864 		return (0);
   1865 
   1866 	case ESS_MIC_REC_VOL:
   1867 		dip->type = AUDIO_MIXER_VALUE;
   1868 		dip->mixer_class = ESS_RECORD_CLASS;
   1869 		dip->prev = AUDIO_MIXER_LAST;
   1870 		dip->next = ESS_MIC_PREAMP;
   1871 		strcpy(dip->label.name, AudioNmicrophone);
   1872 		dip->un.v.num_channels = 2;
   1873 		strcpy(dip->un.v.units.name, AudioNvolume);
   1874 		return (0);
   1875 
   1876 	case ESS_LINE_REC_VOL:
   1877 		dip->type = AUDIO_MIXER_VALUE;
   1878 		dip->mixer_class = ESS_RECORD_CLASS;
   1879 		dip->prev = AUDIO_MIXER_LAST;
   1880 		dip->next = AUDIO_MIXER_LAST;
   1881 		strcpy(dip->label.name, AudioNline);
   1882 		dip->un.v.num_channels = 2;
   1883 		strcpy(dip->un.v.units.name, AudioNvolume);
   1884 		return (0);
   1885 
   1886 	case ESS_SYNTH_REC_VOL:
   1887 		dip->type = AUDIO_MIXER_VALUE;
   1888 		dip->mixer_class = ESS_RECORD_CLASS;
   1889 		dip->prev = AUDIO_MIXER_LAST;
   1890 		dip->next = AUDIO_MIXER_LAST;
   1891 		strcpy(dip->label.name, AudioNfmsynth);
   1892 		dip->un.v.num_channels = 2;
   1893 		strcpy(dip->un.v.units.name, AudioNvolume);
   1894 		return (0);
   1895 
   1896 	case ESS_CD_REC_VOL:
   1897 		dip->type = AUDIO_MIXER_VALUE;
   1898 		dip->mixer_class = ESS_RECORD_CLASS;
   1899 		dip->prev = AUDIO_MIXER_LAST;
   1900 		dip->next = AUDIO_MIXER_LAST;
   1901 		strcpy(dip->label.name, AudioNcd);
   1902 		dip->un.v.num_channels = 2;
   1903 		strcpy(dip->un.v.units.name, AudioNvolume);
   1904 		return (0);
   1905 
   1906 	case ESS_AUXB_REC_VOL:
   1907 		dip->type = AUDIO_MIXER_VALUE;
   1908 		dip->mixer_class = ESS_RECORD_CLASS;
   1909 		dip->prev = AUDIO_MIXER_LAST;
   1910 		dip->next = AUDIO_MIXER_LAST;
   1911 		strcpy(dip->label.name, "auxb");
   1912 		dip->un.v.num_channels = 2;
   1913 		strcpy(dip->un.v.units.name, AudioNvolume);
   1914 		return (0);
   1915 
   1916 	case ESS_MIC_PREAMP:
   1917 		dip->type = AUDIO_MIXER_ENUM;
   1918 		dip->mixer_class = ESS_RECORD_CLASS;
   1919 		dip->prev = ESS_MIC_REC_VOL;
   1920 		dip->next = AUDIO_MIXER_LAST;
   1921 		strcpy(dip->label.name, AudioNenhanced);
   1922 		dip->un.e.num_mem = 2;
   1923 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
   1924 		dip->un.e.member[0].ord = 0;
   1925 		strcpy(dip->un.e.member[1].label.name, AudioNon);
   1926 		dip->un.e.member[1].ord = 1;
   1927 		return (0);
   1928 
   1929 	case ESS_RECORD_VOL:
   1930 		dip->type = AUDIO_MIXER_VALUE;
   1931 		dip->mixer_class = ESS_RECORD_CLASS;
   1932 		dip->prev = AUDIO_MIXER_LAST;
   1933 		dip->next = AUDIO_MIXER_LAST;
   1934 		strcpy(dip->label.name, AudioNrecord);
   1935 		dip->un.v.num_channels = 2;
   1936 		strcpy(dip->un.v.units.name, AudioNvolume);
   1937 		return (0);
   1938 
   1939 	case ESS_RECORD_SOURCE:
   1940 		dip->mixer_class = ESS_RECORD_CLASS;
   1941 		dip->prev = dip->next = AUDIO_MIXER_LAST;
   1942 		strcpy(dip->label.name, AudioNsource);
   1943 		dip->type = AUDIO_MIXER_SET;
   1944 		dip->un.s.num_mem = 6;
   1945 		strcpy(dip->un.s.member[0].label.name, AudioNdac);
   1946 		dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
   1947 		strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
   1948 		dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
   1949 		strcpy(dip->un.s.member[2].label.name, AudioNline);
   1950 		dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
   1951 		strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
   1952 		dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
   1953 		strcpy(dip->un.s.member[4].label.name, AudioNcd);
   1954 		dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
   1955 		strcpy(dip->un.s.member[5].label.name, "auxb");
   1956 		dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
   1957 		return (0);
   1958 
   1959 	case ESS_RECORD_CLASS:
   1960 		dip->type = AUDIO_MIXER_CLASS;
   1961 		dip->mixer_class = ESS_RECORD_CLASS;
   1962 		dip->next = dip->prev = AUDIO_MIXER_LAST;
   1963 		strcpy(dip->label.name, AudioCrecord);
   1964 		return (0);
   1965 
   1966 
   1967 	case ESS_RECORD_MONITOR:
   1968 		dip->mixer_class = ESS_MONITOR_CLASS;
   1969 		dip->prev = dip->next = AUDIO_MIXER_LAST;
   1970 		strcpy(dip->label.name, AudioNmonitor);
   1971 		dip->type = AUDIO_MIXER_ENUM;
   1972 		dip->un.e.num_mem = 2;
   1973 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
   1974 		dip->un.e.member[0].ord = 0;
   1975 		strcpy(dip->un.e.member[1].label.name, AudioNon);
   1976 		dip->un.e.member[1].ord = 1;
   1977 		return (0);
   1978 
   1979 	case ESS_MONITOR_CLASS:
   1980 		dip->type = AUDIO_MIXER_CLASS;
   1981 		dip->mixer_class = ESS_MONITOR_CLASS;
   1982 		dip->next = dip->prev = AUDIO_MIXER_LAST;
   1983 		strcpy(dip->label.name, AudioCmonitor);
   1984 		return (0);
   1985 	}
   1986 
   1987 	return ENXIO;
   1988 }
   1989 
   1990 int
   1991 ess_get_props(addr)
   1992 	void *addr;
   1993 {
   1994 	/*struct ess_softc *sc = addr;*/
   1995 	return (0);
   1996 }
   1997 
   1998 /* ============================================
   1999  * Generic functions for ess, not used by audio h/w i/f
   2000  * =============================================
   2001  */
   2002 
   2003 /*
   2004  * Reset the chip.
   2005  * Return non-zero if the chip isn't detected.
   2006  */
   2007 int
   2008 ess_reset(sc)
   2009 	struct ess_softc *sc;
   2010 {
   2011 	/* REVISIT: currently just copied from sbdsp.c */
   2012 	bus_space_tag_t iot = sc->sc_iot;
   2013 	bus_space_handle_t ioh = sc->sc_ioh;
   2014 
   2015 	sc->sc_in.intr = 0;
   2016 	sc->sc_in.dmacnt = 0;
   2017 	if (sc->sc_in.active) {
   2018 		isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
   2019 		sc->sc_in.active = 0;
   2020 	}
   2021 
   2022 	sc->sc_out.intr = 0;
   2023 	sc->sc_out.dmacnt = 0;
   2024 	if (sc->sc_out.active) {
   2025 		isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
   2026 		sc->sc_out.active = 0;
   2027 	}
   2028 
   2029 	/*
   2030 	 * See SBK, section 11.3.
   2031 	 * We pulse a reset signal into the card.
   2032 	 * Gee, what a brilliant hardware design.
   2033 	 */
   2034 	/* REVISIT: need to properly document the use of 3 below */
   2035 	bus_space_write_1(iot, ioh, ESS_DSP_RESET, 3);
   2036 	delay(10000);
   2037 	bus_space_write_1(iot, ioh, ESS_DSP_RESET, 0);
   2038 	delay(30000);
   2039 	if (ess_rdsp(sc) != ESS_MAGIC)
   2040 		return -1;
   2041 
   2042 	/*
   2043 	 * Enable access to the ESS extension commands, which are
   2044 	 * disabled by each reset.
   2045 	 */
   2046 	ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
   2047 
   2048 	return (0);
   2049 }
   2050 
   2051 void
   2052 ess_set_gain(sc, port, on)
   2053 	struct ess_softc *sc;
   2054 	int port;
   2055 	int on;
   2056 {
   2057 	int gain, left, right;
   2058 	int mix;
   2059 	int src;
   2060 	int stereo;
   2061 
   2062 	/*
   2063 	 * Most gain controls are found in the mixer registers and
   2064 	 * are stereo. Any that are not, must set mix and stereo as
   2065 	 * required.
   2066 	 */
   2067 	mix = 1;
   2068 	stereo = 1;
   2069 
   2070 	switch (port) {
   2071 	case ESS_MASTER_VOL:
   2072 		src = 0x32;
   2073 		break;
   2074 	case ESS_DAC_PLAY_VOL:
   2075 		src = 0x7C;
   2076 		break;
   2077 	case ESS_MIC_PLAY_VOL:
   2078 		src = 0x1A;
   2079 		break;
   2080 	case ESS_LINE_PLAY_VOL:
   2081 		src = 0x3E;
   2082 		break;
   2083 	case ESS_SYNTH_PLAY_VOL:
   2084 		src = 0x36;
   2085 		break;
   2086 	case ESS_CD_PLAY_VOL:
   2087 		src = 0x38;
   2088 		break;
   2089 	case ESS_AUXB_PLAY_VOL:
   2090 		src = 0x3A;
   2091 		break;
   2092 	case ESS_PCSPEAKER_VOL:
   2093 		src = 0x3C;
   2094 		stereo = 0;
   2095 		break;
   2096 	case ESS_DAC_REC_VOL:
   2097 		src = 0x69;
   2098 		break;
   2099 	case ESS_MIC_REC_VOL:
   2100 		src = 0x68;
   2101 		break;
   2102 	case ESS_LINE_REC_VOL:
   2103 		src = 0x6E;
   2104 		break;
   2105 	case ESS_SYNTH_REC_VOL:
   2106 		src = 0x6B;
   2107 		break;
   2108 	case ESS_CD_REC_VOL:
   2109 		src = 0x6A;
   2110 		break;
   2111 	case ESS_AUXB_REC_VOL:
   2112 		src = 0x6C;
   2113 		break;
   2114 	case ESS_RECORD_VOL:
   2115 		src = 0xB4;
   2116 		mix = 0;
   2117 		break;
   2118 	default:
   2119 		return;
   2120 	}
   2121 
   2122 	if (on) {
   2123 		left = sc->gain[port][ESS_LEFT];
   2124 		right = sc->gain[port][ESS_RIGHT];
   2125 	} else {
   2126 		left = right = 0;
   2127 	}
   2128 
   2129 	if (stereo)
   2130 		gain = ESS_STEREO_GAIN(left, right);
   2131 	else
   2132 		gain = ESS_MONO_GAIN(left);
   2133 
   2134 	if (mix)
   2135 		ess_write_mix_reg(sc, src, gain);
   2136 	else
   2137 		ess_write_x_reg(sc, src, gain);
   2138 }
   2139 
   2140 int
   2141 ess_set_in_ports(sc, mask)
   2142 	struct ess_softc *sc;
   2143 	int mask;
   2144 {
   2145 	mixer_devinfo_t di;
   2146 	int i;
   2147 	int port;
   2148 	int tmp;
   2149 
   2150 	DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
   2151 
   2152 	/*
   2153 	 * Get the device info for the record source control,
   2154 	 * including the list of available sources.
   2155 	 */
   2156 	di.index = ESS_RECORD_SOURCE;
   2157 	if (ess_query_devinfo(sc, &di))
   2158 		return EINVAL;
   2159 
   2160 	/*
   2161 	 * Set or disable the record volume control for each of the
   2162 	 * possible sources.
   2163 	 */
   2164 	for (i = 0; i < di.un.s.num_mem; i++)
   2165 	{
   2166 		/*
   2167 		 * Calculate the source port number from its mask.
   2168 		 */
   2169 		tmp = di.un.s.member[i].mask >> 1;
   2170 		for (port = 0; tmp; port++) {
   2171 			tmp >>= 1;
   2172 		}
   2173 
   2174 		/*
   2175 		 * Set the source gain:
   2176 		 *	to the current value if source is enabled
   2177 		 *	to zero if source is disabled
   2178 		 */
   2179 		ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
   2180 	}
   2181 
   2182 	sc->in_mask = mask;
   2183 
   2184 	/*
   2185 	 * We have to fake a single port since the upper layer expects
   2186 	 * one only. We choose the lowest numbered port that is enabled.
   2187 	 */
   2188 	for(i = 0; i < ESS_NPORT; i++) {
   2189 		if (mask & (1 << i)) {
   2190 			sc->in_port = i;
   2191 			break;
   2192 		}
   2193 	}
   2194 
   2195 	return (0);
   2196 }
   2197 
   2198 void
   2199 ess_speaker_on(sc)
   2200 	struct ess_softc *sc;
   2201 {
   2202 	/* Disable mute on left- and right-master volume. */
   2203 	ess_clear_mreg_bits(sc, 0x60, 0x40);
   2204 	ess_clear_mreg_bits(sc, 0x62, 0x40);
   2205 }
   2206 
   2207 void
   2208 ess_speaker_off(sc)
   2209 	struct ess_softc *sc;
   2210 {
   2211 	/* Enable mute on left- and right-master volume. */
   2212 	ess_set_mreg_bits(sc, 0x60, 0x40);
   2213 	ess_set_mreg_bits(sc, 0x62, 0x40);
   2214 }
   2215 
   2216 /*
   2217  * Calculate the time constant for the requested sampling rate.
   2218  */
   2219 u_int
   2220 ess_srtotc(rate)
   2221 	u_int rate;
   2222 {
   2223 	u_int tc;
   2224 
   2225 	/* The following formulae are from the ESS data sheet. */
   2226 	if (rate < 22050)
   2227 		tc = 128 - 397700L / rate;
   2228 	else
   2229 		tc = 256 - 795500L / rate;
   2230 
   2231 	return (tc);
   2232 }
   2233 
   2234 
   2235 /*
   2236  * Calculate the filter constant for the reuqested sampling rate.
   2237  */
   2238 u_int
   2239 ess_srtofc(rate)
   2240 	u_int rate;
   2241 {
   2242 	/*
   2243 	 * The following formula is derived from the information in
   2244 	 * the ES1887 data sheet, based on a roll-off frequency of
   2245 	 * 87%.
   2246 	 */
   2247 	return (256 - 200279L / rate);
   2248 }
   2249 
   2250 
   2251 /*
   2252  * Return the status of the DSP.
   2253  */
   2254 u_char
   2255 ess_get_dsp_status(sc)
   2256 	struct ess_softc *sc;
   2257 {
   2258 	bus_space_tag_t iot = sc->sc_iot;
   2259 	bus_space_handle_t ioh = sc->sc_ioh;
   2260 
   2261 	return (bus_space_read_1(iot, ioh, ESS_DSP_RW_STATUS));
   2262 }
   2263 
   2264 
   2265 /*
   2266  * Return the read status of the DSP:	1 -> DSP ready for reading
   2267  *					0 -> DSP not ready for reading
   2268  */
   2269 u_char
   2270 ess_dsp_read_ready(sc)
   2271 	struct ess_softc *sc;
   2272 {
   2273 	return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) ==
   2274 		 ESS_DSP_READ_READY) ? 1 : 0);
   2275 }
   2276 
   2277 
   2278 /*
   2279  * Return the write status of the DSP:	1 -> DSP ready for writing
   2280  *					0 -> DSP not ready for writing
   2281  */
   2282 u_char
   2283 ess_dsp_write_ready(sc)
   2284 	struct ess_softc *sc;
   2285 {
   2286 	return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
   2287 		 ESS_DSP_WRITE_READY) ? 1 : 0);
   2288 }
   2289 
   2290 
   2291 /*
   2292  * Read a byte from the DSP.
   2293  */
   2294 int
   2295 ess_rdsp(sc)
   2296 	struct ess_softc *sc;
   2297 {
   2298 	bus_space_tag_t iot = sc->sc_iot;
   2299 	bus_space_handle_t ioh = sc->sc_ioh;
   2300 	int i;
   2301 
   2302 	for (i = ESS_READ_TIMEOUT; i > 0; --i) {
   2303 		if (ess_dsp_read_ready(sc)) {
   2304 #if 1
   2305 			return bus_space_read_1(iot, ioh, ESS_DSP_READ);
   2306 #else
   2307 			i = bus_space_read_1(iot, ioh, ESS_DSP_READ);
   2308 			printf("ess_rdsp() = 0x%02x\n", i);
   2309 			return i;
   2310 #endif
   2311 		} else
   2312 			delay(10);
   2313 	}
   2314 
   2315 	DPRINTF(("ess_rdsp: timed out\n"));
   2316 	return (-1);
   2317 }
   2318 
   2319 /*
   2320  * Write a byte to the DSP.
   2321  */
   2322 int
   2323 ess_wdsp(sc, v)
   2324 	struct ess_softc *sc;
   2325 	u_char v;
   2326 {
   2327 	bus_space_tag_t iot = sc->sc_iot;
   2328 	bus_space_handle_t ioh = sc->sc_ioh;
   2329 	int i;
   2330 #if 0
   2331 printf("ess_wdsp(0x%02x)\n", v);
   2332 #endif
   2333 	for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
   2334 		if (ess_dsp_write_ready(sc)) {
   2335 			bus_space_write_1(iot, ioh, ESS_DSP_WRITE, v);
   2336 			return (0);
   2337 		} else
   2338 			delay(10);
   2339 	}
   2340 
   2341 	DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
   2342 	return (-1);
   2343 }
   2344 
   2345 /*
   2346  * Write a value to one of the ESS extended registers.
   2347  */
   2348 int
   2349 ess_write_x_reg(sc, reg, val)
   2350 	struct ess_softc *sc;
   2351 	u_char reg;
   2352 	u_char val;
   2353 {
   2354 	int error;
   2355 
   2356 	if ((error = ess_wdsp(sc, reg)) == 0)
   2357 		error = ess_wdsp(sc, val);
   2358 
   2359 	return error;
   2360 }
   2361 
   2362 /*
   2363  * Read the value of one of the ESS extended registers.
   2364  */
   2365 u_char
   2366 ess_read_x_reg(sc, reg)
   2367 	struct ess_softc *sc;
   2368 	u_char reg;
   2369 {
   2370 	int error;
   2371 
   2372 	if ((error = ess_wdsp(sc, 0xC0)) == 0)
   2373 		error = ess_wdsp(sc, reg);
   2374 	if (error)
   2375 		DPRINTF(("Error reading extended register 0x%02x\n", reg));
   2376 /* REVISIT: what if an error is returned above? */
   2377 	return ess_rdsp(sc);
   2378 }
   2379 
   2380 void
   2381 ess_clear_xreg_bits(sc, reg, mask)
   2382 	struct ess_softc *sc;
   2383 	u_char reg;
   2384 	u_char mask;
   2385 {
   2386 	if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
   2387 		DPRINTF(("Error clearing bits in extended register 0x%02x\n",
   2388 			 reg));
   2389 }
   2390 
   2391 void
   2392 ess_set_xreg_bits(sc, reg, mask)
   2393 	struct ess_softc *sc;
   2394 	u_char reg;
   2395 	u_char mask;
   2396 {
   2397 	if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
   2398 		DPRINTF(("Error setting bits in extended register 0x%02x\n",
   2399 			 reg));
   2400 }
   2401 
   2402 
   2403 /*
   2404  * Write a value to one of the ESS mixer registers.
   2405  */
   2406 void
   2407 ess_write_mix_reg(sc, reg, val)
   2408 	struct ess_softc *sc;
   2409 	u_char reg;
   2410 	u_char val;
   2411 {
   2412 	bus_space_tag_t iot = sc->sc_iot;
   2413 	bus_space_handle_t ioh = sc->sc_ioh;
   2414 	int s;
   2415 
   2416 	s = splaudio();
   2417 
   2418 	/*
   2419 	 * Select the register to be written.
   2420 	 */
   2421 	bus_space_write_1(iot, ioh, ESS_MIX_REG_SELECT, reg);
   2422 
   2423 	/*
   2424 	 * Write the desired value.
   2425 	 */
   2426 	bus_space_write_1(iot, ioh, ESS_MIX_REG_DATA, val);
   2427 
   2428 	splx(s);
   2429 }
   2430 
   2431 /*
   2432  * Read the value of one of the ESS mixer registers.
   2433  */
   2434 u_char
   2435 ess_read_mix_reg(sc, reg)
   2436 	struct ess_softc *sc;
   2437 	u_char reg;
   2438 {
   2439 	bus_space_tag_t iot = sc->sc_iot;
   2440 	bus_space_handle_t ioh = sc->sc_ioh;
   2441 	int s;
   2442 	u_char val;
   2443 
   2444 	s = splaudio();
   2445 
   2446 	/* Select the register to be read. */
   2447 	bus_space_write_1(iot, ioh, ESS_MIX_REG_SELECT, reg);
   2448 
   2449 	/* Read the current value. */
   2450 	val = bus_space_read_1(iot, ioh, ESS_MIX_REG_DATA);
   2451 
   2452 	splx(s);
   2453 	return val;
   2454 }
   2455 
   2456 void
   2457 ess_clear_mreg_bits(sc, reg, mask)
   2458 	struct ess_softc *sc;
   2459 	u_char reg;
   2460 	u_char mask;
   2461 {
   2462 	ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
   2463 }
   2464 
   2465 void
   2466 ess_set_mreg_bits(sc, reg, mask)
   2467 	struct ess_softc *sc;
   2468 	u_char reg;
   2469 	u_char mask;
   2470 {
   2471 	ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
   2472 }
   2473