ess.c revision 1.10
1 /* $NetBSD: ess.c,v 1.10 1998/08/09 02:05:52 mycroft Exp $ */ 2 3 /* 4 * Copyright 1997 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36 /* 37 **++ 38 ** 39 ** ess.c 40 ** 41 ** FACILITY: 42 ** 43 ** DIGITAL Network Appliance Reference Design (DNARD) 44 ** 45 ** MODULE DESCRIPTION: 46 ** 47 ** This module contains the device driver for the ESS 48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was 49 ** used as a reference point when implementing this driver. 50 ** 51 ** AUTHORS: 52 ** 53 ** Blair Fidler Software Engineering Australia 54 ** Gold Coast, Australia. 55 ** 56 ** CREATION DATE: 57 ** 58 ** March 10, 1997. 59 ** 60 ** MODIFICATION HISTORY: 61 ** 62 **-- 63 */ 64 65 /* 66 * Modification by Lennart Augustsson: 67 * Adapt for bus dma. 68 * Change to 1.3 audio interface. 69 * Major cleanup. 70 */ 71 72 /* 73 * TODO (falling priority): 74 * - add looping DMA for input. 75 */ 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/errno.h> 80 #include <sys/ioctl.h> 81 #include <sys/syslog.h> 82 #include <sys/device.h> 83 #include <sys/proc.h> 84 85 #include <machine/cpu.h> 86 #include <machine/intr.h> 87 #include <machine/bus.h> 88 89 #include <sys/audioio.h> 90 #include <dev/audio_if.h> 91 #include <dev/auconv.h> 92 #include <dev/mulaw.h> 93 94 #include <dev/isa/isavar.h> 95 #include <dev/isa/isadmavar.h> 96 97 #include <dev/isa/essvar.h> 98 #include <dev/isa/essreg.h> 99 100 #ifdef AUDIO_DEBUG 101 #define DPRINTF(x) if (essdebug) printf x 102 #define DPRINTFN(n,x) if (essdebug>(n)) printf x 103 int essdebug = 0; 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 #if 0 110 unsigned uuu; 111 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu) 112 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d)) 113 #else 114 #define EREAD1(t, h, a) bus_space_read_1(t, h, a) 115 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d) 116 #endif 117 118 119 int ess_setup_sc __P((struct ess_softc *, int)); 120 121 int ess_open __P((void *, int)); 122 void ess_close __P((void *)); 123 int ess_getdev __P((void *, struct audio_device *)); 124 int ess_drain __P((void *)); 125 126 int ess_query_encoding __P((void *, struct audio_encoding *)); 127 128 int ess_set_params __P((void *, int, int, struct audio_params *, 129 struct audio_params *)); 130 int ess_set_in_sr __P((void *, u_long)); 131 int ess_set_out_sr __P((void *, u_long)); 132 int ess_set_in_precision __P((void *, u_int)); 133 int ess_set_out_precision __P((void *, u_int)); 134 int ess_set_in_channels __P((void *, int)); 135 int ess_set_out_channels __P((void *, int)); 136 137 int ess_round_blocksize __P((void *, int)); 138 139 int ess_dma_init_output __P((void *, void *, int)); 140 int ess_dma_output __P((void *, void *, int, void (*)(void *), void *)); 141 int ess_dma_init_input __P((void *, void *, int)); 142 int ess_dma_input __P((void *, void *, int, void (*)(void *), void *)); 143 int ess_halt_output __P((void *)); 144 int ess_halt_input __P((void *)); 145 146 int ess_intr_output __P((void *)); 147 int ess_intr_input __P((void *)); 148 149 int ess_speaker_ctl __P((void *, int)); 150 151 int ess_getdev __P((void *, struct audio_device *)); 152 153 int ess_set_port __P((void *, mixer_ctrl_t *)); 154 int ess_get_port __P((void *, mixer_ctrl_t *)); 155 156 void *ess_malloc __P((void *, unsigned long, int, int)); 157 void ess_free __P((void *, void *, int)); 158 unsigned long ess_round __P((void *, unsigned long)); 159 int ess_mappage __P((void *, void *, int, int)); 160 161 162 int ess_query_devinfo __P((void *, mixer_devinfo_t *)); 163 int ess_get_props __P((void *)); 164 165 void ess_speaker_on __P((struct ess_softc *)); 166 void ess_speaker_off __P((struct ess_softc *)); 167 168 int ess_config_addr __P((struct ess_softc *)); 169 void ess_config_irq __P((struct ess_softc *)); 170 void ess_config_drq __P((struct ess_softc *)); 171 void ess_setup __P((struct ess_softc *)); 172 int ess_identify __P((struct ess_softc *)); 173 174 int ess_reset __P((struct ess_softc *)); 175 void ess_set_gain __P((struct ess_softc *, int, int)); 176 int ess_set_in_ports __P((struct ess_softc *, int)); 177 u_int ess_srtotc __P((u_int)); 178 u_int ess_srtofc __P((u_int)); 179 u_char ess_get_dsp_status __P((struct ess_softc *)); 180 u_char ess_dsp_read_ready __P((struct ess_softc *)); 181 u_char ess_dsp_write_ready __P((struct ess_softc *sc)); 182 int ess_rdsp __P((struct ess_softc *)); 183 int ess_wdsp __P((struct ess_softc *, u_char)); 184 u_char ess_read_x_reg __P((struct ess_softc *, u_char)); 185 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char)); 186 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char)); 187 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char)); 188 u_char ess_read_mix_reg __P((struct ess_softc *, u_char)); 189 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char)); 190 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char)); 191 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char)); 192 193 static char *essmodel[] = { 194 "unsupported", 195 "1888", 196 "1887", 197 "888" 198 }; 199 200 struct audio_device ess_device = { 201 "ESS Technology", 202 "x", 203 "ess" 204 }; 205 206 /* 207 * Define our interface to the higher level audio driver. 208 */ 209 210 struct audio_hw_if ess_hw_if = { 211 ess_open, 212 ess_close, 213 ess_drain, 214 ess_query_encoding, 215 ess_set_params, 216 ess_round_blocksize, 217 NULL, 218 ess_dma_init_output, 219 ess_dma_init_input, 220 ess_dma_output, 221 ess_dma_input, 222 ess_halt_output, 223 ess_halt_input, 224 ess_speaker_ctl, 225 ess_getdev, 226 NULL, 227 ess_set_port, 228 ess_get_port, 229 ess_query_devinfo, 230 ess_malloc, 231 ess_free, 232 ess_round, 233 ess_mappage, 234 ess_get_props, 235 }; 236 237 #ifdef AUDIO_DEBUG 238 void ess_printsc __P((struct ess_softc *)); 239 void ess_dump_mixer __P((struct ess_softc *)); 240 241 void 242 ess_printsc(sc) 243 struct ess_softc *sc; 244 { 245 int i; 246 247 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n", 248 (int)sc->sc_open, sc->sc_iobase, sc->out_port, 249 sc->in_port, sc->spkr_state ? "on" : "off"); 250 251 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n", 252 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr, 253 sc->sc_out.intr, sc->sc_out.arg); 254 255 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n", 256 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr, 257 sc->sc_in.intr, sc->sc_in.arg); 258 259 printf("gain:"); 260 for (i = 0; i < ESS_NDEVS; i++) 261 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]); 262 printf("\n"); 263 } 264 265 void 266 ess_dump_mixer(sc) 267 struct ess_softc *sc; 268 { 269 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 270 0x7C, ess_read_mix_reg(sc, 0x7C)); 271 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 272 0x1A, ess_read_mix_reg(sc, 0x1A)); 273 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 274 0x3E, ess_read_mix_reg(sc, 0x3E)); 275 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 276 0x36, ess_read_mix_reg(sc, 0x36)); 277 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 278 0x38, ess_read_mix_reg(sc, 0x38)); 279 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 280 0x3A, ess_read_mix_reg(sc, 0x3A)); 281 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n", 282 0x32, ess_read_mix_reg(sc, 0x32)); 283 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n", 284 0x3C, ess_read_mix_reg(sc, 0x3C)); 285 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n", 286 0x69, ess_read_mix_reg(sc, 0x69)); 287 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n", 288 0x68, ess_read_mix_reg(sc, 0x68)); 289 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n", 290 0x6E, ess_read_mix_reg(sc, 0x6E)); 291 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n", 292 0x6B, ess_read_mix_reg(sc, 0x6B)); 293 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n", 294 0x6A, ess_read_mix_reg(sc, 0x6A)); 295 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n", 296 0x6C, ess_read_mix_reg(sc, 0x6C)); 297 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n", 298 0xB4, ess_read_x_reg(sc, 0xB4)); 299 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n", 300 0x14, ess_read_mix_reg(sc, 0x14)); 301 302 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n", 303 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL)); 304 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n", 305 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL)); 306 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n", 307 0x1c, ess_read_mix_reg(sc, 0x1c), 308 0x7a, ess_read_mix_reg(sc, 0x7a)); 309 } 310 311 #endif 312 313 /* 314 * Configure the ESS chip for the desired audio base address. 315 */ 316 int 317 ess_config_addr(sc) 318 struct ess_softc *sc; 319 { 320 int iobase = sc->sc_iobase; 321 bus_space_tag_t iot = sc->sc_iot; 322 323 /* 324 * Configure using the System Control Register method. This 325 * method is used when the AMODE line is tied high, which is 326 * the case for the Shark, but not for the evaluation board. 327 */ 328 329 bus_space_handle_t scr_access_ioh; 330 bus_space_handle_t scr_ioh; 331 u_short scr_value; 332 333 /* 334 * Set the SCR bit to enable audio. 335 */ 336 scr_value = ESS_SCR_AUDIO_ENABLE; 337 338 /* 339 * Set the SCR bits necessary to select the specified audio 340 * base address. 341 */ 342 switch(iobase) { 343 case 0x220: 344 scr_value |= ESS_SCR_AUDIO_220; 345 break; 346 case 0x230: 347 scr_value |= ESS_SCR_AUDIO_230; 348 break; 349 case 0x240: 350 scr_value |= ESS_SCR_AUDIO_240; 351 break; 352 case 0x250: 353 scr_value |= ESS_SCR_AUDIO_250; 354 break; 355 default: 356 printf("ess: configured iobase 0x%x invalid\n", iobase); 357 return (1); 358 break; 359 } 360 361 /* 362 * Get a mapping for the System Control Register (SCR) access 363 * registers and the SCR data registers. 364 */ 365 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS, 366 0, &scr_access_ioh)) { 367 printf("ess: can't map SCR access registers\n"); 368 return (1); 369 } 370 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS, 371 0, &scr_ioh)) { 372 printf("ess: can't map SCR registers\n"); 373 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS); 374 return (1); 375 } 376 377 /* Unlock the SCR. */ 378 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0); 379 380 /* Write the base address information into SCR[0]. */ 381 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0); 382 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value); 383 384 /* Lock the SCR. */ 385 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0); 386 387 /* Unmap the SCR access ports and the SCR data ports. */ 388 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS); 389 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS); 390 391 return 0; 392 } 393 394 395 /* 396 * Configure the ESS chip for the desired IRQ and DMA channels. 397 * ESS ISA 398 * -------- 399 * IRQA irq9 400 * IRQB irq5 401 * IRQC irq7 402 * IRQD irq10 403 * IRQE irq15 404 * 405 * DRQA drq0 406 * DRQB drq1 407 * DRQC drq3 408 * DRQD drq5 409 */ 410 void 411 ess_config_irq(sc) 412 struct ess_softc *sc; 413 { 414 int v; 415 416 DPRINTFN(2,("ess_config_irq\n")); 417 418 if (sc->sc_in.irq != sc->sc_out.irq) { 419 /* Configure Audio 1 (record) for the appropriate IRQ line. */ 420 v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */ 421 switch(sc->sc_in.irq) { 422 case 5: 423 v |= ESS_IRQ_CTRL_INTRB; 424 break; 425 case 7: 426 v |= ESS_IRQ_CTRL_INTRC; 427 break; 428 case 9: 429 v |= ESS_IRQ_CTRL_INTRA; 430 break; 431 case 10: 432 v |= ESS_IRQ_CTRL_INTRD; 433 break; 434 #ifdef DIAGNOSTIC 435 default: 436 printf("ess: configured irq %d not supported for Audio 1\n", 437 sc->sc_in.irq); 438 return; 439 #endif 440 } 441 ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v); 442 /* irq2 is hardwired to 15 in this mode */ 443 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 444 ESS_AUDIO2_CTRL2_IRQ2_ENABLE); 445 /* Use old method. */ 446 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888); 447 } else { 448 /* Use new method, both interrupts are the same. */ 449 v = ESS_IS_SELECT_IRQ; /* enable intrs */ 450 switch(sc->sc_out.irq) { 451 case 5: 452 v |= ESS_IS_INTRB; 453 break; 454 case 7: 455 v |= ESS_IS_INTRC; 456 break; 457 case 9: 458 v |= ESS_IS_INTRA; 459 break; 460 case 10: 461 v |= ESS_IS_INTRD; 462 break; 463 case 15: 464 v |= ESS_IS_INTRE; 465 break; 466 #ifdef DIAGNOSTIC 467 default: 468 printf("ess_config_irq: configured irq %d not supported for Audio 1\n", 469 sc->sc_in.irq); 470 return; 471 #endif 472 } 473 /* Set the IRQ */ 474 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v); 475 } 476 } 477 478 479 void 480 ess_config_drq(sc) 481 struct ess_softc *sc; 482 { 483 int v; 484 485 DPRINTFN(2,("ess_config_drq\n")); 486 487 /* Configure Audio 1 (record) for DMA on the appropriate channel. */ 488 v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT; 489 switch(sc->sc_in.drq) { 490 case 0: 491 v |= ESS_DRQ_CTRL_DRQA; 492 break; 493 case 1: 494 v |= ESS_DRQ_CTRL_DRQB; 495 break; 496 case 3: 497 v |= ESS_DRQ_CTRL_DRQC; 498 break; 499 #ifdef DIAGNOSTIC 500 default: 501 printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n", 502 sc->sc_in.drq); 503 return; 504 #endif 505 } 506 /* Set DRQ1 */ 507 ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v); 508 509 /* Configure DRQ2 */ 510 v = ESS_AUDIO2_CTRL3_DRQ_PD; 511 switch(sc->sc_out.drq) { 512 case 0: 513 v |= ESS_AUDIO2_CTRL3_DRQA; 514 break; 515 case 1: 516 v |= ESS_AUDIO2_CTRL3_DRQB; 517 break; 518 case 3: 519 v |= ESS_AUDIO2_CTRL3_DRQC; 520 break; 521 case 5: 522 v |= ESS_AUDIO2_CTRL3_DRQC; 523 break; 524 #ifdef DIAGNOSTIC 525 default: 526 printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n", 527 sc->sc_out.drq); 528 return; 529 #endif 530 } 531 ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v); 532 /* Enable DMA 2 */ 533 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 534 ESS_AUDIO2_CTRL2_DMA_ENABLE); 535 } 536 537 /* 538 * Set up registers after a reset. 539 */ 540 void 541 ess_setup(sc) 542 struct ess_softc *sc; 543 { 544 ess_config_irq(sc); 545 ess_config_drq(sc); 546 if (IS16BITDRQ(sc->sc_out.drq)) 547 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 548 ESS_AUDIO2_CTRL1_XFER_SIZE); 549 else 550 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 551 ESS_AUDIO2_CTRL1_XFER_SIZE); 552 553 #if 0 554 /* Use 8 bytes per output DMA. */ 555 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, ESS_AUDIO2_CTRL1_DEMAND_8); 556 /* Use 4 bytes per input DMA. */ 557 ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL, ESS_DEMAND_CTRL_DEMAND_4); 558 #endif 559 560 DPRINTFN(2,("ess_setup: done\n")); 561 } 562 563 /* 564 * Determine the model of ESS chip we are talking to. Currently we 565 * only support ES1888, ES1887 and ES888. The method of determining 566 * the chip is based on the information on page 27 of the ES1887 data 567 * sheet. 568 * 569 * This routine sets the values of sc->sc_model and sc->sc_version. 570 */ 571 int 572 ess_identify(sc) 573 struct ess_softc *sc; 574 { 575 u_char reg1; 576 u_char reg2; 577 u_char reg3; 578 579 sc->sc_model = ESS_UNSUPPORTED; 580 sc->sc_version = 0; 581 582 583 /* 584 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where 585 * n >= 8 for an ES1887 or an ES888. Other values indicate 586 * earlier (unsupported) chips. 587 */ 588 ess_wdsp(sc, ESS_ACMD_LEGACY_ID); 589 590 if ((reg1 = ess_rdsp(sc)) != 0x68) { 591 printf("ess: First ID byte wrong (0x%02x)\n", reg1); 592 return 1; 593 } 594 595 reg2 = ess_rdsp(sc); 596 if (((reg2 & 0xf0) != 0x80) || 597 ((reg2 & 0x0f) < 8)) { 598 printf("ess: Second ID byte wrong (0x%02x)\n", reg2); 599 return 1; 600 } 601 602 /* 603 * Store the ID bytes as the version. 604 */ 605 sc->sc_version = (reg1 << 8) + reg2; 606 607 608 /* 609 * 2. Verify we can change bit 2 in mixer register 0x64. This 610 * should be possible on all supported chips. 611 */ 612 reg1 = ess_read_mix_reg(sc, 0x64); 613 reg2 = reg1 ^ 0x04; /* toggle bit 2 */ 614 615 ess_write_mix_reg(sc, 0x64, reg2); 616 617 if (ess_read_mix_reg(sc, 0x64) != reg2) { 618 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n"); 619 return 1; 620 } 621 622 /* 623 * Restore the original value of mixer register 0x64. 624 */ 625 ess_write_mix_reg(sc, 0x64, reg1); 626 627 628 /* 629 * 3. Verify we can change the value of mixer register 630 * ESS_MREG_SAMPLE_RATE. 631 * This should be possible on all supported chips. 632 * It is not necessary to restore the value of this mixer register. 633 */ 634 reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE); 635 reg2 = reg1 ^ 0xff; /* toggle all bits */ 636 637 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2); 638 639 if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) { 640 printf("ess: Hardware error (unable to change mixer register 0x70)\n"); 641 return 1; 642 } 643 644 /* 645 * 4. Determine if we can change bit 5 in mixer register 0x64. 646 * This determines whether we have an ES1887: 647 * 648 * - can change indicates ES1887 649 * - can't change indicates ES1888 or ES888 650 */ 651 reg1 = ess_read_mix_reg(sc, 0x64); 652 reg2 = reg1 ^ 0x20; /* toggle bit 5 */ 653 654 ess_write_mix_reg(sc, 0x64, reg2); 655 656 if (ess_read_mix_reg(sc, 0x64) == reg2) { 657 sc->sc_model = ESS_1887; 658 659 /* 660 * Restore the original value of mixer register 0x64. 661 */ 662 ess_write_mix_reg(sc, 0x64, reg1); 663 } else { 664 /* 665 * 5. Determine if we can change the value of mixer 666 * register 0x69 independently of mixer register 667 * 0x68. This determines which chip we have: 668 * 669 * - can modify idependently indicates ES888 670 * - register 0x69 is an alias of 0x68 indicates ES1888 671 */ 672 reg1 = ess_read_mix_reg(sc, 0x68); 673 reg2 = ess_read_mix_reg(sc, 0x69); 674 reg3 = reg2 ^ 0xff; /* toggle all bits */ 675 676 /* 677 * Write different values to each register. 678 */ 679 ess_write_mix_reg(sc, 0x68, reg2); 680 ess_write_mix_reg(sc, 0x69, reg3); 681 682 if (ess_read_mix_reg(sc, 0x68) == reg2) 683 sc->sc_model = ESS_888; 684 else 685 sc->sc_model = ESS_1888; 686 687 /* 688 * Restore the original value of the registers. 689 */ 690 ess_write_mix_reg(sc, 0x68, reg1); 691 ess_write_mix_reg(sc, 0x69, reg2); 692 } 693 694 return 0; 695 } 696 697 698 int 699 ess_setup_sc(sc, doinit) 700 struct ess_softc *sc; 701 int doinit; 702 { 703 /* Reset the chip. */ 704 if (ess_reset(sc) != 0) { 705 DPRINTF(("ess_setup_sc: couldn't reset chip\n")); 706 return (1); 707 } 708 709 /* Identify the ESS chip, and check that it is supported. */ 710 if (ess_identify(sc)) { 711 DPRINTF(("ess_setup_sc: couldn't identify\n")); 712 return (1); 713 } 714 715 return (0); 716 } 717 718 /* 719 * Probe for the ESS hardware. 720 */ 721 int 722 essmatch(sc) 723 struct ess_softc *sc; 724 { 725 if (!ESS_BASE_VALID(sc->sc_iobase)) { 726 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase); 727 return (0); 728 } 729 730 /* Configure the ESS chip for the desired audio base address. */ 731 if (ess_config_addr(sc)) 732 return (0); 733 734 if (ess_setup_sc(sc, 1)) 735 return (0); 736 737 if (sc->sc_model == ESS_UNSUPPORTED) { 738 DPRINTF(("ess: Unsupported model\n")); 739 return (0); 740 } 741 742 /* Check that requested DMA channels are valid and different. */ 743 if (!ESS_DRQ1_VALID(sc->sc_in.drq)) { 744 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq); 745 return (0); 746 } 747 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) { 748 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq); 749 return (0); 750 } 751 if (sc->sc_in.drq == sc->sc_out.drq) { 752 printf("ess: play and record dma chan both %d\n", 753 sc->sc_in.drq); 754 return (0); 755 } 756 757 if (sc->sc_model == ESS_1887) { 758 /* 759 * Either use the 1887 interrupt mode with all interrupts 760 * mapped to the same irq, or use the 1888 method with 761 * irq fixed at 15. 762 */ 763 if (sc->sc_in.irq == sc->sc_out.irq) { 764 if (!ESS_IRQ12_VALID(sc->sc_in.irq)) { 765 printf("ess: irq %d invalid\n", sc->sc_in.irq); 766 return (0); 767 } 768 goto irq_not1888; 769 } 770 } else { 771 /* Must use separate interrupts */ 772 if (sc->sc_in.irq == sc->sc_out.irq) { 773 printf("ess: play and record irq both %d\n", 774 sc->sc_in.irq); 775 return (0); 776 } 777 } 778 779 /* Check that requested IRQ lines are valid and different. */ 780 if (!ESS_IRQ1_VALID(sc->sc_in.irq)) { 781 printf("ess: record irq %d invalid\n", sc->sc_in.irq); 782 return (0); 783 } 784 if (!ESS_IRQ2_VALID(sc->sc_out.irq)) { 785 printf("ess: play irq %d invalid\n", sc->sc_out.irq); 786 return (0); 787 } 788 irq_not1888: 789 790 /* Check that the DRQs are free. */ 791 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) || 792 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq)) 793 return (0); 794 /* XXX should we check IRQs as well? */ 795 796 return (1); 797 } 798 799 800 /* 801 * Attach hardware to driver, attach hardware driver to audio 802 * pseudo-device driver. 803 */ 804 void 805 essattach(sc) 806 struct ess_softc *sc; 807 { 808 struct audio_params pparams, rparams; 809 int i; 810 u_int v; 811 812 if (ess_setup_sc(sc, 0)) { 813 printf("%s: setup failed\n", sc->sc_dev.dv_xname); 814 return; 815 } 816 817 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq, 818 sc->sc_out.ist, IPL_AUDIO, 819 ess_intr_output, sc); 820 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq, 821 sc->sc_in.ist, IPL_AUDIO, 822 ess_intr_input, sc); 823 824 /* Create our DMA maps. */ 825 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq, 826 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 827 printf("%s: can't create map for drq %d\n", 828 sc->sc_dev.dv_xname, sc->sc_in.drq); 829 return; 830 } 831 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq, 832 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 833 printf("%s: can't create map for drq %d\n", 834 sc->sc_dev.dv_xname, sc->sc_out.drq); 835 return; 836 } 837 838 printf(" ESS Technology ES%s [version 0x%04x]\n", 839 essmodel[sc->sc_model], sc->sc_version); 840 841 /* 842 * Set record and play parameters to default values defined in 843 * generic audio driver. 844 */ 845 pparams = audio_default; 846 rparams = audio_default; 847 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams); 848 849 /* Do a hardware reset on the mixer. */ 850 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET); 851 852 /* 853 * Set volume of Audio 1 to zero and disable Audio 1 DAC input 854 * to playback mixer, since playback is always through Audio 2. 855 */ 856 ess_write_mix_reg(sc, 0x14, 0); 857 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR); 858 859 /* 860 * Set hardware record source to use output of the record 861 * mixer. We do the selection of record source in software by 862 * setting the gain of the unused sources to zero. (See 863 * ess_set_in_ports.) 864 */ 865 ess_set_mreg_bits(sc, 0x1c, 0x07); 866 ess_clear_mreg_bits(sc, 0x7a, 0x10); 867 ess_set_mreg_bits(sc, 0x7a, 0x08); 868 869 /* 870 * Set gain on each mixer device to a sensible value. 871 * Devices not normally used are turned off, and other devices 872 * are set to 75% volume. 873 */ 874 for (i = 0; i < ESS_NDEVS; i++) { 875 switch(i) { 876 case ESS_MIC_PLAY_VOL: 877 case ESS_LINE_PLAY_VOL: 878 case ESS_CD_PLAY_VOL: 879 case ESS_AUXB_PLAY_VOL: 880 case ESS_DAC_REC_VOL: 881 case ESS_LINE_REC_VOL: 882 case ESS_SYNTH_REC_VOL: 883 case ESS_CD_REC_VOL: 884 case ESS_AUXB_REC_VOL: 885 v = 0; 886 break; 887 default: 888 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4); 889 break; 890 } 891 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v; 892 ess_set_gain(sc, i, 1); 893 } 894 895 ess_setup(sc); 896 897 /* Disable the speaker until the device is opened. */ 898 ess_speaker_off(sc); 899 sc->spkr_state = SPKR_OFF; 900 901 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]); 902 sprintf(ess_device.version, "0x%04x", sc->sc_version); 903 904 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev); 905 906 #ifdef AUDIO_DEBUG 907 ess_printsc(sc); 908 #endif 909 } 910 911 /* 912 * Various routines to interface to higher level audio driver 913 */ 914 915 int 916 ess_open(addr, flags) 917 void *addr; 918 int flags; 919 { 920 struct ess_softc *sc = addr; 921 922 DPRINTF(("ess_open: sc=%p\n", sc)); 923 924 if (sc->sc_open != 0 || ess_reset(sc) != 0) 925 return ENXIO; 926 927 ess_setup(sc); /* because we did a reset */ 928 929 sc->sc_open = 1; 930 931 DPRINTF(("ess_open: opened\n")); 932 933 return (0); 934 } 935 936 void 937 ess_close(addr) 938 void *addr; 939 { 940 struct ess_softc *sc = addr; 941 942 DPRINTF(("ess_close: sc=%p\n", sc)); 943 944 sc->sc_open = 0; 945 ess_speaker_off(sc); 946 sc->spkr_state = SPKR_OFF; 947 ess_halt_output(sc); 948 ess_halt_input(sc); 949 sc->sc_in.intr = 0; 950 sc->sc_out.intr = 0; 951 952 DPRINTF(("ess_close: closed\n")); 953 } 954 955 /* 956 * Wait for FIFO to drain, and analog section to settle. 957 * XXX should check FIFO full bit. 958 */ 959 int 960 ess_drain(addr) 961 void *addr; 962 { 963 extern int hz; /* XXX */ 964 965 tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */ 966 return (0); 967 } 968 969 int 970 ess_speaker_ctl(addr, newstate) 971 void *addr; 972 int newstate; 973 { 974 struct ess_softc *sc = addr; 975 976 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) { 977 ess_speaker_on(sc); 978 sc->spkr_state = SPKR_ON; 979 } 980 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) { 981 ess_speaker_off(sc); 982 sc->spkr_state = SPKR_OFF; 983 } 984 return (0); 985 } 986 987 int 988 ess_getdev(addr, retp) 989 void *addr; 990 struct audio_device *retp; 991 { 992 *retp = ess_device; 993 return (0); 994 } 995 996 int 997 ess_query_encoding(addr, fp) 998 void *addr; 999 struct audio_encoding *fp; 1000 { 1001 /*struct ess_softc *sc = addr;*/ 1002 1003 switch (fp->index) { 1004 case 0: 1005 strcpy(fp->name, AudioEulinear); 1006 fp->encoding = AUDIO_ENCODING_ULINEAR; 1007 fp->precision = 8; 1008 fp->flags = 0; 1009 return (0); 1010 case 1: 1011 strcpy(fp->name, AudioEmulaw); 1012 fp->encoding = AUDIO_ENCODING_ULAW; 1013 fp->precision = 8; 1014 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1015 return (0); 1016 case 2: 1017 strcpy(fp->name, AudioEalaw); 1018 fp->encoding = AUDIO_ENCODING_ALAW; 1019 fp->precision = 8; 1020 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1021 return (0); 1022 case 3: 1023 strcpy(fp->name, AudioEslinear); 1024 fp->encoding = AUDIO_ENCODING_SLINEAR; 1025 fp->precision = 8; 1026 fp->flags = 0; 1027 return (0); 1028 case 4: 1029 strcpy(fp->name, AudioEslinear_le); 1030 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 1031 fp->precision = 16; 1032 fp->flags = 0; 1033 return (0); 1034 case 5: 1035 strcpy(fp->name, AudioEulinear_le); 1036 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 1037 fp->precision = 16; 1038 fp->flags = 0; 1039 return (0); 1040 case 6: 1041 strcpy(fp->name, AudioEslinear_be); 1042 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 1043 fp->precision = 16; 1044 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1045 return (0); 1046 case 7: 1047 strcpy(fp->name, AudioEulinear_be); 1048 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 1049 fp->precision = 16; 1050 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1051 return (0); 1052 default: 1053 return EINVAL; 1054 } 1055 return (0); 1056 } 1057 1058 int 1059 ess_set_params(addr, setmode, usemode, play, rec) 1060 void *addr; 1061 int setmode, usemode; 1062 struct audio_params *play, *rec; 1063 { 1064 struct ess_softc *sc = addr; 1065 void (*swcode) __P((void *, u_char *buf, int cnt)); 1066 struct audio_params *p; 1067 int mode; 1068 1069 DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode)); 1070 1071 /* Set first record info, then play info */ 1072 for(mode = AUMODE_RECORD; mode != -1; 1073 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1074 if ((setmode & mode) == 0) 1075 continue; 1076 1077 p = mode == AUMODE_PLAY ? play : rec; 1078 switch (mode) { 1079 case AUMODE_PLAY: 1080 if (ess_set_out_sr(sc, p->sample_rate) != 0 || 1081 ess_set_out_precision(sc, p->precision) != 0 || 1082 ess_set_out_channels(sc, p->channels) != 0) { 1083 return (EINVAL); 1084 } 1085 break; 1086 1087 case AUMODE_RECORD: 1088 if (ess_set_in_sr(sc, p->sample_rate) != 0 || 1089 ess_set_in_precision(sc, p->precision) != 0 || 1090 ess_set_in_channels(sc, p->channels) != 0) { 1091 return (EINVAL); 1092 } 1093 break; 1094 } 1095 1096 swcode = 0; 1097 1098 switch (p->encoding) { 1099 case AUDIO_ENCODING_SLINEAR_BE: 1100 if (p->precision == 16) 1101 swcode = swap_bytes; 1102 /* fall into */ 1103 case AUDIO_ENCODING_SLINEAR_LE: 1104 if (mode == AUMODE_PLAY) 1105 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1106 ESS_AUDIO2_CTRL2_FIFO_SIGNED); 1107 else 1108 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1109 ESS_AUDIO1_CTRL1_FIFO_SIGNED); 1110 break; 1111 case AUDIO_ENCODING_ULINEAR_BE: 1112 if (p->precision == 16) 1113 swcode = swap_bytes; 1114 /* fall into */ 1115 case AUDIO_ENCODING_ULINEAR_LE: 1116 ulin8: 1117 if (mode == AUMODE_PLAY) 1118 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1119 ESS_AUDIO2_CTRL2_FIFO_SIGNED); 1120 else 1121 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1122 ESS_AUDIO1_CTRL1_FIFO_SIGNED); 1123 break; 1124 case AUDIO_ENCODING_ULAW: 1125 swcode = mode == AUMODE_PLAY ? 1126 mulaw_to_ulinear8 : ulinear8_to_mulaw; 1127 goto ulin8; 1128 case AUDIO_ENCODING_ALAW: 1129 swcode = mode == AUMODE_PLAY ? 1130 alaw_to_ulinear8 : ulinear8_to_alaw; 1131 goto ulin8; 1132 default: 1133 return EINVAL; 1134 } 1135 p->sw_code = swcode; 1136 } 1137 1138 sc->sc_in.active = 0; 1139 sc->sc_out.active = 0; 1140 1141 return (0); 1142 } 1143 int 1144 ess_set_in_sr(addr, sr) 1145 void *addr; 1146 u_long sr; 1147 { 1148 struct ess_softc *sc = addr; 1149 1150 if (sr < ESS_MINRATE || sr > ESS_MAXRATE) 1151 return (EINVAL); 1152 /* 1153 * Program the sample rate and filter clock for the record 1154 * channel (Audio 1). 1155 */ 1156 DPRINTF(("ess_set_in_sr: %ld\n", sr)); 1157 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(sr)); 1158 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(sr)); 1159 1160 return (0); 1161 } 1162 1163 int 1164 ess_set_out_sr(addr, sr) 1165 void *addr; 1166 u_long sr; 1167 { 1168 struct ess_softc *sc = addr; 1169 1170 if (sr < ESS_MINRATE || sr > ESS_MAXRATE) 1171 return (EINVAL); 1172 /* 1173 * Program the sample rate and filter clock for the playback 1174 * channel (Audio 2). 1175 */ 1176 DPRINTF(("ess_set_out_sr: %ld\n", sr)); 1177 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(sr)); 1178 ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(sr)); 1179 1180 return (0); 1181 } 1182 1183 int 1184 ess_set_in_precision(addr, precision) 1185 void *addr; 1186 u_int precision; 1187 { 1188 struct ess_softc *sc = addr; 1189 1190 /* 1191 * REVISIT: Should we set DMA transfer type to 2-byte or 1192 * 4-byte demand? This would probably better be done 1193 * when configuring the DMA channel. See xreg 0xB9. 1194 */ 1195 DPRINTF(("ess_set_in_precision: %d\n", precision)); 1196 switch (precision) { 1197 case 8: 1198 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1199 ESS_AUDIO1_CTRL1_FIFO_SIZE); 1200 break; 1201 1202 case 16: 1203 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1204 ESS_AUDIO1_CTRL1_FIFO_SIZE); 1205 break; 1206 1207 default: 1208 return (EINVAL); 1209 } 1210 return (0); 1211 } 1212 1213 int 1214 ess_set_out_precision(addr, precision) 1215 void *addr; 1216 u_int precision; 1217 { 1218 struct ess_softc *sc = addr; 1219 1220 DPRINTF(("ess_set_in_precision: %d\n", precision)); 1221 switch (precision) { 1222 case 8: 1223 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1224 ESS_AUDIO2_CTRL2_FIFO_SIZE); 1225 break; 1226 1227 case 16: 1228 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1229 ESS_AUDIO2_CTRL2_FIFO_SIZE); 1230 break; 1231 1232 default: 1233 return (EINVAL); 1234 } 1235 return (0); 1236 } 1237 1238 int 1239 ess_set_in_channels(addr, channels) 1240 void *addr; 1241 int channels; 1242 { 1243 struct ess_softc *sc = addr; 1244 1245 switch(channels) { 1246 case 1: 1247 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1248 ESS_AUDIO_CTRL_MONO); 1249 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1250 ESS_AUDIO_CTRL_STEREO); 1251 break; 1252 1253 case 2: 1254 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1255 ESS_AUDIO_CTRL_STEREO); 1256 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1257 ESS_AUDIO_CTRL_MONO); 1258 break; 1259 1260 default: 1261 return (EINVAL); 1262 break; 1263 } 1264 1265 sc->sc_in.channels = channels; 1266 1267 return (0); 1268 } 1269 1270 int 1271 ess_set_out_channels(addr, channels) 1272 void *addr; 1273 int channels; 1274 { 1275 struct ess_softc *sc = addr; 1276 1277 switch(channels) { 1278 case 1: 1279 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1280 ESS_AUDIO2_CTRL2_CHANNELS); 1281 break; 1282 1283 case 2: 1284 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1285 ESS_AUDIO2_CTRL2_CHANNELS); 1286 break; 1287 1288 default: 1289 return (EINVAL); 1290 break; 1291 } 1292 1293 sc->sc_out.channels = channels; 1294 1295 return (0); 1296 } 1297 1298 int 1299 ess_dma_init_output(addr, buf, cc) 1300 void *addr; 1301 void *buf; 1302 int cc; 1303 { 1304 struct ess_softc *sc = addr; 1305 1306 DPRINTF(("ess_dma_init_output: buf=%p cc=%d chan=%d\n", 1307 buf, cc, sc->sc_out.drq)); 1308 isa_dmastart(sc->sc_ic, sc->sc_out.drq, buf, 1309 cc, NULL, DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1310 return 0; 1311 } 1312 1313 int 1314 ess_dma_output(addr, p, cc, intr, arg) 1315 void *addr; 1316 void *p; 1317 int cc; 1318 void (*intr) __P((void *)); 1319 void *arg; 1320 { 1321 struct ess_softc *sc = addr; 1322 1323 DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg)); 1324 #ifdef DIAGNOSTIC 1325 if (sc->sc_out.channels == 2 && (cc & 1)) { 1326 DPRINTF(("stereo playback odd bytes (%d)\n", cc)); 1327 return EIO; 1328 } 1329 #endif 1330 1331 sc->sc_out.intr = intr; 1332 sc->sc_out.arg = arg; 1333 if (sc->sc_out.active) 1334 return (0); 1335 1336 DPRINTF(("ess_dma_output: set up DMA\n")); 1337 1338 sc->sc_out.active = 1; 1339 1340 if (IS16BITDRQ(sc->sc_out.drq)) 1341 cc >>= 1; /* use word count for 16 bit DMA */ 1342 /* Program transfer count registers with 2's complement of count. */ 1343 cc = -cc; 1344 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc); 1345 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8); 1346 1347 /* Start auto-init DMA */ 1348 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1349 ESS_AUDIO2_CTRL1_DAC_ENABLE | 1350 ESS_AUDIO2_CTRL1_FIFO_ENABLE | 1351 ESS_AUDIO2_CTRL1_AUTO_INIT); 1352 1353 #if 0 1354 /* XXX 1355 * seems like the 888 and 1888 have an interlock that 1356 * prevents audio2 channel from working if audio1 channel is not 1357 * connected to the FIFO. 1358 */ 1359 ess_set_xreg_bits(sc, 0xB7, 0x80); 1360 #endif 1361 1362 return (0); 1363 1364 } 1365 1366 int 1367 ess_dma_init_input(addr, buf, cc) 1368 void *addr; 1369 void *buf; 1370 int cc; 1371 { 1372 struct ess_softc *sc = addr; 1373 1374 DPRINTF(("ess_dma_init_input: buf=%p cc=%d chan=%d\n", 1375 buf, cc, sc->sc_in.drq)); 1376 isa_dmastart(sc->sc_ic, sc->sc_in.drq, buf, 1377 cc, NULL, DMAMODE_READ | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1378 return 0; 1379 } 1380 1381 int 1382 ess_dma_input(addr, p, cc, intr, arg) 1383 void *addr; 1384 void *p; 1385 int cc; 1386 void (*intr) __P((void *)); 1387 void *arg; 1388 { 1389 struct ess_softc *sc = addr; 1390 1391 DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg)); 1392 #ifdef DIAGNOSTIC 1393 if (sc->sc_in.channels == 2 && (cc & 1)) { 1394 DPRINTF(("stereo record odd bytes (%d)\n", cc)); 1395 return EIO; 1396 } 1397 #endif 1398 1399 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */ 1400 ess_set_xreg_bits(sc, 0xB7, 0x80); 1401 1402 sc->sc_in.intr = intr; 1403 sc->sc_in.arg = arg; 1404 if (sc->sc_in.active) 1405 return (0); 1406 1407 DPRINTF(("ess_dma_input: set up DMA\n")); 1408 1409 sc->sc_in.active = 1; 1410 1411 if (IS16BITDRQ(sc->sc_out.drq)) 1412 cc >>= 1; /* use word count for 16 bit DMA */ 1413 /* Program transfer count registers with 2's complement of count. */ 1414 cc = -cc; 1415 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc); 1416 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8); 1417 1418 /* Start auto-init DMA */ 1419 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2, 1420 ESS_AUDIO1_CTRL2_DMA_READ | 1421 ESS_AUDIO1_CTRL2_ADC_ENABLE | 1422 ESS_AUDIO1_CTRL2_FIFO_ENABLE | 1423 ESS_AUDIO1_CTRL2_AUTO_INIT); 1424 1425 return (0); 1426 1427 } 1428 1429 int 1430 ess_halt_output(addr) 1431 void *addr; 1432 { 1433 struct ess_softc *sc = addr; 1434 1435 DPRINTF(("ess_halt_output: sc=%p\n", sc)); 1436 1437 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1438 ESS_AUDIO2_CTRL1_FIFO_ENABLE); 1439 return (0); 1440 } 1441 1442 int 1443 ess_halt_input(addr) 1444 void *addr; 1445 { 1446 struct ess_softc *sc = addr; 1447 1448 DPRINTF(("ess_halt_input: sc=%p\n", sc)); 1449 1450 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2, 1451 ESS_AUDIO1_CTRL2_FIFO_ENABLE); 1452 return (0); 1453 } 1454 1455 int 1456 ess_intr_output(arg) 1457 void *arg; 1458 { 1459 struct ess_softc *sc = arg; 1460 1461 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr)); 1462 1463 /* clear interrupt on Audio channel 2 */ 1464 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1465 ESS_AUDIO2_CTRL2_IRQ_LATCH); 1466 1467 sc->sc_out.nintr++; 1468 1469 if (sc->sc_out.intr != 0) 1470 (*sc->sc_out.intr)(sc->sc_out.arg); 1471 else 1472 return (0); 1473 1474 return (1); 1475 } 1476 1477 int 1478 ess_intr_input(arg) 1479 void *arg; 1480 { 1481 struct ess_softc *sc = arg; 1482 u_char x; 1483 1484 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr)); 1485 1486 /* clear interrupt on Audio channel 1*/ 1487 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR); 1488 1489 sc->sc_in.nintr++; 1490 1491 if (sc->sc_in.intr != 0) 1492 (*sc->sc_in.intr)(sc->sc_in.arg); 1493 else 1494 return (0); 1495 1496 return (1); 1497 } 1498 1499 int 1500 ess_round_blocksize(addr, blk) 1501 void *addr; 1502 int blk; 1503 { 1504 return (blk & -8); /* round for max DMA size */ 1505 } 1506 1507 int 1508 ess_set_port(addr, cp) 1509 void *addr; 1510 mixer_ctrl_t *cp; 1511 { 1512 struct ess_softc *sc = addr; 1513 int lgain, rgain; 1514 1515 DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n", 1516 cp->dev, cp->un.value.num_channels)); 1517 1518 switch (cp->dev) { 1519 /* 1520 * The following mixer ports are all stereo. If we get a 1521 * single-channel gain value passed in, then we duplicate it 1522 * to both left and right channels. 1523 */ 1524 case ESS_MASTER_VOL: 1525 case ESS_DAC_PLAY_VOL: 1526 case ESS_MIC_PLAY_VOL: 1527 case ESS_LINE_PLAY_VOL: 1528 case ESS_SYNTH_PLAY_VOL: 1529 case ESS_CD_PLAY_VOL: 1530 case ESS_AUXB_PLAY_VOL: 1531 case ESS_DAC_REC_VOL: 1532 case ESS_MIC_REC_VOL: 1533 case ESS_LINE_REC_VOL: 1534 case ESS_SYNTH_REC_VOL: 1535 case ESS_CD_REC_VOL: 1536 case ESS_AUXB_REC_VOL: 1537 case ESS_RECORD_VOL: 1538 if (cp->type != AUDIO_MIXER_VALUE) 1539 return EINVAL; 1540 1541 switch (cp->un.value.num_channels) { 1542 case 1: 1543 lgain = rgain = ESS_4BIT_GAIN( 1544 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 1545 break; 1546 case 2: 1547 lgain = ESS_4BIT_GAIN( 1548 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]); 1549 rgain = ESS_4BIT_GAIN( 1550 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]); 1551 break; 1552 default: 1553 return EINVAL; 1554 } 1555 1556 sc->gain[cp->dev][ESS_LEFT] = lgain; 1557 sc->gain[cp->dev][ESS_RIGHT] = rgain; 1558 1559 ess_set_gain(sc, cp->dev, 1); 1560 break; 1561 1562 1563 /* 1564 * The PC speaker port is mono. If we get a stereo gain value 1565 * passed in, then we return EINVAL. 1566 */ 1567 case ESS_PCSPEAKER_VOL: 1568 if (cp->un.value.num_channels != 1) 1569 return EINVAL; 1570 1571 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] = 1572 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 1573 ess_set_gain(sc, cp->dev, 1); 1574 break; 1575 1576 1577 case ESS_MIC_PREAMP: 1578 if (cp->type != AUDIO_MIXER_ENUM) 1579 return EINVAL; 1580 1581 if (cp->un.ord) 1582 /* Enable microphone preamp */ 1583 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL, 1584 ESS_PREAMP_CTRL_ENABLE); 1585 else 1586 /* Disable microphone preamp */ 1587 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL, 1588 ESS_PREAMP_CTRL_ENABLE); 1589 break; 1590 1591 case ESS_RECORD_SOURCE: 1592 if (cp->type == AUDIO_MIXER_SET) 1593 return ess_set_in_ports(sc, cp->un.mask); 1594 else 1595 return EINVAL; 1596 break; 1597 1598 case ESS_RECORD_MONITOR: 1599 if (cp->type != AUDIO_MIXER_ENUM) 1600 return EINVAL; 1601 1602 if (cp->un.ord) 1603 /* Enable monitor */ 1604 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1605 ESS_AUDIO_CTRL_MONITOR); 1606 else 1607 /* Disable monitor */ 1608 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1609 ESS_AUDIO_CTRL_MONITOR); 1610 break; 1611 1612 default: 1613 return EINVAL; 1614 } 1615 1616 return (0); 1617 } 1618 1619 int 1620 ess_get_port(addr, cp) 1621 void *addr; 1622 mixer_ctrl_t *cp; 1623 { 1624 struct ess_softc *sc = addr; 1625 1626 DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev)); 1627 1628 switch (cp->dev) { 1629 case ESS_DAC_PLAY_VOL: 1630 case ESS_MIC_PLAY_VOL: 1631 case ESS_LINE_PLAY_VOL: 1632 case ESS_SYNTH_PLAY_VOL: 1633 case ESS_CD_PLAY_VOL: 1634 case ESS_AUXB_PLAY_VOL: 1635 case ESS_MASTER_VOL: 1636 case ESS_PCSPEAKER_VOL: 1637 case ESS_DAC_REC_VOL: 1638 case ESS_MIC_REC_VOL: 1639 case ESS_LINE_REC_VOL: 1640 case ESS_SYNTH_REC_VOL: 1641 case ESS_CD_REC_VOL: 1642 case ESS_AUXB_REC_VOL: 1643 case ESS_RECORD_VOL: 1644 if (cp->dev == ESS_PCSPEAKER_VOL && 1645 cp->un.value.num_channels != 1) 1646 return EINVAL; 1647 1648 switch (cp->un.value.num_channels) { 1649 case 1: 1650 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1651 sc->gain[cp->dev][ESS_LEFT]; 1652 break; 1653 case 2: 1654 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1655 sc->gain[cp->dev][ESS_LEFT]; 1656 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1657 sc->gain[cp->dev][ESS_RIGHT]; 1658 break; 1659 default: 1660 return EINVAL; 1661 } 1662 break; 1663 1664 case ESS_MIC_PREAMP: 1665 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) & 1666 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0; 1667 break; 1668 1669 case ESS_RECORD_SOURCE: 1670 cp->un.mask = sc->in_mask; 1671 break; 1672 1673 case ESS_RECORD_MONITOR: 1674 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) & 1675 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0; 1676 break; 1677 1678 default: 1679 return EINVAL; 1680 } 1681 1682 return (0); 1683 } 1684 1685 int 1686 ess_query_devinfo(addr, dip) 1687 void *addr; 1688 mixer_devinfo_t *dip; 1689 { 1690 #ifdef AUDIO_DEBUG 1691 struct ess_softc *sc = addr; 1692 #endif 1693 1694 DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n", 1695 sc->sc_model, dip->index)); 1696 1697 /* 1698 * REVISIT: There are some slight differences between the 1699 * mixers on the different ESS chips, which can 1700 * be sorted out using the chip model rather than a 1701 * separate mixer model. 1702 * This is currently coded assuming an ES1887; we 1703 * need to work out which bits are not applicable to 1704 * the other models (1888 and 888). 1705 */ 1706 switch (dip->index) { 1707 case ESS_DAC_PLAY_VOL: 1708 dip->type = AUDIO_MIXER_VALUE; 1709 dip->mixer_class = ESS_INPUT_CLASS; 1710 dip->prev = AUDIO_MIXER_LAST; 1711 dip->next = AUDIO_MIXER_LAST; 1712 strcpy(dip->label.name, AudioNdac); 1713 dip->un.v.num_channels = 2; 1714 strcpy(dip->un.v.units.name, AudioNvolume); 1715 return (0); 1716 1717 case ESS_MIC_PLAY_VOL: 1718 dip->type = AUDIO_MIXER_VALUE; 1719 dip->mixer_class = ESS_INPUT_CLASS; 1720 dip->prev = AUDIO_MIXER_LAST; 1721 dip->next = AUDIO_MIXER_LAST; 1722 strcpy(dip->label.name, AudioNmicrophone); 1723 dip->un.v.num_channels = 2; 1724 strcpy(dip->un.v.units.name, AudioNvolume); 1725 return (0); 1726 1727 case ESS_LINE_PLAY_VOL: 1728 dip->type = AUDIO_MIXER_VALUE; 1729 dip->mixer_class = ESS_INPUT_CLASS; 1730 dip->prev = AUDIO_MIXER_LAST; 1731 dip->next = AUDIO_MIXER_LAST; 1732 strcpy(dip->label.name, AudioNline); 1733 dip->un.v.num_channels = 2; 1734 strcpy(dip->un.v.units.name, AudioNvolume); 1735 return (0); 1736 1737 case ESS_SYNTH_PLAY_VOL: 1738 dip->type = AUDIO_MIXER_VALUE; 1739 dip->mixer_class = ESS_INPUT_CLASS; 1740 dip->prev = AUDIO_MIXER_LAST; 1741 dip->next = AUDIO_MIXER_LAST; 1742 strcpy(dip->label.name, AudioNfmsynth); 1743 dip->un.v.num_channels = 2; 1744 strcpy(dip->un.v.units.name, AudioNvolume); 1745 return (0); 1746 1747 case ESS_CD_PLAY_VOL: 1748 dip->type = AUDIO_MIXER_VALUE; 1749 dip->mixer_class = ESS_INPUT_CLASS; 1750 dip->prev = AUDIO_MIXER_LAST; 1751 dip->next = AUDIO_MIXER_LAST; 1752 strcpy(dip->label.name, AudioNcd); 1753 dip->un.v.num_channels = 2; 1754 strcpy(dip->un.v.units.name, AudioNvolume); 1755 return (0); 1756 1757 case ESS_AUXB_PLAY_VOL: 1758 dip->type = AUDIO_MIXER_VALUE; 1759 dip->mixer_class = ESS_INPUT_CLASS; 1760 dip->prev = AUDIO_MIXER_LAST; 1761 dip->next = AUDIO_MIXER_LAST; 1762 strcpy(dip->label.name, "auxb"); 1763 dip->un.v.num_channels = 2; 1764 strcpy(dip->un.v.units.name, AudioNvolume); 1765 return (0); 1766 1767 case ESS_INPUT_CLASS: 1768 dip->type = AUDIO_MIXER_CLASS; 1769 dip->mixer_class = ESS_INPUT_CLASS; 1770 dip->next = dip->prev = AUDIO_MIXER_LAST; 1771 strcpy(dip->label.name, AudioCinputs); 1772 return (0); 1773 1774 1775 case ESS_MASTER_VOL: 1776 dip->type = AUDIO_MIXER_VALUE; 1777 dip->mixer_class = ESS_OUTPUT_CLASS; 1778 dip->prev = dip->next = AUDIO_MIXER_LAST; 1779 strcpy(dip->label.name, AudioNmaster); 1780 dip->un.v.num_channels = 2; 1781 strcpy(dip->un.v.units.name, AudioNvolume); 1782 return (0); 1783 1784 case ESS_PCSPEAKER_VOL: 1785 dip->type = AUDIO_MIXER_VALUE; 1786 dip->mixer_class = ESS_OUTPUT_CLASS; 1787 dip->prev = AUDIO_MIXER_LAST; 1788 dip->next = AUDIO_MIXER_LAST; 1789 strcpy(dip->label.name, "pc_speaker"); 1790 dip->un.v.num_channels = 1; 1791 strcpy(dip->un.v.units.name, AudioNvolume); 1792 return (0); 1793 1794 case ESS_OUTPUT_CLASS: 1795 dip->type = AUDIO_MIXER_CLASS; 1796 dip->mixer_class = ESS_OUTPUT_CLASS; 1797 dip->next = dip->prev = AUDIO_MIXER_LAST; 1798 strcpy(dip->label.name, AudioCoutputs); 1799 return (0); 1800 1801 1802 case ESS_DAC_REC_VOL: 1803 dip->type = AUDIO_MIXER_VALUE; 1804 dip->mixer_class = ESS_RECORD_CLASS; 1805 dip->prev = AUDIO_MIXER_LAST; 1806 dip->next = AUDIO_MIXER_LAST; 1807 strcpy(dip->label.name, AudioNdac); 1808 dip->un.v.num_channels = 2; 1809 strcpy(dip->un.v.units.name, AudioNvolume); 1810 return (0); 1811 1812 case ESS_MIC_REC_VOL: 1813 dip->type = AUDIO_MIXER_VALUE; 1814 dip->mixer_class = ESS_RECORD_CLASS; 1815 dip->prev = AUDIO_MIXER_LAST; 1816 dip->next = ESS_MIC_PREAMP; 1817 strcpy(dip->label.name, AudioNmicrophone); 1818 dip->un.v.num_channels = 2; 1819 strcpy(dip->un.v.units.name, AudioNvolume); 1820 return (0); 1821 1822 case ESS_LINE_REC_VOL: 1823 dip->type = AUDIO_MIXER_VALUE; 1824 dip->mixer_class = ESS_RECORD_CLASS; 1825 dip->prev = AUDIO_MIXER_LAST; 1826 dip->next = AUDIO_MIXER_LAST; 1827 strcpy(dip->label.name, AudioNline); 1828 dip->un.v.num_channels = 2; 1829 strcpy(dip->un.v.units.name, AudioNvolume); 1830 return (0); 1831 1832 case ESS_SYNTH_REC_VOL: 1833 dip->type = AUDIO_MIXER_VALUE; 1834 dip->mixer_class = ESS_RECORD_CLASS; 1835 dip->prev = AUDIO_MIXER_LAST; 1836 dip->next = AUDIO_MIXER_LAST; 1837 strcpy(dip->label.name, AudioNfmsynth); 1838 dip->un.v.num_channels = 2; 1839 strcpy(dip->un.v.units.name, AudioNvolume); 1840 return (0); 1841 1842 case ESS_CD_REC_VOL: 1843 dip->type = AUDIO_MIXER_VALUE; 1844 dip->mixer_class = ESS_RECORD_CLASS; 1845 dip->prev = AUDIO_MIXER_LAST; 1846 dip->next = AUDIO_MIXER_LAST; 1847 strcpy(dip->label.name, AudioNcd); 1848 dip->un.v.num_channels = 2; 1849 strcpy(dip->un.v.units.name, AudioNvolume); 1850 return (0); 1851 1852 case ESS_AUXB_REC_VOL: 1853 dip->type = AUDIO_MIXER_VALUE; 1854 dip->mixer_class = ESS_RECORD_CLASS; 1855 dip->prev = AUDIO_MIXER_LAST; 1856 dip->next = AUDIO_MIXER_LAST; 1857 strcpy(dip->label.name, "auxb"); 1858 dip->un.v.num_channels = 2; 1859 strcpy(dip->un.v.units.name, AudioNvolume); 1860 return (0); 1861 1862 case ESS_MIC_PREAMP: 1863 dip->type = AUDIO_MIXER_ENUM; 1864 dip->mixer_class = ESS_RECORD_CLASS; 1865 dip->prev = ESS_MIC_REC_VOL; 1866 dip->next = AUDIO_MIXER_LAST; 1867 strcpy(dip->label.name, AudioNenhanced); 1868 dip->un.e.num_mem = 2; 1869 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1870 dip->un.e.member[0].ord = 0; 1871 strcpy(dip->un.e.member[1].label.name, AudioNon); 1872 dip->un.e.member[1].ord = 1; 1873 return (0); 1874 1875 case ESS_RECORD_VOL: 1876 dip->type = AUDIO_MIXER_VALUE; 1877 dip->mixer_class = ESS_RECORD_CLASS; 1878 dip->prev = AUDIO_MIXER_LAST; 1879 dip->next = AUDIO_MIXER_LAST; 1880 strcpy(dip->label.name, AudioNrecord); 1881 dip->un.v.num_channels = 2; 1882 strcpy(dip->un.v.units.name, AudioNvolume); 1883 return (0); 1884 1885 case ESS_RECORD_SOURCE: 1886 dip->mixer_class = ESS_RECORD_CLASS; 1887 dip->prev = dip->next = AUDIO_MIXER_LAST; 1888 strcpy(dip->label.name, AudioNsource); 1889 dip->type = AUDIO_MIXER_SET; 1890 dip->un.s.num_mem = 6; 1891 strcpy(dip->un.s.member[0].label.name, AudioNdac); 1892 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL; 1893 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone); 1894 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL; 1895 strcpy(dip->un.s.member[2].label.name, AudioNline); 1896 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL; 1897 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1898 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL; 1899 strcpy(dip->un.s.member[4].label.name, AudioNcd); 1900 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL; 1901 strcpy(dip->un.s.member[5].label.name, "auxb"); 1902 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL; 1903 return (0); 1904 1905 case ESS_RECORD_CLASS: 1906 dip->type = AUDIO_MIXER_CLASS; 1907 dip->mixer_class = ESS_RECORD_CLASS; 1908 dip->next = dip->prev = AUDIO_MIXER_LAST; 1909 strcpy(dip->label.name, AudioCrecord); 1910 return (0); 1911 1912 1913 case ESS_RECORD_MONITOR: 1914 dip->mixer_class = ESS_MONITOR_CLASS; 1915 dip->prev = dip->next = AUDIO_MIXER_LAST; 1916 strcpy(dip->label.name, AudioNmonitor); 1917 dip->type = AUDIO_MIXER_ENUM; 1918 dip->un.e.num_mem = 2; 1919 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1920 dip->un.e.member[0].ord = 0; 1921 strcpy(dip->un.e.member[1].label.name, AudioNon); 1922 dip->un.e.member[1].ord = 1; 1923 return (0); 1924 1925 case ESS_MONITOR_CLASS: 1926 dip->type = AUDIO_MIXER_CLASS; 1927 dip->mixer_class = ESS_MONITOR_CLASS; 1928 dip->next = dip->prev = AUDIO_MIXER_LAST; 1929 strcpy(dip->label.name, AudioCmonitor); 1930 return (0); 1931 } 1932 1933 return (ENXIO); 1934 } 1935 1936 void * 1937 ess_malloc(addr, size, pool, flags) 1938 void *addr; 1939 unsigned long size; 1940 int pool; 1941 int flags; 1942 { 1943 struct ess_softc *sc = addr; 1944 1945 return isa_malloc(sc->sc_ic, 4, size, pool, flags); 1946 } 1947 1948 void 1949 ess_free(addr, ptr, pool) 1950 void *addr; 1951 void *ptr; 1952 int pool; 1953 { 1954 isa_free(ptr, pool); 1955 } 1956 1957 unsigned long 1958 ess_round(addr, size) 1959 void *addr; 1960 unsigned long size; 1961 { 1962 if (size > MAX_ISADMA) 1963 size = MAX_ISADMA; 1964 return size; 1965 } 1966 1967 int 1968 ess_mappage(addr, mem, off, prot) 1969 void *addr; 1970 void *mem; 1971 int off; 1972 int prot; 1973 { 1974 return (isa_mappage(mem, off, prot)); 1975 } 1976 1977 int 1978 ess_get_props(addr) 1979 void *addr; 1980 { 1981 struct ess_softc *sc = addr; 1982 return (AUDIO_PROP_MMAP | 1983 (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0)); 1984 } 1985 1986 /* ============================================ 1987 * Generic functions for ess, not used by audio h/w i/f 1988 * ============================================= 1989 */ 1990 1991 /* 1992 * Reset the chip. 1993 * Return non-zero if the chip isn't detected. 1994 */ 1995 int 1996 ess_reset(sc) 1997 struct ess_softc *sc; 1998 { 1999 bus_space_tag_t iot = sc->sc_iot; 2000 bus_space_handle_t ioh = sc->sc_ioh; 2001 2002 sc->sc_in.intr = 0; 2003 2004 if (sc->sc_in.active) { 2005 isa_dmaabort(sc->sc_ic, sc->sc_in.drq); 2006 sc->sc_in.active = 0; 2007 } 2008 2009 sc->sc_out.intr = 0; 2010 sc->sc_out.dmacnt = 0; 2011 if (sc->sc_out.active) { 2012 isa_dmaabort(sc->sc_ic, sc->sc_out.drq); 2013 sc->sc_out.active = 0; 2014 } 2015 2016 EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT); 2017 delay(10000); 2018 EWRITE1(iot, ioh, ESS_DSP_RESET, 0); 2019 if (ess_rdsp(sc) != ESS_MAGIC) 2020 return (1); 2021 2022 /* Enable access to the ESS extension commands. */ 2023 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT); 2024 2025 return (0); 2026 } 2027 2028 void 2029 ess_set_gain(sc, port, on) 2030 struct ess_softc *sc; 2031 int port; 2032 int on; 2033 { 2034 int gain, left, right; 2035 int mix; 2036 int src; 2037 int stereo; 2038 2039 /* 2040 * Most gain controls are found in the mixer registers and 2041 * are stereo. Any that are not, must set mix and stereo as 2042 * required. 2043 */ 2044 mix = 1; 2045 stereo = 1; 2046 2047 switch (port) { 2048 case ESS_MASTER_VOL: 2049 src = 0x32; 2050 break; 2051 case ESS_DAC_PLAY_VOL: 2052 src = 0x7C; 2053 break; 2054 case ESS_MIC_PLAY_VOL: 2055 src = 0x1A; 2056 break; 2057 case ESS_LINE_PLAY_VOL: 2058 src = 0x3E; 2059 break; 2060 case ESS_SYNTH_PLAY_VOL: 2061 src = 0x36; 2062 break; 2063 case ESS_CD_PLAY_VOL: 2064 src = 0x38; 2065 break; 2066 case ESS_AUXB_PLAY_VOL: 2067 src = 0x3A; 2068 break; 2069 case ESS_PCSPEAKER_VOL: 2070 src = 0x3C; 2071 stereo = 0; 2072 break; 2073 case ESS_DAC_REC_VOL: 2074 src = 0x69; 2075 break; 2076 case ESS_MIC_REC_VOL: 2077 src = 0x68; 2078 break; 2079 case ESS_LINE_REC_VOL: 2080 src = 0x6E; 2081 break; 2082 case ESS_SYNTH_REC_VOL: 2083 src = 0x6B; 2084 break; 2085 case ESS_CD_REC_VOL: 2086 src = 0x6A; 2087 break; 2088 case ESS_AUXB_REC_VOL: 2089 src = 0x6C; 2090 break; 2091 case ESS_RECORD_VOL: 2092 src = 0xB4; 2093 mix = 0; 2094 break; 2095 default: 2096 return; 2097 } 2098 2099 if (on) { 2100 left = sc->gain[port][ESS_LEFT]; 2101 right = sc->gain[port][ESS_RIGHT]; 2102 } else { 2103 left = right = 0; 2104 } 2105 2106 if (stereo) 2107 gain = ESS_STEREO_GAIN(left, right); 2108 else 2109 gain = ESS_MONO_GAIN(left); 2110 2111 if (mix) 2112 ess_write_mix_reg(sc, src, gain); 2113 else 2114 ess_write_x_reg(sc, src, gain); 2115 } 2116 2117 int 2118 ess_set_in_ports(sc, mask) 2119 struct ess_softc *sc; 2120 int mask; 2121 { 2122 mixer_devinfo_t di; 2123 int i; 2124 int port; 2125 int tmp; 2126 2127 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask)); 2128 2129 /* 2130 * Get the device info for the record source control, 2131 * including the list of available sources. 2132 */ 2133 di.index = ESS_RECORD_SOURCE; 2134 if (ess_query_devinfo(sc, &di)) 2135 return EINVAL; 2136 2137 /* 2138 * Set or disable the record volume control for each of the 2139 * possible sources. 2140 */ 2141 for (i = 0; i < di.un.s.num_mem; i++) 2142 { 2143 /* 2144 * Calculate the source port number from its mask. 2145 */ 2146 tmp = di.un.s.member[i].mask >> 1; 2147 for (port = 0; tmp; port++) { 2148 tmp >>= 1; 2149 } 2150 2151 /* 2152 * Set the source gain: 2153 * to the current value if source is enabled 2154 * to zero if source is disabled 2155 */ 2156 ess_set_gain(sc, port, mask & di.un.s.member[i].mask); 2157 } 2158 2159 sc->in_mask = mask; 2160 2161 /* 2162 * We have to fake a single port since the upper layer expects 2163 * one only. We choose the lowest numbered port that is enabled. 2164 */ 2165 for(i = 0; i < ESS_NPORT; i++) { 2166 if (mask & (1 << i)) { 2167 sc->in_port = i; 2168 break; 2169 } 2170 } 2171 2172 return (0); 2173 } 2174 2175 void 2176 ess_speaker_on(sc) 2177 struct ess_softc *sc; 2178 { 2179 /* Disable mute on left- and right-master volume. */ 2180 ess_clear_mreg_bits(sc, 0x60, 0x40); 2181 ess_clear_mreg_bits(sc, 0x62, 0x40); 2182 } 2183 2184 void 2185 ess_speaker_off(sc) 2186 struct ess_softc *sc; 2187 { 2188 /* Enable mute on left- and right-master volume. */ 2189 ess_set_mreg_bits(sc, 0x60, 0x40); 2190 ess_set_mreg_bits(sc, 0x62, 0x40); 2191 } 2192 2193 /* 2194 * Calculate the time constant for the requested sampling rate. 2195 */ 2196 u_int 2197 ess_srtotc(rate) 2198 u_int rate; 2199 { 2200 u_int tc; 2201 2202 /* The following formulae are from the ESS data sheet. */ 2203 if (rate < 22050) 2204 tc = 128 - 397700L / rate; 2205 else 2206 tc = 256 - 795500L / rate; 2207 2208 return (tc); 2209 } 2210 2211 2212 /* 2213 * Calculate the filter constant for the reuqested sampling rate. 2214 */ 2215 u_int 2216 ess_srtofc(rate) 2217 u_int rate; 2218 { 2219 /* 2220 * The following formula is derived from the information in 2221 * the ES1887 data sheet, based on a roll-off frequency of 2222 * 87%. 2223 */ 2224 return (256 - 200279L / rate); 2225 } 2226 2227 2228 /* 2229 * Return the status of the DSP. 2230 */ 2231 u_char 2232 ess_get_dsp_status(sc) 2233 struct ess_softc *sc; 2234 { 2235 bus_space_tag_t iot = sc->sc_iot; 2236 bus_space_handle_t ioh = sc->sc_ioh; 2237 2238 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS)); 2239 } 2240 2241 2242 /* 2243 * Return the read status of the DSP: 1 -> DSP ready for reading 2244 * 0 -> DSP not ready for reading 2245 */ 2246 u_char 2247 ess_dsp_read_ready(sc) 2248 struct ess_softc *sc; 2249 { 2250 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) == 2251 ESS_DSP_READ_READY) ? 1 : 0); 2252 } 2253 2254 2255 /* 2256 * Return the write status of the DSP: 1 -> DSP ready for writing 2257 * 0 -> DSP not ready for writing 2258 */ 2259 u_char 2260 ess_dsp_write_ready(sc) 2261 struct ess_softc *sc; 2262 { 2263 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) == 2264 ESS_DSP_WRITE_READY) ? 1 : 0); 2265 } 2266 2267 2268 /* 2269 * Read a byte from the DSP. 2270 */ 2271 int 2272 ess_rdsp(sc) 2273 struct ess_softc *sc; 2274 { 2275 bus_space_tag_t iot = sc->sc_iot; 2276 bus_space_handle_t ioh = sc->sc_ioh; 2277 int i; 2278 2279 for (i = ESS_READ_TIMEOUT; i > 0; --i) { 2280 if (ess_dsp_read_ready(sc)) { 2281 i = EREAD1(iot, ioh, ESS_DSP_READ); 2282 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i)); 2283 return i; 2284 } else 2285 delay(10); 2286 } 2287 2288 DPRINTF(("ess_rdsp: timed out\n")); 2289 return (-1); 2290 } 2291 2292 /* 2293 * Write a byte to the DSP. 2294 */ 2295 int 2296 ess_wdsp(sc, v) 2297 struct ess_softc *sc; 2298 u_char v; 2299 { 2300 bus_space_tag_t iot = sc->sc_iot; 2301 bus_space_handle_t ioh = sc->sc_ioh; 2302 int i; 2303 2304 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v)); 2305 2306 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) { 2307 if (ess_dsp_write_ready(sc)) { 2308 EWRITE1(iot, ioh, ESS_DSP_WRITE, v); 2309 return (0); 2310 } else 2311 delay(10); 2312 } 2313 2314 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v)); 2315 return (-1); 2316 } 2317 2318 /* 2319 * Write a value to one of the ESS extended registers. 2320 */ 2321 int 2322 ess_write_x_reg(sc, reg, val) 2323 struct ess_softc *sc; 2324 u_char reg; 2325 u_char val; 2326 { 2327 int error; 2328 2329 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val)); 2330 if ((error = ess_wdsp(sc, reg)) == 0) 2331 error = ess_wdsp(sc, val); 2332 2333 return error; 2334 } 2335 2336 /* 2337 * Read the value of one of the ESS extended registers. 2338 */ 2339 u_char 2340 ess_read_x_reg(sc, reg) 2341 struct ess_softc *sc; 2342 u_char reg; 2343 { 2344 int error; 2345 int val; 2346 2347 if ((error = ess_wdsp(sc, 0xC0)) == 0) 2348 error = ess_wdsp(sc, reg); 2349 if (error) 2350 DPRINTF(("Error reading extended register 0x%02x\n", reg)); 2351 /* REVISIT: what if an error is returned above? */ 2352 val = ess_rdsp(sc); 2353 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val)); 2354 return val; 2355 } 2356 2357 void 2358 ess_clear_xreg_bits(sc, reg, mask) 2359 struct ess_softc *sc; 2360 u_char reg; 2361 u_char mask; 2362 { 2363 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1) 2364 DPRINTF(("Error clearing bits in extended register 0x%02x\n", 2365 reg)); 2366 } 2367 2368 void 2369 ess_set_xreg_bits(sc, reg, mask) 2370 struct ess_softc *sc; 2371 u_char reg; 2372 u_char mask; 2373 { 2374 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1) 2375 DPRINTF(("Error setting bits in extended register 0x%02x\n", 2376 reg)); 2377 } 2378 2379 2380 /* 2381 * Write a value to one of the ESS mixer registers. 2382 */ 2383 void 2384 ess_write_mix_reg(sc, reg, val) 2385 struct ess_softc *sc; 2386 u_char reg; 2387 u_char val; 2388 { 2389 bus_space_tag_t iot = sc->sc_iot; 2390 bus_space_handle_t ioh = sc->sc_ioh; 2391 int s; 2392 2393 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val)); 2394 2395 s = splaudio(); 2396 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg); 2397 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val); 2398 splx(s); 2399 } 2400 2401 /* 2402 * Read the value of one of the ESS mixer registers. 2403 */ 2404 u_char 2405 ess_read_mix_reg(sc, reg) 2406 struct ess_softc *sc; 2407 u_char reg; 2408 { 2409 bus_space_tag_t iot = sc->sc_iot; 2410 bus_space_handle_t ioh = sc->sc_ioh; 2411 int s; 2412 u_char val; 2413 2414 s = splaudio(); 2415 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg); 2416 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA); 2417 splx(s); 2418 2419 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val)); 2420 return val; 2421 } 2422 2423 void 2424 ess_clear_mreg_bits(sc, reg, mask) 2425 struct ess_softc *sc; 2426 u_char reg; 2427 u_char mask; 2428 { 2429 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask); 2430 } 2431 2432 void 2433 ess_set_mreg_bits(sc, reg, mask) 2434 struct ess_softc *sc; 2435 u_char reg; 2436 u_char mask; 2437 { 2438 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask); 2439 } 2440
Indexes created Fri Sep 26 08:10:20 GMT 2025