ess.c revision 1.13
1 /* $NetBSD: ess.c,v 1.13 1998/08/09 04:14:47 mycroft Exp $ */ 2 3 /* 4 * Copyright 1997 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36 /* 37 **++ 38 ** 39 ** ess.c 40 ** 41 ** FACILITY: 42 ** 43 ** DIGITAL Network Appliance Reference Design (DNARD) 44 ** 45 ** MODULE DESCRIPTION: 46 ** 47 ** This module contains the device driver for the ESS 48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was 49 ** used as a reference point when implementing this driver. 50 ** 51 ** AUTHORS: 52 ** 53 ** Blair Fidler Software Engineering Australia 54 ** Gold Coast, Australia. 55 ** 56 ** CREATION DATE: 57 ** 58 ** March 10, 1997. 59 ** 60 ** MODIFICATION HISTORY: 61 ** 62 **-- 63 */ 64 65 /* 66 * Modification by Lennart Augustsson: 67 * Adapt for bus dma. 68 * Change to 1.3 audio interface. 69 * Major cleanup. 70 */ 71 72 /* 73 * TODO (falling priority): 74 * - add looping DMA for input. 75 */ 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/errno.h> 80 #include <sys/ioctl.h> 81 #include <sys/syslog.h> 82 #include <sys/device.h> 83 #include <sys/proc.h> 84 85 #include <machine/cpu.h> 86 #include <machine/intr.h> 87 #include <machine/bus.h> 88 89 #include <sys/audioio.h> 90 #include <dev/audio_if.h> 91 #include <dev/auconv.h> 92 #include <dev/mulaw.h> 93 94 #include <dev/isa/isavar.h> 95 #include <dev/isa/isadmavar.h> 96 97 #include <dev/isa/essvar.h> 98 #include <dev/isa/essreg.h> 99 100 #ifdef AUDIO_DEBUG 101 #define DPRINTF(x) if (essdebug) printf x 102 #define DPRINTFN(n,x) if (essdebug>(n)) printf x 103 int essdebug = 0; 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 #if 0 110 unsigned uuu; 111 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu) 112 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d)) 113 #else 114 #define EREAD1(t, h, a) bus_space_read_1(t, h, a) 115 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d) 116 #endif 117 118 119 int ess_setup_sc __P((struct ess_softc *, int)); 120 121 int ess_open __P((void *, int)); 122 void ess_close __P((void *)); 123 int ess_getdev __P((void *, struct audio_device *)); 124 int ess_drain __P((void *)); 125 126 int ess_query_encoding __P((void *, struct audio_encoding *)); 127 128 int ess_set_params __P((void *, int, int, struct audio_params *, 129 struct audio_params *)); 130 int ess_set_in_sr __P((void *, u_long)); 131 int ess_set_out_sr __P((void *, u_long)); 132 int ess_set_in_precision __P((void *, u_int)); 133 int ess_set_out_precision __P((void *, u_int)); 134 int ess_set_in_channels __P((void *, int)); 135 int ess_set_out_channels __P((void *, int)); 136 137 int ess_round_blocksize __P((void *, int)); 138 139 int ess_dma_init_output __P((void *, void *, int)); 140 int ess_dma_output __P((void *, void *, int, void (*)(void *), void *)); 141 int ess_dma_init_input __P((void *, void *, int)); 142 int ess_dma_input __P((void *, void *, int, void (*)(void *), void *)); 143 int ess_halt_output __P((void *)); 144 int ess_halt_input __P((void *)); 145 146 int ess_intr_output __P((void *)); 147 int ess_intr_input __P((void *)); 148 149 int ess_speaker_ctl __P((void *, int)); 150 151 int ess_getdev __P((void *, struct audio_device *)); 152 153 int ess_set_port __P((void *, mixer_ctrl_t *)); 154 int ess_get_port __P((void *, mixer_ctrl_t *)); 155 156 void *ess_malloc __P((void *, unsigned long, int, int)); 157 void ess_free __P((void *, void *, int)); 158 unsigned long ess_round __P((void *, unsigned long)); 159 int ess_mappage __P((void *, void *, int, int)); 160 161 162 int ess_query_devinfo __P((void *, mixer_devinfo_t *)); 163 int ess_get_props __P((void *)); 164 165 void ess_speaker_on __P((struct ess_softc *)); 166 void ess_speaker_off __P((struct ess_softc *)); 167 168 int ess_config_addr __P((struct ess_softc *)); 169 void ess_config_irq __P((struct ess_softc *)); 170 void ess_config_drq __P((struct ess_softc *)); 171 void ess_setup __P((struct ess_softc *)); 172 int ess_identify __P((struct ess_softc *)); 173 174 int ess_reset __P((struct ess_softc *)); 175 void ess_set_gain __P((struct ess_softc *, int, int)); 176 int ess_set_in_ports __P((struct ess_softc *, int)); 177 u_int ess_srtotc __P((u_int)); 178 u_int ess_srtofc __P((u_int)); 179 u_char ess_get_dsp_status __P((struct ess_softc *)); 180 u_char ess_dsp_read_ready __P((struct ess_softc *)); 181 u_char ess_dsp_write_ready __P((struct ess_softc *sc)); 182 int ess_rdsp __P((struct ess_softc *)); 183 int ess_wdsp __P((struct ess_softc *, u_char)); 184 u_char ess_read_x_reg __P((struct ess_softc *, u_char)); 185 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char)); 186 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char)); 187 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char)); 188 u_char ess_read_mix_reg __P((struct ess_softc *, u_char)); 189 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char)); 190 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char)); 191 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char)); 192 193 static char *essmodel[] = { 194 "unsupported", 195 "1888", 196 "1887", 197 "888" 198 }; 199 200 struct audio_device ess_device = { 201 "ESS Technology", 202 "x", 203 "ess" 204 }; 205 206 /* 207 * Define our interface to the higher level audio driver. 208 */ 209 210 struct audio_hw_if ess_hw_if = { 211 ess_open, 212 ess_close, 213 ess_drain, 214 ess_query_encoding, 215 ess_set_params, 216 ess_round_blocksize, 217 NULL, 218 ess_dma_init_output, 219 ess_dma_init_input, 220 ess_dma_output, 221 ess_dma_input, 222 ess_halt_output, 223 ess_halt_input, 224 ess_speaker_ctl, 225 ess_getdev, 226 NULL, 227 ess_set_port, 228 ess_get_port, 229 ess_query_devinfo, 230 ess_malloc, 231 ess_free, 232 ess_round, 233 ess_mappage, 234 ess_get_props, 235 }; 236 237 #ifdef AUDIO_DEBUG 238 void ess_printsc __P((struct ess_softc *)); 239 void ess_dump_mixer __P((struct ess_softc *)); 240 241 void 242 ess_printsc(sc) 243 struct ess_softc *sc; 244 { 245 int i; 246 247 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n", 248 (int)sc->sc_open, sc->sc_iobase, sc->out_port, 249 sc->in_port, sc->spkr_state ? "on" : "off"); 250 251 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n", 252 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr, 253 sc->sc_out.intr, sc->sc_out.arg); 254 255 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n", 256 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr, 257 sc->sc_in.intr, sc->sc_in.arg); 258 259 printf("gain:"); 260 for (i = 0; i < ESS_NDEVS; i++) 261 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]); 262 printf("\n"); 263 } 264 265 void 266 ess_dump_mixer(sc) 267 struct ess_softc *sc; 268 { 269 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 270 0x7C, ess_read_mix_reg(sc, 0x7C)); 271 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 272 0x1A, ess_read_mix_reg(sc, 0x1A)); 273 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 274 0x3E, ess_read_mix_reg(sc, 0x3E)); 275 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 276 0x36, ess_read_mix_reg(sc, 0x36)); 277 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 278 0x38, ess_read_mix_reg(sc, 0x38)); 279 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 280 0x3A, ess_read_mix_reg(sc, 0x3A)); 281 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n", 282 0x32, ess_read_mix_reg(sc, 0x32)); 283 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n", 284 0x3C, ess_read_mix_reg(sc, 0x3C)); 285 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n", 286 0x69, ess_read_mix_reg(sc, 0x69)); 287 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n", 288 0x68, ess_read_mix_reg(sc, 0x68)); 289 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n", 290 0x6E, ess_read_mix_reg(sc, 0x6E)); 291 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n", 292 0x6B, ess_read_mix_reg(sc, 0x6B)); 293 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n", 294 0x6A, ess_read_mix_reg(sc, 0x6A)); 295 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n", 296 0x6C, ess_read_mix_reg(sc, 0x6C)); 297 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n", 298 0xB4, ess_read_x_reg(sc, 0xB4)); 299 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n", 300 0x14, ess_read_mix_reg(sc, 0x14)); 301 302 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n", 303 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL)); 304 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n", 305 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL)); 306 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n", 307 0x1c, ess_read_mix_reg(sc, 0x1c), 308 0x7a, ess_read_mix_reg(sc, 0x7a)); 309 } 310 311 #endif 312 313 /* 314 * Configure the ESS chip for the desired audio base address. 315 */ 316 int 317 ess_config_addr(sc) 318 struct ess_softc *sc; 319 { 320 int iobase = sc->sc_iobase; 321 bus_space_tag_t iot = sc->sc_iot; 322 323 /* 324 * Configure using the System Control Register method. This 325 * method is used when the AMODE line is tied high, which is 326 * the case for the Shark, but not for the evaluation board. 327 */ 328 329 bus_space_handle_t scr_access_ioh; 330 bus_space_handle_t scr_ioh; 331 u_short scr_value; 332 333 /* 334 * Set the SCR bit to enable audio. 335 */ 336 scr_value = ESS_SCR_AUDIO_ENABLE; 337 338 /* 339 * Set the SCR bits necessary to select the specified audio 340 * base address. 341 */ 342 switch(iobase) { 343 case 0x220: 344 scr_value |= ESS_SCR_AUDIO_220; 345 break; 346 case 0x230: 347 scr_value |= ESS_SCR_AUDIO_230; 348 break; 349 case 0x240: 350 scr_value |= ESS_SCR_AUDIO_240; 351 break; 352 case 0x250: 353 scr_value |= ESS_SCR_AUDIO_250; 354 break; 355 default: 356 printf("ess: configured iobase 0x%x invalid\n", iobase); 357 return (1); 358 break; 359 } 360 361 /* 362 * Get a mapping for the System Control Register (SCR) access 363 * registers and the SCR data registers. 364 */ 365 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS, 366 0, &scr_access_ioh)) { 367 printf("ess: can't map SCR access registers\n"); 368 return (1); 369 } 370 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS, 371 0, &scr_ioh)) { 372 printf("ess: can't map SCR registers\n"); 373 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS); 374 return (1); 375 } 376 377 /* Unlock the SCR. */ 378 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0); 379 380 /* Write the base address information into SCR[0]. */ 381 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0); 382 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value); 383 384 /* Lock the SCR. */ 385 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0); 386 387 /* Unmap the SCR access ports and the SCR data ports. */ 388 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS); 389 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS); 390 391 return 0; 392 } 393 394 395 /* 396 * Configure the ESS chip for the desired IRQ and DMA channels. 397 * ESS ISA 398 * -------- 399 * IRQA irq9 400 * IRQB irq5 401 * IRQC irq7 402 * IRQD irq10 403 * IRQE irq15 404 * 405 * DRQA drq0 406 * DRQB drq1 407 * DRQC drq3 408 * DRQD drq5 409 */ 410 void 411 ess_config_irq(sc) 412 struct ess_softc *sc; 413 { 414 int v; 415 416 DPRINTFN(2,("ess_config_irq\n")); 417 418 if (sc->sc_in.irq != sc->sc_out.irq) { 419 /* Configure Audio 1 (record) for the appropriate IRQ line. */ 420 v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */ 421 switch(sc->sc_in.irq) { 422 case 5: 423 v |= ESS_IRQ_CTRL_INTRB; 424 break; 425 case 7: 426 v |= ESS_IRQ_CTRL_INTRC; 427 break; 428 case 9: 429 v |= ESS_IRQ_CTRL_INTRA; 430 break; 431 case 10: 432 v |= ESS_IRQ_CTRL_INTRD; 433 break; 434 #ifdef DIAGNOSTIC 435 default: 436 printf("ess: configured irq %d not supported for Audio 1\n", 437 sc->sc_in.irq); 438 return; 439 #endif 440 } 441 ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v); 442 /* irq2 is hardwired to 15 in this mode */ 443 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 444 ESS_AUDIO2_CTRL2_IRQ2_ENABLE); 445 /* Use old method. */ 446 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888); 447 } else { 448 /* Use new method, both interrupts are the same. */ 449 v = ESS_IS_SELECT_IRQ; /* enable intrs */ 450 switch(sc->sc_out.irq) { 451 case 5: 452 v |= ESS_IS_INTRB; 453 break; 454 case 7: 455 v |= ESS_IS_INTRC; 456 break; 457 case 9: 458 v |= ESS_IS_INTRA; 459 break; 460 case 10: 461 v |= ESS_IS_INTRD; 462 break; 463 case 15: 464 v |= ESS_IS_INTRE; 465 break; 466 #ifdef DIAGNOSTIC 467 default: 468 printf("ess_config_irq: configured irq %d not supported for Audio 1\n", 469 sc->sc_in.irq); 470 return; 471 #endif 472 } 473 /* Set the IRQ */ 474 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v); 475 } 476 } 477 478 479 void 480 ess_config_drq(sc) 481 struct ess_softc *sc; 482 { 483 int v; 484 485 DPRINTFN(2,("ess_config_drq\n")); 486 487 /* Configure Audio 1 (record) for DMA on the appropriate channel. */ 488 v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT; 489 switch(sc->sc_in.drq) { 490 case 0: 491 v |= ESS_DRQ_CTRL_DRQA; 492 break; 493 case 1: 494 v |= ESS_DRQ_CTRL_DRQB; 495 break; 496 case 3: 497 v |= ESS_DRQ_CTRL_DRQC; 498 break; 499 #ifdef DIAGNOSTIC 500 default: 501 printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n", 502 sc->sc_in.drq); 503 return; 504 #endif 505 } 506 /* Set DRQ1 */ 507 ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v); 508 509 /* Configure DRQ2 */ 510 v = ESS_AUDIO2_CTRL3_DRQ_PD; 511 switch(sc->sc_out.drq) { 512 case 0: 513 v |= ESS_AUDIO2_CTRL3_DRQA; 514 break; 515 case 1: 516 v |= ESS_AUDIO2_CTRL3_DRQB; 517 break; 518 case 3: 519 v |= ESS_AUDIO2_CTRL3_DRQC; 520 break; 521 case 5: 522 v |= ESS_AUDIO2_CTRL3_DRQC; 523 break; 524 #ifdef DIAGNOSTIC 525 default: 526 printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n", 527 sc->sc_out.drq); 528 return; 529 #endif 530 } 531 ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v); 532 /* Enable DMA 2 */ 533 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 534 ESS_AUDIO2_CTRL2_DMA_ENABLE); 535 } 536 537 /* 538 * Set up registers after a reset. 539 */ 540 void 541 ess_setup(sc) 542 struct ess_softc *sc; 543 { 544 ess_config_irq(sc); 545 ess_config_drq(sc); 546 if (IS16BITDRQ(sc->sc_out.drq)) 547 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 548 ESS_AUDIO2_CTRL1_XFER_SIZE); 549 else 550 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 551 ESS_AUDIO2_CTRL1_XFER_SIZE); 552 553 #if 0 554 /* Use 8 bytes per output DMA. */ 555 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, ESS_AUDIO2_CTRL1_DEMAND_8); 556 /* Use 4 bytes per input DMA. */ 557 ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL, ESS_DEMAND_CTRL_DEMAND_4); 558 #endif 559 560 DPRINTFN(2,("ess_setup: done\n")); 561 } 562 563 /* 564 * Determine the model of ESS chip we are talking to. Currently we 565 * only support ES1888, ES1887 and ES888. The method of determining 566 * the chip is based on the information on page 27 of the ES1887 data 567 * sheet. 568 * 569 * This routine sets the values of sc->sc_model and sc->sc_version. 570 */ 571 int 572 ess_identify(sc) 573 struct ess_softc *sc; 574 { 575 u_char reg1; 576 u_char reg2; 577 u_char reg3; 578 579 sc->sc_model = ESS_UNSUPPORTED; 580 sc->sc_version = 0; 581 582 583 /* 584 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where 585 * n >= 8 for an ES1887 or an ES888. Other values indicate 586 * earlier (unsupported) chips. 587 */ 588 ess_wdsp(sc, ESS_ACMD_LEGACY_ID); 589 590 if ((reg1 = ess_rdsp(sc)) != 0x68) { 591 printf("ess: First ID byte wrong (0x%02x)\n", reg1); 592 return 1; 593 } 594 595 reg2 = ess_rdsp(sc); 596 if (((reg2 & 0xf0) != 0x80) || 597 ((reg2 & 0x0f) < 8)) { 598 printf("ess: Second ID byte wrong (0x%02x)\n", reg2); 599 return 1; 600 } 601 602 /* 603 * Store the ID bytes as the version. 604 */ 605 sc->sc_version = (reg1 << 8) + reg2; 606 607 608 /* 609 * 2. Verify we can change bit 2 in mixer register 0x64. This 610 * should be possible on all supported chips. 611 */ 612 reg1 = ess_read_mix_reg(sc, 0x64); 613 reg2 = reg1 ^ 0x04; /* toggle bit 2 */ 614 615 ess_write_mix_reg(sc, 0x64, reg2); 616 617 if (ess_read_mix_reg(sc, 0x64) != reg2) { 618 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n"); 619 return 1; 620 } 621 622 /* 623 * Restore the original value of mixer register 0x64. 624 */ 625 ess_write_mix_reg(sc, 0x64, reg1); 626 627 628 /* 629 * 3. Verify we can change the value of mixer register 630 * ESS_MREG_SAMPLE_RATE. 631 * This should be possible on all supported chips. 632 * It is not necessary to restore the value of this mixer register. 633 */ 634 reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE); 635 reg2 = reg1 ^ 0xff; /* toggle all bits */ 636 637 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2); 638 639 if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) { 640 printf("ess: Hardware error (unable to change mixer register 0x70)\n"); 641 return 1; 642 } 643 644 /* 645 * 4. Determine if we can change bit 5 in mixer register 0x64. 646 * This determines whether we have an ES1887: 647 * 648 * - can change indicates ES1887 649 * - can't change indicates ES1888 or ES888 650 */ 651 reg1 = ess_read_mix_reg(sc, 0x64); 652 reg2 = reg1 ^ 0x20; /* toggle bit 5 */ 653 654 ess_write_mix_reg(sc, 0x64, reg2); 655 656 if (ess_read_mix_reg(sc, 0x64) == reg2) { 657 sc->sc_model = ESS_1887; 658 659 /* 660 * Restore the original value of mixer register 0x64. 661 */ 662 ess_write_mix_reg(sc, 0x64, reg1); 663 } else { 664 /* 665 * 5. Determine if we can change the value of mixer 666 * register 0x69 independently of mixer register 667 * 0x68. This determines which chip we have: 668 * 669 * - can modify idependently indicates ES888 670 * - register 0x69 is an alias of 0x68 indicates ES1888 671 */ 672 reg1 = ess_read_mix_reg(sc, 0x68); 673 reg2 = ess_read_mix_reg(sc, 0x69); 674 reg3 = reg2 ^ 0xff; /* toggle all bits */ 675 676 /* 677 * Write different values to each register. 678 */ 679 ess_write_mix_reg(sc, 0x68, reg2); 680 ess_write_mix_reg(sc, 0x69, reg3); 681 682 if (ess_read_mix_reg(sc, 0x68) == reg2) 683 sc->sc_model = ESS_888; 684 else 685 sc->sc_model = ESS_1888; 686 687 /* 688 * Restore the original value of the registers. 689 */ 690 ess_write_mix_reg(sc, 0x68, reg1); 691 ess_write_mix_reg(sc, 0x69, reg2); 692 } 693 694 return 0; 695 } 696 697 698 int 699 ess_setup_sc(sc, doinit) 700 struct ess_softc *sc; 701 int doinit; 702 { 703 /* Reset the chip. */ 704 if (ess_reset(sc) != 0) { 705 DPRINTF(("ess_setup_sc: couldn't reset chip\n")); 706 return (1); 707 } 708 709 /* Identify the ESS chip, and check that it is supported. */ 710 if (ess_identify(sc)) { 711 DPRINTF(("ess_setup_sc: couldn't identify\n")); 712 return (1); 713 } 714 715 return (0); 716 } 717 718 /* 719 * Probe for the ESS hardware. 720 */ 721 int 722 essmatch(sc) 723 struct ess_softc *sc; 724 { 725 if (!ESS_BASE_VALID(sc->sc_iobase)) { 726 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase); 727 return (0); 728 } 729 730 /* Configure the ESS chip for the desired audio base address. */ 731 if (ess_config_addr(sc)) 732 return (0); 733 734 if (ess_setup_sc(sc, 1)) 735 return (0); 736 737 if (sc->sc_model == ESS_UNSUPPORTED) { 738 DPRINTF(("ess: Unsupported model\n")); 739 return (0); 740 } 741 742 /* Check that requested DMA channels are valid and different. */ 743 if (!ESS_DRQ1_VALID(sc->sc_in.drq)) { 744 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq); 745 return (0); 746 } 747 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) { 748 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq); 749 return (0); 750 } 751 if (sc->sc_in.drq == sc->sc_out.drq) { 752 printf("ess: play and record dma chan both %d\n", 753 sc->sc_in.drq); 754 return (0); 755 } 756 757 if (sc->sc_model == ESS_1887) { 758 /* 759 * Either use the 1887 interrupt mode with all interrupts 760 * mapped to the same irq, or use the 1888 method with 761 * irq fixed at 15. 762 */ 763 if (sc->sc_in.irq == sc->sc_out.irq) { 764 if (!ESS_IRQ12_VALID(sc->sc_in.irq)) { 765 printf("ess: irq %d invalid\n", sc->sc_in.irq); 766 return (0); 767 } 768 goto irq_not1888; 769 } 770 } else { 771 /* Must use separate interrupts */ 772 if (sc->sc_in.irq == sc->sc_out.irq) { 773 printf("ess: play and record irq both %d\n", 774 sc->sc_in.irq); 775 return (0); 776 } 777 } 778 779 /* Check that requested IRQ lines are valid and different. */ 780 if (!ESS_IRQ1_VALID(sc->sc_in.irq)) { 781 printf("ess: record irq %d invalid\n", sc->sc_in.irq); 782 return (0); 783 } 784 if (!ESS_IRQ2_VALID(sc->sc_out.irq)) { 785 printf("ess: play irq %d invalid\n", sc->sc_out.irq); 786 return (0); 787 } 788 irq_not1888: 789 790 /* Check that the DRQs are free. */ 791 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) || 792 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq)) 793 return (0); 794 /* XXX should we check IRQs as well? */ 795 796 return (1); 797 } 798 799 800 /* 801 * Attach hardware to driver, attach hardware driver to audio 802 * pseudo-device driver. 803 */ 804 void 805 essattach(sc) 806 struct ess_softc *sc; 807 { 808 struct audio_params pparams, rparams; 809 int i; 810 u_int v; 811 812 if (ess_setup_sc(sc, 0)) { 813 printf("%s: setup failed\n", sc->sc_dev.dv_xname); 814 return; 815 } 816 817 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq, 818 sc->sc_out.ist, IPL_AUDIO, 819 ess_intr_output, sc); 820 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq, 821 sc->sc_in.ist, IPL_AUDIO, 822 ess_intr_input, sc); 823 824 /* Create our DMA maps. */ 825 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq, 826 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 827 printf("%s: can't create map for drq %d\n", 828 sc->sc_dev.dv_xname, sc->sc_in.drq); 829 return; 830 } 831 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq, 832 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 833 printf("%s: can't create map for drq %d\n", 834 sc->sc_dev.dv_xname, sc->sc_out.drq); 835 return; 836 } 837 838 printf(" ESS Technology ES%s [version 0x%04x]\n", 839 essmodel[sc->sc_model], sc->sc_version); 840 841 /* 842 * Set record and play parameters to default values defined in 843 * generic audio driver. 844 */ 845 pparams = audio_default; 846 rparams = audio_default; 847 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams); 848 849 /* Do a hardware reset on the mixer. */ 850 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET); 851 852 /* 853 * Set volume of Audio 1 to zero and disable Audio 1 DAC input 854 * to playback mixer, since playback is always through Audio 2. 855 */ 856 ess_write_mix_reg(sc, 0x14, 0); 857 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR); 858 859 /* 860 * Set hardware record source to use output of the record 861 * mixer. We do the selection of record source in software by 862 * setting the gain of the unused sources to zero. (See 863 * ess_set_in_ports.) 864 */ 865 ess_set_mreg_bits(sc, 0x1c, 0x07); 866 ess_clear_mreg_bits(sc, 0x7a, 0x10); 867 ess_set_mreg_bits(sc, 0x7a, 0x08); 868 869 /* 870 * Set gain on each mixer device to a sensible value. 871 * Devices not normally used are turned off, and other devices 872 * are set to 75% volume. 873 */ 874 for (i = 0; i < ESS_NDEVS; i++) { 875 switch(i) { 876 case ESS_MIC_PLAY_VOL: 877 case ESS_LINE_PLAY_VOL: 878 case ESS_CD_PLAY_VOL: 879 case ESS_AUXB_PLAY_VOL: 880 case ESS_DAC_REC_VOL: 881 case ESS_LINE_REC_VOL: 882 case ESS_SYNTH_REC_VOL: 883 case ESS_CD_REC_VOL: 884 case ESS_AUXB_REC_VOL: 885 v = 0; 886 break; 887 default: 888 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4); 889 break; 890 } 891 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v; 892 ess_set_gain(sc, i, 1); 893 } 894 895 ess_setup(sc); 896 897 /* Disable the speaker until the device is opened. */ 898 ess_speaker_off(sc); 899 sc->spkr_state = SPKR_OFF; 900 901 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]); 902 sprintf(ess_device.version, "0x%04x", sc->sc_version); 903 904 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev); 905 906 #ifdef AUDIO_DEBUG 907 ess_printsc(sc); 908 #endif 909 } 910 911 /* 912 * Various routines to interface to higher level audio driver 913 */ 914 915 int 916 ess_open(addr, flags) 917 void *addr; 918 int flags; 919 { 920 struct ess_softc *sc = addr; 921 922 DPRINTF(("ess_open: sc=%p\n", sc)); 923 924 if (sc->sc_open != 0 || ess_reset(sc) != 0) 925 return ENXIO; 926 927 ess_setup(sc); /* because we did a reset */ 928 929 sc->sc_open = 1; 930 931 DPRINTF(("ess_open: opened\n")); 932 933 return (0); 934 } 935 936 void 937 ess_close(addr) 938 void *addr; 939 { 940 struct ess_softc *sc = addr; 941 942 DPRINTF(("ess_close: sc=%p\n", sc)); 943 944 sc->sc_open = 0; 945 ess_speaker_off(sc); 946 sc->spkr_state = SPKR_OFF; 947 ess_halt_output(sc); 948 ess_halt_input(sc); 949 sc->sc_in.intr = 0; 950 sc->sc_out.intr = 0; 951 952 DPRINTF(("ess_close: closed\n")); 953 } 954 955 /* 956 * Wait for FIFO to drain, and analog section to settle. 957 * XXX should check FIFO full bit. 958 */ 959 int 960 ess_drain(addr) 961 void *addr; 962 { 963 extern int hz; /* XXX */ 964 965 tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */ 966 return (0); 967 } 968 969 int 970 ess_speaker_ctl(addr, newstate) 971 void *addr; 972 int newstate; 973 { 974 struct ess_softc *sc = addr; 975 976 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) { 977 ess_speaker_on(sc); 978 sc->spkr_state = SPKR_ON; 979 } 980 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) { 981 ess_speaker_off(sc); 982 sc->spkr_state = SPKR_OFF; 983 } 984 return (0); 985 } 986 987 int 988 ess_getdev(addr, retp) 989 void *addr; 990 struct audio_device *retp; 991 { 992 *retp = ess_device; 993 return (0); 994 } 995 996 int 997 ess_query_encoding(addr, fp) 998 void *addr; 999 struct audio_encoding *fp; 1000 { 1001 /*struct ess_softc *sc = addr;*/ 1002 1003 switch (fp->index) { 1004 case 0: 1005 strcpy(fp->name, AudioEulinear); 1006 fp->encoding = AUDIO_ENCODING_ULINEAR; 1007 fp->precision = 8; 1008 fp->flags = 0; 1009 return (0); 1010 case 1: 1011 strcpy(fp->name, AudioEmulaw); 1012 fp->encoding = AUDIO_ENCODING_ULAW; 1013 fp->precision = 8; 1014 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1015 return (0); 1016 case 2: 1017 strcpy(fp->name, AudioEalaw); 1018 fp->encoding = AUDIO_ENCODING_ALAW; 1019 fp->precision = 8; 1020 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1021 return (0); 1022 case 3: 1023 strcpy(fp->name, AudioEslinear); 1024 fp->encoding = AUDIO_ENCODING_SLINEAR; 1025 fp->precision = 8; 1026 fp->flags = 0; 1027 return (0); 1028 case 4: 1029 strcpy(fp->name, AudioEslinear_le); 1030 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 1031 fp->precision = 16; 1032 fp->flags = 0; 1033 return (0); 1034 case 5: 1035 strcpy(fp->name, AudioEulinear_le); 1036 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 1037 fp->precision = 16; 1038 fp->flags = 0; 1039 return (0); 1040 case 6: 1041 strcpy(fp->name, AudioEslinear_be); 1042 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 1043 fp->precision = 16; 1044 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1045 return (0); 1046 case 7: 1047 strcpy(fp->name, AudioEulinear_be); 1048 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 1049 fp->precision = 16; 1050 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1051 return (0); 1052 default: 1053 return EINVAL; 1054 } 1055 return (0); 1056 } 1057 1058 int 1059 ess_set_params(addr, setmode, usemode, play, rec) 1060 void *addr; 1061 int setmode, usemode; 1062 struct audio_params *play, *rec; 1063 { 1064 struct ess_softc *sc = addr; 1065 void (*swcode) __P((void *, u_char *buf, int cnt)); 1066 struct audio_params *p; 1067 int mode; 1068 1069 DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode)); 1070 1071 if (play->sample_rate != rec->sample_rate) { 1072 /* 1073 * The manual claims that in full-duplex operation the sample 1074 * rates must be the same. This is a lie. It appears that 1075 * the only bit in common is the crystal selection. However, 1076 * we'll be conservative here. - mycroft 1077 */ 1078 if (usemode == AUMODE_PLAY) { 1079 rec->sample_rate = play->sample_rate; 1080 setmode |= AUMODE_RECORD; 1081 } else if (usemode == AUMODE_RECORD) { 1082 play->sample_rate = rec->sample_rate; 1083 setmode |= AUMODE_PLAY; 1084 } else 1085 return (EINVAL); 1086 } 1087 1088 /* Set first record info, then play info */ 1089 for(mode = AUMODE_RECORD; mode != -1; 1090 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1091 if ((setmode & mode) == 0) 1092 continue; 1093 1094 p = mode == AUMODE_PLAY ? play : rec; 1095 switch (mode) { 1096 case AUMODE_PLAY: 1097 if (ess_set_out_sr(sc, p->sample_rate) != 0 || 1098 ess_set_out_precision(sc, p->precision) != 0 || 1099 ess_set_out_channels(sc, p->channels) != 0) { 1100 return (EINVAL); 1101 } 1102 break; 1103 1104 case AUMODE_RECORD: 1105 if (ess_set_in_sr(sc, p->sample_rate) != 0 || 1106 ess_set_in_precision(sc, p->precision) != 0 || 1107 ess_set_in_channels(sc, p->channels) != 0) { 1108 return (EINVAL); 1109 } 1110 break; 1111 } 1112 1113 swcode = 0; 1114 1115 switch (p->encoding) { 1116 case AUDIO_ENCODING_SLINEAR_BE: 1117 if (p->precision == 16) 1118 swcode = swap_bytes; 1119 /* fall into */ 1120 case AUDIO_ENCODING_SLINEAR_LE: 1121 if (mode == AUMODE_PLAY) 1122 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1123 ESS_AUDIO2_CTRL2_FIFO_SIGNED); 1124 else 1125 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1126 ESS_AUDIO1_CTRL1_FIFO_SIGNED); 1127 break; 1128 case AUDIO_ENCODING_ULINEAR_BE: 1129 if (p->precision == 16) 1130 swcode = swap_bytes; 1131 /* fall into */ 1132 case AUDIO_ENCODING_ULINEAR_LE: 1133 ulin8: 1134 if (mode == AUMODE_PLAY) 1135 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1136 ESS_AUDIO2_CTRL2_FIFO_SIGNED); 1137 else 1138 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1139 ESS_AUDIO1_CTRL1_FIFO_SIGNED); 1140 break; 1141 case AUDIO_ENCODING_ULAW: 1142 swcode = mode == AUMODE_PLAY ? 1143 mulaw_to_ulinear8 : ulinear8_to_mulaw; 1144 goto ulin8; 1145 case AUDIO_ENCODING_ALAW: 1146 swcode = mode == AUMODE_PLAY ? 1147 alaw_to_ulinear8 : ulinear8_to_alaw; 1148 goto ulin8; 1149 default: 1150 return EINVAL; 1151 } 1152 p->sw_code = swcode; 1153 } 1154 1155 sc->sc_in.active = 0; 1156 sc->sc_out.active = 0; 1157 1158 return (0); 1159 } 1160 int 1161 ess_set_in_sr(addr, sr) 1162 void *addr; 1163 u_long sr; 1164 { 1165 struct ess_softc *sc = addr; 1166 1167 if (sr < ESS_MINRATE || sr > ESS_MAXRATE) 1168 return (EINVAL); 1169 /* 1170 * Program the sample rate and filter clock for the record 1171 * channel (Audio 1). 1172 */ 1173 DPRINTF(("ess_set_in_sr: %ld\n", sr)); 1174 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(sr)); 1175 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(sr)); 1176 1177 return (0); 1178 } 1179 1180 int 1181 ess_set_out_sr(addr, sr) 1182 void *addr; 1183 u_long sr; 1184 { 1185 struct ess_softc *sc = addr; 1186 1187 if (sr < ESS_MINRATE || sr > ESS_MAXRATE) 1188 return (EINVAL); 1189 /* 1190 * Program the sample rate and filter clock for the playback 1191 * channel (Audio 2). 1192 */ 1193 DPRINTF(("ess_set_out_sr: %ld\n", sr)); 1194 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(sr)); 1195 ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(sr)); 1196 1197 return (0); 1198 } 1199 1200 int 1201 ess_set_in_precision(addr, precision) 1202 void *addr; 1203 u_int precision; 1204 { 1205 struct ess_softc *sc = addr; 1206 1207 /* 1208 * REVISIT: Should we set DMA transfer type to 2-byte or 1209 * 4-byte demand? This would probably better be done 1210 * when configuring the DMA channel. See xreg 0xB9. 1211 */ 1212 DPRINTF(("ess_set_in_precision: %d\n", precision)); 1213 switch (precision) { 1214 case 8: 1215 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1216 ESS_AUDIO1_CTRL1_FIFO_SIZE); 1217 break; 1218 1219 case 16: 1220 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1221 ESS_AUDIO1_CTRL1_FIFO_SIZE); 1222 break; 1223 1224 default: 1225 return (EINVAL); 1226 } 1227 return (0); 1228 } 1229 1230 int 1231 ess_set_out_precision(addr, precision) 1232 void *addr; 1233 u_int precision; 1234 { 1235 struct ess_softc *sc = addr; 1236 1237 DPRINTF(("ess_set_in_precision: %d\n", precision)); 1238 switch (precision) { 1239 case 8: 1240 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1241 ESS_AUDIO2_CTRL2_FIFO_SIZE); 1242 break; 1243 1244 case 16: 1245 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1246 ESS_AUDIO2_CTRL2_FIFO_SIZE); 1247 break; 1248 1249 default: 1250 return (EINVAL); 1251 } 1252 return (0); 1253 } 1254 1255 int 1256 ess_set_in_channels(addr, channels) 1257 void *addr; 1258 int channels; 1259 { 1260 struct ess_softc *sc = addr; 1261 1262 switch(channels) { 1263 case 1: 1264 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL, 1265 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) | 1266 ESS_AUDIO_CTRL_MONO) &~ ESS_AUDIO_CTRL_STEREO); 1267 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1268 ESS_AUDIO1_CTRL1_FIFO_STEREO); 1269 break; 1270 1271 case 2: 1272 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL, 1273 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) | 1274 ESS_AUDIO_CTRL_STEREO) &~ ESS_AUDIO_CTRL_MONO); 1275 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1276 ESS_AUDIO1_CTRL1_FIFO_STEREO); 1277 break; 1278 1279 default: 1280 return (EINVAL); 1281 break; 1282 } 1283 1284 sc->sc_in.channels = channels; 1285 1286 return (0); 1287 } 1288 1289 int 1290 ess_set_out_channels(addr, channels) 1291 void *addr; 1292 int channels; 1293 { 1294 struct ess_softc *sc = addr; 1295 1296 switch(channels) { 1297 case 1: 1298 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1299 ESS_AUDIO2_CTRL2_CHANNELS); 1300 break; 1301 1302 case 2: 1303 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1304 ESS_AUDIO2_CTRL2_CHANNELS); 1305 break; 1306 1307 default: 1308 return (EINVAL); 1309 break; 1310 } 1311 1312 sc->sc_out.channels = channels; 1313 1314 return (0); 1315 } 1316 1317 int 1318 ess_dma_init_output(addr, buf, cc) 1319 void *addr; 1320 void *buf; 1321 int cc; 1322 { 1323 struct ess_softc *sc = addr; 1324 1325 DPRINTF(("ess_dma_init_output: buf=%p cc=%d chan=%d\n", 1326 buf, cc, sc->sc_out.drq)); 1327 isa_dmastart(sc->sc_ic, sc->sc_out.drq, buf, 1328 cc, NULL, DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1329 return 0; 1330 } 1331 1332 int 1333 ess_dma_output(addr, p, cc, intr, arg) 1334 void *addr; 1335 void *p; 1336 int cc; 1337 void (*intr) __P((void *)); 1338 void *arg; 1339 { 1340 struct ess_softc *sc = addr; 1341 1342 DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg)); 1343 #ifdef DIAGNOSTIC 1344 if (sc->sc_out.channels == 2 && (cc & 1)) { 1345 DPRINTF(("stereo playback odd bytes (%d)\n", cc)); 1346 return EIO; 1347 } 1348 #endif 1349 1350 sc->sc_out.intr = intr; 1351 sc->sc_out.arg = arg; 1352 if (sc->sc_out.active) 1353 return (0); 1354 1355 DPRINTF(("ess_dma_output: set up DMA\n")); 1356 1357 sc->sc_out.active = 1; 1358 1359 if (IS16BITDRQ(sc->sc_out.drq)) 1360 cc >>= 1; /* use word count for 16 bit DMA */ 1361 /* Program transfer count registers with 2's complement of count. */ 1362 cc = -cc; 1363 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc); 1364 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8); 1365 1366 /* Start auto-init DMA */ 1367 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1368 ESS_AUDIO2_CTRL1_DAC_ENABLE | 1369 ESS_AUDIO2_CTRL1_FIFO_ENABLE | 1370 ESS_AUDIO2_CTRL1_AUTO_INIT); 1371 1372 return (0); 1373 1374 } 1375 1376 int 1377 ess_dma_init_input(addr, buf, cc) 1378 void *addr; 1379 void *buf; 1380 int cc; 1381 { 1382 struct ess_softc *sc = addr; 1383 1384 DPRINTF(("ess_dma_init_input: buf=%p cc=%d chan=%d\n", 1385 buf, cc, sc->sc_in.drq)); 1386 isa_dmastart(sc->sc_ic, sc->sc_in.drq, buf, 1387 cc, NULL, DMAMODE_READ | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1388 return 0; 1389 } 1390 1391 int 1392 ess_dma_input(addr, p, cc, intr, arg) 1393 void *addr; 1394 void *p; 1395 int cc; 1396 void (*intr) __P((void *)); 1397 void *arg; 1398 { 1399 struct ess_softc *sc = addr; 1400 1401 DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg)); 1402 #ifdef DIAGNOSTIC 1403 if (sc->sc_in.channels == 2 && (cc & 1)) { 1404 DPRINTF(("stereo record odd bytes (%d)\n", cc)); 1405 return EIO; 1406 } 1407 #endif 1408 1409 sc->sc_in.intr = intr; 1410 sc->sc_in.arg = arg; 1411 if (sc->sc_in.active) 1412 return (0); 1413 1414 DPRINTF(("ess_dma_input: set up DMA\n")); 1415 1416 sc->sc_in.active = 1; 1417 1418 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */ 1419 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1420 ESS_AUDIO1_CTRL1_FIFO_CONNECT); 1421 1422 if (IS16BITDRQ(sc->sc_out.drq)) 1423 cc >>= 1; /* use word count for 16 bit DMA */ 1424 /* Program transfer count registers with 2's complement of count. */ 1425 cc = -cc; 1426 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc); 1427 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8); 1428 1429 /* Start auto-init DMA */ 1430 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2, 1431 ESS_AUDIO1_CTRL2_DMA_READ | 1432 ESS_AUDIO1_CTRL2_ADC_ENABLE | 1433 ESS_AUDIO1_CTRL2_FIFO_ENABLE | 1434 ESS_AUDIO1_CTRL2_AUTO_INIT); 1435 1436 return (0); 1437 1438 } 1439 1440 int 1441 ess_halt_output(addr) 1442 void *addr; 1443 { 1444 struct ess_softc *sc = addr; 1445 1446 DPRINTF(("ess_halt_output: sc=%p\n", sc)); 1447 1448 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1449 ESS_AUDIO2_CTRL1_FIFO_ENABLE); 1450 return (0); 1451 } 1452 1453 int 1454 ess_halt_input(addr) 1455 void *addr; 1456 { 1457 struct ess_softc *sc = addr; 1458 1459 DPRINTF(("ess_halt_input: sc=%p\n", sc)); 1460 1461 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2, 1462 ESS_AUDIO1_CTRL2_FIFO_ENABLE); 1463 return (0); 1464 } 1465 1466 int 1467 ess_intr_output(arg) 1468 void *arg; 1469 { 1470 struct ess_softc *sc = arg; 1471 1472 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr)); 1473 1474 /* clear interrupt on Audio channel 2 */ 1475 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1476 ESS_AUDIO2_CTRL2_IRQ_LATCH); 1477 1478 sc->sc_out.nintr++; 1479 1480 if (sc->sc_out.intr != 0) 1481 (*sc->sc_out.intr)(sc->sc_out.arg); 1482 else 1483 return (0); 1484 1485 return (1); 1486 } 1487 1488 int 1489 ess_intr_input(arg) 1490 void *arg; 1491 { 1492 struct ess_softc *sc = arg; 1493 u_char x; 1494 1495 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr)); 1496 1497 /* clear interrupt on Audio channel 1*/ 1498 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR); 1499 1500 sc->sc_in.nintr++; 1501 1502 if (sc->sc_in.intr != 0) 1503 (*sc->sc_in.intr)(sc->sc_in.arg); 1504 else 1505 return (0); 1506 1507 return (1); 1508 } 1509 1510 int 1511 ess_round_blocksize(addr, blk) 1512 void *addr; 1513 int blk; 1514 { 1515 return (blk & -8); /* round for max DMA size */ 1516 } 1517 1518 int 1519 ess_set_port(addr, cp) 1520 void *addr; 1521 mixer_ctrl_t *cp; 1522 { 1523 struct ess_softc *sc = addr; 1524 int lgain, rgain; 1525 1526 DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n", 1527 cp->dev, cp->un.value.num_channels)); 1528 1529 switch (cp->dev) { 1530 /* 1531 * The following mixer ports are all stereo. If we get a 1532 * single-channel gain value passed in, then we duplicate it 1533 * to both left and right channels. 1534 */ 1535 case ESS_MASTER_VOL: 1536 case ESS_DAC_PLAY_VOL: 1537 case ESS_MIC_PLAY_VOL: 1538 case ESS_LINE_PLAY_VOL: 1539 case ESS_SYNTH_PLAY_VOL: 1540 case ESS_CD_PLAY_VOL: 1541 case ESS_AUXB_PLAY_VOL: 1542 case ESS_DAC_REC_VOL: 1543 case ESS_MIC_REC_VOL: 1544 case ESS_LINE_REC_VOL: 1545 case ESS_SYNTH_REC_VOL: 1546 case ESS_CD_REC_VOL: 1547 case ESS_AUXB_REC_VOL: 1548 case ESS_RECORD_VOL: 1549 if (cp->type != AUDIO_MIXER_VALUE) 1550 return EINVAL; 1551 1552 switch (cp->un.value.num_channels) { 1553 case 1: 1554 lgain = rgain = ESS_4BIT_GAIN( 1555 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 1556 break; 1557 case 2: 1558 lgain = ESS_4BIT_GAIN( 1559 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]); 1560 rgain = ESS_4BIT_GAIN( 1561 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]); 1562 break; 1563 default: 1564 return EINVAL; 1565 } 1566 1567 sc->gain[cp->dev][ESS_LEFT] = lgain; 1568 sc->gain[cp->dev][ESS_RIGHT] = rgain; 1569 1570 ess_set_gain(sc, cp->dev, 1); 1571 break; 1572 1573 1574 /* 1575 * The PC speaker port is mono. If we get a stereo gain value 1576 * passed in, then we return EINVAL. 1577 */ 1578 case ESS_PCSPEAKER_VOL: 1579 if (cp->un.value.num_channels != 1) 1580 return EINVAL; 1581 1582 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] = 1583 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 1584 ess_set_gain(sc, cp->dev, 1); 1585 break; 1586 1587 1588 case ESS_MIC_PREAMP: 1589 if (cp->type != AUDIO_MIXER_ENUM) 1590 return EINVAL; 1591 1592 if (cp->un.ord) 1593 /* Enable microphone preamp */ 1594 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL, 1595 ESS_PREAMP_CTRL_ENABLE); 1596 else 1597 /* Disable microphone preamp */ 1598 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL, 1599 ESS_PREAMP_CTRL_ENABLE); 1600 break; 1601 1602 case ESS_RECORD_SOURCE: 1603 if (cp->type == AUDIO_MIXER_SET) 1604 return ess_set_in_ports(sc, cp->un.mask); 1605 else 1606 return EINVAL; 1607 break; 1608 1609 case ESS_RECORD_MONITOR: 1610 if (cp->type != AUDIO_MIXER_ENUM) 1611 return EINVAL; 1612 1613 if (cp->un.ord) 1614 /* Enable monitor */ 1615 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1616 ESS_AUDIO_CTRL_MONITOR); 1617 else 1618 /* Disable monitor */ 1619 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1620 ESS_AUDIO_CTRL_MONITOR); 1621 break; 1622 1623 default: 1624 return EINVAL; 1625 } 1626 1627 return (0); 1628 } 1629 1630 int 1631 ess_get_port(addr, cp) 1632 void *addr; 1633 mixer_ctrl_t *cp; 1634 { 1635 struct ess_softc *sc = addr; 1636 1637 DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev)); 1638 1639 switch (cp->dev) { 1640 case ESS_DAC_PLAY_VOL: 1641 case ESS_MIC_PLAY_VOL: 1642 case ESS_LINE_PLAY_VOL: 1643 case ESS_SYNTH_PLAY_VOL: 1644 case ESS_CD_PLAY_VOL: 1645 case ESS_AUXB_PLAY_VOL: 1646 case ESS_MASTER_VOL: 1647 case ESS_PCSPEAKER_VOL: 1648 case ESS_DAC_REC_VOL: 1649 case ESS_MIC_REC_VOL: 1650 case ESS_LINE_REC_VOL: 1651 case ESS_SYNTH_REC_VOL: 1652 case ESS_CD_REC_VOL: 1653 case ESS_AUXB_REC_VOL: 1654 case ESS_RECORD_VOL: 1655 if (cp->dev == ESS_PCSPEAKER_VOL && 1656 cp->un.value.num_channels != 1) 1657 return EINVAL; 1658 1659 switch (cp->un.value.num_channels) { 1660 case 1: 1661 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1662 sc->gain[cp->dev][ESS_LEFT]; 1663 break; 1664 case 2: 1665 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1666 sc->gain[cp->dev][ESS_LEFT]; 1667 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1668 sc->gain[cp->dev][ESS_RIGHT]; 1669 break; 1670 default: 1671 return EINVAL; 1672 } 1673 break; 1674 1675 case ESS_MIC_PREAMP: 1676 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) & 1677 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0; 1678 break; 1679 1680 case ESS_RECORD_SOURCE: 1681 cp->un.mask = sc->in_mask; 1682 break; 1683 1684 case ESS_RECORD_MONITOR: 1685 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) & 1686 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0; 1687 break; 1688 1689 default: 1690 return EINVAL; 1691 } 1692 1693 return (0); 1694 } 1695 1696 int 1697 ess_query_devinfo(addr, dip) 1698 void *addr; 1699 mixer_devinfo_t *dip; 1700 { 1701 #ifdef AUDIO_DEBUG 1702 struct ess_softc *sc = addr; 1703 #endif 1704 1705 DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n", 1706 sc->sc_model, dip->index)); 1707 1708 /* 1709 * REVISIT: There are some slight differences between the 1710 * mixers on the different ESS chips, which can 1711 * be sorted out using the chip model rather than a 1712 * separate mixer model. 1713 * This is currently coded assuming an ES1887; we 1714 * need to work out which bits are not applicable to 1715 * the other models (1888 and 888). 1716 */ 1717 switch (dip->index) { 1718 case ESS_DAC_PLAY_VOL: 1719 dip->type = AUDIO_MIXER_VALUE; 1720 dip->mixer_class = ESS_INPUT_CLASS; 1721 dip->prev = AUDIO_MIXER_LAST; 1722 dip->next = AUDIO_MIXER_LAST; 1723 strcpy(dip->label.name, AudioNdac); 1724 dip->un.v.num_channels = 2; 1725 strcpy(dip->un.v.units.name, AudioNvolume); 1726 return (0); 1727 1728 case ESS_MIC_PLAY_VOL: 1729 dip->type = AUDIO_MIXER_VALUE; 1730 dip->mixer_class = ESS_INPUT_CLASS; 1731 dip->prev = AUDIO_MIXER_LAST; 1732 dip->next = AUDIO_MIXER_LAST; 1733 strcpy(dip->label.name, AudioNmicrophone); 1734 dip->un.v.num_channels = 2; 1735 strcpy(dip->un.v.units.name, AudioNvolume); 1736 return (0); 1737 1738 case ESS_LINE_PLAY_VOL: 1739 dip->type = AUDIO_MIXER_VALUE; 1740 dip->mixer_class = ESS_INPUT_CLASS; 1741 dip->prev = AUDIO_MIXER_LAST; 1742 dip->next = AUDIO_MIXER_LAST; 1743 strcpy(dip->label.name, AudioNline); 1744 dip->un.v.num_channels = 2; 1745 strcpy(dip->un.v.units.name, AudioNvolume); 1746 return (0); 1747 1748 case ESS_SYNTH_PLAY_VOL: 1749 dip->type = AUDIO_MIXER_VALUE; 1750 dip->mixer_class = ESS_INPUT_CLASS; 1751 dip->prev = AUDIO_MIXER_LAST; 1752 dip->next = AUDIO_MIXER_LAST; 1753 strcpy(dip->label.name, AudioNfmsynth); 1754 dip->un.v.num_channels = 2; 1755 strcpy(dip->un.v.units.name, AudioNvolume); 1756 return (0); 1757 1758 case ESS_CD_PLAY_VOL: 1759 dip->type = AUDIO_MIXER_VALUE; 1760 dip->mixer_class = ESS_INPUT_CLASS; 1761 dip->prev = AUDIO_MIXER_LAST; 1762 dip->next = AUDIO_MIXER_LAST; 1763 strcpy(dip->label.name, AudioNcd); 1764 dip->un.v.num_channels = 2; 1765 strcpy(dip->un.v.units.name, AudioNvolume); 1766 return (0); 1767 1768 case ESS_AUXB_PLAY_VOL: 1769 dip->type = AUDIO_MIXER_VALUE; 1770 dip->mixer_class = ESS_INPUT_CLASS; 1771 dip->prev = AUDIO_MIXER_LAST; 1772 dip->next = AUDIO_MIXER_LAST; 1773 strcpy(dip->label.name, "auxb"); 1774 dip->un.v.num_channels = 2; 1775 strcpy(dip->un.v.units.name, AudioNvolume); 1776 return (0); 1777 1778 case ESS_INPUT_CLASS: 1779 dip->type = AUDIO_MIXER_CLASS; 1780 dip->mixer_class = ESS_INPUT_CLASS; 1781 dip->next = dip->prev = AUDIO_MIXER_LAST; 1782 strcpy(dip->label.name, AudioCinputs); 1783 return (0); 1784 1785 1786 case ESS_MASTER_VOL: 1787 dip->type = AUDIO_MIXER_VALUE; 1788 dip->mixer_class = ESS_OUTPUT_CLASS; 1789 dip->prev = dip->next = AUDIO_MIXER_LAST; 1790 strcpy(dip->label.name, AudioNmaster); 1791 dip->un.v.num_channels = 2; 1792 strcpy(dip->un.v.units.name, AudioNvolume); 1793 return (0); 1794 1795 case ESS_PCSPEAKER_VOL: 1796 dip->type = AUDIO_MIXER_VALUE; 1797 dip->mixer_class = ESS_OUTPUT_CLASS; 1798 dip->prev = AUDIO_MIXER_LAST; 1799 dip->next = AUDIO_MIXER_LAST; 1800 strcpy(dip->label.name, "pc_speaker"); 1801 dip->un.v.num_channels = 1; 1802 strcpy(dip->un.v.units.name, AudioNvolume); 1803 return (0); 1804 1805 case ESS_OUTPUT_CLASS: 1806 dip->type = AUDIO_MIXER_CLASS; 1807 dip->mixer_class = ESS_OUTPUT_CLASS; 1808 dip->next = dip->prev = AUDIO_MIXER_LAST; 1809 strcpy(dip->label.name, AudioCoutputs); 1810 return (0); 1811 1812 1813 case ESS_DAC_REC_VOL: 1814 dip->type = AUDIO_MIXER_VALUE; 1815 dip->mixer_class = ESS_RECORD_CLASS; 1816 dip->prev = AUDIO_MIXER_LAST; 1817 dip->next = AUDIO_MIXER_LAST; 1818 strcpy(dip->label.name, AudioNdac); 1819 dip->un.v.num_channels = 2; 1820 strcpy(dip->un.v.units.name, AudioNvolume); 1821 return (0); 1822 1823 case ESS_MIC_REC_VOL: 1824 dip->type = AUDIO_MIXER_VALUE; 1825 dip->mixer_class = ESS_RECORD_CLASS; 1826 dip->prev = AUDIO_MIXER_LAST; 1827 dip->next = ESS_MIC_PREAMP; 1828 strcpy(dip->label.name, AudioNmicrophone); 1829 dip->un.v.num_channels = 2; 1830 strcpy(dip->un.v.units.name, AudioNvolume); 1831 return (0); 1832 1833 case ESS_LINE_REC_VOL: 1834 dip->type = AUDIO_MIXER_VALUE; 1835 dip->mixer_class = ESS_RECORD_CLASS; 1836 dip->prev = AUDIO_MIXER_LAST; 1837 dip->next = AUDIO_MIXER_LAST; 1838 strcpy(dip->label.name, AudioNline); 1839 dip->un.v.num_channels = 2; 1840 strcpy(dip->un.v.units.name, AudioNvolume); 1841 return (0); 1842 1843 case ESS_SYNTH_REC_VOL: 1844 dip->type = AUDIO_MIXER_VALUE; 1845 dip->mixer_class = ESS_RECORD_CLASS; 1846 dip->prev = AUDIO_MIXER_LAST; 1847 dip->next = AUDIO_MIXER_LAST; 1848 strcpy(dip->label.name, AudioNfmsynth); 1849 dip->un.v.num_channels = 2; 1850 strcpy(dip->un.v.units.name, AudioNvolume); 1851 return (0); 1852 1853 case ESS_CD_REC_VOL: 1854 dip->type = AUDIO_MIXER_VALUE; 1855 dip->mixer_class = ESS_RECORD_CLASS; 1856 dip->prev = AUDIO_MIXER_LAST; 1857 dip->next = AUDIO_MIXER_LAST; 1858 strcpy(dip->label.name, AudioNcd); 1859 dip->un.v.num_channels = 2; 1860 strcpy(dip->un.v.units.name, AudioNvolume); 1861 return (0); 1862 1863 case ESS_AUXB_REC_VOL: 1864 dip->type = AUDIO_MIXER_VALUE; 1865 dip->mixer_class = ESS_RECORD_CLASS; 1866 dip->prev = AUDIO_MIXER_LAST; 1867 dip->next = AUDIO_MIXER_LAST; 1868 strcpy(dip->label.name, "auxb"); 1869 dip->un.v.num_channels = 2; 1870 strcpy(dip->un.v.units.name, AudioNvolume); 1871 return (0); 1872 1873 case ESS_MIC_PREAMP: 1874 dip->type = AUDIO_MIXER_ENUM; 1875 dip->mixer_class = ESS_RECORD_CLASS; 1876 dip->prev = ESS_MIC_REC_VOL; 1877 dip->next = AUDIO_MIXER_LAST; 1878 strcpy(dip->label.name, AudioNenhanced); 1879 dip->un.e.num_mem = 2; 1880 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1881 dip->un.e.member[0].ord = 0; 1882 strcpy(dip->un.e.member[1].label.name, AudioNon); 1883 dip->un.e.member[1].ord = 1; 1884 return (0); 1885 1886 case ESS_RECORD_VOL: 1887 dip->type = AUDIO_MIXER_VALUE; 1888 dip->mixer_class = ESS_RECORD_CLASS; 1889 dip->prev = AUDIO_MIXER_LAST; 1890 dip->next = AUDIO_MIXER_LAST; 1891 strcpy(dip->label.name, AudioNrecord); 1892 dip->un.v.num_channels = 2; 1893 strcpy(dip->un.v.units.name, AudioNvolume); 1894 return (0); 1895 1896 case ESS_RECORD_SOURCE: 1897 dip->mixer_class = ESS_RECORD_CLASS; 1898 dip->prev = dip->next = AUDIO_MIXER_LAST; 1899 strcpy(dip->label.name, AudioNsource); 1900 dip->type = AUDIO_MIXER_SET; 1901 dip->un.s.num_mem = 6; 1902 strcpy(dip->un.s.member[0].label.name, AudioNdac); 1903 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL; 1904 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone); 1905 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL; 1906 strcpy(dip->un.s.member[2].label.name, AudioNline); 1907 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL; 1908 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1909 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL; 1910 strcpy(dip->un.s.member[4].label.name, AudioNcd); 1911 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL; 1912 strcpy(dip->un.s.member[5].label.name, "auxb"); 1913 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL; 1914 return (0); 1915 1916 case ESS_RECORD_CLASS: 1917 dip->type = AUDIO_MIXER_CLASS; 1918 dip->mixer_class = ESS_RECORD_CLASS; 1919 dip->next = dip->prev = AUDIO_MIXER_LAST; 1920 strcpy(dip->label.name, AudioCrecord); 1921 return (0); 1922 1923 1924 case ESS_RECORD_MONITOR: 1925 dip->mixer_class = ESS_MONITOR_CLASS; 1926 dip->prev = dip->next = AUDIO_MIXER_LAST; 1927 strcpy(dip->label.name, AudioNmonitor); 1928 dip->type = AUDIO_MIXER_ENUM; 1929 dip->un.e.num_mem = 2; 1930 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1931 dip->un.e.member[0].ord = 0; 1932 strcpy(dip->un.e.member[1].label.name, AudioNon); 1933 dip->un.e.member[1].ord = 1; 1934 return (0); 1935 1936 case ESS_MONITOR_CLASS: 1937 dip->type = AUDIO_MIXER_CLASS; 1938 dip->mixer_class = ESS_MONITOR_CLASS; 1939 dip->next = dip->prev = AUDIO_MIXER_LAST; 1940 strcpy(dip->label.name, AudioCmonitor); 1941 return (0); 1942 } 1943 1944 return (ENXIO); 1945 } 1946 1947 void * 1948 ess_malloc(addr, size, pool, flags) 1949 void *addr; 1950 unsigned long size; 1951 int pool; 1952 int flags; 1953 { 1954 struct ess_softc *sc = addr; 1955 1956 return isa_malloc(sc->sc_ic, 4, size, pool, flags); 1957 } 1958 1959 void 1960 ess_free(addr, ptr, pool) 1961 void *addr; 1962 void *ptr; 1963 int pool; 1964 { 1965 isa_free(ptr, pool); 1966 } 1967 1968 unsigned long 1969 ess_round(addr, size) 1970 void *addr; 1971 unsigned long size; 1972 { 1973 if (size > MAX_ISADMA) 1974 size = MAX_ISADMA; 1975 return size; 1976 } 1977 1978 int 1979 ess_mappage(addr, mem, off, prot) 1980 void *addr; 1981 void *mem; 1982 int off; 1983 int prot; 1984 { 1985 return (isa_mappage(mem, off, prot)); 1986 } 1987 1988 int 1989 ess_get_props(addr) 1990 void *addr; 1991 { 1992 struct ess_softc *sc = addr; 1993 return (AUDIO_PROP_MMAP | 1994 (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0)); 1995 } 1996 1997 /* ============================================ 1998 * Generic functions for ess, not used by audio h/w i/f 1999 * ============================================= 2000 */ 2001 2002 /* 2003 * Reset the chip. 2004 * Return non-zero if the chip isn't detected. 2005 */ 2006 int 2007 ess_reset(sc) 2008 struct ess_softc *sc; 2009 { 2010 bus_space_tag_t iot = sc->sc_iot; 2011 bus_space_handle_t ioh = sc->sc_ioh; 2012 2013 sc->sc_in.intr = 0; 2014 if (sc->sc_in.active) { 2015 isa_dmaabort(sc->sc_ic, sc->sc_in.drq); 2016 sc->sc_in.active = 0; 2017 } 2018 2019 sc->sc_out.intr = 0; 2020 if (sc->sc_out.active) { 2021 isa_dmaabort(sc->sc_ic, sc->sc_out.drq); 2022 sc->sc_out.active = 0; 2023 } 2024 2025 EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT); 2026 delay(10000); 2027 EWRITE1(iot, ioh, ESS_DSP_RESET, 0); 2028 if (ess_rdsp(sc) != ESS_MAGIC) 2029 return (1); 2030 2031 /* Enable access to the ESS extension commands. */ 2032 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT); 2033 2034 return (0); 2035 } 2036 2037 void 2038 ess_set_gain(sc, port, on) 2039 struct ess_softc *sc; 2040 int port; 2041 int on; 2042 { 2043 int gain, left, right; 2044 int mix; 2045 int src; 2046 int stereo; 2047 2048 /* 2049 * Most gain controls are found in the mixer registers and 2050 * are stereo. Any that are not, must set mix and stereo as 2051 * required. 2052 */ 2053 mix = 1; 2054 stereo = 1; 2055 2056 switch (port) { 2057 case ESS_MASTER_VOL: 2058 src = 0x32; 2059 break; 2060 case ESS_DAC_PLAY_VOL: 2061 src = 0x7C; 2062 break; 2063 case ESS_MIC_PLAY_VOL: 2064 src = 0x1A; 2065 break; 2066 case ESS_LINE_PLAY_VOL: 2067 src = 0x3E; 2068 break; 2069 case ESS_SYNTH_PLAY_VOL: 2070 src = 0x36; 2071 break; 2072 case ESS_CD_PLAY_VOL: 2073 src = 0x38; 2074 break; 2075 case ESS_AUXB_PLAY_VOL: 2076 src = 0x3A; 2077 break; 2078 case ESS_PCSPEAKER_VOL: 2079 src = 0x3C; 2080 stereo = 0; 2081 break; 2082 case ESS_DAC_REC_VOL: 2083 src = 0x69; 2084 break; 2085 case ESS_MIC_REC_VOL: 2086 src = 0x68; 2087 break; 2088 case ESS_LINE_REC_VOL: 2089 src = 0x6E; 2090 break; 2091 case ESS_SYNTH_REC_VOL: 2092 src = 0x6B; 2093 break; 2094 case ESS_CD_REC_VOL: 2095 src = 0x6A; 2096 break; 2097 case ESS_AUXB_REC_VOL: 2098 src = 0x6C; 2099 break; 2100 case ESS_RECORD_VOL: 2101 src = 0xB4; 2102 mix = 0; 2103 break; 2104 default: 2105 return; 2106 } 2107 2108 if (on) { 2109 left = sc->gain[port][ESS_LEFT]; 2110 right = sc->gain[port][ESS_RIGHT]; 2111 } else { 2112 left = right = 0; 2113 } 2114 2115 if (stereo) 2116 gain = ESS_STEREO_GAIN(left, right); 2117 else 2118 gain = ESS_MONO_GAIN(left); 2119 2120 if (mix) 2121 ess_write_mix_reg(sc, src, gain); 2122 else 2123 ess_write_x_reg(sc, src, gain); 2124 } 2125 2126 int 2127 ess_set_in_ports(sc, mask) 2128 struct ess_softc *sc; 2129 int mask; 2130 { 2131 mixer_devinfo_t di; 2132 int i; 2133 int port; 2134 int tmp; 2135 2136 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask)); 2137 2138 /* 2139 * Get the device info for the record source control, 2140 * including the list of available sources. 2141 */ 2142 di.index = ESS_RECORD_SOURCE; 2143 if (ess_query_devinfo(sc, &di)) 2144 return EINVAL; 2145 2146 /* 2147 * Set or disable the record volume control for each of the 2148 * possible sources. 2149 */ 2150 for (i = 0; i < di.un.s.num_mem; i++) 2151 { 2152 /* 2153 * Calculate the source port number from its mask. 2154 */ 2155 tmp = di.un.s.member[i].mask >> 1; 2156 for (port = 0; tmp; port++) { 2157 tmp >>= 1; 2158 } 2159 2160 /* 2161 * Set the source gain: 2162 * to the current value if source is enabled 2163 * to zero if source is disabled 2164 */ 2165 ess_set_gain(sc, port, mask & di.un.s.member[i].mask); 2166 } 2167 2168 sc->in_mask = mask; 2169 2170 /* 2171 * We have to fake a single port since the upper layer expects 2172 * one only. We choose the lowest numbered port that is enabled. 2173 */ 2174 for(i = 0; i < ESS_NPORT; i++) { 2175 if (mask & (1 << i)) { 2176 sc->in_port = i; 2177 break; 2178 } 2179 } 2180 2181 return (0); 2182 } 2183 2184 void 2185 ess_speaker_on(sc) 2186 struct ess_softc *sc; 2187 { 2188 /* Disable mute on left- and right-master volume. */ 2189 ess_clear_mreg_bits(sc, 0x60, 0x40); 2190 ess_clear_mreg_bits(sc, 0x62, 0x40); 2191 } 2192 2193 void 2194 ess_speaker_off(sc) 2195 struct ess_softc *sc; 2196 { 2197 /* Enable mute on left- and right-master volume. */ 2198 ess_set_mreg_bits(sc, 0x60, 0x40); 2199 ess_set_mreg_bits(sc, 0x62, 0x40); 2200 } 2201 2202 /* 2203 * Calculate the time constant for the requested sampling rate. 2204 */ 2205 u_int 2206 ess_srtotc(rate) 2207 u_int rate; 2208 { 2209 u_int tc; 2210 2211 /* The following formulae are from the ESS data sheet. */ 2212 if (rate <= 22050) 2213 tc = 128 - 397700L / rate; 2214 else 2215 tc = 256 - 795500L / rate; 2216 2217 return (tc); 2218 } 2219 2220 2221 /* 2222 * Calculate the filter constant for the reuqested sampling rate. 2223 */ 2224 u_int 2225 ess_srtofc(rate) 2226 u_int rate; 2227 { 2228 /* 2229 * The following formula is derived from the information in 2230 * the ES1887 data sheet, based on a roll-off frequency of 2231 * 87%. 2232 */ 2233 return (256 - 200279L / rate); 2234 } 2235 2236 2237 /* 2238 * Return the status of the DSP. 2239 */ 2240 u_char 2241 ess_get_dsp_status(sc) 2242 struct ess_softc *sc; 2243 { 2244 bus_space_tag_t iot = sc->sc_iot; 2245 bus_space_handle_t ioh = sc->sc_ioh; 2246 2247 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS)); 2248 } 2249 2250 2251 /* 2252 * Return the read status of the DSP: 1 -> DSP ready for reading 2253 * 0 -> DSP not ready for reading 2254 */ 2255 u_char 2256 ess_dsp_read_ready(sc) 2257 struct ess_softc *sc; 2258 { 2259 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) == 2260 ESS_DSP_READ_READY) ? 1 : 0); 2261 } 2262 2263 2264 /* 2265 * Return the write status of the DSP: 1 -> DSP ready for writing 2266 * 0 -> DSP not ready for writing 2267 */ 2268 u_char 2269 ess_dsp_write_ready(sc) 2270 struct ess_softc *sc; 2271 { 2272 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) == 2273 ESS_DSP_WRITE_READY) ? 1 : 0); 2274 } 2275 2276 2277 /* 2278 * Read a byte from the DSP. 2279 */ 2280 int 2281 ess_rdsp(sc) 2282 struct ess_softc *sc; 2283 { 2284 bus_space_tag_t iot = sc->sc_iot; 2285 bus_space_handle_t ioh = sc->sc_ioh; 2286 int i; 2287 2288 for (i = ESS_READ_TIMEOUT; i > 0; --i) { 2289 if (ess_dsp_read_ready(sc)) { 2290 i = EREAD1(iot, ioh, ESS_DSP_READ); 2291 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i)); 2292 return i; 2293 } else 2294 delay(10); 2295 } 2296 2297 DPRINTF(("ess_rdsp: timed out\n")); 2298 return (-1); 2299 } 2300 2301 /* 2302 * Write a byte to the DSP. 2303 */ 2304 int 2305 ess_wdsp(sc, v) 2306 struct ess_softc *sc; 2307 u_char v; 2308 { 2309 bus_space_tag_t iot = sc->sc_iot; 2310 bus_space_handle_t ioh = sc->sc_ioh; 2311 int i; 2312 2313 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v)); 2314 2315 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) { 2316 if (ess_dsp_write_ready(sc)) { 2317 EWRITE1(iot, ioh, ESS_DSP_WRITE, v); 2318 return (0); 2319 } else 2320 delay(10); 2321 } 2322 2323 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v)); 2324 return (-1); 2325 } 2326 2327 /* 2328 * Write a value to one of the ESS extended registers. 2329 */ 2330 int 2331 ess_write_x_reg(sc, reg, val) 2332 struct ess_softc *sc; 2333 u_char reg; 2334 u_char val; 2335 { 2336 int error; 2337 2338 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val)); 2339 if ((error = ess_wdsp(sc, reg)) == 0) 2340 error = ess_wdsp(sc, val); 2341 2342 return error; 2343 } 2344 2345 /* 2346 * Read the value of one of the ESS extended registers. 2347 */ 2348 u_char 2349 ess_read_x_reg(sc, reg) 2350 struct ess_softc *sc; 2351 u_char reg; 2352 { 2353 int error; 2354 int val; 2355 2356 if ((error = ess_wdsp(sc, 0xC0)) == 0) 2357 error = ess_wdsp(sc, reg); 2358 if (error) 2359 DPRINTF(("Error reading extended register 0x%02x\n", reg)); 2360 /* REVISIT: what if an error is returned above? */ 2361 val = ess_rdsp(sc); 2362 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val)); 2363 return val; 2364 } 2365 2366 void 2367 ess_clear_xreg_bits(sc, reg, mask) 2368 struct ess_softc *sc; 2369 u_char reg; 2370 u_char mask; 2371 { 2372 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1) 2373 DPRINTF(("Error clearing bits in extended register 0x%02x\n", 2374 reg)); 2375 } 2376 2377 void 2378 ess_set_xreg_bits(sc, reg, mask) 2379 struct ess_softc *sc; 2380 u_char reg; 2381 u_char mask; 2382 { 2383 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1) 2384 DPRINTF(("Error setting bits in extended register 0x%02x\n", 2385 reg)); 2386 } 2387 2388 2389 /* 2390 * Write a value to one of the ESS mixer registers. 2391 */ 2392 void 2393 ess_write_mix_reg(sc, reg, val) 2394 struct ess_softc *sc; 2395 u_char reg; 2396 u_char val; 2397 { 2398 bus_space_tag_t iot = sc->sc_iot; 2399 bus_space_handle_t ioh = sc->sc_ioh; 2400 int s; 2401 2402 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val)); 2403 2404 s = splaudio(); 2405 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg); 2406 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val); 2407 splx(s); 2408 } 2409 2410 /* 2411 * Read the value of one of the ESS mixer registers. 2412 */ 2413 u_char 2414 ess_read_mix_reg(sc, reg) 2415 struct ess_softc *sc; 2416 u_char reg; 2417 { 2418 bus_space_tag_t iot = sc->sc_iot; 2419 bus_space_handle_t ioh = sc->sc_ioh; 2420 int s; 2421 u_char val; 2422 2423 s = splaudio(); 2424 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg); 2425 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA); 2426 splx(s); 2427 2428 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val)); 2429 return val; 2430 } 2431 2432 void 2433 ess_clear_mreg_bits(sc, reg, mask) 2434 struct ess_softc *sc; 2435 u_char reg; 2436 u_char mask; 2437 { 2438 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask); 2439 } 2440 2441 void 2442 ess_set_mreg_bits(sc, reg, mask) 2443 struct ess_softc *sc; 2444 u_char reg; 2445 u_char mask; 2446 { 2447 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask); 2448 } 2449
Indexes created Tue Sep 23 14:10:03 GMT 2025