ess.c revision 1.15
1 /* $NetBSD: ess.c,v 1.15 1998/08/09 04:58:08 mycroft Exp $ */ 2 3 /* 4 * Copyright 1997 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36 /* 37 **++ 38 ** 39 ** ess.c 40 ** 41 ** FACILITY: 42 ** 43 ** DIGITAL Network Appliance Reference Design (DNARD) 44 ** 45 ** MODULE DESCRIPTION: 46 ** 47 ** This module contains the device driver for the ESS 48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was 49 ** used as a reference point when implementing this driver. 50 ** 51 ** AUTHORS: 52 ** 53 ** Blair Fidler Software Engineering Australia 54 ** Gold Coast, Australia. 55 ** 56 ** CREATION DATE: 57 ** 58 ** March 10, 1997. 59 ** 60 ** MODIFICATION HISTORY: 61 ** 62 **-- 63 */ 64 65 /* 66 * Modification by Lennart Augustsson: 67 * Adapt for bus dma. 68 * Change to 1.3 audio interface. 69 * Major cleanup. 70 */ 71 72 /* 73 * TODO (falling priority): 74 * - add looping DMA for input. 75 */ 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/errno.h> 80 #include <sys/ioctl.h> 81 #include <sys/syslog.h> 82 #include <sys/device.h> 83 #include <sys/proc.h> 84 85 #include <machine/cpu.h> 86 #include <machine/intr.h> 87 #include <machine/bus.h> 88 89 #include <sys/audioio.h> 90 #include <dev/audio_if.h> 91 #include <dev/auconv.h> 92 #include <dev/mulaw.h> 93 94 #include <dev/isa/isavar.h> 95 #include <dev/isa/isadmavar.h> 96 97 #include <dev/isa/essvar.h> 98 #include <dev/isa/essreg.h> 99 100 #ifdef AUDIO_DEBUG 101 #define DPRINTF(x) if (essdebug) printf x 102 #define DPRINTFN(n,x) if (essdebug>(n)) printf x 103 int essdebug = 0; 104 #else 105 #define DPRINTF(x) 106 #define DPRINTFN(n,x) 107 #endif 108 109 #if 0 110 unsigned uuu; 111 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu) 112 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d)) 113 #else 114 #define EREAD1(t, h, a) bus_space_read_1(t, h, a) 115 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d) 116 #endif 117 118 119 int ess_setup_sc __P((struct ess_softc *, int)); 120 121 int ess_open __P((void *, int)); 122 void ess_close __P((void *)); 123 int ess_getdev __P((void *, struct audio_device *)); 124 int ess_drain __P((void *)); 125 126 int ess_query_encoding __P((void *, struct audio_encoding *)); 127 128 int ess_set_params __P((void *, int, int, struct audio_params *, 129 struct audio_params *)); 130 int ess_set_in_sr __P((void *, u_long)); 131 int ess_set_out_sr __P((void *, u_long)); 132 int ess_set_in_precision __P((void *, u_int)); 133 int ess_set_out_precision __P((void *, u_int)); 134 int ess_set_in_channels __P((void *, int)); 135 int ess_set_out_channels __P((void *, int)); 136 137 int ess_round_blocksize __P((void *, int)); 138 139 int ess_dma_init_output __P((void *, void *, int)); 140 int ess_dma_output __P((void *, void *, int, void (*)(void *), void *)); 141 int ess_dma_init_input __P((void *, void *, int)); 142 int ess_dma_input __P((void *, void *, int, void (*)(void *), void *)); 143 int ess_halt_output __P((void *)); 144 int ess_halt_input __P((void *)); 145 146 int ess_intr_output __P((void *)); 147 int ess_intr_input __P((void *)); 148 149 int ess_speaker_ctl __P((void *, int)); 150 151 int ess_getdev __P((void *, struct audio_device *)); 152 153 int ess_set_port __P((void *, mixer_ctrl_t *)); 154 int ess_get_port __P((void *, mixer_ctrl_t *)); 155 156 void *ess_malloc __P((void *, unsigned long, int, int)); 157 void ess_free __P((void *, void *, int)); 158 unsigned long ess_round __P((void *, unsigned long)); 159 int ess_mappage __P((void *, void *, int, int)); 160 161 162 int ess_query_devinfo __P((void *, mixer_devinfo_t *)); 163 int ess_get_props __P((void *)); 164 165 void ess_speaker_on __P((struct ess_softc *)); 166 void ess_speaker_off __P((struct ess_softc *)); 167 168 int ess_config_addr __P((struct ess_softc *)); 169 void ess_config_irq __P((struct ess_softc *)); 170 void ess_config_drq __P((struct ess_softc *)); 171 void ess_setup __P((struct ess_softc *)); 172 int ess_identify __P((struct ess_softc *)); 173 174 int ess_reset __P((struct ess_softc *)); 175 void ess_set_gain __P((struct ess_softc *, int, int)); 176 int ess_set_in_ports __P((struct ess_softc *, int)); 177 u_int ess_srtotc __P((u_int)); 178 u_int ess_srtofc __P((u_int)); 179 u_char ess_get_dsp_status __P((struct ess_softc *)); 180 u_char ess_dsp_read_ready __P((struct ess_softc *)); 181 u_char ess_dsp_write_ready __P((struct ess_softc *sc)); 182 int ess_rdsp __P((struct ess_softc *)); 183 int ess_wdsp __P((struct ess_softc *, u_char)); 184 u_char ess_read_x_reg __P((struct ess_softc *, u_char)); 185 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char)); 186 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char)); 187 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char)); 188 u_char ess_read_mix_reg __P((struct ess_softc *, u_char)); 189 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char)); 190 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char)); 191 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char)); 192 193 static char *essmodel[] = { 194 "unsupported", 195 "1888", 196 "1887", 197 "888" 198 }; 199 200 struct audio_device ess_device = { 201 "ESS Technology", 202 "x", 203 "ess" 204 }; 205 206 /* 207 * Define our interface to the higher level audio driver. 208 */ 209 210 struct audio_hw_if ess_hw_if = { 211 ess_open, 212 ess_close, 213 ess_drain, 214 ess_query_encoding, 215 ess_set_params, 216 ess_round_blocksize, 217 NULL, 218 ess_dma_init_output, 219 ess_dma_init_input, 220 ess_dma_output, 221 ess_dma_input, 222 ess_halt_output, 223 ess_halt_input, 224 ess_speaker_ctl, 225 ess_getdev, 226 NULL, 227 ess_set_port, 228 ess_get_port, 229 ess_query_devinfo, 230 ess_malloc, 231 ess_free, 232 ess_round, 233 ess_mappage, 234 ess_get_props, 235 }; 236 237 #ifdef AUDIO_DEBUG 238 void ess_printsc __P((struct ess_softc *)); 239 void ess_dump_mixer __P((struct ess_softc *)); 240 241 void 242 ess_printsc(sc) 243 struct ess_softc *sc; 244 { 245 int i; 246 247 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n", 248 (int)sc->sc_open, sc->sc_iobase, sc->out_port, 249 sc->in_port, sc->spkr_state ? "on" : "off"); 250 251 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n", 252 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr, 253 sc->sc_out.intr, sc->sc_out.arg); 254 255 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n", 256 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr, 257 sc->sc_in.intr, sc->sc_in.arg); 258 259 printf("gain:"); 260 for (i = 0; i < ESS_NDEVS; i++) 261 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]); 262 printf("\n"); 263 } 264 265 void 266 ess_dump_mixer(sc) 267 struct ess_softc *sc; 268 { 269 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 270 0x7C, ess_read_mix_reg(sc, 0x7C)); 271 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 272 0x1A, ess_read_mix_reg(sc, 0x1A)); 273 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 274 0x3E, ess_read_mix_reg(sc, 0x3E)); 275 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 276 0x36, ess_read_mix_reg(sc, 0x36)); 277 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 278 0x38, ess_read_mix_reg(sc, 0x38)); 279 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 280 0x3A, ess_read_mix_reg(sc, 0x3A)); 281 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n", 282 0x32, ess_read_mix_reg(sc, 0x32)); 283 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n", 284 0x3C, ess_read_mix_reg(sc, 0x3C)); 285 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n", 286 0x69, ess_read_mix_reg(sc, 0x69)); 287 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n", 288 0x68, ess_read_mix_reg(sc, 0x68)); 289 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n", 290 0x6E, ess_read_mix_reg(sc, 0x6E)); 291 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n", 292 0x6B, ess_read_mix_reg(sc, 0x6B)); 293 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n", 294 0x6A, ess_read_mix_reg(sc, 0x6A)); 295 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n", 296 0x6C, ess_read_mix_reg(sc, 0x6C)); 297 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n", 298 0xB4, ess_read_x_reg(sc, 0xB4)); 299 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n", 300 0x14, ess_read_mix_reg(sc, 0x14)); 301 302 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n", 303 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL)); 304 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n", 305 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL)); 306 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n", 307 0x1c, ess_read_mix_reg(sc, 0x1c), 308 0x7a, ess_read_mix_reg(sc, 0x7a)); 309 } 310 311 #endif 312 313 /* 314 * Configure the ESS chip for the desired audio base address. 315 */ 316 int 317 ess_config_addr(sc) 318 struct ess_softc *sc; 319 { 320 int iobase = sc->sc_iobase; 321 bus_space_tag_t iot = sc->sc_iot; 322 323 /* 324 * Configure using the System Control Register method. This 325 * method is used when the AMODE line is tied high, which is 326 * the case for the Shark, but not for the evaluation board. 327 */ 328 329 bus_space_handle_t scr_access_ioh; 330 bus_space_handle_t scr_ioh; 331 u_short scr_value; 332 333 /* 334 * Set the SCR bit to enable audio. 335 */ 336 scr_value = ESS_SCR_AUDIO_ENABLE; 337 338 /* 339 * Set the SCR bits necessary to select the specified audio 340 * base address. 341 */ 342 switch(iobase) { 343 case 0x220: 344 scr_value |= ESS_SCR_AUDIO_220; 345 break; 346 case 0x230: 347 scr_value |= ESS_SCR_AUDIO_230; 348 break; 349 case 0x240: 350 scr_value |= ESS_SCR_AUDIO_240; 351 break; 352 case 0x250: 353 scr_value |= ESS_SCR_AUDIO_250; 354 break; 355 default: 356 printf("ess: configured iobase 0x%x invalid\n", iobase); 357 return (1); 358 break; 359 } 360 361 /* 362 * Get a mapping for the System Control Register (SCR) access 363 * registers and the SCR data registers. 364 */ 365 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS, 366 0, &scr_access_ioh)) { 367 printf("ess: can't map SCR access registers\n"); 368 return (1); 369 } 370 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS, 371 0, &scr_ioh)) { 372 printf("ess: can't map SCR registers\n"); 373 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS); 374 return (1); 375 } 376 377 /* Unlock the SCR. */ 378 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0); 379 380 /* Write the base address information into SCR[0]. */ 381 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0); 382 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value); 383 384 /* Lock the SCR. */ 385 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0); 386 387 /* Unmap the SCR access ports and the SCR data ports. */ 388 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS); 389 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS); 390 391 return 0; 392 } 393 394 395 /* 396 * Configure the ESS chip for the desired IRQ and DMA channels. 397 * ESS ISA 398 * -------- 399 * IRQA irq9 400 * IRQB irq5 401 * IRQC irq7 402 * IRQD irq10 403 * IRQE irq15 404 * 405 * DRQA drq0 406 * DRQB drq1 407 * DRQC drq3 408 * DRQD drq5 409 */ 410 void 411 ess_config_irq(sc) 412 struct ess_softc *sc; 413 { 414 int v; 415 416 DPRINTFN(2,("ess_config_irq\n")); 417 418 if (sc->sc_in.irq != sc->sc_out.irq) { 419 /* Configure Audio 1 (record) for the appropriate IRQ line. */ 420 v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */ 421 switch(sc->sc_in.irq) { 422 case 5: 423 v |= ESS_IRQ_CTRL_INTRB; 424 break; 425 case 7: 426 v |= ESS_IRQ_CTRL_INTRC; 427 break; 428 case 9: 429 v |= ESS_IRQ_CTRL_INTRA; 430 break; 431 case 10: 432 v |= ESS_IRQ_CTRL_INTRD; 433 break; 434 #ifdef DIAGNOSTIC 435 default: 436 printf("ess: configured irq %d not supported for Audio 1\n", 437 sc->sc_in.irq); 438 return; 439 #endif 440 } 441 ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v); 442 /* irq2 is hardwired to 15 in this mode */ 443 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 444 ESS_AUDIO2_CTRL2_IRQ2_ENABLE); 445 /* Use old method. */ 446 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888); 447 } else { 448 /* Use new method, both interrupts are the same. */ 449 v = ESS_IS_SELECT_IRQ; /* enable intrs */ 450 switch(sc->sc_out.irq) { 451 case 5: 452 v |= ESS_IS_INTRB; 453 break; 454 case 7: 455 v |= ESS_IS_INTRC; 456 break; 457 case 9: 458 v |= ESS_IS_INTRA; 459 break; 460 case 10: 461 v |= ESS_IS_INTRD; 462 break; 463 case 15: 464 v |= ESS_IS_INTRE; 465 break; 466 #ifdef DIAGNOSTIC 467 default: 468 printf("ess_config_irq: configured irq %d not supported for Audio 1\n", 469 sc->sc_in.irq); 470 return; 471 #endif 472 } 473 /* Set the IRQ */ 474 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v); 475 } 476 } 477 478 479 void 480 ess_config_drq(sc) 481 struct ess_softc *sc; 482 { 483 int v; 484 485 DPRINTFN(2,("ess_config_drq\n")); 486 487 /* Configure Audio 1 (record) for DMA on the appropriate channel. */ 488 v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT; 489 switch(sc->sc_in.drq) { 490 case 0: 491 v |= ESS_DRQ_CTRL_DRQA; 492 break; 493 case 1: 494 v |= ESS_DRQ_CTRL_DRQB; 495 break; 496 case 3: 497 v |= ESS_DRQ_CTRL_DRQC; 498 break; 499 #ifdef DIAGNOSTIC 500 default: 501 printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n", 502 sc->sc_in.drq); 503 return; 504 #endif 505 } 506 /* Set DRQ1 */ 507 ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v); 508 509 /* Configure DRQ2 */ 510 v = ESS_AUDIO2_CTRL3_DRQ_PD; 511 switch(sc->sc_out.drq) { 512 case 0: 513 v |= ESS_AUDIO2_CTRL3_DRQA; 514 break; 515 case 1: 516 v |= ESS_AUDIO2_CTRL3_DRQB; 517 break; 518 case 3: 519 v |= ESS_AUDIO2_CTRL3_DRQC; 520 break; 521 case 5: 522 v |= ESS_AUDIO2_CTRL3_DRQC; 523 break; 524 #ifdef DIAGNOSTIC 525 default: 526 printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n", 527 sc->sc_out.drq); 528 return; 529 #endif 530 } 531 ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v); 532 /* Enable DMA 2 */ 533 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 534 ESS_AUDIO2_CTRL2_DMA_ENABLE); 535 } 536 537 /* 538 * Set up registers after a reset. 539 */ 540 void 541 ess_setup(sc) 542 struct ess_softc *sc; 543 { 544 ess_config_irq(sc); 545 ess_config_drq(sc); 546 if (IS16BITDRQ(sc->sc_out.drq)) 547 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 548 ESS_AUDIO2_CTRL1_XFER_SIZE); 549 else 550 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 551 ESS_AUDIO2_CTRL1_XFER_SIZE); 552 553 #if 0 554 /* Use 8 bytes per output DMA. */ 555 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, ESS_AUDIO2_CTRL1_DEMAND_8); 556 /* Use 4 bytes per input DMA. */ 557 ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL, ESS_DEMAND_CTRL_DEMAND_4); 558 #endif 559 560 DPRINTFN(2,("ess_setup: done\n")); 561 } 562 563 /* 564 * Determine the model of ESS chip we are talking to. Currently we 565 * only support ES1888, ES1887 and ES888. The method of determining 566 * the chip is based on the information on page 27 of the ES1887 data 567 * sheet. 568 * 569 * This routine sets the values of sc->sc_model and sc->sc_version. 570 */ 571 int 572 ess_identify(sc) 573 struct ess_softc *sc; 574 { 575 u_char reg1; 576 u_char reg2; 577 u_char reg3; 578 579 sc->sc_model = ESS_UNSUPPORTED; 580 sc->sc_version = 0; 581 582 583 /* 584 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where 585 * n >= 8 for an ES1887 or an ES888. Other values indicate 586 * earlier (unsupported) chips. 587 */ 588 ess_wdsp(sc, ESS_ACMD_LEGACY_ID); 589 590 if ((reg1 = ess_rdsp(sc)) != 0x68) { 591 printf("ess: First ID byte wrong (0x%02x)\n", reg1); 592 return 1; 593 } 594 595 reg2 = ess_rdsp(sc); 596 if (((reg2 & 0xf0) != 0x80) || 597 ((reg2 & 0x0f) < 8)) { 598 printf("ess: Second ID byte wrong (0x%02x)\n", reg2); 599 return 1; 600 } 601 602 /* 603 * Store the ID bytes as the version. 604 */ 605 sc->sc_version = (reg1 << 8) + reg2; 606 607 608 /* 609 * 2. Verify we can change bit 2 in mixer register 0x64. This 610 * should be possible on all supported chips. 611 */ 612 reg1 = ess_read_mix_reg(sc, 0x64); 613 reg2 = reg1 ^ 0x04; /* toggle bit 2 */ 614 615 ess_write_mix_reg(sc, 0x64, reg2); 616 617 if (ess_read_mix_reg(sc, 0x64) != reg2) { 618 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n"); 619 return 1; 620 } 621 622 /* 623 * Restore the original value of mixer register 0x64. 624 */ 625 ess_write_mix_reg(sc, 0x64, reg1); 626 627 628 /* 629 * 3. Verify we can change the value of mixer register 630 * ESS_MREG_SAMPLE_RATE. 631 * This should be possible on all supported chips. 632 * It is not necessary to restore the value of this mixer register. 633 */ 634 reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE); 635 reg2 = reg1 ^ 0xff; /* toggle all bits */ 636 637 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2); 638 639 if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) { 640 printf("ess: Hardware error (unable to change mixer register 0x70)\n"); 641 return 1; 642 } 643 644 /* 645 * 4. Determine if we can change bit 5 in mixer register 0x64. 646 * This determines whether we have an ES1887: 647 * 648 * - can change indicates ES1887 649 * - can't change indicates ES1888 or ES888 650 */ 651 reg1 = ess_read_mix_reg(sc, 0x64); 652 reg2 = reg1 ^ 0x20; /* toggle bit 5 */ 653 654 ess_write_mix_reg(sc, 0x64, reg2); 655 656 if (ess_read_mix_reg(sc, 0x64) == reg2) { 657 sc->sc_model = ESS_1887; 658 659 /* 660 * Restore the original value of mixer register 0x64. 661 */ 662 ess_write_mix_reg(sc, 0x64, reg1); 663 } else { 664 /* 665 * 5. Determine if we can change the value of mixer 666 * register 0x69 independently of mixer register 667 * 0x68. This determines which chip we have: 668 * 669 * - can modify idependently indicates ES888 670 * - register 0x69 is an alias of 0x68 indicates ES1888 671 */ 672 reg1 = ess_read_mix_reg(sc, 0x68); 673 reg2 = ess_read_mix_reg(sc, 0x69); 674 reg3 = reg2 ^ 0xff; /* toggle all bits */ 675 676 /* 677 * Write different values to each register. 678 */ 679 ess_write_mix_reg(sc, 0x68, reg2); 680 ess_write_mix_reg(sc, 0x69, reg3); 681 682 if (ess_read_mix_reg(sc, 0x68) == reg2) 683 sc->sc_model = ESS_888; 684 else 685 sc->sc_model = ESS_1888; 686 687 /* 688 * Restore the original value of the registers. 689 */ 690 ess_write_mix_reg(sc, 0x68, reg1); 691 ess_write_mix_reg(sc, 0x69, reg2); 692 } 693 694 return 0; 695 } 696 697 698 int 699 ess_setup_sc(sc, doinit) 700 struct ess_softc *sc; 701 int doinit; 702 { 703 /* Reset the chip. */ 704 if (ess_reset(sc) != 0) { 705 DPRINTF(("ess_setup_sc: couldn't reset chip\n")); 706 return (1); 707 } 708 709 /* Identify the ESS chip, and check that it is supported. */ 710 if (ess_identify(sc)) { 711 DPRINTF(("ess_setup_sc: couldn't identify\n")); 712 return (1); 713 } 714 715 return (0); 716 } 717 718 /* 719 * Probe for the ESS hardware. 720 */ 721 int 722 essmatch(sc) 723 struct ess_softc *sc; 724 { 725 if (!ESS_BASE_VALID(sc->sc_iobase)) { 726 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase); 727 return (0); 728 } 729 730 /* Configure the ESS chip for the desired audio base address. */ 731 if (ess_config_addr(sc)) 732 return (0); 733 734 if (ess_setup_sc(sc, 1)) 735 return (0); 736 737 if (sc->sc_model == ESS_UNSUPPORTED) { 738 DPRINTF(("ess: Unsupported model\n")); 739 return (0); 740 } 741 742 /* Check that requested DMA channels are valid and different. */ 743 if (!ESS_DRQ1_VALID(sc->sc_in.drq)) { 744 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq); 745 return (0); 746 } 747 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) { 748 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq); 749 return (0); 750 } 751 if (sc->sc_in.drq == sc->sc_out.drq) { 752 printf("ess: play and record dma chan both %d\n", 753 sc->sc_in.drq); 754 return (0); 755 } 756 757 if (sc->sc_model == ESS_1887) { 758 /* 759 * Either use the 1887 interrupt mode with all interrupts 760 * mapped to the same irq, or use the 1888 method with 761 * irq fixed at 15. 762 */ 763 if (sc->sc_in.irq == sc->sc_out.irq) { 764 if (!ESS_IRQ12_VALID(sc->sc_in.irq)) { 765 printf("ess: irq %d invalid\n", sc->sc_in.irq); 766 return (0); 767 } 768 goto irq_not1888; 769 } 770 } else { 771 /* Must use separate interrupts */ 772 if (sc->sc_in.irq == sc->sc_out.irq) { 773 printf("ess: play and record irq both %d\n", 774 sc->sc_in.irq); 775 return (0); 776 } 777 } 778 779 /* Check that requested IRQ lines are valid and different. */ 780 if (!ESS_IRQ1_VALID(sc->sc_in.irq)) { 781 printf("ess: record irq %d invalid\n", sc->sc_in.irq); 782 return (0); 783 } 784 if (!ESS_IRQ2_VALID(sc->sc_out.irq)) { 785 printf("ess: play irq %d invalid\n", sc->sc_out.irq); 786 return (0); 787 } 788 irq_not1888: 789 790 /* Check that the DRQs are free. */ 791 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) || 792 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq)) 793 return (0); 794 /* XXX should we check IRQs as well? */ 795 796 return (1); 797 } 798 799 800 /* 801 * Attach hardware to driver, attach hardware driver to audio 802 * pseudo-device driver. 803 */ 804 void 805 essattach(sc) 806 struct ess_softc *sc; 807 { 808 struct audio_params pparams, rparams; 809 int i; 810 u_int v; 811 812 if (ess_setup_sc(sc, 0)) { 813 printf("%s: setup failed\n", sc->sc_dev.dv_xname); 814 return; 815 } 816 817 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq, 818 sc->sc_out.ist, IPL_AUDIO, 819 ess_intr_output, sc); 820 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq, 821 sc->sc_in.ist, IPL_AUDIO, 822 ess_intr_input, sc); 823 824 /* Create our DMA maps. */ 825 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq, 826 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 827 printf("%s: can't create map for drq %d\n", 828 sc->sc_dev.dv_xname, sc->sc_in.drq); 829 return; 830 } 831 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq, 832 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 833 printf("%s: can't create map for drq %d\n", 834 sc->sc_dev.dv_xname, sc->sc_out.drq); 835 return; 836 } 837 838 printf(" ESS Technology ES%s [version 0x%04x]\n", 839 essmodel[sc->sc_model], sc->sc_version); 840 841 /* 842 * Set record and play parameters to default values defined in 843 * generic audio driver. 844 */ 845 pparams = audio_default; 846 rparams = audio_default; 847 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams); 848 849 /* Do a hardware reset on the mixer. */ 850 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET); 851 852 /* 853 * Set volume of Audio 1 to zero and disable Audio 1 DAC input 854 * to playback mixer, since playback is always through Audio 2. 855 */ 856 ess_write_mix_reg(sc, 0x14, 0); 857 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR); 858 859 /* 860 * Set hardware record source to use output of the record 861 * mixer. We do the selection of record source in software by 862 * setting the gain of the unused sources to zero. (See 863 * ess_set_in_ports.) 864 */ 865 ess_set_mreg_bits(sc, 0x1c, 0x07); 866 ess_clear_mreg_bits(sc, 0x7a, 0x10); 867 ess_set_mreg_bits(sc, 0x7a, 0x08); 868 869 /* 870 * Set gain on each mixer device to a sensible value. 871 * Devices not normally used are turned off, and other devices 872 * are set to 75% volume. 873 */ 874 for (i = 0; i < ESS_NDEVS; i++) { 875 switch(i) { 876 case ESS_MIC_PLAY_VOL: 877 case ESS_LINE_PLAY_VOL: 878 case ESS_CD_PLAY_VOL: 879 case ESS_AUXB_PLAY_VOL: 880 case ESS_DAC_REC_VOL: 881 case ESS_LINE_REC_VOL: 882 case ESS_SYNTH_REC_VOL: 883 case ESS_CD_REC_VOL: 884 case ESS_AUXB_REC_VOL: 885 v = 0; 886 break; 887 default: 888 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4); 889 break; 890 } 891 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v; 892 ess_set_gain(sc, i, 1); 893 } 894 895 ess_setup(sc); 896 897 /* Disable the speaker until the device is opened. */ 898 ess_speaker_off(sc); 899 sc->spkr_state = SPKR_OFF; 900 901 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]); 902 sprintf(ess_device.version, "0x%04x", sc->sc_version); 903 904 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev); 905 906 #ifdef AUDIO_DEBUG 907 ess_printsc(sc); 908 #endif 909 } 910 911 /* 912 * Various routines to interface to higher level audio driver 913 */ 914 915 int 916 ess_open(addr, flags) 917 void *addr; 918 int flags; 919 { 920 struct ess_softc *sc = addr; 921 922 DPRINTF(("ess_open: sc=%p\n", sc)); 923 924 if (sc->sc_open != 0 || ess_reset(sc) != 0) 925 return ENXIO; 926 927 ess_setup(sc); /* because we did a reset */ 928 929 sc->sc_open = 1; 930 931 DPRINTF(("ess_open: opened\n")); 932 933 return (0); 934 } 935 936 void 937 ess_close(addr) 938 void *addr; 939 { 940 struct ess_softc *sc = addr; 941 942 DPRINTF(("ess_close: sc=%p\n", sc)); 943 944 sc->sc_open = 0; 945 ess_speaker_off(sc); 946 sc->spkr_state = SPKR_OFF; 947 ess_halt_output(sc); 948 ess_halt_input(sc); 949 sc->sc_in.intr = 0; 950 sc->sc_out.intr = 0; 951 952 DPRINTF(("ess_close: closed\n")); 953 } 954 955 /* 956 * Wait for FIFO to drain, and analog section to settle. 957 * XXX should check FIFO full bit. 958 */ 959 int 960 ess_drain(addr) 961 void *addr; 962 { 963 extern int hz; /* XXX */ 964 965 tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */ 966 return (0); 967 } 968 969 int 970 ess_speaker_ctl(addr, newstate) 971 void *addr; 972 int newstate; 973 { 974 struct ess_softc *sc = addr; 975 976 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) { 977 ess_speaker_on(sc); 978 sc->spkr_state = SPKR_ON; 979 } 980 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) { 981 ess_speaker_off(sc); 982 sc->spkr_state = SPKR_OFF; 983 } 984 return (0); 985 } 986 987 int 988 ess_getdev(addr, retp) 989 void *addr; 990 struct audio_device *retp; 991 { 992 *retp = ess_device; 993 return (0); 994 } 995 996 int 997 ess_query_encoding(addr, fp) 998 void *addr; 999 struct audio_encoding *fp; 1000 { 1001 /*struct ess_softc *sc = addr;*/ 1002 1003 switch (fp->index) { 1004 case 0: 1005 strcpy(fp->name, AudioEulinear); 1006 fp->encoding = AUDIO_ENCODING_ULINEAR; 1007 fp->precision = 8; 1008 fp->flags = 0; 1009 return (0); 1010 case 1: 1011 strcpy(fp->name, AudioEmulaw); 1012 fp->encoding = AUDIO_ENCODING_ULAW; 1013 fp->precision = 8; 1014 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1015 return (0); 1016 case 2: 1017 strcpy(fp->name, AudioEalaw); 1018 fp->encoding = AUDIO_ENCODING_ALAW; 1019 fp->precision = 8; 1020 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1021 return (0); 1022 case 3: 1023 strcpy(fp->name, AudioEslinear); 1024 fp->encoding = AUDIO_ENCODING_SLINEAR; 1025 fp->precision = 8; 1026 fp->flags = 0; 1027 return (0); 1028 case 4: 1029 strcpy(fp->name, AudioEslinear_le); 1030 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 1031 fp->precision = 16; 1032 fp->flags = 0; 1033 return (0); 1034 case 5: 1035 strcpy(fp->name, AudioEulinear_le); 1036 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 1037 fp->precision = 16; 1038 fp->flags = 0; 1039 return (0); 1040 case 6: 1041 strcpy(fp->name, AudioEslinear_be); 1042 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 1043 fp->precision = 16; 1044 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1045 return (0); 1046 case 7: 1047 strcpy(fp->name, AudioEulinear_be); 1048 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 1049 fp->precision = 16; 1050 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1051 return (0); 1052 default: 1053 return EINVAL; 1054 } 1055 return (0); 1056 } 1057 1058 int 1059 ess_set_params(addr, setmode, usemode, play, rec) 1060 void *addr; 1061 int setmode, usemode; 1062 struct audio_params *play, *rec; 1063 { 1064 struct ess_softc *sc = addr; 1065 void (*swcode) __P((void *, u_char *buf, int cnt)); 1066 struct audio_params *p; 1067 int mode; 1068 1069 DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode)); 1070 1071 /* 1072 * The ES1887 manual (page 39, `Full-Duplex DMA Mode') claims that in 1073 * full-duplex operation the sample rates must be the same for both 1074 * channels. This appears appears to be false; the only bit in common 1075 * is the clock source selection. However, we'll be conservative 1076 * here. - mycroft 1077 */ 1078 if (play->sample_rate != rec->sample_rate) { 1079 if ((usemode | setmode) == AUMODE_PLAY) { 1080 rec->sample_rate = play->sample_rate; 1081 setmode |= AUMODE_RECORD; 1082 } else if ((usemode | setmode) == AUMODE_RECORD) { 1083 play->sample_rate = rec->sample_rate; 1084 setmode |= AUMODE_PLAY; 1085 } else 1086 return (EINVAL); 1087 } 1088 1089 /* Set first record info, then play info */ 1090 for(mode = AUMODE_RECORD; mode != -1; 1091 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1092 if ((setmode & mode) == 0) 1093 continue; 1094 1095 p = mode == AUMODE_PLAY ? play : rec; 1096 switch (mode) { 1097 case AUMODE_PLAY: 1098 if (ess_set_out_sr(sc, p->sample_rate) != 0 || 1099 ess_set_out_precision(sc, p->precision) != 0 || 1100 ess_set_out_channels(sc, p->channels) != 0) { 1101 return (EINVAL); 1102 } 1103 break; 1104 1105 case AUMODE_RECORD: 1106 if (ess_set_in_sr(sc, p->sample_rate) != 0 || 1107 ess_set_in_precision(sc, p->precision) != 0 || 1108 ess_set_in_channels(sc, p->channels) != 0) { 1109 return (EINVAL); 1110 } 1111 break; 1112 } 1113 1114 swcode = 0; 1115 1116 switch (p->encoding) { 1117 case AUDIO_ENCODING_SLINEAR_BE: 1118 if (p->precision == 16) 1119 swcode = swap_bytes; 1120 /* fall into */ 1121 case AUDIO_ENCODING_SLINEAR_LE: 1122 if (mode == AUMODE_PLAY) 1123 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1124 ESS_AUDIO2_CTRL2_FIFO_SIGNED); 1125 else 1126 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1127 ESS_AUDIO1_CTRL1_FIFO_SIGNED); 1128 break; 1129 case AUDIO_ENCODING_ULINEAR_BE: 1130 if (p->precision == 16) 1131 swcode = swap_bytes; 1132 /* fall into */ 1133 case AUDIO_ENCODING_ULINEAR_LE: 1134 ulin8: 1135 if (mode == AUMODE_PLAY) 1136 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1137 ESS_AUDIO2_CTRL2_FIFO_SIGNED); 1138 else 1139 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1140 ESS_AUDIO1_CTRL1_FIFO_SIGNED); 1141 break; 1142 case AUDIO_ENCODING_ULAW: 1143 swcode = mode == AUMODE_PLAY ? 1144 mulaw_to_ulinear8 : ulinear8_to_mulaw; 1145 goto ulin8; 1146 case AUDIO_ENCODING_ALAW: 1147 swcode = mode == AUMODE_PLAY ? 1148 alaw_to_ulinear8 : ulinear8_to_alaw; 1149 goto ulin8; 1150 default: 1151 return EINVAL; 1152 } 1153 p->sw_code = swcode; 1154 } 1155 1156 sc->sc_in.active = 0; 1157 sc->sc_out.active = 0; 1158 1159 return (0); 1160 } 1161 int 1162 ess_set_in_sr(addr, sr) 1163 void *addr; 1164 u_long sr; 1165 { 1166 struct ess_softc *sc = addr; 1167 1168 if (sr < ESS_MINRATE || sr > ESS_MAXRATE) 1169 return (EINVAL); 1170 /* 1171 * Program the sample rate and filter clock for the record 1172 * channel (Audio 1). 1173 */ 1174 DPRINTF(("ess_set_in_sr: %ld\n", sr)); 1175 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(sr)); 1176 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(sr)); 1177 1178 return (0); 1179 } 1180 1181 int 1182 ess_set_out_sr(addr, sr) 1183 void *addr; 1184 u_long sr; 1185 { 1186 struct ess_softc *sc = addr; 1187 1188 if (sr < ESS_MINRATE || sr > ESS_MAXRATE) 1189 return (EINVAL); 1190 /* 1191 * Program the sample rate and filter clock for the playback 1192 * channel (Audio 2). 1193 */ 1194 DPRINTF(("ess_set_out_sr: %ld\n", sr)); 1195 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(sr)); 1196 ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(sr)); 1197 1198 return (0); 1199 } 1200 1201 int 1202 ess_set_in_precision(addr, precision) 1203 void *addr; 1204 u_int precision; 1205 { 1206 struct ess_softc *sc = addr; 1207 1208 /* 1209 * REVISIT: Should we set DMA transfer type to 2-byte or 1210 * 4-byte demand? This would probably better be done 1211 * when configuring the DMA channel. See xreg 0xB9. 1212 */ 1213 DPRINTF(("ess_set_in_precision: %d\n", precision)); 1214 switch (precision) { 1215 case 8: 1216 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1217 ESS_AUDIO1_CTRL1_FIFO_SIZE); 1218 break; 1219 1220 case 16: 1221 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1222 ESS_AUDIO1_CTRL1_FIFO_SIZE); 1223 break; 1224 1225 default: 1226 return (EINVAL); 1227 } 1228 return (0); 1229 } 1230 1231 int 1232 ess_set_out_precision(addr, precision) 1233 void *addr; 1234 u_int precision; 1235 { 1236 struct ess_softc *sc = addr; 1237 1238 DPRINTF(("ess_set_in_precision: %d\n", precision)); 1239 switch (precision) { 1240 case 8: 1241 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1242 ESS_AUDIO2_CTRL2_FIFO_SIZE); 1243 break; 1244 1245 case 16: 1246 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1247 ESS_AUDIO2_CTRL2_FIFO_SIZE); 1248 break; 1249 1250 default: 1251 return (EINVAL); 1252 } 1253 return (0); 1254 } 1255 1256 int 1257 ess_set_in_channels(addr, channels) 1258 void *addr; 1259 int channels; 1260 { 1261 struct ess_softc *sc = addr; 1262 1263 switch(channels) { 1264 case 1: 1265 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL, 1266 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) | 1267 ESS_AUDIO_CTRL_MONO) &~ ESS_AUDIO_CTRL_STEREO); 1268 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1269 ESS_AUDIO1_CTRL1_FIFO_STEREO); 1270 break; 1271 1272 case 2: 1273 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL, 1274 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) | 1275 ESS_AUDIO_CTRL_STEREO) &~ ESS_AUDIO_CTRL_MONO); 1276 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1277 ESS_AUDIO1_CTRL1_FIFO_STEREO); 1278 break; 1279 1280 default: 1281 return (EINVAL); 1282 break; 1283 } 1284 1285 sc->sc_in.channels = channels; 1286 1287 return (0); 1288 } 1289 1290 int 1291 ess_set_out_channels(addr, channels) 1292 void *addr; 1293 int channels; 1294 { 1295 struct ess_softc *sc = addr; 1296 1297 switch(channels) { 1298 case 1: 1299 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1300 ESS_AUDIO2_CTRL2_CHANNELS); 1301 break; 1302 1303 case 2: 1304 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1305 ESS_AUDIO2_CTRL2_CHANNELS); 1306 break; 1307 1308 default: 1309 return (EINVAL); 1310 break; 1311 } 1312 1313 sc->sc_out.channels = channels; 1314 1315 return (0); 1316 } 1317 1318 int 1319 ess_dma_init_output(addr, buf, cc) 1320 void *addr; 1321 void *buf; 1322 int cc; 1323 { 1324 struct ess_softc *sc = addr; 1325 1326 DPRINTF(("ess_dma_init_output: buf=%p cc=%d chan=%d\n", 1327 buf, cc, sc->sc_out.drq)); 1328 isa_dmastart(sc->sc_ic, sc->sc_out.drq, buf, 1329 cc, NULL, DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1330 return 0; 1331 } 1332 1333 int 1334 ess_dma_output(addr, p, cc, intr, arg) 1335 void *addr; 1336 void *p; 1337 int cc; 1338 void (*intr) __P((void *)); 1339 void *arg; 1340 { 1341 struct ess_softc *sc = addr; 1342 1343 DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg)); 1344 #ifdef DIAGNOSTIC 1345 if (sc->sc_out.channels == 2 && (cc & 1)) { 1346 DPRINTF(("stereo playback odd bytes (%d)\n", cc)); 1347 return EIO; 1348 } 1349 #endif 1350 1351 sc->sc_out.intr = intr; 1352 sc->sc_out.arg = arg; 1353 if (sc->sc_out.active) 1354 return (0); 1355 1356 DPRINTF(("ess_dma_output: set up DMA\n")); 1357 1358 sc->sc_out.active = 1; 1359 1360 if (IS16BITDRQ(sc->sc_out.drq)) 1361 cc >>= 1; /* use word count for 16 bit DMA */ 1362 /* Program transfer count registers with 2's complement of count. */ 1363 cc = -cc; 1364 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc); 1365 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8); 1366 1367 /* Start auto-init DMA */ 1368 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1369 ESS_AUDIO2_CTRL1_DAC_ENABLE | 1370 ESS_AUDIO2_CTRL1_FIFO_ENABLE | 1371 ESS_AUDIO2_CTRL1_AUTO_INIT); 1372 1373 return (0); 1374 1375 } 1376 1377 int 1378 ess_dma_init_input(addr, buf, cc) 1379 void *addr; 1380 void *buf; 1381 int cc; 1382 { 1383 struct ess_softc *sc = addr; 1384 1385 DPRINTF(("ess_dma_init_input: buf=%p cc=%d chan=%d\n", 1386 buf, cc, sc->sc_in.drq)); 1387 isa_dmastart(sc->sc_ic, sc->sc_in.drq, buf, 1388 cc, NULL, DMAMODE_READ | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1389 return 0; 1390 } 1391 1392 int 1393 ess_dma_input(addr, p, cc, intr, arg) 1394 void *addr; 1395 void *p; 1396 int cc; 1397 void (*intr) __P((void *)); 1398 void *arg; 1399 { 1400 struct ess_softc *sc = addr; 1401 1402 DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg)); 1403 #ifdef DIAGNOSTIC 1404 if (sc->sc_in.channels == 2 && (cc & 1)) { 1405 DPRINTF(("stereo record odd bytes (%d)\n", cc)); 1406 return EIO; 1407 } 1408 #endif 1409 1410 sc->sc_in.intr = intr; 1411 sc->sc_in.arg = arg; 1412 if (sc->sc_in.active) 1413 return (0); 1414 1415 DPRINTF(("ess_dma_input: set up DMA\n")); 1416 1417 sc->sc_in.active = 1; 1418 1419 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */ 1420 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1421 ESS_AUDIO1_CTRL1_FIFO_CONNECT); 1422 1423 if (IS16BITDRQ(sc->sc_out.drq)) 1424 cc >>= 1; /* use word count for 16 bit DMA */ 1425 /* Program transfer count registers with 2's complement of count. */ 1426 cc = -cc; 1427 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc); 1428 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8); 1429 1430 /* Start auto-init DMA */ 1431 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2, 1432 ESS_AUDIO1_CTRL2_DMA_READ | 1433 ESS_AUDIO1_CTRL2_ADC_ENABLE | 1434 ESS_AUDIO1_CTRL2_FIFO_ENABLE | 1435 ESS_AUDIO1_CTRL2_AUTO_INIT); 1436 1437 return (0); 1438 1439 } 1440 1441 int 1442 ess_halt_output(addr) 1443 void *addr; 1444 { 1445 struct ess_softc *sc = addr; 1446 1447 DPRINTF(("ess_halt_output: sc=%p\n", sc)); 1448 1449 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1450 ESS_AUDIO2_CTRL1_FIFO_ENABLE); 1451 return (0); 1452 } 1453 1454 int 1455 ess_halt_input(addr) 1456 void *addr; 1457 { 1458 struct ess_softc *sc = addr; 1459 1460 DPRINTF(("ess_halt_input: sc=%p\n", sc)); 1461 1462 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2, 1463 ESS_AUDIO1_CTRL2_FIFO_ENABLE); 1464 return (0); 1465 } 1466 1467 int 1468 ess_intr_output(arg) 1469 void *arg; 1470 { 1471 struct ess_softc *sc = arg; 1472 1473 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr)); 1474 1475 /* clear interrupt on Audio channel 2 */ 1476 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1477 ESS_AUDIO2_CTRL2_IRQ_LATCH); 1478 1479 sc->sc_out.nintr++; 1480 1481 if (sc->sc_out.intr != 0) 1482 (*sc->sc_out.intr)(sc->sc_out.arg); 1483 else 1484 return (0); 1485 1486 return (1); 1487 } 1488 1489 int 1490 ess_intr_input(arg) 1491 void *arg; 1492 { 1493 struct ess_softc *sc = arg; 1494 u_char x; 1495 1496 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr)); 1497 1498 /* clear interrupt on Audio channel 1*/ 1499 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR); 1500 1501 sc->sc_in.nintr++; 1502 1503 if (sc->sc_in.intr != 0) 1504 (*sc->sc_in.intr)(sc->sc_in.arg); 1505 else 1506 return (0); 1507 1508 return (1); 1509 } 1510 1511 int 1512 ess_round_blocksize(addr, blk) 1513 void *addr; 1514 int blk; 1515 { 1516 return (blk & -8); /* round for max DMA size */ 1517 } 1518 1519 int 1520 ess_set_port(addr, cp) 1521 void *addr; 1522 mixer_ctrl_t *cp; 1523 { 1524 struct ess_softc *sc = addr; 1525 int lgain, rgain; 1526 1527 DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n", 1528 cp->dev, cp->un.value.num_channels)); 1529 1530 switch (cp->dev) { 1531 /* 1532 * The following mixer ports are all stereo. If we get a 1533 * single-channel gain value passed in, then we duplicate it 1534 * to both left and right channels. 1535 */ 1536 case ESS_MASTER_VOL: 1537 case ESS_DAC_PLAY_VOL: 1538 case ESS_MIC_PLAY_VOL: 1539 case ESS_LINE_PLAY_VOL: 1540 case ESS_SYNTH_PLAY_VOL: 1541 case ESS_CD_PLAY_VOL: 1542 case ESS_AUXB_PLAY_VOL: 1543 case ESS_DAC_REC_VOL: 1544 case ESS_MIC_REC_VOL: 1545 case ESS_LINE_REC_VOL: 1546 case ESS_SYNTH_REC_VOL: 1547 case ESS_CD_REC_VOL: 1548 case ESS_AUXB_REC_VOL: 1549 case ESS_RECORD_VOL: 1550 if (cp->type != AUDIO_MIXER_VALUE) 1551 return EINVAL; 1552 1553 switch (cp->un.value.num_channels) { 1554 case 1: 1555 lgain = rgain = ESS_4BIT_GAIN( 1556 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 1557 break; 1558 case 2: 1559 lgain = ESS_4BIT_GAIN( 1560 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]); 1561 rgain = ESS_4BIT_GAIN( 1562 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]); 1563 break; 1564 default: 1565 return EINVAL; 1566 } 1567 1568 sc->gain[cp->dev][ESS_LEFT] = lgain; 1569 sc->gain[cp->dev][ESS_RIGHT] = rgain; 1570 1571 ess_set_gain(sc, cp->dev, 1); 1572 break; 1573 1574 1575 /* 1576 * The PC speaker port is mono. If we get a stereo gain value 1577 * passed in, then we return EINVAL. 1578 */ 1579 case ESS_PCSPEAKER_VOL: 1580 if (cp->un.value.num_channels != 1) 1581 return EINVAL; 1582 1583 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] = 1584 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 1585 ess_set_gain(sc, cp->dev, 1); 1586 break; 1587 1588 1589 case ESS_MIC_PREAMP: 1590 if (cp->type != AUDIO_MIXER_ENUM) 1591 return EINVAL; 1592 1593 if (cp->un.ord) 1594 /* Enable microphone preamp */ 1595 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL, 1596 ESS_PREAMP_CTRL_ENABLE); 1597 else 1598 /* Disable microphone preamp */ 1599 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL, 1600 ESS_PREAMP_CTRL_ENABLE); 1601 break; 1602 1603 case ESS_RECORD_SOURCE: 1604 if (cp->type == AUDIO_MIXER_SET) 1605 return ess_set_in_ports(sc, cp->un.mask); 1606 else 1607 return EINVAL; 1608 break; 1609 1610 case ESS_RECORD_MONITOR: 1611 if (cp->type != AUDIO_MIXER_ENUM) 1612 return EINVAL; 1613 1614 if (cp->un.ord) 1615 /* Enable monitor */ 1616 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1617 ESS_AUDIO_CTRL_MONITOR); 1618 else 1619 /* Disable monitor */ 1620 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1621 ESS_AUDIO_CTRL_MONITOR); 1622 break; 1623 1624 default: 1625 return EINVAL; 1626 } 1627 1628 return (0); 1629 } 1630 1631 int 1632 ess_get_port(addr, cp) 1633 void *addr; 1634 mixer_ctrl_t *cp; 1635 { 1636 struct ess_softc *sc = addr; 1637 1638 DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev)); 1639 1640 switch (cp->dev) { 1641 case ESS_DAC_PLAY_VOL: 1642 case ESS_MIC_PLAY_VOL: 1643 case ESS_LINE_PLAY_VOL: 1644 case ESS_SYNTH_PLAY_VOL: 1645 case ESS_CD_PLAY_VOL: 1646 case ESS_AUXB_PLAY_VOL: 1647 case ESS_MASTER_VOL: 1648 case ESS_PCSPEAKER_VOL: 1649 case ESS_DAC_REC_VOL: 1650 case ESS_MIC_REC_VOL: 1651 case ESS_LINE_REC_VOL: 1652 case ESS_SYNTH_REC_VOL: 1653 case ESS_CD_REC_VOL: 1654 case ESS_AUXB_REC_VOL: 1655 case ESS_RECORD_VOL: 1656 if (cp->dev == ESS_PCSPEAKER_VOL && 1657 cp->un.value.num_channels != 1) 1658 return EINVAL; 1659 1660 switch (cp->un.value.num_channels) { 1661 case 1: 1662 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1663 sc->gain[cp->dev][ESS_LEFT]; 1664 break; 1665 case 2: 1666 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1667 sc->gain[cp->dev][ESS_LEFT]; 1668 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1669 sc->gain[cp->dev][ESS_RIGHT]; 1670 break; 1671 default: 1672 return EINVAL; 1673 } 1674 break; 1675 1676 case ESS_MIC_PREAMP: 1677 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) & 1678 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0; 1679 break; 1680 1681 case ESS_RECORD_SOURCE: 1682 cp->un.mask = sc->in_mask; 1683 break; 1684 1685 case ESS_RECORD_MONITOR: 1686 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) & 1687 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0; 1688 break; 1689 1690 default: 1691 return EINVAL; 1692 } 1693 1694 return (0); 1695 } 1696 1697 int 1698 ess_query_devinfo(addr, dip) 1699 void *addr; 1700 mixer_devinfo_t *dip; 1701 { 1702 #ifdef AUDIO_DEBUG 1703 struct ess_softc *sc = addr; 1704 #endif 1705 1706 DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n", 1707 sc->sc_model, dip->index)); 1708 1709 /* 1710 * REVISIT: There are some slight differences between the 1711 * mixers on the different ESS chips, which can 1712 * be sorted out using the chip model rather than a 1713 * separate mixer model. 1714 * This is currently coded assuming an ES1887; we 1715 * need to work out which bits are not applicable to 1716 * the other models (1888 and 888). 1717 */ 1718 switch (dip->index) { 1719 case ESS_DAC_PLAY_VOL: 1720 dip->type = AUDIO_MIXER_VALUE; 1721 dip->mixer_class = ESS_INPUT_CLASS; 1722 dip->prev = AUDIO_MIXER_LAST; 1723 dip->next = AUDIO_MIXER_LAST; 1724 strcpy(dip->label.name, AudioNdac); 1725 dip->un.v.num_channels = 2; 1726 strcpy(dip->un.v.units.name, AudioNvolume); 1727 return (0); 1728 1729 case ESS_MIC_PLAY_VOL: 1730 dip->type = AUDIO_MIXER_VALUE; 1731 dip->mixer_class = ESS_INPUT_CLASS; 1732 dip->prev = AUDIO_MIXER_LAST; 1733 dip->next = AUDIO_MIXER_LAST; 1734 strcpy(dip->label.name, AudioNmicrophone); 1735 dip->un.v.num_channels = 2; 1736 strcpy(dip->un.v.units.name, AudioNvolume); 1737 return (0); 1738 1739 case ESS_LINE_PLAY_VOL: 1740 dip->type = AUDIO_MIXER_VALUE; 1741 dip->mixer_class = ESS_INPUT_CLASS; 1742 dip->prev = AUDIO_MIXER_LAST; 1743 dip->next = AUDIO_MIXER_LAST; 1744 strcpy(dip->label.name, AudioNline); 1745 dip->un.v.num_channels = 2; 1746 strcpy(dip->un.v.units.name, AudioNvolume); 1747 return (0); 1748 1749 case ESS_SYNTH_PLAY_VOL: 1750 dip->type = AUDIO_MIXER_VALUE; 1751 dip->mixer_class = ESS_INPUT_CLASS; 1752 dip->prev = AUDIO_MIXER_LAST; 1753 dip->next = AUDIO_MIXER_LAST; 1754 strcpy(dip->label.name, AudioNfmsynth); 1755 dip->un.v.num_channels = 2; 1756 strcpy(dip->un.v.units.name, AudioNvolume); 1757 return (0); 1758 1759 case ESS_CD_PLAY_VOL: 1760 dip->type = AUDIO_MIXER_VALUE; 1761 dip->mixer_class = ESS_INPUT_CLASS; 1762 dip->prev = AUDIO_MIXER_LAST; 1763 dip->next = AUDIO_MIXER_LAST; 1764 strcpy(dip->label.name, AudioNcd); 1765 dip->un.v.num_channels = 2; 1766 strcpy(dip->un.v.units.name, AudioNvolume); 1767 return (0); 1768 1769 case ESS_AUXB_PLAY_VOL: 1770 dip->type = AUDIO_MIXER_VALUE; 1771 dip->mixer_class = ESS_INPUT_CLASS; 1772 dip->prev = AUDIO_MIXER_LAST; 1773 dip->next = AUDIO_MIXER_LAST; 1774 strcpy(dip->label.name, "auxb"); 1775 dip->un.v.num_channels = 2; 1776 strcpy(dip->un.v.units.name, AudioNvolume); 1777 return (0); 1778 1779 case ESS_INPUT_CLASS: 1780 dip->type = AUDIO_MIXER_CLASS; 1781 dip->mixer_class = ESS_INPUT_CLASS; 1782 dip->next = dip->prev = AUDIO_MIXER_LAST; 1783 strcpy(dip->label.name, AudioCinputs); 1784 return (0); 1785 1786 1787 case ESS_MASTER_VOL: 1788 dip->type = AUDIO_MIXER_VALUE; 1789 dip->mixer_class = ESS_OUTPUT_CLASS; 1790 dip->prev = dip->next = AUDIO_MIXER_LAST; 1791 strcpy(dip->label.name, AudioNmaster); 1792 dip->un.v.num_channels = 2; 1793 strcpy(dip->un.v.units.name, AudioNvolume); 1794 return (0); 1795 1796 case ESS_PCSPEAKER_VOL: 1797 dip->type = AUDIO_MIXER_VALUE; 1798 dip->mixer_class = ESS_OUTPUT_CLASS; 1799 dip->prev = AUDIO_MIXER_LAST; 1800 dip->next = AUDIO_MIXER_LAST; 1801 strcpy(dip->label.name, "pc_speaker"); 1802 dip->un.v.num_channels = 1; 1803 strcpy(dip->un.v.units.name, AudioNvolume); 1804 return (0); 1805 1806 case ESS_OUTPUT_CLASS: 1807 dip->type = AUDIO_MIXER_CLASS; 1808 dip->mixer_class = ESS_OUTPUT_CLASS; 1809 dip->next = dip->prev = AUDIO_MIXER_LAST; 1810 strcpy(dip->label.name, AudioCoutputs); 1811 return (0); 1812 1813 1814 case ESS_DAC_REC_VOL: 1815 dip->type = AUDIO_MIXER_VALUE; 1816 dip->mixer_class = ESS_RECORD_CLASS; 1817 dip->prev = AUDIO_MIXER_LAST; 1818 dip->next = AUDIO_MIXER_LAST; 1819 strcpy(dip->label.name, AudioNdac); 1820 dip->un.v.num_channels = 2; 1821 strcpy(dip->un.v.units.name, AudioNvolume); 1822 return (0); 1823 1824 case ESS_MIC_REC_VOL: 1825 dip->type = AUDIO_MIXER_VALUE; 1826 dip->mixer_class = ESS_RECORD_CLASS; 1827 dip->prev = AUDIO_MIXER_LAST; 1828 dip->next = ESS_MIC_PREAMP; 1829 strcpy(dip->label.name, AudioNmicrophone); 1830 dip->un.v.num_channels = 2; 1831 strcpy(dip->un.v.units.name, AudioNvolume); 1832 return (0); 1833 1834 case ESS_LINE_REC_VOL: 1835 dip->type = AUDIO_MIXER_VALUE; 1836 dip->mixer_class = ESS_RECORD_CLASS; 1837 dip->prev = AUDIO_MIXER_LAST; 1838 dip->next = AUDIO_MIXER_LAST; 1839 strcpy(dip->label.name, AudioNline); 1840 dip->un.v.num_channels = 2; 1841 strcpy(dip->un.v.units.name, AudioNvolume); 1842 return (0); 1843 1844 case ESS_SYNTH_REC_VOL: 1845 dip->type = AUDIO_MIXER_VALUE; 1846 dip->mixer_class = ESS_RECORD_CLASS; 1847 dip->prev = AUDIO_MIXER_LAST; 1848 dip->next = AUDIO_MIXER_LAST; 1849 strcpy(dip->label.name, AudioNfmsynth); 1850 dip->un.v.num_channels = 2; 1851 strcpy(dip->un.v.units.name, AudioNvolume); 1852 return (0); 1853 1854 case ESS_CD_REC_VOL: 1855 dip->type = AUDIO_MIXER_VALUE; 1856 dip->mixer_class = ESS_RECORD_CLASS; 1857 dip->prev = AUDIO_MIXER_LAST; 1858 dip->next = AUDIO_MIXER_LAST; 1859 strcpy(dip->label.name, AudioNcd); 1860 dip->un.v.num_channels = 2; 1861 strcpy(dip->un.v.units.name, AudioNvolume); 1862 return (0); 1863 1864 case ESS_AUXB_REC_VOL: 1865 dip->type = AUDIO_MIXER_VALUE; 1866 dip->mixer_class = ESS_RECORD_CLASS; 1867 dip->prev = AUDIO_MIXER_LAST; 1868 dip->next = AUDIO_MIXER_LAST; 1869 strcpy(dip->label.name, "auxb"); 1870 dip->un.v.num_channels = 2; 1871 strcpy(dip->un.v.units.name, AudioNvolume); 1872 return (0); 1873 1874 case ESS_MIC_PREAMP: 1875 dip->type = AUDIO_MIXER_ENUM; 1876 dip->mixer_class = ESS_RECORD_CLASS; 1877 dip->prev = ESS_MIC_REC_VOL; 1878 dip->next = AUDIO_MIXER_LAST; 1879 strcpy(dip->label.name, AudioNenhanced); 1880 dip->un.e.num_mem = 2; 1881 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1882 dip->un.e.member[0].ord = 0; 1883 strcpy(dip->un.e.member[1].label.name, AudioNon); 1884 dip->un.e.member[1].ord = 1; 1885 return (0); 1886 1887 case ESS_RECORD_VOL: 1888 dip->type = AUDIO_MIXER_VALUE; 1889 dip->mixer_class = ESS_RECORD_CLASS; 1890 dip->prev = AUDIO_MIXER_LAST; 1891 dip->next = AUDIO_MIXER_LAST; 1892 strcpy(dip->label.name, AudioNrecord); 1893 dip->un.v.num_channels = 2; 1894 strcpy(dip->un.v.units.name, AudioNvolume); 1895 return (0); 1896 1897 case ESS_RECORD_SOURCE: 1898 dip->mixer_class = ESS_RECORD_CLASS; 1899 dip->prev = dip->next = AUDIO_MIXER_LAST; 1900 strcpy(dip->label.name, AudioNsource); 1901 dip->type = AUDIO_MIXER_SET; 1902 dip->un.s.num_mem = 6; 1903 strcpy(dip->un.s.member[0].label.name, AudioNdac); 1904 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL; 1905 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone); 1906 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL; 1907 strcpy(dip->un.s.member[2].label.name, AudioNline); 1908 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL; 1909 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1910 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL; 1911 strcpy(dip->un.s.member[4].label.name, AudioNcd); 1912 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL; 1913 strcpy(dip->un.s.member[5].label.name, "auxb"); 1914 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL; 1915 return (0); 1916 1917 case ESS_RECORD_CLASS: 1918 dip->type = AUDIO_MIXER_CLASS; 1919 dip->mixer_class = ESS_RECORD_CLASS; 1920 dip->next = dip->prev = AUDIO_MIXER_LAST; 1921 strcpy(dip->label.name, AudioCrecord); 1922 return (0); 1923 1924 1925 case ESS_RECORD_MONITOR: 1926 dip->mixer_class = ESS_MONITOR_CLASS; 1927 dip->prev = dip->next = AUDIO_MIXER_LAST; 1928 strcpy(dip->label.name, AudioNmonitor); 1929 dip->type = AUDIO_MIXER_ENUM; 1930 dip->un.e.num_mem = 2; 1931 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1932 dip->un.e.member[0].ord = 0; 1933 strcpy(dip->un.e.member[1].label.name, AudioNon); 1934 dip->un.e.member[1].ord = 1; 1935 return (0); 1936 1937 case ESS_MONITOR_CLASS: 1938 dip->type = AUDIO_MIXER_CLASS; 1939 dip->mixer_class = ESS_MONITOR_CLASS; 1940 dip->next = dip->prev = AUDIO_MIXER_LAST; 1941 strcpy(dip->label.name, AudioCmonitor); 1942 return (0); 1943 } 1944 1945 return (ENXIO); 1946 } 1947 1948 void * 1949 ess_malloc(addr, size, pool, flags) 1950 void *addr; 1951 unsigned long size; 1952 int pool; 1953 int flags; 1954 { 1955 struct ess_softc *sc = addr; 1956 1957 return isa_malloc(sc->sc_ic, 4, size, pool, flags); 1958 } 1959 1960 void 1961 ess_free(addr, ptr, pool) 1962 void *addr; 1963 void *ptr; 1964 int pool; 1965 { 1966 isa_free(ptr, pool); 1967 } 1968 1969 unsigned long 1970 ess_round(addr, size) 1971 void *addr; 1972 unsigned long size; 1973 { 1974 if (size > MAX_ISADMA) 1975 size = MAX_ISADMA; 1976 return size; 1977 } 1978 1979 int 1980 ess_mappage(addr, mem, off, prot) 1981 void *addr; 1982 void *mem; 1983 int off; 1984 int prot; 1985 { 1986 return (isa_mappage(mem, off, prot)); 1987 } 1988 1989 int 1990 ess_get_props(addr) 1991 void *addr; 1992 { 1993 struct ess_softc *sc = addr; 1994 1995 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1996 (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0)); 1997 } 1998 1999 /* ============================================ 2000 * Generic functions for ess, not used by audio h/w i/f 2001 * ============================================= 2002 */ 2003 2004 /* 2005 * Reset the chip. 2006 * Return non-zero if the chip isn't detected. 2007 */ 2008 int 2009 ess_reset(sc) 2010 struct ess_softc *sc; 2011 { 2012 bus_space_tag_t iot = sc->sc_iot; 2013 bus_space_handle_t ioh = sc->sc_ioh; 2014 2015 sc->sc_in.intr = 0; 2016 if (sc->sc_in.active) { 2017 isa_dmaabort(sc->sc_ic, sc->sc_in.drq); 2018 sc->sc_in.active = 0; 2019 } 2020 2021 sc->sc_out.intr = 0; 2022 if (sc->sc_out.active) { 2023 isa_dmaabort(sc->sc_ic, sc->sc_out.drq); 2024 sc->sc_out.active = 0; 2025 } 2026 2027 EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT); 2028 delay(10000); 2029 EWRITE1(iot, ioh, ESS_DSP_RESET, 0); 2030 if (ess_rdsp(sc) != ESS_MAGIC) 2031 return (1); 2032 2033 /* Enable access to the ESS extension commands. */ 2034 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT); 2035 2036 return (0); 2037 } 2038 2039 void 2040 ess_set_gain(sc, port, on) 2041 struct ess_softc *sc; 2042 int port; 2043 int on; 2044 { 2045 int gain, left, right; 2046 int mix; 2047 int src; 2048 int stereo; 2049 2050 /* 2051 * Most gain controls are found in the mixer registers and 2052 * are stereo. Any that are not, must set mix and stereo as 2053 * required. 2054 */ 2055 mix = 1; 2056 stereo = 1; 2057 2058 switch (port) { 2059 case ESS_MASTER_VOL: 2060 src = 0x32; 2061 break; 2062 case ESS_DAC_PLAY_VOL: 2063 src = 0x7C; 2064 break; 2065 case ESS_MIC_PLAY_VOL: 2066 src = 0x1A; 2067 break; 2068 case ESS_LINE_PLAY_VOL: 2069 src = 0x3E; 2070 break; 2071 case ESS_SYNTH_PLAY_VOL: 2072 src = 0x36; 2073 break; 2074 case ESS_CD_PLAY_VOL: 2075 src = 0x38; 2076 break; 2077 case ESS_AUXB_PLAY_VOL: 2078 src = 0x3A; 2079 break; 2080 case ESS_PCSPEAKER_VOL: 2081 src = 0x3C; 2082 stereo = 0; 2083 break; 2084 case ESS_DAC_REC_VOL: 2085 src = 0x69; 2086 break; 2087 case ESS_MIC_REC_VOL: 2088 src = 0x68; 2089 break; 2090 case ESS_LINE_REC_VOL: 2091 src = 0x6E; 2092 break; 2093 case ESS_SYNTH_REC_VOL: 2094 src = 0x6B; 2095 break; 2096 case ESS_CD_REC_VOL: 2097 src = 0x6A; 2098 break; 2099 case ESS_AUXB_REC_VOL: 2100 src = 0x6C; 2101 break; 2102 case ESS_RECORD_VOL: 2103 src = 0xB4; 2104 mix = 0; 2105 break; 2106 default: 2107 return; 2108 } 2109 2110 if (on) { 2111 left = sc->gain[port][ESS_LEFT]; 2112 right = sc->gain[port][ESS_RIGHT]; 2113 } else { 2114 left = right = 0; 2115 } 2116 2117 if (stereo) 2118 gain = ESS_STEREO_GAIN(left, right); 2119 else 2120 gain = ESS_MONO_GAIN(left); 2121 2122 if (mix) 2123 ess_write_mix_reg(sc, src, gain); 2124 else 2125 ess_write_x_reg(sc, src, gain); 2126 } 2127 2128 int 2129 ess_set_in_ports(sc, mask) 2130 struct ess_softc *sc; 2131 int mask; 2132 { 2133 mixer_devinfo_t di; 2134 int i; 2135 int port; 2136 int tmp; 2137 2138 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask)); 2139 2140 /* 2141 * Get the device info for the record source control, 2142 * including the list of available sources. 2143 */ 2144 di.index = ESS_RECORD_SOURCE; 2145 if (ess_query_devinfo(sc, &di)) 2146 return EINVAL; 2147 2148 /* 2149 * Set or disable the record volume control for each of the 2150 * possible sources. 2151 */ 2152 for (i = 0; i < di.un.s.num_mem; i++) 2153 { 2154 /* 2155 * Calculate the source port number from its mask. 2156 */ 2157 tmp = di.un.s.member[i].mask >> 1; 2158 for (port = 0; tmp; port++) { 2159 tmp >>= 1; 2160 } 2161 2162 /* 2163 * Set the source gain: 2164 * to the current value if source is enabled 2165 * to zero if source is disabled 2166 */ 2167 ess_set_gain(sc, port, mask & di.un.s.member[i].mask); 2168 } 2169 2170 sc->in_mask = mask; 2171 2172 /* 2173 * We have to fake a single port since the upper layer expects 2174 * one only. We choose the lowest numbered port that is enabled. 2175 */ 2176 for(i = 0; i < ESS_NPORT; i++) { 2177 if (mask & (1 << i)) { 2178 sc->in_port = i; 2179 break; 2180 } 2181 } 2182 2183 return (0); 2184 } 2185 2186 void 2187 ess_speaker_on(sc) 2188 struct ess_softc *sc; 2189 { 2190 /* Disable mute on left- and right-master volume. */ 2191 ess_clear_mreg_bits(sc, 0x60, 0x40); 2192 ess_clear_mreg_bits(sc, 0x62, 0x40); 2193 } 2194 2195 void 2196 ess_speaker_off(sc) 2197 struct ess_softc *sc; 2198 { 2199 /* Enable mute on left- and right-master volume. */ 2200 ess_set_mreg_bits(sc, 0x60, 0x40); 2201 ess_set_mreg_bits(sc, 0x62, 0x40); 2202 } 2203 2204 /* 2205 * Calculate the time constant for the requested sampling rate. 2206 */ 2207 u_int 2208 ess_srtotc(rate) 2209 u_int rate; 2210 { 2211 u_int tc; 2212 2213 /* The following formulae are from the ESS data sheet. */ 2214 if (rate <= 22050) 2215 tc = 128 - 397700L / rate; 2216 else 2217 tc = 256 - 795500L / rate; 2218 2219 return (tc); 2220 } 2221 2222 2223 /* 2224 * Calculate the filter constant for the reuqested sampling rate. 2225 */ 2226 u_int 2227 ess_srtofc(rate) 2228 u_int rate; 2229 { 2230 /* 2231 * The following formula is derived from the information in 2232 * the ES1887 data sheet, based on a roll-off frequency of 2233 * 87%. 2234 */ 2235 return (256 - 200279L / rate); 2236 } 2237 2238 2239 /* 2240 * Return the status of the DSP. 2241 */ 2242 u_char 2243 ess_get_dsp_status(sc) 2244 struct ess_softc *sc; 2245 { 2246 bus_space_tag_t iot = sc->sc_iot; 2247 bus_space_handle_t ioh = sc->sc_ioh; 2248 2249 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS)); 2250 } 2251 2252 2253 /* 2254 * Return the read status of the DSP: 1 -> DSP ready for reading 2255 * 0 -> DSP not ready for reading 2256 */ 2257 u_char 2258 ess_dsp_read_ready(sc) 2259 struct ess_softc *sc; 2260 { 2261 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) == 2262 ESS_DSP_READ_READY) ? 1 : 0); 2263 } 2264 2265 2266 /* 2267 * Return the write status of the DSP: 1 -> DSP ready for writing 2268 * 0 -> DSP not ready for writing 2269 */ 2270 u_char 2271 ess_dsp_write_ready(sc) 2272 struct ess_softc *sc; 2273 { 2274 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) == 2275 ESS_DSP_WRITE_READY) ? 1 : 0); 2276 } 2277 2278 2279 /* 2280 * Read a byte from the DSP. 2281 */ 2282 int 2283 ess_rdsp(sc) 2284 struct ess_softc *sc; 2285 { 2286 bus_space_tag_t iot = sc->sc_iot; 2287 bus_space_handle_t ioh = sc->sc_ioh; 2288 int i; 2289 2290 for (i = ESS_READ_TIMEOUT; i > 0; --i) { 2291 if (ess_dsp_read_ready(sc)) { 2292 i = EREAD1(iot, ioh, ESS_DSP_READ); 2293 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i)); 2294 return i; 2295 } else 2296 delay(10); 2297 } 2298 2299 DPRINTF(("ess_rdsp: timed out\n")); 2300 return (-1); 2301 } 2302 2303 /* 2304 * Write a byte to the DSP. 2305 */ 2306 int 2307 ess_wdsp(sc, v) 2308 struct ess_softc *sc; 2309 u_char v; 2310 { 2311 bus_space_tag_t iot = sc->sc_iot; 2312 bus_space_handle_t ioh = sc->sc_ioh; 2313 int i; 2314 2315 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v)); 2316 2317 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) { 2318 if (ess_dsp_write_ready(sc)) { 2319 EWRITE1(iot, ioh, ESS_DSP_WRITE, v); 2320 return (0); 2321 } else 2322 delay(10); 2323 } 2324 2325 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v)); 2326 return (-1); 2327 } 2328 2329 /* 2330 * Write a value to one of the ESS extended registers. 2331 */ 2332 int 2333 ess_write_x_reg(sc, reg, val) 2334 struct ess_softc *sc; 2335 u_char reg; 2336 u_char val; 2337 { 2338 int error; 2339 2340 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val)); 2341 if ((error = ess_wdsp(sc, reg)) == 0) 2342 error = ess_wdsp(sc, val); 2343 2344 return error; 2345 } 2346 2347 /* 2348 * Read the value of one of the ESS extended registers. 2349 */ 2350 u_char 2351 ess_read_x_reg(sc, reg) 2352 struct ess_softc *sc; 2353 u_char reg; 2354 { 2355 int error; 2356 int val; 2357 2358 if ((error = ess_wdsp(sc, 0xC0)) == 0) 2359 error = ess_wdsp(sc, reg); 2360 if (error) 2361 DPRINTF(("Error reading extended register 0x%02x\n", reg)); 2362 /* REVISIT: what if an error is returned above? */ 2363 val = ess_rdsp(sc); 2364 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val)); 2365 return val; 2366 } 2367 2368 void 2369 ess_clear_xreg_bits(sc, reg, mask) 2370 struct ess_softc *sc; 2371 u_char reg; 2372 u_char mask; 2373 { 2374 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1) 2375 DPRINTF(("Error clearing bits in extended register 0x%02x\n", 2376 reg)); 2377 } 2378 2379 void 2380 ess_set_xreg_bits(sc, reg, mask) 2381 struct ess_softc *sc; 2382 u_char reg; 2383 u_char mask; 2384 { 2385 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1) 2386 DPRINTF(("Error setting bits in extended register 0x%02x\n", 2387 reg)); 2388 } 2389 2390 2391 /* 2392 * Write a value to one of the ESS mixer registers. 2393 */ 2394 void 2395 ess_write_mix_reg(sc, reg, val) 2396 struct ess_softc *sc; 2397 u_char reg; 2398 u_char val; 2399 { 2400 bus_space_tag_t iot = sc->sc_iot; 2401 bus_space_handle_t ioh = sc->sc_ioh; 2402 int s; 2403 2404 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val)); 2405 2406 s = splaudio(); 2407 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg); 2408 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val); 2409 splx(s); 2410 } 2411 2412 /* 2413 * Read the value of one of the ESS mixer registers. 2414 */ 2415 u_char 2416 ess_read_mix_reg(sc, reg) 2417 struct ess_softc *sc; 2418 u_char reg; 2419 { 2420 bus_space_tag_t iot = sc->sc_iot; 2421 bus_space_handle_t ioh = sc->sc_ioh; 2422 int s; 2423 u_char val; 2424 2425 s = splaudio(); 2426 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg); 2427 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA); 2428 splx(s); 2429 2430 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val)); 2431 return val; 2432 } 2433 2434 void 2435 ess_clear_mreg_bits(sc, reg, mask) 2436 struct ess_softc *sc; 2437 u_char reg; 2438 u_char mask; 2439 { 2440 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask); 2441 } 2442 2443 void 2444 ess_set_mreg_bits(sc, reg, mask) 2445 struct ess_softc *sc; 2446 u_char reg; 2447 u_char mask; 2448 { 2449 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask); 2450 } 2451
Indexes created Mon Sep 22 13:09:51 GMT 2025