ess.c revision 1.17 1 /* $NetBSD: ess.c,v 1.17 1998/08/09 06:38:30 mycroft Exp $ */
2
3 /*
4 * Copyright 1997
5 * Digital Equipment Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and
8 * copied only in accordance with the following terms and conditions.
9 * Subject to these conditions, you may download, copy, install,
10 * use, modify and distribute this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce
14 * and retain this copyright notice and list of conditions as
15 * they appear in the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 * Digital Equipment Corporation. Neither the "Digital Equipment
19 * Corporation" name nor any trademark or logo of Digital Equipment
20 * Corporation may be used to endorse or promote products derived
21 * from this software without the prior written permission of
22 * Digital Equipment Corporation.
23 *
24 * 3) This software is provided "AS-IS" and any express or implied
25 * warranties, including but not limited to, any implied warranties
26 * of merchantability, fitness for a particular purpose, or
27 * non-infringement are disclaimed. In no event shall DIGITAL be
28 * liable for any damages whatsoever, and in particular, DIGITAL
29 * shall not be liable for special, indirect, consequential, or
30 * incidental damages or damages for lost profits, loss of
31 * revenue or loss of use, whether such damages arise in contract,
32 * negligence, tort, under statute, in equity, at law or otherwise,
33 * even if advised of the possibility of such damage.
34 */
35
36 /*
37 **++
38 **
39 ** ess.c
40 **
41 ** FACILITY:
42 **
43 ** DIGITAL Network Appliance Reference Design (DNARD)
44 **
45 ** MODULE DESCRIPTION:
46 **
47 ** This module contains the device driver for the ESS
48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
49 ** used as a reference point when implementing this driver.
50 **
51 ** AUTHORS:
52 **
53 ** Blair Fidler Software Engineering Australia
54 ** Gold Coast, Australia.
55 **
56 ** CREATION DATE:
57 **
58 ** March 10, 1997.
59 **
60 ** MODIFICATION HISTORY:
61 **
62 **--
63 */
64
65 /*
66 * Modification by Lennart Augustsson:
67 * Adapt for bus dma.
68 * Change to 1.3 audio interface.
69 * Major cleanup.
70 */
71
72 /*
73 * TODO (falling priority):
74 * - add looping DMA for input.
75 */
76
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/errno.h>
80 #include <sys/ioctl.h>
81 #include <sys/syslog.h>
82 #include <sys/device.h>
83 #include <sys/proc.h>
84
85 #include <machine/cpu.h>
86 #include <machine/intr.h>
87 #include <machine/bus.h>
88
89 #include <sys/audioio.h>
90 #include <dev/audio_if.h>
91 #include <dev/auconv.h>
92 #include <dev/mulaw.h>
93
94 #include <dev/isa/isavar.h>
95 #include <dev/isa/isadmavar.h>
96
97 #include <dev/isa/essvar.h>
98 #include <dev/isa/essreg.h>
99
100 #ifdef AUDIO_DEBUG
101 #define DPRINTF(x) if (essdebug) printf x
102 #define DPRINTFN(n,x) if (essdebug>(n)) printf x
103 int essdebug = 0;
104 #else
105 #define DPRINTF(x)
106 #define DPRINTFN(n,x)
107 #endif
108
109 #if 0
110 unsigned uuu;
111 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu)
112 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d))
113 #else
114 #define EREAD1(t, h, a) bus_space_read_1(t, h, a)
115 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d)
116 #endif
117
118
119 int ess_setup_sc __P((struct ess_softc *, int));
120
121 int ess_open __P((void *, int));
122 void ess_close __P((void *));
123 int ess_getdev __P((void *, struct audio_device *));
124 int ess_drain __P((void *));
125
126 int ess_query_encoding __P((void *, struct audio_encoding *));
127
128 int ess_set_params __P((void *, int, int, struct audio_params *,
129 struct audio_params *));
130
131 int ess_round_blocksize __P((void *, int));
132
133 int ess_dma_init_output __P((void *, void *, int));
134 int ess_dma_output __P((void *, void *, int, void (*)(void *), void *));
135 int ess_dma_init_input __P((void *, void *, int));
136 int ess_dma_input __P((void *, void *, int, void (*)(void *), void *));
137 int ess_halt_output __P((void *));
138 int ess_halt_input __P((void *));
139
140 int ess_intr_output __P((void *));
141 int ess_intr_input __P((void *));
142
143 int ess_speaker_ctl __P((void *, int));
144
145 int ess_getdev __P((void *, struct audio_device *));
146
147 int ess_set_port __P((void *, mixer_ctrl_t *));
148 int ess_get_port __P((void *, mixer_ctrl_t *));
149
150 void *ess_malloc __P((void *, unsigned long, int, int));
151 void ess_free __P((void *, void *, int));
152 unsigned long ess_round __P((void *, unsigned long));
153 int ess_mappage __P((void *, void *, int, int));
154
155
156 int ess_query_devinfo __P((void *, mixer_devinfo_t *));
157 int ess_get_props __P((void *));
158
159 void ess_speaker_on __P((struct ess_softc *));
160 void ess_speaker_off __P((struct ess_softc *));
161
162 int ess_config_addr __P((struct ess_softc *));
163 void ess_config_irq __P((struct ess_softc *));
164 void ess_config_drq __P((struct ess_softc *));
165 void ess_setup __P((struct ess_softc *));
166 int ess_identify __P((struct ess_softc *));
167
168 int ess_reset __P((struct ess_softc *));
169 void ess_set_gain __P((struct ess_softc *, int, int));
170 int ess_set_in_ports __P((struct ess_softc *, int));
171 u_int ess_srtotc __P((u_int));
172 u_int ess_srtofc __P((u_int));
173 u_char ess_get_dsp_status __P((struct ess_softc *));
174 u_char ess_dsp_read_ready __P((struct ess_softc *));
175 u_char ess_dsp_write_ready __P((struct ess_softc *sc));
176 int ess_rdsp __P((struct ess_softc *));
177 int ess_wdsp __P((struct ess_softc *, u_char));
178 u_char ess_read_x_reg __P((struct ess_softc *, u_char));
179 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
180 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
181 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
182 u_char ess_read_mix_reg __P((struct ess_softc *, u_char));
183 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
184 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
185 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
186
187 static char *essmodel[] = {
188 "unsupported",
189 "1888",
190 "1887",
191 "888"
192 };
193
194 struct audio_device ess_device = {
195 "ESS Technology",
196 "x",
197 "ess"
198 };
199
200 /*
201 * Define our interface to the higher level audio driver.
202 */
203
204 struct audio_hw_if ess_hw_if = {
205 ess_open,
206 ess_close,
207 ess_drain,
208 ess_query_encoding,
209 ess_set_params,
210 ess_round_blocksize,
211 NULL,
212 ess_dma_init_output,
213 ess_dma_init_input,
214 ess_dma_output,
215 ess_dma_input,
216 ess_halt_output,
217 ess_halt_input,
218 ess_speaker_ctl,
219 ess_getdev,
220 NULL,
221 ess_set_port,
222 ess_get_port,
223 ess_query_devinfo,
224 ess_malloc,
225 ess_free,
226 ess_round,
227 ess_mappage,
228 ess_get_props,
229 };
230
231 #ifdef AUDIO_DEBUG
232 void ess_printsc __P((struct ess_softc *));
233 void ess_dump_mixer __P((struct ess_softc *));
234
235 void
236 ess_printsc(sc)
237 struct ess_softc *sc;
238 {
239 int i;
240
241 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
242 (int)sc->sc_open, sc->sc_iobase, sc->out_port,
243 sc->in_port, sc->spkr_state ? "on" : "off");
244
245 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
246 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
247 sc->sc_out.intr, sc->sc_out.arg);
248
249 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
250 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
251 sc->sc_in.intr, sc->sc_in.arg);
252
253 printf("gain:");
254 for (i = 0; i < ESS_NDEVS; i++)
255 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
256 printf("\n");
257 }
258
259 void
260 ess_dump_mixer(sc)
261 struct ess_softc *sc;
262 {
263 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
264 0x7C, ess_read_mix_reg(sc, 0x7C));
265 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
266 0x1A, ess_read_mix_reg(sc, 0x1A));
267 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
268 0x3E, ess_read_mix_reg(sc, 0x3E));
269 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
270 0x36, ess_read_mix_reg(sc, 0x36));
271 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
272 0x38, ess_read_mix_reg(sc, 0x38));
273 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
274 0x3A, ess_read_mix_reg(sc, 0x3A));
275 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
276 0x32, ess_read_mix_reg(sc, 0x32));
277 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
278 0x3C, ess_read_mix_reg(sc, 0x3C));
279 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
280 0x69, ess_read_mix_reg(sc, 0x69));
281 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
282 0x68, ess_read_mix_reg(sc, 0x68));
283 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
284 0x6E, ess_read_mix_reg(sc, 0x6E));
285 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
286 0x6B, ess_read_mix_reg(sc, 0x6B));
287 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
288 0x6A, ess_read_mix_reg(sc, 0x6A));
289 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
290 0x6C, ess_read_mix_reg(sc, 0x6C));
291 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
292 0xB4, ess_read_x_reg(sc, 0xB4));
293 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
294 0x14, ess_read_mix_reg(sc, 0x14));
295
296 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
297 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
298 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
299 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
300 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
301 0x1c, ess_read_mix_reg(sc, 0x1c),
302 0x7a, ess_read_mix_reg(sc, 0x7a));
303 }
304
305 #endif
306
307 /*
308 * Configure the ESS chip for the desired audio base address.
309 */
310 int
311 ess_config_addr(sc)
312 struct ess_softc *sc;
313 {
314 int iobase = sc->sc_iobase;
315 bus_space_tag_t iot = sc->sc_iot;
316
317 /*
318 * Configure using the System Control Register method. This
319 * method is used when the AMODE line is tied high, which is
320 * the case for the Shark, but not for the evaluation board.
321 */
322
323 bus_space_handle_t scr_access_ioh;
324 bus_space_handle_t scr_ioh;
325 u_short scr_value;
326
327 /*
328 * Set the SCR bit to enable audio.
329 */
330 scr_value = ESS_SCR_AUDIO_ENABLE;
331
332 /*
333 * Set the SCR bits necessary to select the specified audio
334 * base address.
335 */
336 switch(iobase) {
337 case 0x220:
338 scr_value |= ESS_SCR_AUDIO_220;
339 break;
340 case 0x230:
341 scr_value |= ESS_SCR_AUDIO_230;
342 break;
343 case 0x240:
344 scr_value |= ESS_SCR_AUDIO_240;
345 break;
346 case 0x250:
347 scr_value |= ESS_SCR_AUDIO_250;
348 break;
349 default:
350 printf("ess: configured iobase 0x%x invalid\n", iobase);
351 return (1);
352 break;
353 }
354
355 /*
356 * Get a mapping for the System Control Register (SCR) access
357 * registers and the SCR data registers.
358 */
359 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
360 0, &scr_access_ioh)) {
361 printf("ess: can't map SCR access registers\n");
362 return (1);
363 }
364 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
365 0, &scr_ioh)) {
366 printf("ess: can't map SCR registers\n");
367 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
368 return (1);
369 }
370
371 /* Unlock the SCR. */
372 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
373
374 /* Write the base address information into SCR[0]. */
375 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0);
376 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
377
378 /* Lock the SCR. */
379 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
380
381 /* Unmap the SCR access ports and the SCR data ports. */
382 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
383 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
384
385 return 0;
386 }
387
388
389 /*
390 * Configure the ESS chip for the desired IRQ and DMA channels.
391 * ESS ISA
392 * --------
393 * IRQA irq9
394 * IRQB irq5
395 * IRQC irq7
396 * IRQD irq10
397 * IRQE irq15
398 *
399 * DRQA drq0
400 * DRQB drq1
401 * DRQC drq3
402 * DRQD drq5
403 */
404 void
405 ess_config_irq(sc)
406 struct ess_softc *sc;
407 {
408 int v;
409
410 DPRINTFN(2,("ess_config_irq\n"));
411
412 if (sc->sc_in.irq != sc->sc_out.irq) {
413 /* Configure Audio 1 (record) for the appropriate IRQ line. */
414 v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */
415 switch(sc->sc_in.irq) {
416 case 5:
417 v |= ESS_IRQ_CTRL_INTRB;
418 break;
419 case 7:
420 v |= ESS_IRQ_CTRL_INTRC;
421 break;
422 case 9:
423 v |= ESS_IRQ_CTRL_INTRA;
424 break;
425 case 10:
426 v |= ESS_IRQ_CTRL_INTRD;
427 break;
428 #ifdef DIAGNOSTIC
429 default:
430 printf("ess: configured irq %d not supported for Audio 1\n",
431 sc->sc_in.irq);
432 return;
433 #endif
434 }
435 ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v);
436 /* irq2 is hardwired to 15 in this mode */
437 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
438 ESS_AUDIO2_CTRL2_IRQ2_ENABLE);
439 /* Use old method. */
440 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888);
441 } else {
442 /* Use new method, both interrupts are the same. */
443 v = ESS_IS_SELECT_IRQ; /* enable intrs */
444 switch(sc->sc_out.irq) {
445 case 5:
446 v |= ESS_IS_INTRB;
447 break;
448 case 7:
449 v |= ESS_IS_INTRC;
450 break;
451 case 9:
452 v |= ESS_IS_INTRA;
453 break;
454 case 10:
455 v |= ESS_IS_INTRD;
456 break;
457 case 15:
458 v |= ESS_IS_INTRE;
459 break;
460 #ifdef DIAGNOSTIC
461 default:
462 printf("ess_config_irq: configured irq %d not supported for Audio 1\n",
463 sc->sc_in.irq);
464 return;
465 #endif
466 }
467 /* Set the IRQ */
468 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v);
469 }
470 }
471
472
473 void
474 ess_config_drq(sc)
475 struct ess_softc *sc;
476 {
477 int v;
478
479 DPRINTFN(2,("ess_config_drq\n"));
480
481 /* Configure Audio 1 (record) for DMA on the appropriate channel. */
482 v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT;
483 switch(sc->sc_in.drq) {
484 case 0:
485 v |= ESS_DRQ_CTRL_DRQA;
486 break;
487 case 1:
488 v |= ESS_DRQ_CTRL_DRQB;
489 break;
490 case 3:
491 v |= ESS_DRQ_CTRL_DRQC;
492 break;
493 #ifdef DIAGNOSTIC
494 default:
495 printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n",
496 sc->sc_in.drq);
497 return;
498 #endif
499 }
500 /* Set DRQ1 */
501 ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v);
502
503 /* Configure DRQ2 */
504 v = ESS_AUDIO2_CTRL3_DRQ_PD;
505 switch(sc->sc_out.drq) {
506 case 0:
507 v |= ESS_AUDIO2_CTRL3_DRQA;
508 break;
509 case 1:
510 v |= ESS_AUDIO2_CTRL3_DRQB;
511 break;
512 case 3:
513 v |= ESS_AUDIO2_CTRL3_DRQC;
514 break;
515 case 5:
516 v |= ESS_AUDIO2_CTRL3_DRQC;
517 break;
518 #ifdef DIAGNOSTIC
519 default:
520 printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n",
521 sc->sc_out.drq);
522 return;
523 #endif
524 }
525 ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v);
526 /* Enable DMA 2 */
527 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
528 ESS_AUDIO2_CTRL2_DMA_ENABLE);
529 }
530
531 /*
532 * Set up registers after a reset.
533 */
534 void
535 ess_setup(sc)
536 struct ess_softc *sc;
537 {
538 ess_config_irq(sc);
539 ess_config_drq(sc);
540 if (IS16BITDRQ(sc->sc_out.drq))
541 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
542 ESS_AUDIO2_CTRL1_XFER_SIZE);
543 else
544 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
545 ESS_AUDIO2_CTRL1_XFER_SIZE);
546
547 #if 0
548 /* Use 8 bytes per output DMA. */
549 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, ESS_AUDIO2_CTRL1_DEMAND_8);
550 /* Use 4 bytes per input DMA. */
551 ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL, ESS_DEMAND_CTRL_DEMAND_4);
552 #endif
553
554 DPRINTFN(2,("ess_setup: done\n"));
555 }
556
557 /*
558 * Determine the model of ESS chip we are talking to. Currently we
559 * only support ES1888, ES1887 and ES888. The method of determining
560 * the chip is based on the information on page 27 of the ES1887 data
561 * sheet.
562 *
563 * This routine sets the values of sc->sc_model and sc->sc_version.
564 */
565 int
566 ess_identify(sc)
567 struct ess_softc *sc;
568 {
569 u_char reg1;
570 u_char reg2;
571 u_char reg3;
572
573 sc->sc_model = ESS_UNSUPPORTED;
574 sc->sc_version = 0;
575
576
577 /*
578 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where
579 * n >= 8 for an ES1887 or an ES888. Other values indicate
580 * earlier (unsupported) chips.
581 */
582 ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
583
584 if ((reg1 = ess_rdsp(sc)) != 0x68) {
585 printf("ess: First ID byte wrong (0x%02x)\n", reg1);
586 return 1;
587 }
588
589 reg2 = ess_rdsp(sc);
590 if (((reg2 & 0xf0) != 0x80) ||
591 ((reg2 & 0x0f) < 8)) {
592 printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
593 return 1;
594 }
595
596 /*
597 * Store the ID bytes as the version.
598 */
599 sc->sc_version = (reg1 << 8) + reg2;
600
601
602 /*
603 * 2. Verify we can change bit 2 in mixer register 0x64. This
604 * should be possible on all supported chips.
605 */
606 reg1 = ess_read_mix_reg(sc, 0x64);
607 reg2 = reg1 ^ 0x04; /* toggle bit 2 */
608
609 ess_write_mix_reg(sc, 0x64, reg2);
610
611 if (ess_read_mix_reg(sc, 0x64) != reg2) {
612 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
613 return 1;
614 }
615
616 /*
617 * Restore the original value of mixer register 0x64.
618 */
619 ess_write_mix_reg(sc, 0x64, reg1);
620
621
622 /*
623 * 3. Verify we can change the value of mixer register
624 * ESS_MREG_SAMPLE_RATE.
625 * This should be possible on all supported chips.
626 * It is not necessary to restore the value of this mixer register.
627 */
628 reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE);
629 reg2 = reg1 ^ 0xff; /* toggle all bits */
630
631 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2);
632
633 if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) {
634 printf("ess: Hardware error (unable to change mixer register 0x70)\n");
635 return 1;
636 }
637
638 /*
639 * 4. Determine if we can change bit 5 in mixer register 0x64.
640 * This determines whether we have an ES1887:
641 *
642 * - can change indicates ES1887
643 * - can't change indicates ES1888 or ES888
644 */
645 reg1 = ess_read_mix_reg(sc, 0x64);
646 reg2 = reg1 ^ 0x20; /* toggle bit 5 */
647
648 ess_write_mix_reg(sc, 0x64, reg2);
649
650 if (ess_read_mix_reg(sc, 0x64) == reg2) {
651 sc->sc_model = ESS_1887;
652
653 /*
654 * Restore the original value of mixer register 0x64.
655 */
656 ess_write_mix_reg(sc, 0x64, reg1);
657 } else {
658 /*
659 * 5. Determine if we can change the value of mixer
660 * register 0x69 independently of mixer register
661 * 0x68. This determines which chip we have:
662 *
663 * - can modify idependently indicates ES888
664 * - register 0x69 is an alias of 0x68 indicates ES1888
665 */
666 reg1 = ess_read_mix_reg(sc, 0x68);
667 reg2 = ess_read_mix_reg(sc, 0x69);
668 reg3 = reg2 ^ 0xff; /* toggle all bits */
669
670 /*
671 * Write different values to each register.
672 */
673 ess_write_mix_reg(sc, 0x68, reg2);
674 ess_write_mix_reg(sc, 0x69, reg3);
675
676 if (ess_read_mix_reg(sc, 0x68) == reg2)
677 sc->sc_model = ESS_888;
678 else
679 sc->sc_model = ESS_1888;
680
681 /*
682 * Restore the original value of the registers.
683 */
684 ess_write_mix_reg(sc, 0x68, reg1);
685 ess_write_mix_reg(sc, 0x69, reg2);
686 }
687
688 return 0;
689 }
690
691
692 int
693 ess_setup_sc(sc, doinit)
694 struct ess_softc *sc;
695 int doinit;
696 {
697 /* Reset the chip. */
698 if (ess_reset(sc) != 0) {
699 DPRINTF(("ess_setup_sc: couldn't reset chip\n"));
700 return (1);
701 }
702
703 /* Identify the ESS chip, and check that it is supported. */
704 if (ess_identify(sc)) {
705 DPRINTF(("ess_setup_sc: couldn't identify\n"));
706 return (1);
707 }
708
709 return (0);
710 }
711
712 /*
713 * Probe for the ESS hardware.
714 */
715 int
716 essmatch(sc)
717 struct ess_softc *sc;
718 {
719 if (!ESS_BASE_VALID(sc->sc_iobase)) {
720 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
721 return (0);
722 }
723
724 /* Configure the ESS chip for the desired audio base address. */
725 if (ess_config_addr(sc))
726 return (0);
727
728 if (ess_setup_sc(sc, 1))
729 return (0);
730
731 if (sc->sc_model == ESS_UNSUPPORTED) {
732 DPRINTF(("ess: Unsupported model\n"));
733 return (0);
734 }
735
736 /* Check that requested DMA channels are valid and different. */
737 if (!ESS_DRQ1_VALID(sc->sc_in.drq)) {
738 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
739 return (0);
740 }
741 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
742 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
743 return (0);
744 }
745 if (sc->sc_in.drq == sc->sc_out.drq) {
746 printf("ess: play and record dma chan both %d\n",
747 sc->sc_in.drq);
748 return (0);
749 }
750
751 if (sc->sc_model == ESS_1887) {
752 /*
753 * Either use the 1887 interrupt mode with all interrupts
754 * mapped to the same irq, or use the 1888 method with
755 * irq fixed at 15.
756 */
757 if (sc->sc_in.irq == sc->sc_out.irq) {
758 if (!ESS_IRQ12_VALID(sc->sc_in.irq)) {
759 printf("ess: irq %d invalid\n", sc->sc_in.irq);
760 return (0);
761 }
762 goto irq_not1888;
763 }
764 } else {
765 /* Must use separate interrupts */
766 if (sc->sc_in.irq == sc->sc_out.irq) {
767 printf("ess: play and record irq both %d\n",
768 sc->sc_in.irq);
769 return (0);
770 }
771 }
772
773 /* Check that requested IRQ lines are valid and different. */
774 if (!ESS_IRQ1_VALID(sc->sc_in.irq)) {
775 printf("ess: record irq %d invalid\n", sc->sc_in.irq);
776 return (0);
777 }
778 if (!ESS_IRQ2_VALID(sc->sc_out.irq)) {
779 printf("ess: play irq %d invalid\n", sc->sc_out.irq);
780 return (0);
781 }
782 irq_not1888:
783
784 /* Check that the DRQs are free. */
785 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
786 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
787 return (0);
788 /* XXX should we check IRQs as well? */
789
790 return (1);
791 }
792
793
794 /*
795 * Attach hardware to driver, attach hardware driver to audio
796 * pseudo-device driver.
797 */
798 void
799 essattach(sc)
800 struct ess_softc *sc;
801 {
802 struct audio_params pparams, rparams;
803 int i;
804 u_int v;
805
806 if (ess_setup_sc(sc, 0)) {
807 printf("%s: setup failed\n", sc->sc_dev.dv_xname);
808 return;
809 }
810
811 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq,
812 sc->sc_out.ist, IPL_AUDIO,
813 ess_intr_output, sc);
814 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq,
815 sc->sc_in.ist, IPL_AUDIO,
816 ess_intr_input, sc);
817
818 /* Create our DMA maps. */
819 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
820 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
821 printf("%s: can't create map for drq %d\n",
822 sc->sc_dev.dv_xname, sc->sc_in.drq);
823 return;
824 }
825 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
826 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
827 printf("%s: can't create map for drq %d\n",
828 sc->sc_dev.dv_xname, sc->sc_out.drq);
829 return;
830 }
831
832 printf(" ESS Technology ES%s [version 0x%04x]\n",
833 essmodel[sc->sc_model], sc->sc_version);
834
835 /*
836 * Set record and play parameters to default values defined in
837 * generic audio driver.
838 */
839 pparams = audio_default;
840 rparams = audio_default;
841 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
842
843 /* Do a hardware reset on the mixer. */
844 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
845
846 /*
847 * Set volume of Audio 1 to zero and disable Audio 1 DAC input
848 * to playback mixer, since playback is always through Audio 2.
849 */
850 ess_write_mix_reg(sc, 0x14, 0);
851 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
852
853 /*
854 * Set hardware record source to use output of the record
855 * mixer. We do the selection of record source in software by
856 * setting the gain of the unused sources to zero. (See
857 * ess_set_in_ports.)
858 */
859 ess_set_mreg_bits(sc, 0x1c, 0x07);
860 ess_clear_mreg_bits(sc, 0x7a, 0x10);
861 ess_set_mreg_bits(sc, 0x7a, 0x08);
862
863 /*
864 * Set gain on each mixer device to a sensible value.
865 * Devices not normally used are turned off, and other devices
866 * are set to 75% volume.
867 */
868 for (i = 0; i < ESS_NDEVS; i++) {
869 switch(i) {
870 case ESS_MIC_PLAY_VOL:
871 case ESS_LINE_PLAY_VOL:
872 case ESS_CD_PLAY_VOL:
873 case ESS_AUXB_PLAY_VOL:
874 case ESS_DAC_REC_VOL:
875 case ESS_LINE_REC_VOL:
876 case ESS_SYNTH_REC_VOL:
877 case ESS_CD_REC_VOL:
878 case ESS_AUXB_REC_VOL:
879 v = 0;
880 break;
881 default:
882 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4);
883 break;
884 }
885 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
886 ess_set_gain(sc, i, 1);
887 }
888
889 ess_setup(sc);
890
891 /* Disable the speaker until the device is opened. */
892 ess_speaker_off(sc);
893 sc->spkr_state = SPKR_OFF;
894
895 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
896 sprintf(ess_device.version, "0x%04x", sc->sc_version);
897
898 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev);
899
900 #ifdef AUDIO_DEBUG
901 ess_printsc(sc);
902 #endif
903 }
904
905 /*
906 * Various routines to interface to higher level audio driver
907 */
908
909 int
910 ess_open(addr, flags)
911 void *addr;
912 int flags;
913 {
914 struct ess_softc *sc = addr;
915
916 DPRINTF(("ess_open: sc=%p\n", sc));
917
918 if (sc->sc_open != 0 || ess_reset(sc) != 0)
919 return ENXIO;
920
921 ess_setup(sc); /* because we did a reset */
922
923 sc->sc_open = 1;
924
925 DPRINTF(("ess_open: opened\n"));
926
927 return (0);
928 }
929
930 void
931 ess_close(addr)
932 void *addr;
933 {
934 struct ess_softc *sc = addr;
935
936 DPRINTF(("ess_close: sc=%p\n", sc));
937
938 sc->sc_open = 0;
939 ess_speaker_off(sc);
940 sc->spkr_state = SPKR_OFF;
941 ess_halt_output(sc);
942 ess_halt_input(sc);
943 sc->sc_in.intr = 0;
944 sc->sc_out.intr = 0;
945
946 DPRINTF(("ess_close: closed\n"));
947 }
948
949 /*
950 * Wait for FIFO to drain, and analog section to settle.
951 * XXX should check FIFO full bit.
952 */
953 int
954 ess_drain(addr)
955 void *addr;
956 {
957 extern int hz; /* XXX */
958
959 tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */
960 return (0);
961 }
962
963 int
964 ess_speaker_ctl(addr, newstate)
965 void *addr;
966 int newstate;
967 {
968 struct ess_softc *sc = addr;
969
970 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
971 ess_speaker_on(sc);
972 sc->spkr_state = SPKR_ON;
973 }
974 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
975 ess_speaker_off(sc);
976 sc->spkr_state = SPKR_OFF;
977 }
978 return (0);
979 }
980
981 int
982 ess_getdev(addr, retp)
983 void *addr;
984 struct audio_device *retp;
985 {
986 *retp = ess_device;
987 return (0);
988 }
989
990 int
991 ess_query_encoding(addr, fp)
992 void *addr;
993 struct audio_encoding *fp;
994 {
995 /*struct ess_softc *sc = addr;*/
996
997 switch (fp->index) {
998 case 0:
999 strcpy(fp->name, AudioEulinear);
1000 fp->encoding = AUDIO_ENCODING_ULINEAR;
1001 fp->precision = 8;
1002 fp->flags = 0;
1003 return (0);
1004 case 1:
1005 strcpy(fp->name, AudioEmulaw);
1006 fp->encoding = AUDIO_ENCODING_ULAW;
1007 fp->precision = 8;
1008 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1009 return (0);
1010 case 2:
1011 strcpy(fp->name, AudioEalaw);
1012 fp->encoding = AUDIO_ENCODING_ALAW;
1013 fp->precision = 8;
1014 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1015 return (0);
1016 case 3:
1017 strcpy(fp->name, AudioEslinear);
1018 fp->encoding = AUDIO_ENCODING_SLINEAR;
1019 fp->precision = 8;
1020 fp->flags = 0;
1021 return (0);
1022 case 4:
1023 strcpy(fp->name, AudioEslinear_le);
1024 fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
1025 fp->precision = 16;
1026 fp->flags = 0;
1027 return (0);
1028 case 5:
1029 strcpy(fp->name, AudioEulinear_le);
1030 fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
1031 fp->precision = 16;
1032 fp->flags = 0;
1033 return (0);
1034 case 6:
1035 strcpy(fp->name, AudioEslinear_be);
1036 fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
1037 fp->precision = 16;
1038 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1039 return (0);
1040 case 7:
1041 strcpy(fp->name, AudioEulinear_be);
1042 fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
1043 fp->precision = 16;
1044 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1045 return (0);
1046 default:
1047 return EINVAL;
1048 }
1049 return (0);
1050 }
1051
1052 int
1053 ess_set_params(addr, setmode, usemode, play, rec)
1054 void *addr;
1055 int setmode, usemode;
1056 struct audio_params *play, *rec;
1057 {
1058 struct ess_softc *sc = addr;
1059 struct audio_params *p;
1060 int mode;
1061
1062 DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode));
1063
1064 /*
1065 * The ES1887 manual (page 39, `Full-Duplex DMA Mode') claims that in
1066 * full-duplex operation the sample rates must be the same for both
1067 * channels. This appears to be false; the only bit in common is the
1068 * clock source selection. However, we'll be conservative here.
1069 * - mycroft
1070 */
1071 if (play->sample_rate != rec->sample_rate) {
1072 if ((usemode | setmode) == AUMODE_PLAY) {
1073 rec->sample_rate = play->sample_rate;
1074 setmode |= AUMODE_RECORD;
1075 } else if ((usemode | setmode) == AUMODE_RECORD) {
1076 play->sample_rate = rec->sample_rate;
1077 setmode |= AUMODE_PLAY;
1078 } else
1079 return (EINVAL);
1080 }
1081
1082 /* Set first record info, then play info */
1083 for (mode = AUMODE_RECORD; mode != -1;
1084 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
1085 if ((setmode & mode) == 0)
1086 continue;
1087
1088 p = mode == AUMODE_PLAY ? play : rec;
1089
1090 if (p->sample_rate < ESS_MINRATE ||
1091 p->sample_rate > ESS_MAXRATE ||
1092 (p->precision != 8 && p->precision != 16) ||
1093 (p->channels != 1 && p->channels != 2))
1094 return (EINVAL);
1095
1096 p->factor = 1;
1097 p->sw_code = 0;
1098 switch (p->encoding) {
1099 case AUDIO_ENCODING_SLINEAR_BE:
1100 case AUDIO_ENCODING_ULINEAR_BE:
1101 if (p->precision == 16)
1102 p->sw_code = swap_bytes;
1103 break;
1104 case AUDIO_ENCODING_SLINEAR_LE:
1105 case AUDIO_ENCODING_ULINEAR_LE:
1106 break;
1107 case AUDIO_ENCODING_ULAW:
1108 if (mode == AUMODE_PLAY) {
1109 p->factor = 2;
1110 p->sw_code = mulaw_to_ulinear16;
1111 } else
1112 p->sw_code = ulinear8_to_mulaw;
1113 break;
1114 case AUDIO_ENCODING_ALAW:
1115 if (mode == AUMODE_PLAY) {
1116 p->factor = 2;
1117 p->sw_code = alaw_to_ulinear16;
1118 } else
1119 p->sw_code = ulinear8_to_alaw;
1120 break;
1121 default:
1122 return (EINVAL);
1123 }
1124
1125 switch (mode) {
1126 case AUMODE_PLAY:
1127 sc->sc_out.sample_rate = p->sample_rate;
1128 sc->sc_out.channels = p->channels;
1129 sc->sc_out.precision = p->precision * p->factor;
1130 sc->sc_out.encoding = p->encoding;
1131 break;
1132 case AUMODE_RECORD:
1133 sc->sc_in.sample_rate = p->sample_rate;
1134 sc->sc_in.channels = p->channels;
1135 sc->sc_in.precision = p->precision * p->factor;
1136 sc->sc_in.encoding = p->encoding;
1137 break;
1138 }
1139 }
1140
1141 sc->sc_in.active = 0;
1142 sc->sc_out.active = 0;
1143
1144 return (0);
1145 }
1146
1147 int
1148 ess_dma_init_output(addr, buf, cc)
1149 void *addr;
1150 void *buf;
1151 int cc;
1152 {
1153 struct ess_softc *sc = addr;
1154
1155 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE,
1156 ess_srtotc(sc->sc_out.sample_rate));
1157 ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK,
1158 ess_srtofc(sc->sc_out.sample_rate));
1159
1160 if (sc->sc_out.precision == 16)
1161 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1162 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1163 else
1164 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1165 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1166
1167 if (sc->sc_out.channels == 2)
1168 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1169 ESS_AUDIO2_CTRL2_CHANNELS);
1170 else
1171 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1172 ESS_AUDIO2_CTRL2_CHANNELS);
1173
1174 if (sc->sc_out.encoding == AUDIO_ENCODING_SLINEAR_BE ||
1175 sc->sc_out.encoding == AUDIO_ENCODING_SLINEAR_LE)
1176 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1177 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1178 else
1179 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1180 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1181
1182 DPRINTF(("ess_dma_init_output: buf=%p cc=%d chan=%d\n",
1183 buf, cc, sc->sc_out.drq));
1184 isa_dmastart(sc->sc_ic, sc->sc_out.drq, buf,
1185 cc, NULL, DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT);
1186
1187 return 0;
1188 }
1189
1190 int
1191 ess_dma_output(addr, p, cc, intr, arg)
1192 void *addr;
1193 void *p;
1194 int cc;
1195 void (*intr) __P((void *));
1196 void *arg;
1197 {
1198 struct ess_softc *sc = addr;
1199
1200 DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg));
1201 #ifdef DIAGNOSTIC
1202 if (sc->sc_out.channels == 2 && (cc & 1)) {
1203 DPRINTF(("stereo playback odd bytes (%d)\n", cc));
1204 return EIO;
1205 }
1206 #endif
1207
1208 sc->sc_out.intr = intr;
1209 sc->sc_out.arg = arg;
1210 if (sc->sc_out.active)
1211 return (0);
1212
1213 DPRINTF(("ess_dma_output: set up DMA\n"));
1214
1215 sc->sc_out.active = 1;
1216
1217 if (IS16BITDRQ(sc->sc_out.drq))
1218 cc >>= 1; /* use word count for 16 bit DMA */
1219 /* Program transfer count registers with 2's complement of count. */
1220 cc = -cc;
1221 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc);
1222 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8);
1223
1224 /* Start auto-init DMA */
1225 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1226 ESS_AUDIO2_CTRL1_DAC_ENABLE |
1227 ESS_AUDIO2_CTRL1_FIFO_ENABLE |
1228 ESS_AUDIO2_CTRL1_AUTO_INIT);
1229
1230 return (0);
1231
1232 }
1233
1234 int
1235 ess_dma_init_input(addr, buf, cc)
1236 void *addr;
1237 void *buf;
1238 int cc;
1239 {
1240 struct ess_softc *sc = addr;
1241
1242 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE,
1243 ess_srtotc(sc->sc_in.sample_rate));
1244 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK,
1245 ess_srtofc(sc->sc_in.sample_rate));
1246
1247 if (sc->sc_in.precision == 16)
1248 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1249 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1250 else
1251 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1252 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1253
1254 if (sc->sc_in.channels == 2) {
1255 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL,
1256 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) |
1257 ESS_AUDIO_CTRL_STEREO) &~ ESS_AUDIO_CTRL_MONO);
1258 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1259 ESS_AUDIO1_CTRL1_FIFO_STEREO);
1260 } else {
1261 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL,
1262 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) |
1263 ESS_AUDIO_CTRL_MONO) &~ ESS_AUDIO_CTRL_STEREO);
1264 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1265 ESS_AUDIO1_CTRL1_FIFO_STEREO);
1266 }
1267
1268 if (sc->sc_in.encoding == AUDIO_ENCODING_SLINEAR_BE ||
1269 sc->sc_in.encoding == AUDIO_ENCODING_SLINEAR_LE)
1270 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1271 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1272 else
1273 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1274 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1275
1276 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
1277 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1278 ESS_AUDIO1_CTRL1_FIFO_CONNECT);
1279
1280 DPRINTF(("ess_dma_init_input: buf=%p cc=%d chan=%d\n",
1281 buf, cc, sc->sc_in.drq));
1282 isa_dmastart(sc->sc_ic, sc->sc_in.drq, buf,
1283 cc, NULL, DMAMODE_READ | DMAMODE_LOOP, BUS_DMA_NOWAIT);
1284
1285 return 0;
1286 }
1287
1288 int
1289 ess_dma_input(addr, p, cc, intr, arg)
1290 void *addr;
1291 void *p;
1292 int cc;
1293 void (*intr) __P((void *));
1294 void *arg;
1295 {
1296 struct ess_softc *sc = addr;
1297
1298 DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg));
1299 #ifdef DIAGNOSTIC
1300 if (sc->sc_in.channels == 2 && (cc & 1)) {
1301 DPRINTF(("stereo record odd bytes (%d)\n", cc));
1302 return EIO;
1303 }
1304 #endif
1305
1306 sc->sc_in.intr = intr;
1307 sc->sc_in.arg = arg;
1308 if (sc->sc_in.active)
1309 return (0);
1310
1311 DPRINTF(("ess_dma_input: set up DMA\n"));
1312
1313 sc->sc_in.active = 1;
1314
1315 if (IS16BITDRQ(sc->sc_in.drq))
1316 cc >>= 1; /* use word count for 16 bit DMA */
1317 /* Program transfer count registers with 2's complement of count. */
1318 cc = -cc;
1319 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc);
1320 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8);
1321
1322 /* Start auto-init DMA */
1323 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1324 ESS_AUDIO1_CTRL2_DMA_READ |
1325 ESS_AUDIO1_CTRL2_ADC_ENABLE |
1326 ESS_AUDIO1_CTRL2_FIFO_ENABLE |
1327 ESS_AUDIO1_CTRL2_AUTO_INIT);
1328
1329 return (0);
1330
1331 }
1332
1333 int
1334 ess_halt_output(addr)
1335 void *addr;
1336 {
1337 struct ess_softc *sc = addr;
1338
1339 DPRINTF(("ess_halt_output: sc=%p\n", sc));
1340
1341 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1342 ESS_AUDIO2_CTRL1_FIFO_ENABLE);
1343 return (0);
1344 }
1345
1346 int
1347 ess_halt_input(addr)
1348 void *addr;
1349 {
1350 struct ess_softc *sc = addr;
1351
1352 DPRINTF(("ess_halt_input: sc=%p\n", sc));
1353
1354 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1355 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1356 return (0);
1357 }
1358
1359 int
1360 ess_intr_output(arg)
1361 void *arg;
1362 {
1363 struct ess_softc *sc = arg;
1364
1365 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr));
1366
1367 /* clear interrupt on Audio channel 2 */
1368 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1369 ESS_AUDIO2_CTRL2_IRQ_LATCH);
1370
1371 sc->sc_out.nintr++;
1372
1373 if (sc->sc_out.intr != 0)
1374 (*sc->sc_out.intr)(sc->sc_out.arg);
1375 else
1376 return (0);
1377
1378 return (1);
1379 }
1380
1381 int
1382 ess_intr_input(arg)
1383 void *arg;
1384 {
1385 struct ess_softc *sc = arg;
1386 u_char x;
1387
1388 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr));
1389
1390 /* clear interrupt on Audio channel 1*/
1391 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
1392
1393 sc->sc_in.nintr++;
1394
1395 if (sc->sc_in.intr != 0)
1396 (*sc->sc_in.intr)(sc->sc_in.arg);
1397 else
1398 return (0);
1399
1400 return (1);
1401 }
1402
1403 int
1404 ess_round_blocksize(addr, blk)
1405 void *addr;
1406 int blk;
1407 {
1408 return (blk & -8); /* round for max DMA size */
1409 }
1410
1411 int
1412 ess_set_port(addr, cp)
1413 void *addr;
1414 mixer_ctrl_t *cp;
1415 {
1416 struct ess_softc *sc = addr;
1417 int lgain, rgain;
1418
1419 DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n",
1420 cp->dev, cp->un.value.num_channels));
1421
1422 switch (cp->dev) {
1423 /*
1424 * The following mixer ports are all stereo. If we get a
1425 * single-channel gain value passed in, then we duplicate it
1426 * to both left and right channels.
1427 */
1428 case ESS_MASTER_VOL:
1429 case ESS_DAC_PLAY_VOL:
1430 case ESS_MIC_PLAY_VOL:
1431 case ESS_LINE_PLAY_VOL:
1432 case ESS_SYNTH_PLAY_VOL:
1433 case ESS_CD_PLAY_VOL:
1434 case ESS_AUXB_PLAY_VOL:
1435 case ESS_DAC_REC_VOL:
1436 case ESS_MIC_REC_VOL:
1437 case ESS_LINE_REC_VOL:
1438 case ESS_SYNTH_REC_VOL:
1439 case ESS_CD_REC_VOL:
1440 case ESS_AUXB_REC_VOL:
1441 case ESS_RECORD_VOL:
1442 if (cp->type != AUDIO_MIXER_VALUE)
1443 return EINVAL;
1444
1445 switch (cp->un.value.num_channels) {
1446 case 1:
1447 lgain = rgain = ESS_4BIT_GAIN(
1448 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1449 break;
1450 case 2:
1451 lgain = ESS_4BIT_GAIN(
1452 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
1453 rgain = ESS_4BIT_GAIN(
1454 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
1455 break;
1456 default:
1457 return EINVAL;
1458 }
1459
1460 sc->gain[cp->dev][ESS_LEFT] = lgain;
1461 sc->gain[cp->dev][ESS_RIGHT] = rgain;
1462
1463 ess_set_gain(sc, cp->dev, 1);
1464 break;
1465
1466
1467 /*
1468 * The PC speaker port is mono. If we get a stereo gain value
1469 * passed in, then we return EINVAL.
1470 */
1471 case ESS_PCSPEAKER_VOL:
1472 if (cp->un.value.num_channels != 1)
1473 return EINVAL;
1474
1475 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
1476 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1477 ess_set_gain(sc, cp->dev, 1);
1478 break;
1479
1480
1481 case ESS_MIC_PREAMP:
1482 if (cp->type != AUDIO_MIXER_ENUM)
1483 return EINVAL;
1484
1485 if (cp->un.ord)
1486 /* Enable microphone preamp */
1487 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1488 ESS_PREAMP_CTRL_ENABLE);
1489 else
1490 /* Disable microphone preamp */
1491 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1492 ESS_PREAMP_CTRL_ENABLE);
1493 break;
1494
1495 case ESS_RECORD_SOURCE:
1496 if (cp->type == AUDIO_MIXER_SET)
1497 return ess_set_in_ports(sc, cp->un.mask);
1498 else
1499 return EINVAL;
1500 break;
1501
1502 case ESS_RECORD_MONITOR:
1503 if (cp->type != AUDIO_MIXER_ENUM)
1504 return EINVAL;
1505
1506 if (cp->un.ord)
1507 /* Enable monitor */
1508 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1509 ESS_AUDIO_CTRL_MONITOR);
1510 else
1511 /* Disable monitor */
1512 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1513 ESS_AUDIO_CTRL_MONITOR);
1514 break;
1515
1516 default:
1517 return EINVAL;
1518 }
1519
1520 return (0);
1521 }
1522
1523 int
1524 ess_get_port(addr, cp)
1525 void *addr;
1526 mixer_ctrl_t *cp;
1527 {
1528 struct ess_softc *sc = addr;
1529
1530 DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev));
1531
1532 switch (cp->dev) {
1533 case ESS_DAC_PLAY_VOL:
1534 case ESS_MIC_PLAY_VOL:
1535 case ESS_LINE_PLAY_VOL:
1536 case ESS_SYNTH_PLAY_VOL:
1537 case ESS_CD_PLAY_VOL:
1538 case ESS_AUXB_PLAY_VOL:
1539 case ESS_MASTER_VOL:
1540 case ESS_PCSPEAKER_VOL:
1541 case ESS_DAC_REC_VOL:
1542 case ESS_MIC_REC_VOL:
1543 case ESS_LINE_REC_VOL:
1544 case ESS_SYNTH_REC_VOL:
1545 case ESS_CD_REC_VOL:
1546 case ESS_AUXB_REC_VOL:
1547 case ESS_RECORD_VOL:
1548 if (cp->dev == ESS_PCSPEAKER_VOL &&
1549 cp->un.value.num_channels != 1)
1550 return EINVAL;
1551
1552 switch (cp->un.value.num_channels) {
1553 case 1:
1554 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1555 sc->gain[cp->dev][ESS_LEFT];
1556 break;
1557 case 2:
1558 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1559 sc->gain[cp->dev][ESS_LEFT];
1560 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1561 sc->gain[cp->dev][ESS_RIGHT];
1562 break;
1563 default:
1564 return EINVAL;
1565 }
1566 break;
1567
1568 case ESS_MIC_PREAMP:
1569 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
1570 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
1571 break;
1572
1573 case ESS_RECORD_SOURCE:
1574 cp->un.mask = sc->in_mask;
1575 break;
1576
1577 case ESS_RECORD_MONITOR:
1578 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
1579 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
1580 break;
1581
1582 default:
1583 return EINVAL;
1584 }
1585
1586 return (0);
1587 }
1588
1589 int
1590 ess_query_devinfo(addr, dip)
1591 void *addr;
1592 mixer_devinfo_t *dip;
1593 {
1594 #ifdef AUDIO_DEBUG
1595 struct ess_softc *sc = addr;
1596 #endif
1597
1598 DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n",
1599 sc->sc_model, dip->index));
1600
1601 /*
1602 * REVISIT: There are some slight differences between the
1603 * mixers on the different ESS chips, which can
1604 * be sorted out using the chip model rather than a
1605 * separate mixer model.
1606 * This is currently coded assuming an ES1887; we
1607 * need to work out which bits are not applicable to
1608 * the other models (1888 and 888).
1609 */
1610 switch (dip->index) {
1611 case ESS_DAC_PLAY_VOL:
1612 dip->type = AUDIO_MIXER_VALUE;
1613 dip->mixer_class = ESS_INPUT_CLASS;
1614 dip->prev = AUDIO_MIXER_LAST;
1615 dip->next = AUDIO_MIXER_LAST;
1616 strcpy(dip->label.name, AudioNdac);
1617 dip->un.v.num_channels = 2;
1618 strcpy(dip->un.v.units.name, AudioNvolume);
1619 return (0);
1620
1621 case ESS_MIC_PLAY_VOL:
1622 dip->type = AUDIO_MIXER_VALUE;
1623 dip->mixer_class = ESS_INPUT_CLASS;
1624 dip->prev = AUDIO_MIXER_LAST;
1625 dip->next = AUDIO_MIXER_LAST;
1626 strcpy(dip->label.name, AudioNmicrophone);
1627 dip->un.v.num_channels = 2;
1628 strcpy(dip->un.v.units.name, AudioNvolume);
1629 return (0);
1630
1631 case ESS_LINE_PLAY_VOL:
1632 dip->type = AUDIO_MIXER_VALUE;
1633 dip->mixer_class = ESS_INPUT_CLASS;
1634 dip->prev = AUDIO_MIXER_LAST;
1635 dip->next = AUDIO_MIXER_LAST;
1636 strcpy(dip->label.name, AudioNline);
1637 dip->un.v.num_channels = 2;
1638 strcpy(dip->un.v.units.name, AudioNvolume);
1639 return (0);
1640
1641 case ESS_SYNTH_PLAY_VOL:
1642 dip->type = AUDIO_MIXER_VALUE;
1643 dip->mixer_class = ESS_INPUT_CLASS;
1644 dip->prev = AUDIO_MIXER_LAST;
1645 dip->next = AUDIO_MIXER_LAST;
1646 strcpy(dip->label.name, AudioNfmsynth);
1647 dip->un.v.num_channels = 2;
1648 strcpy(dip->un.v.units.name, AudioNvolume);
1649 return (0);
1650
1651 case ESS_CD_PLAY_VOL:
1652 dip->type = AUDIO_MIXER_VALUE;
1653 dip->mixer_class = ESS_INPUT_CLASS;
1654 dip->prev = AUDIO_MIXER_LAST;
1655 dip->next = AUDIO_MIXER_LAST;
1656 strcpy(dip->label.name, AudioNcd);
1657 dip->un.v.num_channels = 2;
1658 strcpy(dip->un.v.units.name, AudioNvolume);
1659 return (0);
1660
1661 case ESS_AUXB_PLAY_VOL:
1662 dip->type = AUDIO_MIXER_VALUE;
1663 dip->mixer_class = ESS_INPUT_CLASS;
1664 dip->prev = AUDIO_MIXER_LAST;
1665 dip->next = AUDIO_MIXER_LAST;
1666 strcpy(dip->label.name, "auxb");
1667 dip->un.v.num_channels = 2;
1668 strcpy(dip->un.v.units.name, AudioNvolume);
1669 return (0);
1670
1671 case ESS_INPUT_CLASS:
1672 dip->type = AUDIO_MIXER_CLASS;
1673 dip->mixer_class = ESS_INPUT_CLASS;
1674 dip->next = dip->prev = AUDIO_MIXER_LAST;
1675 strcpy(dip->label.name, AudioCinputs);
1676 return (0);
1677
1678
1679 case ESS_MASTER_VOL:
1680 dip->type = AUDIO_MIXER_VALUE;
1681 dip->mixer_class = ESS_OUTPUT_CLASS;
1682 dip->prev = dip->next = AUDIO_MIXER_LAST;
1683 strcpy(dip->label.name, AudioNmaster);
1684 dip->un.v.num_channels = 2;
1685 strcpy(dip->un.v.units.name, AudioNvolume);
1686 return (0);
1687
1688 case ESS_PCSPEAKER_VOL:
1689 dip->type = AUDIO_MIXER_VALUE;
1690 dip->mixer_class = ESS_OUTPUT_CLASS;
1691 dip->prev = AUDIO_MIXER_LAST;
1692 dip->next = AUDIO_MIXER_LAST;
1693 strcpy(dip->label.name, "pc_speaker");
1694 dip->un.v.num_channels = 1;
1695 strcpy(dip->un.v.units.name, AudioNvolume);
1696 return (0);
1697
1698 case ESS_OUTPUT_CLASS:
1699 dip->type = AUDIO_MIXER_CLASS;
1700 dip->mixer_class = ESS_OUTPUT_CLASS;
1701 dip->next = dip->prev = AUDIO_MIXER_LAST;
1702 strcpy(dip->label.name, AudioCoutputs);
1703 return (0);
1704
1705
1706 case ESS_DAC_REC_VOL:
1707 dip->type = AUDIO_MIXER_VALUE;
1708 dip->mixer_class = ESS_RECORD_CLASS;
1709 dip->prev = AUDIO_MIXER_LAST;
1710 dip->next = AUDIO_MIXER_LAST;
1711 strcpy(dip->label.name, AudioNdac);
1712 dip->un.v.num_channels = 2;
1713 strcpy(dip->un.v.units.name, AudioNvolume);
1714 return (0);
1715
1716 case ESS_MIC_REC_VOL:
1717 dip->type = AUDIO_MIXER_VALUE;
1718 dip->mixer_class = ESS_RECORD_CLASS;
1719 dip->prev = AUDIO_MIXER_LAST;
1720 dip->next = ESS_MIC_PREAMP;
1721 strcpy(dip->label.name, AudioNmicrophone);
1722 dip->un.v.num_channels = 2;
1723 strcpy(dip->un.v.units.name, AudioNvolume);
1724 return (0);
1725
1726 case ESS_LINE_REC_VOL:
1727 dip->type = AUDIO_MIXER_VALUE;
1728 dip->mixer_class = ESS_RECORD_CLASS;
1729 dip->prev = AUDIO_MIXER_LAST;
1730 dip->next = AUDIO_MIXER_LAST;
1731 strcpy(dip->label.name, AudioNline);
1732 dip->un.v.num_channels = 2;
1733 strcpy(dip->un.v.units.name, AudioNvolume);
1734 return (0);
1735
1736 case ESS_SYNTH_REC_VOL:
1737 dip->type = AUDIO_MIXER_VALUE;
1738 dip->mixer_class = ESS_RECORD_CLASS;
1739 dip->prev = AUDIO_MIXER_LAST;
1740 dip->next = AUDIO_MIXER_LAST;
1741 strcpy(dip->label.name, AudioNfmsynth);
1742 dip->un.v.num_channels = 2;
1743 strcpy(dip->un.v.units.name, AudioNvolume);
1744 return (0);
1745
1746 case ESS_CD_REC_VOL:
1747 dip->type = AUDIO_MIXER_VALUE;
1748 dip->mixer_class = ESS_RECORD_CLASS;
1749 dip->prev = AUDIO_MIXER_LAST;
1750 dip->next = AUDIO_MIXER_LAST;
1751 strcpy(dip->label.name, AudioNcd);
1752 dip->un.v.num_channels = 2;
1753 strcpy(dip->un.v.units.name, AudioNvolume);
1754 return (0);
1755
1756 case ESS_AUXB_REC_VOL:
1757 dip->type = AUDIO_MIXER_VALUE;
1758 dip->mixer_class = ESS_RECORD_CLASS;
1759 dip->prev = AUDIO_MIXER_LAST;
1760 dip->next = AUDIO_MIXER_LAST;
1761 strcpy(dip->label.name, "auxb");
1762 dip->un.v.num_channels = 2;
1763 strcpy(dip->un.v.units.name, AudioNvolume);
1764 return (0);
1765
1766 case ESS_MIC_PREAMP:
1767 dip->type = AUDIO_MIXER_ENUM;
1768 dip->mixer_class = ESS_RECORD_CLASS;
1769 dip->prev = ESS_MIC_REC_VOL;
1770 dip->next = AUDIO_MIXER_LAST;
1771 strcpy(dip->label.name, AudioNenhanced);
1772 dip->un.e.num_mem = 2;
1773 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1774 dip->un.e.member[0].ord = 0;
1775 strcpy(dip->un.e.member[1].label.name, AudioNon);
1776 dip->un.e.member[1].ord = 1;
1777 return (0);
1778
1779 case ESS_RECORD_VOL:
1780 dip->type = AUDIO_MIXER_VALUE;
1781 dip->mixer_class = ESS_RECORD_CLASS;
1782 dip->prev = AUDIO_MIXER_LAST;
1783 dip->next = AUDIO_MIXER_LAST;
1784 strcpy(dip->label.name, AudioNrecord);
1785 dip->un.v.num_channels = 2;
1786 strcpy(dip->un.v.units.name, AudioNvolume);
1787 return (0);
1788
1789 case ESS_RECORD_SOURCE:
1790 dip->mixer_class = ESS_RECORD_CLASS;
1791 dip->prev = dip->next = AUDIO_MIXER_LAST;
1792 strcpy(dip->label.name, AudioNsource);
1793 dip->type = AUDIO_MIXER_SET;
1794 dip->un.s.num_mem = 6;
1795 strcpy(dip->un.s.member[0].label.name, AudioNdac);
1796 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
1797 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
1798 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
1799 strcpy(dip->un.s.member[2].label.name, AudioNline);
1800 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
1801 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
1802 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
1803 strcpy(dip->un.s.member[4].label.name, AudioNcd);
1804 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
1805 strcpy(dip->un.s.member[5].label.name, "auxb");
1806 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
1807 return (0);
1808
1809 case ESS_RECORD_CLASS:
1810 dip->type = AUDIO_MIXER_CLASS;
1811 dip->mixer_class = ESS_RECORD_CLASS;
1812 dip->next = dip->prev = AUDIO_MIXER_LAST;
1813 strcpy(dip->label.name, AudioCrecord);
1814 return (0);
1815
1816
1817 case ESS_RECORD_MONITOR:
1818 dip->mixer_class = ESS_MONITOR_CLASS;
1819 dip->prev = dip->next = AUDIO_MIXER_LAST;
1820 strcpy(dip->label.name, AudioNmonitor);
1821 dip->type = AUDIO_MIXER_ENUM;
1822 dip->un.e.num_mem = 2;
1823 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1824 dip->un.e.member[0].ord = 0;
1825 strcpy(dip->un.e.member[1].label.name, AudioNon);
1826 dip->un.e.member[1].ord = 1;
1827 return (0);
1828
1829 case ESS_MONITOR_CLASS:
1830 dip->type = AUDIO_MIXER_CLASS;
1831 dip->mixer_class = ESS_MONITOR_CLASS;
1832 dip->next = dip->prev = AUDIO_MIXER_LAST;
1833 strcpy(dip->label.name, AudioCmonitor);
1834 return (0);
1835 }
1836
1837 return (ENXIO);
1838 }
1839
1840 void *
1841 ess_malloc(addr, size, pool, flags)
1842 void *addr;
1843 unsigned long size;
1844 int pool;
1845 int flags;
1846 {
1847 struct ess_softc *sc = addr;
1848
1849 return isa_malloc(sc->sc_ic, 4, size, pool, flags);
1850 }
1851
1852 void
1853 ess_free(addr, ptr, pool)
1854 void *addr;
1855 void *ptr;
1856 int pool;
1857 {
1858 isa_free(ptr, pool);
1859 }
1860
1861 unsigned long
1862 ess_round(addr, size)
1863 void *addr;
1864 unsigned long size;
1865 {
1866 if (size > MAX_ISADMA)
1867 size = MAX_ISADMA;
1868 return size;
1869 }
1870
1871 int
1872 ess_mappage(addr, mem, off, prot)
1873 void *addr;
1874 void *mem;
1875 int off;
1876 int prot;
1877 {
1878 return (isa_mappage(mem, off, prot));
1879 }
1880
1881 int
1882 ess_get_props(addr)
1883 void *addr;
1884 {
1885 struct ess_softc *sc = addr;
1886
1887 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
1888 (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0));
1889 }
1890
1891 /* ============================================
1892 * Generic functions for ess, not used by audio h/w i/f
1893 * =============================================
1894 */
1895
1896 /*
1897 * Reset the chip.
1898 * Return non-zero if the chip isn't detected.
1899 */
1900 int
1901 ess_reset(sc)
1902 struct ess_softc *sc;
1903 {
1904 bus_space_tag_t iot = sc->sc_iot;
1905 bus_space_handle_t ioh = sc->sc_ioh;
1906
1907 sc->sc_in.intr = 0;
1908 if (sc->sc_in.active) {
1909 isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
1910 sc->sc_in.active = 0;
1911 }
1912
1913 sc->sc_out.intr = 0;
1914 if (sc->sc_out.active) {
1915 isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
1916 sc->sc_out.active = 0;
1917 }
1918
1919 EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT);
1920 delay(10000);
1921 EWRITE1(iot, ioh, ESS_DSP_RESET, 0);
1922 if (ess_rdsp(sc) != ESS_MAGIC)
1923 return (1);
1924
1925 /* Enable access to the ESS extension commands. */
1926 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
1927
1928 return (0);
1929 }
1930
1931 void
1932 ess_set_gain(sc, port, on)
1933 struct ess_softc *sc;
1934 int port;
1935 int on;
1936 {
1937 int gain, left, right;
1938 int mix;
1939 int src;
1940 int stereo;
1941
1942 /*
1943 * Most gain controls are found in the mixer registers and
1944 * are stereo. Any that are not, must set mix and stereo as
1945 * required.
1946 */
1947 mix = 1;
1948 stereo = 1;
1949
1950 switch (port) {
1951 case ESS_MASTER_VOL:
1952 src = 0x32;
1953 break;
1954 case ESS_DAC_PLAY_VOL:
1955 src = 0x7C;
1956 break;
1957 case ESS_MIC_PLAY_VOL:
1958 src = 0x1A;
1959 break;
1960 case ESS_LINE_PLAY_VOL:
1961 src = 0x3E;
1962 break;
1963 case ESS_SYNTH_PLAY_VOL:
1964 src = 0x36;
1965 break;
1966 case ESS_CD_PLAY_VOL:
1967 src = 0x38;
1968 break;
1969 case ESS_AUXB_PLAY_VOL:
1970 src = 0x3A;
1971 break;
1972 case ESS_PCSPEAKER_VOL:
1973 src = 0x3C;
1974 stereo = 0;
1975 break;
1976 case ESS_DAC_REC_VOL:
1977 src = 0x69;
1978 break;
1979 case ESS_MIC_REC_VOL:
1980 src = 0x68;
1981 break;
1982 case ESS_LINE_REC_VOL:
1983 src = 0x6E;
1984 break;
1985 case ESS_SYNTH_REC_VOL:
1986 src = 0x6B;
1987 break;
1988 case ESS_CD_REC_VOL:
1989 src = 0x6A;
1990 break;
1991 case ESS_AUXB_REC_VOL:
1992 src = 0x6C;
1993 break;
1994 case ESS_RECORD_VOL:
1995 src = 0xB4;
1996 mix = 0;
1997 break;
1998 default:
1999 return;
2000 }
2001
2002 if (on) {
2003 left = sc->gain[port][ESS_LEFT];
2004 right = sc->gain[port][ESS_RIGHT];
2005 } else {
2006 left = right = 0;
2007 }
2008
2009 if (stereo)
2010 gain = ESS_STEREO_GAIN(left, right);
2011 else
2012 gain = ESS_MONO_GAIN(left);
2013
2014 if (mix)
2015 ess_write_mix_reg(sc, src, gain);
2016 else
2017 ess_write_x_reg(sc, src, gain);
2018 }
2019
2020 int
2021 ess_set_in_ports(sc, mask)
2022 struct ess_softc *sc;
2023 int mask;
2024 {
2025 mixer_devinfo_t di;
2026 int i;
2027 int port;
2028 int tmp;
2029
2030 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
2031
2032 /*
2033 * Get the device info for the record source control,
2034 * including the list of available sources.
2035 */
2036 di.index = ESS_RECORD_SOURCE;
2037 if (ess_query_devinfo(sc, &di))
2038 return EINVAL;
2039
2040 /*
2041 * Set or disable the record volume control for each of the
2042 * possible sources.
2043 */
2044 for (i = 0; i < di.un.s.num_mem; i++)
2045 {
2046 /*
2047 * Calculate the source port number from its mask.
2048 */
2049 tmp = di.un.s.member[i].mask >> 1;
2050 for (port = 0; tmp; port++) {
2051 tmp >>= 1;
2052 }
2053
2054 /*
2055 * Set the source gain:
2056 * to the current value if source is enabled
2057 * to zero if source is disabled
2058 */
2059 ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
2060 }
2061
2062 sc->in_mask = mask;
2063
2064 /*
2065 * We have to fake a single port since the upper layer expects
2066 * one only. We choose the lowest numbered port that is enabled.
2067 */
2068 for(i = 0; i < ESS_NPORT; i++) {
2069 if (mask & (1 << i)) {
2070 sc->in_port = i;
2071 break;
2072 }
2073 }
2074
2075 return (0);
2076 }
2077
2078 void
2079 ess_speaker_on(sc)
2080 struct ess_softc *sc;
2081 {
2082 /* Disable mute on left- and right-master volume. */
2083 ess_clear_mreg_bits(sc, 0x60, 0x40);
2084 ess_clear_mreg_bits(sc, 0x62, 0x40);
2085 }
2086
2087 void
2088 ess_speaker_off(sc)
2089 struct ess_softc *sc;
2090 {
2091 /* Enable mute on left- and right-master volume. */
2092 ess_set_mreg_bits(sc, 0x60, 0x40);
2093 ess_set_mreg_bits(sc, 0x62, 0x40);
2094 }
2095
2096 /*
2097 * Calculate the time constant for the requested sampling rate.
2098 */
2099 u_int
2100 ess_srtotc(rate)
2101 u_int rate;
2102 {
2103 u_int tc;
2104
2105 /* The following formulae are from the ESS data sheet. */
2106 if (rate <= 22050)
2107 tc = 128 - 397700L / rate;
2108 else
2109 tc = 256 - 795500L / rate;
2110
2111 return (tc);
2112 }
2113
2114
2115 /*
2116 * Calculate the filter constant for the reuqested sampling rate.
2117 */
2118 u_int
2119 ess_srtofc(rate)
2120 u_int rate;
2121 {
2122 /*
2123 * The following formula is derived from the information in
2124 * the ES1887 data sheet, based on a roll-off frequency of
2125 * 87%.
2126 */
2127 return (256 - 200279L / rate);
2128 }
2129
2130
2131 /*
2132 * Return the status of the DSP.
2133 */
2134 u_char
2135 ess_get_dsp_status(sc)
2136 struct ess_softc *sc;
2137 {
2138 bus_space_tag_t iot = sc->sc_iot;
2139 bus_space_handle_t ioh = sc->sc_ioh;
2140
2141 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS));
2142 }
2143
2144
2145 /*
2146 * Return the read status of the DSP: 1 -> DSP ready for reading
2147 * 0 -> DSP not ready for reading
2148 */
2149 u_char
2150 ess_dsp_read_ready(sc)
2151 struct ess_softc *sc;
2152 {
2153 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) ==
2154 ESS_DSP_READ_READY) ? 1 : 0);
2155 }
2156
2157
2158 /*
2159 * Return the write status of the DSP: 1 -> DSP ready for writing
2160 * 0 -> DSP not ready for writing
2161 */
2162 u_char
2163 ess_dsp_write_ready(sc)
2164 struct ess_softc *sc;
2165 {
2166 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
2167 ESS_DSP_WRITE_READY) ? 1 : 0);
2168 }
2169
2170
2171 /*
2172 * Read a byte from the DSP.
2173 */
2174 int
2175 ess_rdsp(sc)
2176 struct ess_softc *sc;
2177 {
2178 bus_space_tag_t iot = sc->sc_iot;
2179 bus_space_handle_t ioh = sc->sc_ioh;
2180 int i;
2181
2182 for (i = ESS_READ_TIMEOUT; i > 0; --i) {
2183 if (ess_dsp_read_ready(sc)) {
2184 i = EREAD1(iot, ioh, ESS_DSP_READ);
2185 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i));
2186 return i;
2187 } else
2188 delay(10);
2189 }
2190
2191 DPRINTF(("ess_rdsp: timed out\n"));
2192 return (-1);
2193 }
2194
2195 /*
2196 * Write a byte to the DSP.
2197 */
2198 int
2199 ess_wdsp(sc, v)
2200 struct ess_softc *sc;
2201 u_char v;
2202 {
2203 bus_space_tag_t iot = sc->sc_iot;
2204 bus_space_handle_t ioh = sc->sc_ioh;
2205 int i;
2206
2207 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v));
2208
2209 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
2210 if (ess_dsp_write_ready(sc)) {
2211 EWRITE1(iot, ioh, ESS_DSP_WRITE, v);
2212 return (0);
2213 } else
2214 delay(10);
2215 }
2216
2217 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
2218 return (-1);
2219 }
2220
2221 /*
2222 * Write a value to one of the ESS extended registers.
2223 */
2224 int
2225 ess_write_x_reg(sc, reg, val)
2226 struct ess_softc *sc;
2227 u_char reg;
2228 u_char val;
2229 {
2230 int error;
2231
2232 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2233 if ((error = ess_wdsp(sc, reg)) == 0)
2234 error = ess_wdsp(sc, val);
2235
2236 return error;
2237 }
2238
2239 /*
2240 * Read the value of one of the ESS extended registers.
2241 */
2242 u_char
2243 ess_read_x_reg(sc, reg)
2244 struct ess_softc *sc;
2245 u_char reg;
2246 {
2247 int error;
2248 int val;
2249
2250 if ((error = ess_wdsp(sc, 0xC0)) == 0)
2251 error = ess_wdsp(sc, reg);
2252 if (error)
2253 DPRINTF(("Error reading extended register 0x%02x\n", reg));
2254 /* REVISIT: what if an error is returned above? */
2255 val = ess_rdsp(sc);
2256 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2257 return val;
2258 }
2259
2260 void
2261 ess_clear_xreg_bits(sc, reg, mask)
2262 struct ess_softc *sc;
2263 u_char reg;
2264 u_char mask;
2265 {
2266 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
2267 DPRINTF(("Error clearing bits in extended register 0x%02x\n",
2268 reg));
2269 }
2270
2271 void
2272 ess_set_xreg_bits(sc, reg, mask)
2273 struct ess_softc *sc;
2274 u_char reg;
2275 u_char mask;
2276 {
2277 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
2278 DPRINTF(("Error setting bits in extended register 0x%02x\n",
2279 reg));
2280 }
2281
2282
2283 /*
2284 * Write a value to one of the ESS mixer registers.
2285 */
2286 void
2287 ess_write_mix_reg(sc, reg, val)
2288 struct ess_softc *sc;
2289 u_char reg;
2290 u_char val;
2291 {
2292 bus_space_tag_t iot = sc->sc_iot;
2293 bus_space_handle_t ioh = sc->sc_ioh;
2294 int s;
2295
2296 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));
2297
2298 s = splaudio();
2299 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2300 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);
2301 splx(s);
2302 }
2303
2304 /*
2305 * Read the value of one of the ESS mixer registers.
2306 */
2307 u_char
2308 ess_read_mix_reg(sc, reg)
2309 struct ess_softc *sc;
2310 u_char reg;
2311 {
2312 bus_space_tag_t iot = sc->sc_iot;
2313 bus_space_handle_t ioh = sc->sc_ioh;
2314 int s;
2315 u_char val;
2316
2317 s = splaudio();
2318 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2319 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);
2320 splx(s);
2321
2322 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));
2323 return val;
2324 }
2325
2326 void
2327 ess_clear_mreg_bits(sc, reg, mask)
2328 struct ess_softc *sc;
2329 u_char reg;
2330 u_char mask;
2331 {
2332 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
2333 }
2334
2335 void
2336 ess_set_mreg_bits(sc, reg, mask)
2337 struct ess_softc *sc;
2338 u_char reg;
2339 u_char mask;
2340 {
2341 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
2342 }
2343