ess.c revision 1.18 1 /* $NetBSD: ess.c,v 1.18 1998/08/09 06:52:57 mycroft Exp $ */
2
3 /*
4 * Copyright 1997
5 * Digital Equipment Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and
8 * copied only in accordance with the following terms and conditions.
9 * Subject to these conditions, you may download, copy, install,
10 * use, modify and distribute this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce
14 * and retain this copyright notice and list of conditions as
15 * they appear in the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 * Digital Equipment Corporation. Neither the "Digital Equipment
19 * Corporation" name nor any trademark or logo of Digital Equipment
20 * Corporation may be used to endorse or promote products derived
21 * from this software without the prior written permission of
22 * Digital Equipment Corporation.
23 *
24 * 3) This software is provided "AS-IS" and any express or implied
25 * warranties, including but not limited to, any implied warranties
26 * of merchantability, fitness for a particular purpose, or
27 * non-infringement are disclaimed. In no event shall DIGITAL be
28 * liable for any damages whatsoever, and in particular, DIGITAL
29 * shall not be liable for special, indirect, consequential, or
30 * incidental damages or damages for lost profits, loss of
31 * revenue or loss of use, whether such damages arise in contract,
32 * negligence, tort, under statute, in equity, at law or otherwise,
33 * even if advised of the possibility of such damage.
34 */
35
36 /*
37 **++
38 **
39 ** ess.c
40 **
41 ** FACILITY:
42 **
43 ** DIGITAL Network Appliance Reference Design (DNARD)
44 **
45 ** MODULE DESCRIPTION:
46 **
47 ** This module contains the device driver for the ESS
48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
49 ** used as a reference point when implementing this driver.
50 **
51 ** AUTHORS:
52 **
53 ** Blair Fidler Software Engineering Australia
54 ** Gold Coast, Australia.
55 **
56 ** CREATION DATE:
57 **
58 ** March 10, 1997.
59 **
60 ** MODIFICATION HISTORY:
61 **
62 **--
63 */
64
65 /*
66 * Modification by Lennart Augustsson:
67 * Adapt for bus dma.
68 * Change to 1.3 audio interface.
69 * Major cleanup.
70 */
71
72 /*
73 * TODO (falling priority):
74 * - add looping DMA for input.
75 */
76
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/errno.h>
80 #include <sys/ioctl.h>
81 #include <sys/syslog.h>
82 #include <sys/device.h>
83 #include <sys/proc.h>
84
85 #include <machine/cpu.h>
86 #include <machine/intr.h>
87 #include <machine/bus.h>
88
89 #include <sys/audioio.h>
90 #include <dev/audio_if.h>
91 #include <dev/auconv.h>
92 #include <dev/mulaw.h>
93
94 #include <dev/isa/isavar.h>
95 #include <dev/isa/isadmavar.h>
96
97 #include <dev/isa/essvar.h>
98 #include <dev/isa/essreg.h>
99
100 #ifdef AUDIO_DEBUG
101 #define DPRINTF(x) if (essdebug) printf x
102 #define DPRINTFN(n,x) if (essdebug>(n)) printf x
103 int essdebug = 0;
104 #else
105 #define DPRINTF(x)
106 #define DPRINTFN(n,x)
107 #endif
108
109 #if 0
110 unsigned uuu;
111 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu)
112 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d))
113 #else
114 #define EREAD1(t, h, a) bus_space_read_1(t, h, a)
115 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d)
116 #endif
117
118
119 int ess_setup_sc __P((struct ess_softc *, int));
120
121 int ess_open __P((void *, int));
122 void ess_close __P((void *));
123 int ess_getdev __P((void *, struct audio_device *));
124 int ess_drain __P((void *));
125
126 int ess_query_encoding __P((void *, struct audio_encoding *));
127
128 int ess_set_params __P((void *, int, int, struct audio_params *,
129 struct audio_params *));
130
131 int ess_round_blocksize __P((void *, int));
132
133 int ess_dma_init_output __P((void *, void *, int));
134 int ess_dma_output __P((void *, void *, int, void (*)(void *), void *));
135 int ess_dma_init_input __P((void *, void *, int));
136 int ess_dma_input __P((void *, void *, int, void (*)(void *), void *));
137 int ess_halt_output __P((void *));
138 int ess_halt_input __P((void *));
139
140 int ess_intr_output __P((void *));
141 int ess_intr_input __P((void *));
142
143 int ess_speaker_ctl __P((void *, int));
144
145 int ess_getdev __P((void *, struct audio_device *));
146
147 int ess_set_port __P((void *, mixer_ctrl_t *));
148 int ess_get_port __P((void *, mixer_ctrl_t *));
149
150 void *ess_malloc __P((void *, unsigned long, int, int));
151 void ess_free __P((void *, void *, int));
152 unsigned long ess_round __P((void *, unsigned long));
153 int ess_mappage __P((void *, void *, int, int));
154
155
156 int ess_query_devinfo __P((void *, mixer_devinfo_t *));
157 int ess_get_props __P((void *));
158
159 void ess_speaker_on __P((struct ess_softc *));
160 void ess_speaker_off __P((struct ess_softc *));
161
162 int ess_config_addr __P((struct ess_softc *));
163 void ess_config_irq __P((struct ess_softc *));
164 void ess_config_drq __P((struct ess_softc *));
165 void ess_setup __P((struct ess_softc *));
166 int ess_identify __P((struct ess_softc *));
167
168 int ess_reset __P((struct ess_softc *));
169 void ess_set_gain __P((struct ess_softc *, int, int));
170 int ess_set_in_ports __P((struct ess_softc *, int));
171 u_int ess_srtotc __P((u_int));
172 u_int ess_srtofc __P((u_int));
173 u_char ess_get_dsp_status __P((struct ess_softc *));
174 u_char ess_dsp_read_ready __P((struct ess_softc *));
175 u_char ess_dsp_write_ready __P((struct ess_softc *sc));
176 int ess_rdsp __P((struct ess_softc *));
177 int ess_wdsp __P((struct ess_softc *, u_char));
178 u_char ess_read_x_reg __P((struct ess_softc *, u_char));
179 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
180 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
181 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
182 u_char ess_read_mix_reg __P((struct ess_softc *, u_char));
183 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
184 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
185 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
186
187 static char *essmodel[] = {
188 "unsupported",
189 "1888",
190 "1887",
191 "888"
192 };
193
194 struct audio_device ess_device = {
195 "ESS Technology",
196 "x",
197 "ess"
198 };
199
200 /*
201 * Define our interface to the higher level audio driver.
202 */
203
204 struct audio_hw_if ess_hw_if = {
205 ess_open,
206 ess_close,
207 ess_drain,
208 ess_query_encoding,
209 ess_set_params,
210 ess_round_blocksize,
211 NULL,
212 ess_dma_init_output,
213 ess_dma_init_input,
214 ess_dma_output,
215 ess_dma_input,
216 ess_halt_output,
217 ess_halt_input,
218 ess_speaker_ctl,
219 ess_getdev,
220 NULL,
221 ess_set_port,
222 ess_get_port,
223 ess_query_devinfo,
224 ess_malloc,
225 ess_free,
226 ess_round,
227 ess_mappage,
228 ess_get_props,
229 };
230
231 #ifdef AUDIO_DEBUG
232 void ess_printsc __P((struct ess_softc *));
233 void ess_dump_mixer __P((struct ess_softc *));
234
235 void
236 ess_printsc(sc)
237 struct ess_softc *sc;
238 {
239 int i;
240
241 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
242 (int)sc->sc_open, sc->sc_iobase, sc->out_port,
243 sc->in_port, sc->spkr_state ? "on" : "off");
244
245 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
246 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
247 sc->sc_out.intr, sc->sc_out.arg);
248
249 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
250 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
251 sc->sc_in.intr, sc->sc_in.arg);
252
253 printf("gain:");
254 for (i = 0; i < ESS_NDEVS; i++)
255 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
256 printf("\n");
257 }
258
259 void
260 ess_dump_mixer(sc)
261 struct ess_softc *sc;
262 {
263 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
264 0x7C, ess_read_mix_reg(sc, 0x7C));
265 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
266 0x1A, ess_read_mix_reg(sc, 0x1A));
267 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
268 0x3E, ess_read_mix_reg(sc, 0x3E));
269 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
270 0x36, ess_read_mix_reg(sc, 0x36));
271 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
272 0x38, ess_read_mix_reg(sc, 0x38));
273 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
274 0x3A, ess_read_mix_reg(sc, 0x3A));
275 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
276 0x32, ess_read_mix_reg(sc, 0x32));
277 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
278 0x3C, ess_read_mix_reg(sc, 0x3C));
279 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
280 0x69, ess_read_mix_reg(sc, 0x69));
281 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
282 0x68, ess_read_mix_reg(sc, 0x68));
283 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
284 0x6E, ess_read_mix_reg(sc, 0x6E));
285 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
286 0x6B, ess_read_mix_reg(sc, 0x6B));
287 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
288 0x6A, ess_read_mix_reg(sc, 0x6A));
289 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
290 0x6C, ess_read_mix_reg(sc, 0x6C));
291 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
292 0xB4, ess_read_x_reg(sc, 0xB4));
293 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
294 0x14, ess_read_mix_reg(sc, 0x14));
295
296 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
297 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
298 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
299 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
300 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
301 0x1c, ess_read_mix_reg(sc, 0x1c),
302 0x7a, ess_read_mix_reg(sc, 0x7a));
303 }
304
305 #endif
306
307 /*
308 * Configure the ESS chip for the desired audio base address.
309 */
310 int
311 ess_config_addr(sc)
312 struct ess_softc *sc;
313 {
314 int iobase = sc->sc_iobase;
315 bus_space_tag_t iot = sc->sc_iot;
316
317 /*
318 * Configure using the System Control Register method. This
319 * method is used when the AMODE line is tied high, which is
320 * the case for the Shark, but not for the evaluation board.
321 */
322
323 bus_space_handle_t scr_access_ioh;
324 bus_space_handle_t scr_ioh;
325 u_short scr_value;
326
327 /*
328 * Set the SCR bit to enable audio.
329 */
330 scr_value = ESS_SCR_AUDIO_ENABLE;
331
332 /*
333 * Set the SCR bits necessary to select the specified audio
334 * base address.
335 */
336 switch(iobase) {
337 case 0x220:
338 scr_value |= ESS_SCR_AUDIO_220;
339 break;
340 case 0x230:
341 scr_value |= ESS_SCR_AUDIO_230;
342 break;
343 case 0x240:
344 scr_value |= ESS_SCR_AUDIO_240;
345 break;
346 case 0x250:
347 scr_value |= ESS_SCR_AUDIO_250;
348 break;
349 default:
350 printf("ess: configured iobase 0x%x invalid\n", iobase);
351 return (1);
352 break;
353 }
354
355 /*
356 * Get a mapping for the System Control Register (SCR) access
357 * registers and the SCR data registers.
358 */
359 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
360 0, &scr_access_ioh)) {
361 printf("ess: can't map SCR access registers\n");
362 return (1);
363 }
364 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
365 0, &scr_ioh)) {
366 printf("ess: can't map SCR registers\n");
367 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
368 return (1);
369 }
370
371 /* Unlock the SCR. */
372 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
373
374 /* Write the base address information into SCR[0]. */
375 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0);
376 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
377
378 /* Lock the SCR. */
379 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
380
381 /* Unmap the SCR access ports and the SCR data ports. */
382 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
383 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
384
385 return 0;
386 }
387
388
389 /*
390 * Configure the ESS chip for the desired IRQ and DMA channels.
391 * ESS ISA
392 * --------
393 * IRQA irq9
394 * IRQB irq5
395 * IRQC irq7
396 * IRQD irq10
397 * IRQE irq15
398 *
399 * DRQA drq0
400 * DRQB drq1
401 * DRQC drq3
402 * DRQD drq5
403 */
404 void
405 ess_config_irq(sc)
406 struct ess_softc *sc;
407 {
408 int v;
409
410 DPRINTFN(2,("ess_config_irq\n"));
411
412 if (sc->sc_in.irq != sc->sc_out.irq) {
413 /* Configure Audio 1 (record) for the appropriate IRQ line. */
414 v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */
415 switch(sc->sc_in.irq) {
416 case 5:
417 v |= ESS_IRQ_CTRL_INTRB;
418 break;
419 case 7:
420 v |= ESS_IRQ_CTRL_INTRC;
421 break;
422 case 9:
423 v |= ESS_IRQ_CTRL_INTRA;
424 break;
425 case 10:
426 v |= ESS_IRQ_CTRL_INTRD;
427 break;
428 #ifdef DIAGNOSTIC
429 default:
430 printf("ess: configured irq %d not supported for Audio 1\n",
431 sc->sc_in.irq);
432 return;
433 #endif
434 }
435 ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v);
436 /* irq2 is hardwired to 15 in this mode */
437 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
438 ESS_AUDIO2_CTRL2_IRQ2_ENABLE);
439 /* Use old method. */
440 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888);
441 } else {
442 /* Use new method, both interrupts are the same. */
443 v = ESS_IS_SELECT_IRQ; /* enable intrs */
444 switch(sc->sc_out.irq) {
445 case 5:
446 v |= ESS_IS_INTRB;
447 break;
448 case 7:
449 v |= ESS_IS_INTRC;
450 break;
451 case 9:
452 v |= ESS_IS_INTRA;
453 break;
454 case 10:
455 v |= ESS_IS_INTRD;
456 break;
457 case 15:
458 v |= ESS_IS_INTRE;
459 break;
460 #ifdef DIAGNOSTIC
461 default:
462 printf("ess_config_irq: configured irq %d not supported for Audio 1\n",
463 sc->sc_in.irq);
464 return;
465 #endif
466 }
467 /* Set the IRQ */
468 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v);
469 }
470 }
471
472
473 void
474 ess_config_drq(sc)
475 struct ess_softc *sc;
476 {
477 int v;
478
479 DPRINTFN(2,("ess_config_drq\n"));
480
481 /* Configure Audio 1 (record) for DMA on the appropriate channel. */
482 v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT;
483 switch(sc->sc_in.drq) {
484 case 0:
485 v |= ESS_DRQ_CTRL_DRQA;
486 break;
487 case 1:
488 v |= ESS_DRQ_CTRL_DRQB;
489 break;
490 case 3:
491 v |= ESS_DRQ_CTRL_DRQC;
492 break;
493 #ifdef DIAGNOSTIC
494 default:
495 printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n",
496 sc->sc_in.drq);
497 return;
498 #endif
499 }
500 /* Set DRQ1 */
501 ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v);
502
503 /* Configure DRQ2 */
504 v = ESS_AUDIO2_CTRL3_DRQ_PD;
505 switch(sc->sc_out.drq) {
506 case 0:
507 v |= ESS_AUDIO2_CTRL3_DRQA;
508 break;
509 case 1:
510 v |= ESS_AUDIO2_CTRL3_DRQB;
511 break;
512 case 3:
513 v |= ESS_AUDIO2_CTRL3_DRQC;
514 break;
515 case 5:
516 v |= ESS_AUDIO2_CTRL3_DRQC;
517 break;
518 #ifdef DIAGNOSTIC
519 default:
520 printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n",
521 sc->sc_out.drq);
522 return;
523 #endif
524 }
525 ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v);
526 /* Enable DMA 2 */
527 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
528 ESS_AUDIO2_CTRL2_DMA_ENABLE);
529 }
530
531 /*
532 * Set up registers after a reset.
533 */
534 void
535 ess_setup(sc)
536 struct ess_softc *sc;
537 {
538
539 ess_config_irq(sc);
540 ess_config_drq(sc);
541
542 DPRINTFN(2,("ess_setup: done\n"));
543 }
544
545 /*
546 * Determine the model of ESS chip we are talking to. Currently we
547 * only support ES1888, ES1887 and ES888. The method of determining
548 * the chip is based on the information on page 27 of the ES1887 data
549 * sheet.
550 *
551 * This routine sets the values of sc->sc_model and sc->sc_version.
552 */
553 int
554 ess_identify(sc)
555 struct ess_softc *sc;
556 {
557 u_char reg1;
558 u_char reg2;
559 u_char reg3;
560
561 sc->sc_model = ESS_UNSUPPORTED;
562 sc->sc_version = 0;
563
564
565 /*
566 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where
567 * n >= 8 for an ES1887 or an ES888. Other values indicate
568 * earlier (unsupported) chips.
569 */
570 ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
571
572 if ((reg1 = ess_rdsp(sc)) != 0x68) {
573 printf("ess: First ID byte wrong (0x%02x)\n", reg1);
574 return 1;
575 }
576
577 reg2 = ess_rdsp(sc);
578 if (((reg2 & 0xf0) != 0x80) ||
579 ((reg2 & 0x0f) < 8)) {
580 printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
581 return 1;
582 }
583
584 /*
585 * Store the ID bytes as the version.
586 */
587 sc->sc_version = (reg1 << 8) + reg2;
588
589
590 /*
591 * 2. Verify we can change bit 2 in mixer register 0x64. This
592 * should be possible on all supported chips.
593 */
594 reg1 = ess_read_mix_reg(sc, 0x64);
595 reg2 = reg1 ^ 0x04; /* toggle bit 2 */
596
597 ess_write_mix_reg(sc, 0x64, reg2);
598
599 if (ess_read_mix_reg(sc, 0x64) != reg2) {
600 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
601 return 1;
602 }
603
604 /*
605 * Restore the original value of mixer register 0x64.
606 */
607 ess_write_mix_reg(sc, 0x64, reg1);
608
609
610 /*
611 * 3. Verify we can change the value of mixer register
612 * ESS_MREG_SAMPLE_RATE.
613 * This should be possible on all supported chips.
614 * It is not necessary to restore the value of this mixer register.
615 */
616 reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE);
617 reg2 = reg1 ^ 0xff; /* toggle all bits */
618
619 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2);
620
621 if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) {
622 printf("ess: Hardware error (unable to change mixer register 0x70)\n");
623 return 1;
624 }
625
626 /*
627 * 4. Determine if we can change bit 5 in mixer register 0x64.
628 * This determines whether we have an ES1887:
629 *
630 * - can change indicates ES1887
631 * - can't change indicates ES1888 or ES888
632 */
633 reg1 = ess_read_mix_reg(sc, 0x64);
634 reg2 = reg1 ^ 0x20; /* toggle bit 5 */
635
636 ess_write_mix_reg(sc, 0x64, reg2);
637
638 if (ess_read_mix_reg(sc, 0x64) == reg2) {
639 sc->sc_model = ESS_1887;
640
641 /*
642 * Restore the original value of mixer register 0x64.
643 */
644 ess_write_mix_reg(sc, 0x64, reg1);
645 } else {
646 /*
647 * 5. Determine if we can change the value of mixer
648 * register 0x69 independently of mixer register
649 * 0x68. This determines which chip we have:
650 *
651 * - can modify idependently indicates ES888
652 * - register 0x69 is an alias of 0x68 indicates ES1888
653 */
654 reg1 = ess_read_mix_reg(sc, 0x68);
655 reg2 = ess_read_mix_reg(sc, 0x69);
656 reg3 = reg2 ^ 0xff; /* toggle all bits */
657
658 /*
659 * Write different values to each register.
660 */
661 ess_write_mix_reg(sc, 0x68, reg2);
662 ess_write_mix_reg(sc, 0x69, reg3);
663
664 if (ess_read_mix_reg(sc, 0x68) == reg2)
665 sc->sc_model = ESS_888;
666 else
667 sc->sc_model = ESS_1888;
668
669 /*
670 * Restore the original value of the registers.
671 */
672 ess_write_mix_reg(sc, 0x68, reg1);
673 ess_write_mix_reg(sc, 0x69, reg2);
674 }
675
676 return 0;
677 }
678
679
680 int
681 ess_setup_sc(sc, doinit)
682 struct ess_softc *sc;
683 int doinit;
684 {
685 /* Reset the chip. */
686 if (ess_reset(sc) != 0) {
687 DPRINTF(("ess_setup_sc: couldn't reset chip\n"));
688 return (1);
689 }
690
691 /* Identify the ESS chip, and check that it is supported. */
692 if (ess_identify(sc)) {
693 DPRINTF(("ess_setup_sc: couldn't identify\n"));
694 return (1);
695 }
696
697 return (0);
698 }
699
700 /*
701 * Probe for the ESS hardware.
702 */
703 int
704 essmatch(sc)
705 struct ess_softc *sc;
706 {
707 if (!ESS_BASE_VALID(sc->sc_iobase)) {
708 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
709 return (0);
710 }
711
712 /* Configure the ESS chip for the desired audio base address. */
713 if (ess_config_addr(sc))
714 return (0);
715
716 if (ess_setup_sc(sc, 1))
717 return (0);
718
719 if (sc->sc_model == ESS_UNSUPPORTED) {
720 DPRINTF(("ess: Unsupported model\n"));
721 return (0);
722 }
723
724 /* Check that requested DMA channels are valid and different. */
725 if (!ESS_DRQ1_VALID(sc->sc_in.drq)) {
726 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
727 return (0);
728 }
729 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
730 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
731 return (0);
732 }
733 if (sc->sc_in.drq == sc->sc_out.drq) {
734 printf("ess: play and record dma chan both %d\n",
735 sc->sc_in.drq);
736 return (0);
737 }
738
739 if (sc->sc_model == ESS_1887) {
740 /*
741 * Either use the 1887 interrupt mode with all interrupts
742 * mapped to the same irq, or use the 1888 method with
743 * irq fixed at 15.
744 */
745 if (sc->sc_in.irq == sc->sc_out.irq) {
746 if (!ESS_IRQ12_VALID(sc->sc_in.irq)) {
747 printf("ess: irq %d invalid\n", sc->sc_in.irq);
748 return (0);
749 }
750 goto irq_not1888;
751 }
752 } else {
753 /* Must use separate interrupts */
754 if (sc->sc_in.irq == sc->sc_out.irq) {
755 printf("ess: play and record irq both %d\n",
756 sc->sc_in.irq);
757 return (0);
758 }
759 }
760
761 /* Check that requested IRQ lines are valid and different. */
762 if (!ESS_IRQ1_VALID(sc->sc_in.irq)) {
763 printf("ess: record irq %d invalid\n", sc->sc_in.irq);
764 return (0);
765 }
766 if (!ESS_IRQ2_VALID(sc->sc_out.irq)) {
767 printf("ess: play irq %d invalid\n", sc->sc_out.irq);
768 return (0);
769 }
770 irq_not1888:
771
772 /* Check that the DRQs are free. */
773 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
774 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
775 return (0);
776 /* XXX should we check IRQs as well? */
777
778 return (1);
779 }
780
781
782 /*
783 * Attach hardware to driver, attach hardware driver to audio
784 * pseudo-device driver.
785 */
786 void
787 essattach(sc)
788 struct ess_softc *sc;
789 {
790 struct audio_params pparams, rparams;
791 int i;
792 u_int v;
793
794 if (ess_setup_sc(sc, 0)) {
795 printf("%s: setup failed\n", sc->sc_dev.dv_xname);
796 return;
797 }
798
799 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq,
800 sc->sc_out.ist, IPL_AUDIO,
801 ess_intr_output, sc);
802 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq,
803 sc->sc_in.ist, IPL_AUDIO,
804 ess_intr_input, sc);
805
806 /* Create our DMA maps. */
807 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
808 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
809 printf("%s: can't create map for drq %d\n",
810 sc->sc_dev.dv_xname, sc->sc_in.drq);
811 return;
812 }
813 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
814 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
815 printf("%s: can't create map for drq %d\n",
816 sc->sc_dev.dv_xname, sc->sc_out.drq);
817 return;
818 }
819
820 printf(" ESS Technology ES%s [version 0x%04x]\n",
821 essmodel[sc->sc_model], sc->sc_version);
822
823 /*
824 * Set record and play parameters to default values defined in
825 * generic audio driver.
826 */
827 pparams = audio_default;
828 rparams = audio_default;
829 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
830
831 /* Do a hardware reset on the mixer. */
832 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
833
834 /*
835 * Set volume of Audio 1 to zero and disable Audio 1 DAC input
836 * to playback mixer, since playback is always through Audio 2.
837 */
838 ess_write_mix_reg(sc, 0x14, 0);
839 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
840
841 /*
842 * Set hardware record source to use output of the record
843 * mixer. We do the selection of record source in software by
844 * setting the gain of the unused sources to zero. (See
845 * ess_set_in_ports.)
846 */
847 ess_set_mreg_bits(sc, 0x1c, 0x07);
848 ess_clear_mreg_bits(sc, 0x7a, 0x10);
849 ess_set_mreg_bits(sc, 0x7a, 0x08);
850
851 /*
852 * Set gain on each mixer device to a sensible value.
853 * Devices not normally used are turned off, and other devices
854 * are set to 75% volume.
855 */
856 for (i = 0; i < ESS_NDEVS; i++) {
857 switch(i) {
858 case ESS_MIC_PLAY_VOL:
859 case ESS_LINE_PLAY_VOL:
860 case ESS_CD_PLAY_VOL:
861 case ESS_AUXB_PLAY_VOL:
862 case ESS_DAC_REC_VOL:
863 case ESS_LINE_REC_VOL:
864 case ESS_SYNTH_REC_VOL:
865 case ESS_CD_REC_VOL:
866 case ESS_AUXB_REC_VOL:
867 v = 0;
868 break;
869 default:
870 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4);
871 break;
872 }
873 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
874 ess_set_gain(sc, i, 1);
875 }
876
877 ess_setup(sc);
878
879 /* Disable the speaker until the device is opened. */
880 ess_speaker_off(sc);
881 sc->spkr_state = SPKR_OFF;
882
883 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
884 sprintf(ess_device.version, "0x%04x", sc->sc_version);
885
886 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev);
887
888 #ifdef AUDIO_DEBUG
889 ess_printsc(sc);
890 #endif
891 }
892
893 /*
894 * Various routines to interface to higher level audio driver
895 */
896
897 int
898 ess_open(addr, flags)
899 void *addr;
900 int flags;
901 {
902 struct ess_softc *sc = addr;
903
904 DPRINTF(("ess_open: sc=%p\n", sc));
905
906 if (sc->sc_open != 0 || ess_reset(sc) != 0)
907 return ENXIO;
908
909 ess_setup(sc); /* because we did a reset */
910
911 sc->sc_open = 1;
912
913 DPRINTF(("ess_open: opened\n"));
914
915 return (0);
916 }
917
918 void
919 ess_close(addr)
920 void *addr;
921 {
922 struct ess_softc *sc = addr;
923
924 DPRINTF(("ess_close: sc=%p\n", sc));
925
926 sc->sc_open = 0;
927 ess_speaker_off(sc);
928 sc->spkr_state = SPKR_OFF;
929 ess_halt_output(sc);
930 ess_halt_input(sc);
931 sc->sc_in.intr = 0;
932 sc->sc_out.intr = 0;
933
934 DPRINTF(("ess_close: closed\n"));
935 }
936
937 /*
938 * Wait for FIFO to drain, and analog section to settle.
939 * XXX should check FIFO full bit.
940 */
941 int
942 ess_drain(addr)
943 void *addr;
944 {
945 extern int hz; /* XXX */
946
947 tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */
948 return (0);
949 }
950
951 int
952 ess_speaker_ctl(addr, newstate)
953 void *addr;
954 int newstate;
955 {
956 struct ess_softc *sc = addr;
957
958 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
959 ess_speaker_on(sc);
960 sc->spkr_state = SPKR_ON;
961 }
962 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
963 ess_speaker_off(sc);
964 sc->spkr_state = SPKR_OFF;
965 }
966 return (0);
967 }
968
969 int
970 ess_getdev(addr, retp)
971 void *addr;
972 struct audio_device *retp;
973 {
974 *retp = ess_device;
975 return (0);
976 }
977
978 int
979 ess_query_encoding(addr, fp)
980 void *addr;
981 struct audio_encoding *fp;
982 {
983 /*struct ess_softc *sc = addr;*/
984
985 switch (fp->index) {
986 case 0:
987 strcpy(fp->name, AudioEulinear);
988 fp->encoding = AUDIO_ENCODING_ULINEAR;
989 fp->precision = 8;
990 fp->flags = 0;
991 return (0);
992 case 1:
993 strcpy(fp->name, AudioEmulaw);
994 fp->encoding = AUDIO_ENCODING_ULAW;
995 fp->precision = 8;
996 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
997 return (0);
998 case 2:
999 strcpy(fp->name, AudioEalaw);
1000 fp->encoding = AUDIO_ENCODING_ALAW;
1001 fp->precision = 8;
1002 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1003 return (0);
1004 case 3:
1005 strcpy(fp->name, AudioEslinear);
1006 fp->encoding = AUDIO_ENCODING_SLINEAR;
1007 fp->precision = 8;
1008 fp->flags = 0;
1009 return (0);
1010 case 4:
1011 strcpy(fp->name, AudioEslinear_le);
1012 fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
1013 fp->precision = 16;
1014 fp->flags = 0;
1015 return (0);
1016 case 5:
1017 strcpy(fp->name, AudioEulinear_le);
1018 fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
1019 fp->precision = 16;
1020 fp->flags = 0;
1021 return (0);
1022 case 6:
1023 strcpy(fp->name, AudioEslinear_be);
1024 fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
1025 fp->precision = 16;
1026 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1027 return (0);
1028 case 7:
1029 strcpy(fp->name, AudioEulinear_be);
1030 fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
1031 fp->precision = 16;
1032 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1033 return (0);
1034 default:
1035 return EINVAL;
1036 }
1037 return (0);
1038 }
1039
1040 int
1041 ess_set_params(addr, setmode, usemode, play, rec)
1042 void *addr;
1043 int setmode, usemode;
1044 struct audio_params *play, *rec;
1045 {
1046 struct ess_softc *sc = addr;
1047 struct audio_params *p;
1048 int mode;
1049
1050 DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode));
1051
1052 /*
1053 * The ES1887 manual (page 39, `Full-Duplex DMA Mode') claims that in
1054 * full-duplex operation the sample rates must be the same for both
1055 * channels. This appears to be false; the only bit in common is the
1056 * clock source selection. However, we'll be conservative here.
1057 * - mycroft
1058 */
1059 if (play->sample_rate != rec->sample_rate) {
1060 if ((usemode | setmode) == AUMODE_PLAY) {
1061 rec->sample_rate = play->sample_rate;
1062 setmode |= AUMODE_RECORD;
1063 } else if ((usemode | setmode) == AUMODE_RECORD) {
1064 play->sample_rate = rec->sample_rate;
1065 setmode |= AUMODE_PLAY;
1066 } else
1067 return (EINVAL);
1068 }
1069
1070 /* Set first record info, then play info */
1071 for (mode = AUMODE_RECORD; mode != -1;
1072 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
1073 if ((setmode & mode) == 0)
1074 continue;
1075
1076 p = mode == AUMODE_PLAY ? play : rec;
1077
1078 if (p->sample_rate < ESS_MINRATE ||
1079 p->sample_rate > ESS_MAXRATE ||
1080 (p->precision != 8 && p->precision != 16) ||
1081 (p->channels != 1 && p->channels != 2))
1082 return (EINVAL);
1083
1084 p->factor = 1;
1085 p->sw_code = 0;
1086 switch (p->encoding) {
1087 case AUDIO_ENCODING_SLINEAR_BE:
1088 case AUDIO_ENCODING_ULINEAR_BE:
1089 if (p->precision == 16)
1090 p->sw_code = swap_bytes;
1091 break;
1092 case AUDIO_ENCODING_SLINEAR_LE:
1093 case AUDIO_ENCODING_ULINEAR_LE:
1094 break;
1095 case AUDIO_ENCODING_ULAW:
1096 if (mode == AUMODE_PLAY) {
1097 p->factor = 2;
1098 p->sw_code = mulaw_to_ulinear16;
1099 } else
1100 p->sw_code = ulinear8_to_mulaw;
1101 break;
1102 case AUDIO_ENCODING_ALAW:
1103 if (mode == AUMODE_PLAY) {
1104 p->factor = 2;
1105 p->sw_code = alaw_to_ulinear16;
1106 } else
1107 p->sw_code = ulinear8_to_alaw;
1108 break;
1109 default:
1110 return (EINVAL);
1111 }
1112
1113 switch (mode) {
1114 case AUMODE_PLAY:
1115 sc->sc_out.sample_rate = p->sample_rate;
1116 sc->sc_out.channels = p->channels;
1117 sc->sc_out.precision = p->precision * p->factor;
1118 sc->sc_out.encoding = p->encoding;
1119 break;
1120 case AUMODE_RECORD:
1121 sc->sc_in.sample_rate = p->sample_rate;
1122 sc->sc_in.channels = p->channels;
1123 sc->sc_in.precision = p->precision * p->factor;
1124 sc->sc_in.encoding = p->encoding;
1125 break;
1126 }
1127 }
1128
1129 sc->sc_in.active = 0;
1130 sc->sc_out.active = 0;
1131
1132 return (0);
1133 }
1134
1135 int
1136 ess_dma_init_output(addr, buf, cc)
1137 void *addr;
1138 void *buf;
1139 int cc;
1140 {
1141 struct ess_softc *sc = addr;
1142
1143 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE,
1144 ess_srtotc(sc->sc_out.sample_rate));
1145 ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK,
1146 ess_srtofc(sc->sc_out.sample_rate));
1147
1148 if (sc->sc_out.precision == 16)
1149 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1150 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1151 else
1152 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1153 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1154
1155 if (sc->sc_out.channels == 2)
1156 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1157 ESS_AUDIO2_CTRL2_CHANNELS);
1158 else
1159 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1160 ESS_AUDIO2_CTRL2_CHANNELS);
1161
1162 if (sc->sc_out.encoding == AUDIO_ENCODING_SLINEAR_BE ||
1163 sc->sc_out.encoding == AUDIO_ENCODING_SLINEAR_LE)
1164 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1165 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1166 else
1167 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1168 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1169
1170 DPRINTF(("ess_dma_init_output: buf=%p cc=%d chan=%d\n",
1171 buf, cc, sc->sc_out.drq));
1172 isa_dmastart(sc->sc_ic, sc->sc_out.drq, buf,
1173 cc, NULL, DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT);
1174
1175 return 0;
1176 }
1177
1178 int
1179 ess_dma_output(addr, p, cc, intr, arg)
1180 void *addr;
1181 void *p;
1182 int cc;
1183 void (*intr) __P((void *));
1184 void *arg;
1185 {
1186 struct ess_softc *sc = addr;
1187
1188 DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg));
1189 #ifdef DIAGNOSTIC
1190 if (sc->sc_out.channels == 2 && (cc & 1)) {
1191 DPRINTF(("stereo playback odd bytes (%d)\n", cc));
1192 return EIO;
1193 }
1194 #endif
1195
1196 sc->sc_out.intr = intr;
1197 sc->sc_out.arg = arg;
1198 if (sc->sc_out.active)
1199 return (0);
1200
1201 DPRINTF(("ess_dma_output: set up DMA\n"));
1202
1203 sc->sc_out.active = 1;
1204
1205 if (IS16BITDRQ(sc->sc_out.drq))
1206 cc >>= 1; /* use word count for 16 bit DMA */
1207 /* Program transfer count registers with 2's complement of count. */
1208 cc = -cc;
1209 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc);
1210 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8);
1211
1212 if (IS16BITDRQ(sc->sc_out.drq))
1213 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1214 ESS_AUDIO2_CTRL1_XFER_SIZE);
1215 else
1216 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1217 ESS_AUDIO2_CTRL1_XFER_SIZE);
1218
1219 /* Use 8 bytes per output DMA. */
1220 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1221 ESS_AUDIO2_CTRL1_DEMAND_8);
1222
1223 /* Start auto-init DMA */
1224 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1225 ESS_AUDIO2_CTRL1_DAC_ENABLE |
1226 ESS_AUDIO2_CTRL1_FIFO_ENABLE |
1227 ESS_AUDIO2_CTRL1_AUTO_INIT);
1228
1229 return (0);
1230
1231 }
1232
1233 int
1234 ess_dma_init_input(addr, buf, cc)
1235 void *addr;
1236 void *buf;
1237 int cc;
1238 {
1239 struct ess_softc *sc = addr;
1240
1241 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE,
1242 ess_srtotc(sc->sc_in.sample_rate));
1243 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK,
1244 ess_srtofc(sc->sc_in.sample_rate));
1245
1246 if (sc->sc_in.precision == 16)
1247 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1248 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1249 else
1250 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1251 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1252
1253 if (sc->sc_in.channels == 2) {
1254 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL,
1255 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) |
1256 ESS_AUDIO_CTRL_STEREO) &~ ESS_AUDIO_CTRL_MONO);
1257 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1258 ESS_AUDIO1_CTRL1_FIFO_STEREO);
1259 } else {
1260 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL,
1261 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) |
1262 ESS_AUDIO_CTRL_MONO) &~ ESS_AUDIO_CTRL_STEREO);
1263 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1264 ESS_AUDIO1_CTRL1_FIFO_STEREO);
1265 }
1266
1267 if (sc->sc_in.encoding == AUDIO_ENCODING_SLINEAR_BE ||
1268 sc->sc_in.encoding == AUDIO_ENCODING_SLINEAR_LE)
1269 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1270 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1271 else
1272 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1273 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1274
1275 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
1276 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1277 ESS_AUDIO1_CTRL1_FIFO_CONNECT);
1278
1279 DPRINTF(("ess_dma_init_input: buf=%p cc=%d chan=%d\n",
1280 buf, cc, sc->sc_in.drq));
1281 isa_dmastart(sc->sc_ic, sc->sc_in.drq, buf,
1282 cc, NULL, DMAMODE_READ | DMAMODE_LOOP, BUS_DMA_NOWAIT);
1283
1284 return 0;
1285 }
1286
1287 int
1288 ess_dma_input(addr, p, cc, intr, arg)
1289 void *addr;
1290 void *p;
1291 int cc;
1292 void (*intr) __P((void *));
1293 void *arg;
1294 {
1295 struct ess_softc *sc = addr;
1296
1297 DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg));
1298 #ifdef DIAGNOSTIC
1299 if (sc->sc_in.channels == 2 && (cc & 1)) {
1300 DPRINTF(("stereo record odd bytes (%d)\n", cc));
1301 return EIO;
1302 }
1303 #endif
1304
1305 sc->sc_in.intr = intr;
1306 sc->sc_in.arg = arg;
1307 if (sc->sc_in.active)
1308 return (0);
1309
1310 DPRINTF(("ess_dma_input: set up DMA\n"));
1311
1312 sc->sc_in.active = 1;
1313
1314 if (IS16BITDRQ(sc->sc_in.drq))
1315 cc >>= 1; /* use word count for 16 bit DMA */
1316 /* Program transfer count registers with 2's complement of count. */
1317 cc = -cc;
1318 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc);
1319 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8);
1320
1321 /* Use 4 bytes per input DMA. */
1322 ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL,
1323 ESS_DEMAND_CTRL_DEMAND_4);
1324
1325 /* Start auto-init DMA */
1326 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1327 ESS_AUDIO1_CTRL2_DMA_READ |
1328 ESS_AUDIO1_CTRL2_ADC_ENABLE |
1329 ESS_AUDIO1_CTRL2_FIFO_ENABLE |
1330 ESS_AUDIO1_CTRL2_AUTO_INIT);
1331
1332 return (0);
1333
1334 }
1335
1336 int
1337 ess_halt_output(addr)
1338 void *addr;
1339 {
1340 struct ess_softc *sc = addr;
1341
1342 DPRINTF(("ess_halt_output: sc=%p\n", sc));
1343
1344 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1345 ESS_AUDIO2_CTRL1_FIFO_ENABLE);
1346
1347 return (0);
1348 }
1349
1350 int
1351 ess_halt_input(addr)
1352 void *addr;
1353 {
1354 struct ess_softc *sc = addr;
1355
1356 DPRINTF(("ess_halt_input: sc=%p\n", sc));
1357
1358 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1359 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1360
1361 return (0);
1362 }
1363
1364 int
1365 ess_intr_output(arg)
1366 void *arg;
1367 {
1368 struct ess_softc *sc = arg;
1369
1370 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr));
1371
1372 /* clear interrupt on Audio channel 2 */
1373 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1374 ESS_AUDIO2_CTRL2_IRQ_LATCH);
1375
1376 sc->sc_out.nintr++;
1377
1378 if (sc->sc_out.intr != 0)
1379 (*sc->sc_out.intr)(sc->sc_out.arg);
1380 else
1381 return (0);
1382
1383 return (1);
1384 }
1385
1386 int
1387 ess_intr_input(arg)
1388 void *arg;
1389 {
1390 struct ess_softc *sc = arg;
1391 u_char x;
1392
1393 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr));
1394
1395 /* clear interrupt on Audio channel 1*/
1396 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
1397
1398 sc->sc_in.nintr++;
1399
1400 if (sc->sc_in.intr != 0)
1401 (*sc->sc_in.intr)(sc->sc_in.arg);
1402 else
1403 return (0);
1404
1405 return (1);
1406 }
1407
1408 int
1409 ess_round_blocksize(addr, blk)
1410 void *addr;
1411 int blk;
1412 {
1413 return (blk & -8); /* round for max DMA size */
1414 }
1415
1416 int
1417 ess_set_port(addr, cp)
1418 void *addr;
1419 mixer_ctrl_t *cp;
1420 {
1421 struct ess_softc *sc = addr;
1422 int lgain, rgain;
1423
1424 DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n",
1425 cp->dev, cp->un.value.num_channels));
1426
1427 switch (cp->dev) {
1428 /*
1429 * The following mixer ports are all stereo. If we get a
1430 * single-channel gain value passed in, then we duplicate it
1431 * to both left and right channels.
1432 */
1433 case ESS_MASTER_VOL:
1434 case ESS_DAC_PLAY_VOL:
1435 case ESS_MIC_PLAY_VOL:
1436 case ESS_LINE_PLAY_VOL:
1437 case ESS_SYNTH_PLAY_VOL:
1438 case ESS_CD_PLAY_VOL:
1439 case ESS_AUXB_PLAY_VOL:
1440 case ESS_DAC_REC_VOL:
1441 case ESS_MIC_REC_VOL:
1442 case ESS_LINE_REC_VOL:
1443 case ESS_SYNTH_REC_VOL:
1444 case ESS_CD_REC_VOL:
1445 case ESS_AUXB_REC_VOL:
1446 case ESS_RECORD_VOL:
1447 if (cp->type != AUDIO_MIXER_VALUE)
1448 return EINVAL;
1449
1450 switch (cp->un.value.num_channels) {
1451 case 1:
1452 lgain = rgain = ESS_4BIT_GAIN(
1453 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1454 break;
1455 case 2:
1456 lgain = ESS_4BIT_GAIN(
1457 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
1458 rgain = ESS_4BIT_GAIN(
1459 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
1460 break;
1461 default:
1462 return EINVAL;
1463 }
1464
1465 sc->gain[cp->dev][ESS_LEFT] = lgain;
1466 sc->gain[cp->dev][ESS_RIGHT] = rgain;
1467
1468 ess_set_gain(sc, cp->dev, 1);
1469 break;
1470
1471
1472 /*
1473 * The PC speaker port is mono. If we get a stereo gain value
1474 * passed in, then we return EINVAL.
1475 */
1476 case ESS_PCSPEAKER_VOL:
1477 if (cp->un.value.num_channels != 1)
1478 return EINVAL;
1479
1480 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
1481 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1482 ess_set_gain(sc, cp->dev, 1);
1483 break;
1484
1485
1486 case ESS_MIC_PREAMP:
1487 if (cp->type != AUDIO_MIXER_ENUM)
1488 return EINVAL;
1489
1490 if (cp->un.ord)
1491 /* Enable microphone preamp */
1492 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1493 ESS_PREAMP_CTRL_ENABLE);
1494 else
1495 /* Disable microphone preamp */
1496 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1497 ESS_PREAMP_CTRL_ENABLE);
1498 break;
1499
1500 case ESS_RECORD_SOURCE:
1501 if (cp->type == AUDIO_MIXER_SET)
1502 return ess_set_in_ports(sc, cp->un.mask);
1503 else
1504 return EINVAL;
1505 break;
1506
1507 case ESS_RECORD_MONITOR:
1508 if (cp->type != AUDIO_MIXER_ENUM)
1509 return EINVAL;
1510
1511 if (cp->un.ord)
1512 /* Enable monitor */
1513 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1514 ESS_AUDIO_CTRL_MONITOR);
1515 else
1516 /* Disable monitor */
1517 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1518 ESS_AUDIO_CTRL_MONITOR);
1519 break;
1520
1521 default:
1522 return EINVAL;
1523 }
1524
1525 return (0);
1526 }
1527
1528 int
1529 ess_get_port(addr, cp)
1530 void *addr;
1531 mixer_ctrl_t *cp;
1532 {
1533 struct ess_softc *sc = addr;
1534
1535 DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev));
1536
1537 switch (cp->dev) {
1538 case ESS_DAC_PLAY_VOL:
1539 case ESS_MIC_PLAY_VOL:
1540 case ESS_LINE_PLAY_VOL:
1541 case ESS_SYNTH_PLAY_VOL:
1542 case ESS_CD_PLAY_VOL:
1543 case ESS_AUXB_PLAY_VOL:
1544 case ESS_MASTER_VOL:
1545 case ESS_PCSPEAKER_VOL:
1546 case ESS_DAC_REC_VOL:
1547 case ESS_MIC_REC_VOL:
1548 case ESS_LINE_REC_VOL:
1549 case ESS_SYNTH_REC_VOL:
1550 case ESS_CD_REC_VOL:
1551 case ESS_AUXB_REC_VOL:
1552 case ESS_RECORD_VOL:
1553 if (cp->dev == ESS_PCSPEAKER_VOL &&
1554 cp->un.value.num_channels != 1)
1555 return EINVAL;
1556
1557 switch (cp->un.value.num_channels) {
1558 case 1:
1559 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1560 sc->gain[cp->dev][ESS_LEFT];
1561 break;
1562 case 2:
1563 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1564 sc->gain[cp->dev][ESS_LEFT];
1565 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1566 sc->gain[cp->dev][ESS_RIGHT];
1567 break;
1568 default:
1569 return EINVAL;
1570 }
1571 break;
1572
1573 case ESS_MIC_PREAMP:
1574 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
1575 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
1576 break;
1577
1578 case ESS_RECORD_SOURCE:
1579 cp->un.mask = sc->in_mask;
1580 break;
1581
1582 case ESS_RECORD_MONITOR:
1583 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
1584 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
1585 break;
1586
1587 default:
1588 return EINVAL;
1589 }
1590
1591 return (0);
1592 }
1593
1594 int
1595 ess_query_devinfo(addr, dip)
1596 void *addr;
1597 mixer_devinfo_t *dip;
1598 {
1599 #ifdef AUDIO_DEBUG
1600 struct ess_softc *sc = addr;
1601 #endif
1602
1603 DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n",
1604 sc->sc_model, dip->index));
1605
1606 /*
1607 * REVISIT: There are some slight differences between the
1608 * mixers on the different ESS chips, which can
1609 * be sorted out using the chip model rather than a
1610 * separate mixer model.
1611 * This is currently coded assuming an ES1887; we
1612 * need to work out which bits are not applicable to
1613 * the other models (1888 and 888).
1614 */
1615 switch (dip->index) {
1616 case ESS_DAC_PLAY_VOL:
1617 dip->type = AUDIO_MIXER_VALUE;
1618 dip->mixer_class = ESS_INPUT_CLASS;
1619 dip->prev = AUDIO_MIXER_LAST;
1620 dip->next = AUDIO_MIXER_LAST;
1621 strcpy(dip->label.name, AudioNdac);
1622 dip->un.v.num_channels = 2;
1623 strcpy(dip->un.v.units.name, AudioNvolume);
1624 return (0);
1625
1626 case ESS_MIC_PLAY_VOL:
1627 dip->type = AUDIO_MIXER_VALUE;
1628 dip->mixer_class = ESS_INPUT_CLASS;
1629 dip->prev = AUDIO_MIXER_LAST;
1630 dip->next = AUDIO_MIXER_LAST;
1631 strcpy(dip->label.name, AudioNmicrophone);
1632 dip->un.v.num_channels = 2;
1633 strcpy(dip->un.v.units.name, AudioNvolume);
1634 return (0);
1635
1636 case ESS_LINE_PLAY_VOL:
1637 dip->type = AUDIO_MIXER_VALUE;
1638 dip->mixer_class = ESS_INPUT_CLASS;
1639 dip->prev = AUDIO_MIXER_LAST;
1640 dip->next = AUDIO_MIXER_LAST;
1641 strcpy(dip->label.name, AudioNline);
1642 dip->un.v.num_channels = 2;
1643 strcpy(dip->un.v.units.name, AudioNvolume);
1644 return (0);
1645
1646 case ESS_SYNTH_PLAY_VOL:
1647 dip->type = AUDIO_MIXER_VALUE;
1648 dip->mixer_class = ESS_INPUT_CLASS;
1649 dip->prev = AUDIO_MIXER_LAST;
1650 dip->next = AUDIO_MIXER_LAST;
1651 strcpy(dip->label.name, AudioNfmsynth);
1652 dip->un.v.num_channels = 2;
1653 strcpy(dip->un.v.units.name, AudioNvolume);
1654 return (0);
1655
1656 case ESS_CD_PLAY_VOL:
1657 dip->type = AUDIO_MIXER_VALUE;
1658 dip->mixer_class = ESS_INPUT_CLASS;
1659 dip->prev = AUDIO_MIXER_LAST;
1660 dip->next = AUDIO_MIXER_LAST;
1661 strcpy(dip->label.name, AudioNcd);
1662 dip->un.v.num_channels = 2;
1663 strcpy(dip->un.v.units.name, AudioNvolume);
1664 return (0);
1665
1666 case ESS_AUXB_PLAY_VOL:
1667 dip->type = AUDIO_MIXER_VALUE;
1668 dip->mixer_class = ESS_INPUT_CLASS;
1669 dip->prev = AUDIO_MIXER_LAST;
1670 dip->next = AUDIO_MIXER_LAST;
1671 strcpy(dip->label.name, "auxb");
1672 dip->un.v.num_channels = 2;
1673 strcpy(dip->un.v.units.name, AudioNvolume);
1674 return (0);
1675
1676 case ESS_INPUT_CLASS:
1677 dip->type = AUDIO_MIXER_CLASS;
1678 dip->mixer_class = ESS_INPUT_CLASS;
1679 dip->next = dip->prev = AUDIO_MIXER_LAST;
1680 strcpy(dip->label.name, AudioCinputs);
1681 return (0);
1682
1683
1684 case ESS_MASTER_VOL:
1685 dip->type = AUDIO_MIXER_VALUE;
1686 dip->mixer_class = ESS_OUTPUT_CLASS;
1687 dip->prev = dip->next = AUDIO_MIXER_LAST;
1688 strcpy(dip->label.name, AudioNmaster);
1689 dip->un.v.num_channels = 2;
1690 strcpy(dip->un.v.units.name, AudioNvolume);
1691 return (0);
1692
1693 case ESS_PCSPEAKER_VOL:
1694 dip->type = AUDIO_MIXER_VALUE;
1695 dip->mixer_class = ESS_OUTPUT_CLASS;
1696 dip->prev = AUDIO_MIXER_LAST;
1697 dip->next = AUDIO_MIXER_LAST;
1698 strcpy(dip->label.name, "pc_speaker");
1699 dip->un.v.num_channels = 1;
1700 strcpy(dip->un.v.units.name, AudioNvolume);
1701 return (0);
1702
1703 case ESS_OUTPUT_CLASS:
1704 dip->type = AUDIO_MIXER_CLASS;
1705 dip->mixer_class = ESS_OUTPUT_CLASS;
1706 dip->next = dip->prev = AUDIO_MIXER_LAST;
1707 strcpy(dip->label.name, AudioCoutputs);
1708 return (0);
1709
1710
1711 case ESS_DAC_REC_VOL:
1712 dip->type = AUDIO_MIXER_VALUE;
1713 dip->mixer_class = ESS_RECORD_CLASS;
1714 dip->prev = AUDIO_MIXER_LAST;
1715 dip->next = AUDIO_MIXER_LAST;
1716 strcpy(dip->label.name, AudioNdac);
1717 dip->un.v.num_channels = 2;
1718 strcpy(dip->un.v.units.name, AudioNvolume);
1719 return (0);
1720
1721 case ESS_MIC_REC_VOL:
1722 dip->type = AUDIO_MIXER_VALUE;
1723 dip->mixer_class = ESS_RECORD_CLASS;
1724 dip->prev = AUDIO_MIXER_LAST;
1725 dip->next = ESS_MIC_PREAMP;
1726 strcpy(dip->label.name, AudioNmicrophone);
1727 dip->un.v.num_channels = 2;
1728 strcpy(dip->un.v.units.name, AudioNvolume);
1729 return (0);
1730
1731 case ESS_LINE_REC_VOL:
1732 dip->type = AUDIO_MIXER_VALUE;
1733 dip->mixer_class = ESS_RECORD_CLASS;
1734 dip->prev = AUDIO_MIXER_LAST;
1735 dip->next = AUDIO_MIXER_LAST;
1736 strcpy(dip->label.name, AudioNline);
1737 dip->un.v.num_channels = 2;
1738 strcpy(dip->un.v.units.name, AudioNvolume);
1739 return (0);
1740
1741 case ESS_SYNTH_REC_VOL:
1742 dip->type = AUDIO_MIXER_VALUE;
1743 dip->mixer_class = ESS_RECORD_CLASS;
1744 dip->prev = AUDIO_MIXER_LAST;
1745 dip->next = AUDIO_MIXER_LAST;
1746 strcpy(dip->label.name, AudioNfmsynth);
1747 dip->un.v.num_channels = 2;
1748 strcpy(dip->un.v.units.name, AudioNvolume);
1749 return (0);
1750
1751 case ESS_CD_REC_VOL:
1752 dip->type = AUDIO_MIXER_VALUE;
1753 dip->mixer_class = ESS_RECORD_CLASS;
1754 dip->prev = AUDIO_MIXER_LAST;
1755 dip->next = AUDIO_MIXER_LAST;
1756 strcpy(dip->label.name, AudioNcd);
1757 dip->un.v.num_channels = 2;
1758 strcpy(dip->un.v.units.name, AudioNvolume);
1759 return (0);
1760
1761 case ESS_AUXB_REC_VOL:
1762 dip->type = AUDIO_MIXER_VALUE;
1763 dip->mixer_class = ESS_RECORD_CLASS;
1764 dip->prev = AUDIO_MIXER_LAST;
1765 dip->next = AUDIO_MIXER_LAST;
1766 strcpy(dip->label.name, "auxb");
1767 dip->un.v.num_channels = 2;
1768 strcpy(dip->un.v.units.name, AudioNvolume);
1769 return (0);
1770
1771 case ESS_MIC_PREAMP:
1772 dip->type = AUDIO_MIXER_ENUM;
1773 dip->mixer_class = ESS_RECORD_CLASS;
1774 dip->prev = ESS_MIC_REC_VOL;
1775 dip->next = AUDIO_MIXER_LAST;
1776 strcpy(dip->label.name, AudioNenhanced);
1777 dip->un.e.num_mem = 2;
1778 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1779 dip->un.e.member[0].ord = 0;
1780 strcpy(dip->un.e.member[1].label.name, AudioNon);
1781 dip->un.e.member[1].ord = 1;
1782 return (0);
1783
1784 case ESS_RECORD_VOL:
1785 dip->type = AUDIO_MIXER_VALUE;
1786 dip->mixer_class = ESS_RECORD_CLASS;
1787 dip->prev = AUDIO_MIXER_LAST;
1788 dip->next = AUDIO_MIXER_LAST;
1789 strcpy(dip->label.name, AudioNrecord);
1790 dip->un.v.num_channels = 2;
1791 strcpy(dip->un.v.units.name, AudioNvolume);
1792 return (0);
1793
1794 case ESS_RECORD_SOURCE:
1795 dip->mixer_class = ESS_RECORD_CLASS;
1796 dip->prev = dip->next = AUDIO_MIXER_LAST;
1797 strcpy(dip->label.name, AudioNsource);
1798 dip->type = AUDIO_MIXER_SET;
1799 dip->un.s.num_mem = 6;
1800 strcpy(dip->un.s.member[0].label.name, AudioNdac);
1801 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
1802 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
1803 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
1804 strcpy(dip->un.s.member[2].label.name, AudioNline);
1805 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
1806 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
1807 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
1808 strcpy(dip->un.s.member[4].label.name, AudioNcd);
1809 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
1810 strcpy(dip->un.s.member[5].label.name, "auxb");
1811 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
1812 return (0);
1813
1814 case ESS_RECORD_CLASS:
1815 dip->type = AUDIO_MIXER_CLASS;
1816 dip->mixer_class = ESS_RECORD_CLASS;
1817 dip->next = dip->prev = AUDIO_MIXER_LAST;
1818 strcpy(dip->label.name, AudioCrecord);
1819 return (0);
1820
1821
1822 case ESS_RECORD_MONITOR:
1823 dip->mixer_class = ESS_MONITOR_CLASS;
1824 dip->prev = dip->next = AUDIO_MIXER_LAST;
1825 strcpy(dip->label.name, AudioNmonitor);
1826 dip->type = AUDIO_MIXER_ENUM;
1827 dip->un.e.num_mem = 2;
1828 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1829 dip->un.e.member[0].ord = 0;
1830 strcpy(dip->un.e.member[1].label.name, AudioNon);
1831 dip->un.e.member[1].ord = 1;
1832 return (0);
1833
1834 case ESS_MONITOR_CLASS:
1835 dip->type = AUDIO_MIXER_CLASS;
1836 dip->mixer_class = ESS_MONITOR_CLASS;
1837 dip->next = dip->prev = AUDIO_MIXER_LAST;
1838 strcpy(dip->label.name, AudioCmonitor);
1839 return (0);
1840 }
1841
1842 return (ENXIO);
1843 }
1844
1845 void *
1846 ess_malloc(addr, size, pool, flags)
1847 void *addr;
1848 unsigned long size;
1849 int pool;
1850 int flags;
1851 {
1852 struct ess_softc *sc = addr;
1853
1854 return isa_malloc(sc->sc_ic, 4, size, pool, flags);
1855 }
1856
1857 void
1858 ess_free(addr, ptr, pool)
1859 void *addr;
1860 void *ptr;
1861 int pool;
1862 {
1863 isa_free(ptr, pool);
1864 }
1865
1866 unsigned long
1867 ess_round(addr, size)
1868 void *addr;
1869 unsigned long size;
1870 {
1871 if (size > MAX_ISADMA)
1872 size = MAX_ISADMA;
1873 return size;
1874 }
1875
1876 int
1877 ess_mappage(addr, mem, off, prot)
1878 void *addr;
1879 void *mem;
1880 int off;
1881 int prot;
1882 {
1883 return (isa_mappage(mem, off, prot));
1884 }
1885
1886 int
1887 ess_get_props(addr)
1888 void *addr;
1889 {
1890 struct ess_softc *sc = addr;
1891
1892 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
1893 (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0));
1894 }
1895
1896 /* ============================================
1897 * Generic functions for ess, not used by audio h/w i/f
1898 * =============================================
1899 */
1900
1901 /*
1902 * Reset the chip.
1903 * Return non-zero if the chip isn't detected.
1904 */
1905 int
1906 ess_reset(sc)
1907 struct ess_softc *sc;
1908 {
1909 bus_space_tag_t iot = sc->sc_iot;
1910 bus_space_handle_t ioh = sc->sc_ioh;
1911
1912 sc->sc_in.intr = 0;
1913 if (sc->sc_in.active) {
1914 isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
1915 sc->sc_in.active = 0;
1916 }
1917
1918 sc->sc_out.intr = 0;
1919 if (sc->sc_out.active) {
1920 isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
1921 sc->sc_out.active = 0;
1922 }
1923
1924 EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT);
1925 delay(10000);
1926 EWRITE1(iot, ioh, ESS_DSP_RESET, 0);
1927 if (ess_rdsp(sc) != ESS_MAGIC)
1928 return (1);
1929
1930 /* Enable access to the ESS extension commands. */
1931 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
1932
1933 return (0);
1934 }
1935
1936 void
1937 ess_set_gain(sc, port, on)
1938 struct ess_softc *sc;
1939 int port;
1940 int on;
1941 {
1942 int gain, left, right;
1943 int mix;
1944 int src;
1945 int stereo;
1946
1947 /*
1948 * Most gain controls are found in the mixer registers and
1949 * are stereo. Any that are not, must set mix and stereo as
1950 * required.
1951 */
1952 mix = 1;
1953 stereo = 1;
1954
1955 switch (port) {
1956 case ESS_MASTER_VOL:
1957 src = 0x32;
1958 break;
1959 case ESS_DAC_PLAY_VOL:
1960 src = 0x7C;
1961 break;
1962 case ESS_MIC_PLAY_VOL:
1963 src = 0x1A;
1964 break;
1965 case ESS_LINE_PLAY_VOL:
1966 src = 0x3E;
1967 break;
1968 case ESS_SYNTH_PLAY_VOL:
1969 src = 0x36;
1970 break;
1971 case ESS_CD_PLAY_VOL:
1972 src = 0x38;
1973 break;
1974 case ESS_AUXB_PLAY_VOL:
1975 src = 0x3A;
1976 break;
1977 case ESS_PCSPEAKER_VOL:
1978 src = 0x3C;
1979 stereo = 0;
1980 break;
1981 case ESS_DAC_REC_VOL:
1982 src = 0x69;
1983 break;
1984 case ESS_MIC_REC_VOL:
1985 src = 0x68;
1986 break;
1987 case ESS_LINE_REC_VOL:
1988 src = 0x6E;
1989 break;
1990 case ESS_SYNTH_REC_VOL:
1991 src = 0x6B;
1992 break;
1993 case ESS_CD_REC_VOL:
1994 src = 0x6A;
1995 break;
1996 case ESS_AUXB_REC_VOL:
1997 src = 0x6C;
1998 break;
1999 case ESS_RECORD_VOL:
2000 src = 0xB4;
2001 mix = 0;
2002 break;
2003 default:
2004 return;
2005 }
2006
2007 if (on) {
2008 left = sc->gain[port][ESS_LEFT];
2009 right = sc->gain[port][ESS_RIGHT];
2010 } else {
2011 left = right = 0;
2012 }
2013
2014 if (stereo)
2015 gain = ESS_STEREO_GAIN(left, right);
2016 else
2017 gain = ESS_MONO_GAIN(left);
2018
2019 if (mix)
2020 ess_write_mix_reg(sc, src, gain);
2021 else
2022 ess_write_x_reg(sc, src, gain);
2023 }
2024
2025 int
2026 ess_set_in_ports(sc, mask)
2027 struct ess_softc *sc;
2028 int mask;
2029 {
2030 mixer_devinfo_t di;
2031 int i;
2032 int port;
2033 int tmp;
2034
2035 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
2036
2037 /*
2038 * Get the device info for the record source control,
2039 * including the list of available sources.
2040 */
2041 di.index = ESS_RECORD_SOURCE;
2042 if (ess_query_devinfo(sc, &di))
2043 return EINVAL;
2044
2045 /*
2046 * Set or disable the record volume control for each of the
2047 * possible sources.
2048 */
2049 for (i = 0; i < di.un.s.num_mem; i++)
2050 {
2051 /*
2052 * Calculate the source port number from its mask.
2053 */
2054 tmp = di.un.s.member[i].mask >> 1;
2055 for (port = 0; tmp; port++) {
2056 tmp >>= 1;
2057 }
2058
2059 /*
2060 * Set the source gain:
2061 * to the current value if source is enabled
2062 * to zero if source is disabled
2063 */
2064 ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
2065 }
2066
2067 sc->in_mask = mask;
2068
2069 /*
2070 * We have to fake a single port since the upper layer expects
2071 * one only. We choose the lowest numbered port that is enabled.
2072 */
2073 for(i = 0; i < ESS_NPORT; i++) {
2074 if (mask & (1 << i)) {
2075 sc->in_port = i;
2076 break;
2077 }
2078 }
2079
2080 return (0);
2081 }
2082
2083 void
2084 ess_speaker_on(sc)
2085 struct ess_softc *sc;
2086 {
2087 /* Disable mute on left- and right-master volume. */
2088 ess_clear_mreg_bits(sc, 0x60, 0x40);
2089 ess_clear_mreg_bits(sc, 0x62, 0x40);
2090 }
2091
2092 void
2093 ess_speaker_off(sc)
2094 struct ess_softc *sc;
2095 {
2096 /* Enable mute on left- and right-master volume. */
2097 ess_set_mreg_bits(sc, 0x60, 0x40);
2098 ess_set_mreg_bits(sc, 0x62, 0x40);
2099 }
2100
2101 /*
2102 * Calculate the time constant for the requested sampling rate.
2103 */
2104 u_int
2105 ess_srtotc(rate)
2106 u_int rate;
2107 {
2108 u_int tc;
2109
2110 /* The following formulae are from the ESS data sheet. */
2111 if (rate <= 22050)
2112 tc = 128 - 397700L / rate;
2113 else
2114 tc = 256 - 795500L / rate;
2115
2116 return (tc);
2117 }
2118
2119
2120 /*
2121 * Calculate the filter constant for the reuqested sampling rate.
2122 */
2123 u_int
2124 ess_srtofc(rate)
2125 u_int rate;
2126 {
2127 /*
2128 * The following formula is derived from the information in
2129 * the ES1887 data sheet, based on a roll-off frequency of
2130 * 87%.
2131 */
2132 return (256 - 200279L / rate);
2133 }
2134
2135
2136 /*
2137 * Return the status of the DSP.
2138 */
2139 u_char
2140 ess_get_dsp_status(sc)
2141 struct ess_softc *sc;
2142 {
2143 bus_space_tag_t iot = sc->sc_iot;
2144 bus_space_handle_t ioh = sc->sc_ioh;
2145
2146 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS));
2147 }
2148
2149
2150 /*
2151 * Return the read status of the DSP: 1 -> DSP ready for reading
2152 * 0 -> DSP not ready for reading
2153 */
2154 u_char
2155 ess_dsp_read_ready(sc)
2156 struct ess_softc *sc;
2157 {
2158 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) ==
2159 ESS_DSP_READ_READY) ? 1 : 0);
2160 }
2161
2162
2163 /*
2164 * Return the write status of the DSP: 1 -> DSP ready for writing
2165 * 0 -> DSP not ready for writing
2166 */
2167 u_char
2168 ess_dsp_write_ready(sc)
2169 struct ess_softc *sc;
2170 {
2171 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
2172 ESS_DSP_WRITE_READY) ? 1 : 0);
2173 }
2174
2175
2176 /*
2177 * Read a byte from the DSP.
2178 */
2179 int
2180 ess_rdsp(sc)
2181 struct ess_softc *sc;
2182 {
2183 bus_space_tag_t iot = sc->sc_iot;
2184 bus_space_handle_t ioh = sc->sc_ioh;
2185 int i;
2186
2187 for (i = ESS_READ_TIMEOUT; i > 0; --i) {
2188 if (ess_dsp_read_ready(sc)) {
2189 i = EREAD1(iot, ioh, ESS_DSP_READ);
2190 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i));
2191 return i;
2192 } else
2193 delay(10);
2194 }
2195
2196 DPRINTF(("ess_rdsp: timed out\n"));
2197 return (-1);
2198 }
2199
2200 /*
2201 * Write a byte to the DSP.
2202 */
2203 int
2204 ess_wdsp(sc, v)
2205 struct ess_softc *sc;
2206 u_char v;
2207 {
2208 bus_space_tag_t iot = sc->sc_iot;
2209 bus_space_handle_t ioh = sc->sc_ioh;
2210 int i;
2211
2212 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v));
2213
2214 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
2215 if (ess_dsp_write_ready(sc)) {
2216 EWRITE1(iot, ioh, ESS_DSP_WRITE, v);
2217 return (0);
2218 } else
2219 delay(10);
2220 }
2221
2222 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
2223 return (-1);
2224 }
2225
2226 /*
2227 * Write a value to one of the ESS extended registers.
2228 */
2229 int
2230 ess_write_x_reg(sc, reg, val)
2231 struct ess_softc *sc;
2232 u_char reg;
2233 u_char val;
2234 {
2235 int error;
2236
2237 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2238 if ((error = ess_wdsp(sc, reg)) == 0)
2239 error = ess_wdsp(sc, val);
2240
2241 return error;
2242 }
2243
2244 /*
2245 * Read the value of one of the ESS extended registers.
2246 */
2247 u_char
2248 ess_read_x_reg(sc, reg)
2249 struct ess_softc *sc;
2250 u_char reg;
2251 {
2252 int error;
2253 int val;
2254
2255 if ((error = ess_wdsp(sc, 0xC0)) == 0)
2256 error = ess_wdsp(sc, reg);
2257 if (error)
2258 DPRINTF(("Error reading extended register 0x%02x\n", reg));
2259 /* REVISIT: what if an error is returned above? */
2260 val = ess_rdsp(sc);
2261 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2262 return val;
2263 }
2264
2265 void
2266 ess_clear_xreg_bits(sc, reg, mask)
2267 struct ess_softc *sc;
2268 u_char reg;
2269 u_char mask;
2270 {
2271 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
2272 DPRINTF(("Error clearing bits in extended register 0x%02x\n",
2273 reg));
2274 }
2275
2276 void
2277 ess_set_xreg_bits(sc, reg, mask)
2278 struct ess_softc *sc;
2279 u_char reg;
2280 u_char mask;
2281 {
2282 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
2283 DPRINTF(("Error setting bits in extended register 0x%02x\n",
2284 reg));
2285 }
2286
2287
2288 /*
2289 * Write a value to one of the ESS mixer registers.
2290 */
2291 void
2292 ess_write_mix_reg(sc, reg, val)
2293 struct ess_softc *sc;
2294 u_char reg;
2295 u_char val;
2296 {
2297 bus_space_tag_t iot = sc->sc_iot;
2298 bus_space_handle_t ioh = sc->sc_ioh;
2299 int s;
2300
2301 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));
2302
2303 s = splaudio();
2304 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2305 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);
2306 splx(s);
2307 }
2308
2309 /*
2310 * Read the value of one of the ESS mixer registers.
2311 */
2312 u_char
2313 ess_read_mix_reg(sc, reg)
2314 struct ess_softc *sc;
2315 u_char reg;
2316 {
2317 bus_space_tag_t iot = sc->sc_iot;
2318 bus_space_handle_t ioh = sc->sc_ioh;
2319 int s;
2320 u_char val;
2321
2322 s = splaudio();
2323 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2324 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);
2325 splx(s);
2326
2327 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));
2328 return val;
2329 }
2330
2331 void
2332 ess_clear_mreg_bits(sc, reg, mask)
2333 struct ess_softc *sc;
2334 u_char reg;
2335 u_char mask;
2336 {
2337 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
2338 }
2339
2340 void
2341 ess_set_mreg_bits(sc, reg, mask)
2342 struct ess_softc *sc;
2343 u_char reg;
2344 u_char mask;
2345 {
2346 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
2347 }
2348