ess.c revision 1.2 1 /* $NetBSD: ess.c,v 1.2 1998/07/30 14:11:44 augustss Exp $ */
2
3 /*
4 * Copyright 1997
5 * Digital Equipment Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and
8 * copied only in accordance with the following terms and conditions.
9 * Subject to these conditions, you may download, copy, install,
10 * use, modify and distribute this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce
14 * and retain this copyright notice and list of conditions as
15 * they appear in the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 * Digital Equipment Corporation. Neither the "Digital Equipment
19 * Corporation" name nor any trademark or logo of Digital Equipment
20 * Corporation may be used to endorse or promote products derived
21 * from this software without the prior written permission of
22 * Digital Equipment Corporation.
23 *
24 * 3) This software is provided "AS-IS" and any express or implied
25 * warranties, including but not limited to, any implied warranties
26 * of merchantability, fitness for a particular purpose, or
27 * non-infringement are disclaimed. In no event shall DIGITAL be
28 * liable for any damages whatsoever, and in particular, DIGITAL
29 * shall not be liable for special, indirect, consequential, or
30 * incidental damages or damages for lost profits, loss of
31 * revenue or loss of use, whether such damages arise in contract,
32 * negligence, tort, under statute, in equity, at law or otherwise,
33 * even if advised of the possibility of such damage.
34 */
35
36 /*
37 **++
38 **
39 ** ess.c
40 **
41 ** FACILITY:
42 **
43 ** DIGITAL Network Appliance Reference Design (DNARD)
44 **
45 ** MODULE DESCRIPTION:
46 **
47 ** This module contains the device driver for the ESS
48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
49 ** used as a reference point when implementing this driver.
50 **
51 ** AUTHORS:
52 **
53 ** Blair Fidler Software Engineering Australia
54 ** Gold Coast, Australia.
55 **
56 ** CREATION DATE:
57 **
58 ** March 10, 1997.
59 **
60 ** MODIFICATION HISTORY:
61 **
62 **--
63 */
64
65 /*
66 * Modification by Lennart Augustsson:
67 * Adapt for bus dma.
68 * Change to 1.3 audio interface.
69 */
70
71 /*
72 * TODO (falling priority):
73 * - test and get it to run.
74 * - add looping DMA (copy from sbdsp.c).
75 * - avoid using wired in IRQ/DRQ levels.
76 * - look over how the two channels are set up, it's rather messy now.
77 * - make a lot of #define for magic constants in the code.
78 */
79
80 #include <sys/param.h>
81 #include <sys/systm.h>
82 #include <sys/errno.h>
83 #include <sys/ioctl.h>
84 #include <sys/syslog.h>
85 #include <sys/device.h>
86 #include <sys/proc.h>
87
88 #include <machine/cpu.h>
89 #include <machine/intr.h>
90 #include <machine/pio.h>
91
92 #include <sys/audioio.h>
93 #include <dev/audio_if.h>
94 #include <dev/auconv.h>
95 #include <dev/mulaw.h>
96
97 #include <dev/isa/isavar.h>
98 #include <dev/isa/isadmavar.h>
99
100 #include <dev/isa/essvar.h>
101 #include <dev/isa/essreg.h>
102
103 #ifdef AUDIO_DEBUG
104 #define DPRINTF(x) if (essdebug) printf x
105 #define DPRINTFN(n,x) if (essdebug>(n)) printf x
106 int essdebug = 0;
107 #else
108 #define DPRINTF(x)
109 #define DPRINTFN(n,x)
110 #endif
111
112 #if 0
113 unsigned uuu;
114 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu)
115 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d))
116 #else
117 #define EREAD1(t, h, a) bus_space_read_1(t, h, a)
118 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d)
119 #endif
120
121
122 int ess_setup_sc __P((struct ess_softc *, int));
123
124 int ess_open __P((void *, int));
125 void ess_close __P((void *));
126 int ess_getdev __P((void *, struct audio_device *));
127 int ess_drain __P((void *));
128
129 int ess_query_encoding __P((void *, struct audio_encoding *));
130
131 int ess_set_params __P((void *, int, int, struct audio_params *,
132 struct audio_params *));
133 int ess_set_in_sr __P((void *, u_long));
134 int ess_set_out_sr __P((void *, u_long));
135 int ess_set_in_precision __P((void *, u_int));
136 int ess_set_out_precision __P((void *, u_int));
137 int ess_set_in_channels __P((void *, int));
138 int ess_set_out_channels __P((void *, int));
139
140 int ess_round_blocksize __P((void *, int));
141
142 int ess_dma_output __P((void *, void *, int, void (*)(void *), void *));
143 int ess_dma_input __P((void *, void *, int, void (*)(void *), void *));
144 int ess_halt_output __P((void *));
145 int ess_halt_input __P((void *));
146
147 int ess_intr_output __P((void *));
148 int ess_intr_input __P((void *));
149
150 int ess_speaker_ctl __P((void *, int));
151
152 int ess_getdev __P((void *, struct audio_device *));
153
154 int ess_set_port __P((void *, mixer_ctrl_t *));
155 int ess_get_port __P((void *, mixer_ctrl_t *));
156
157 int ess_query_devinfo __P((void *, mixer_devinfo_t *));
158 int ess_get_props __P((void *));
159
160
161 int ess_config_addr __P((struct ess_softc *));
162 void ess_config_intr __P((struct ess_softc *));
163 int ess_identify __P((struct ess_softc *));
164
165 int ess_reset __P((struct ess_softc *));
166 void ess_set_gain __P((struct ess_softc *, int, int));
167 int ess_set_in_ports __P((struct ess_softc *, int));
168 void ess_speaker_on __P((struct ess_softc *));
169 void ess_speaker_off __P((struct ess_softc *));
170 u_int ess_srtotc __P((u_int));
171 u_int ess_srtofc __P((u_int));
172 u_char ess_get_dsp_status __P((struct ess_softc *));
173 u_char ess_dsp_read_ready __P((struct ess_softc *));
174 u_char ess_dsp_write_ready __P((struct ess_softc *sc));
175 int ess_rdsp __P((struct ess_softc *));
176 int ess_wdsp __P((struct ess_softc *, u_char));
177 u_char ess_read_x_reg __P((struct ess_softc *, u_char));
178 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
179 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
180 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
181 u_char ess_read_mix_reg __P((struct ess_softc *, u_char));
182 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
183 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
184 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
185
186 static char *essmodel[] = {
187 "unsupported",
188 "1888",
189 "1887",
190 "888"
191 };
192
193 struct audio_device ess_device = {
194 "ESS Technology",
195 "x",
196 "ess"
197 };
198
199 /*
200 * Define our interface to the higher level audio driver.
201 */
202
203 struct audio_hw_if ess_hw_if = {
204 ess_open,
205 ess_close,
206 NULL,
207 ess_query_encoding,
208 ess_set_params,
209 ess_round_blocksize,
210 NULL,
211 NULL,
212 NULL,
213 ess_dma_output,
214 ess_dma_input,
215 ess_halt_output,
216 ess_halt_input,
217 ess_speaker_ctl,
218 ess_getdev,
219 NULL,
220 ess_set_port,
221 ess_get_port,
222 ess_query_devinfo,
223 NULL,
224 NULL,
225 NULL,
226 NULL,
227 ess_get_props,
228 };
229
230 #ifdef AUDIO_DEBUG
231 void ess_printsc __P((struct ess_softc *));
232 void ess_dump_mixer __P((struct ess_softc *));
233
234 void
235 ess_printsc(sc)
236 struct ess_softc *sc;
237 {
238 int i;
239
240 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
241 (int)sc->sc_open, sc->sc_iobase, sc->out_port,
242 sc->in_port, sc->spkr_state ? "on" : "off");
243
244 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
245 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
246 sc->sc_out.intr, sc->sc_out.arg);
247
248 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
249 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
250 sc->sc_in.intr, sc->sc_in.arg);
251
252 printf("gain:");
253 for (i = 0; i < ESS_NDEVS; i++)
254 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
255 printf("\n");
256 }
257
258 void
259 ess_dump_mixer(sc)
260 struct ess_softc *sc;
261 {
262 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
263 0x7C, ess_read_mix_reg(sc, 0x7C));
264 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
265 0x1A, ess_read_mix_reg(sc, 0x1A));
266 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
267 0x3E, ess_read_mix_reg(sc, 0x3E));
268 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
269 0x36, ess_read_mix_reg(sc, 0x36));
270 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
271 0x38, ess_read_mix_reg(sc, 0x38));
272 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
273 0x3A, ess_read_mix_reg(sc, 0x3A));
274 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
275 0x32, ess_read_mix_reg(sc, 0x32));
276 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
277 0x3C, ess_read_mix_reg(sc, 0x3C));
278 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
279 0x69, ess_read_mix_reg(sc, 0x69));
280 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
281 0x68, ess_read_mix_reg(sc, 0x68));
282 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
283 0x6E, ess_read_mix_reg(sc, 0x6E));
284 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
285 0x6B, ess_read_mix_reg(sc, 0x6B));
286 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
287 0x6A, ess_read_mix_reg(sc, 0x6A));
288 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
289 0x6C, ess_read_mix_reg(sc, 0x6C));
290 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
291 0xB4, ess_read_x_reg(sc, 0xB4));
292 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
293 0x14, ess_read_mix_reg(sc, 0x14));
294
295 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
296 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
297 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
298 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
299 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
300 0x1c, ess_read_mix_reg(sc, 0x1c),
301 0x7a, ess_read_mix_reg(sc, 0x7a));
302 }
303
304 #endif
305
306 /*
307 * Configure the ESS chip for the desired audio base address.
308 */
309 int
310 ess_config_addr(sc)
311 struct ess_softc *sc;
312 {
313 int iobase = sc->sc_iobase;
314 bus_space_tag_t iot = sc->sc_iot;
315
316 /* XXX make this a runtime choice */
317 #ifdef ESS_AMODE_LOW
318 /*
319 * Configure using the Read-Sequence-Key method. This method
320 * is used when the AMODE line is tied low, which is the case
321 * for the evaluation board, but not for the Shark. First we
322 * read a magic sequence of registers, then we read from the
323 * desired base addresses. See page 21 of ES1887 data sheet
324 * for details.
325 */
326
327 bus_space_handle_t ioh;
328
329 /*
330 * Get a mapping for the configuration key registers.
331 */
332 if (bus_space_map(iot, ESS_CONFIG_KEY_BASE, ESS_CONFIG_KEY_PORTS,
333 0, &ioh)) {
334 printf("ess: can't map configuration key registers\n");
335 return (1);
336 }
337
338 /*
339 * Read the magic key sequence.
340 */
341 EREAD1(iot, ioh, 0);
342 EREAD1(iot, ioh, 0);
343 EREAD1(iot, ioh, 0);
344
345 EREAD1(iot, ioh, 2);
346 EREAD1(iot, ioh, 0);
347 EREAD1(iot, ioh, 2);
348 EREAD1(iot, ioh, 0);
349 EREAD1(iot, ioh, 0);
350 EREAD1(iot, ioh, 2);
351 EREAD1(iot, ioh, 0);
352
353 /*
354 * Unmap the configuration key registers.
355 */
356 bus_space_unmap(iot, ioh, ESS_CONFIG_KEY_PORTS);
357
358
359 /*
360 * Get a mapping for the audio base address.
361 */
362 if (bus_space_map(iot, iobase, 1, 0, &ioh)) {
363 printf("ess: can't map audio base address (0x%x)\n", iobase);
364 return (1);
365 }
366
367 /*
368 * Read from the audio base address.
369 */
370 EREAD1(iot, ioh, 0);
371
372 /*
373 * Unmap the audio base address
374 */
375 bus_space_unmap(iot, ioh, 1);
376 #else
377 /*
378 * Configure using the System Control Register method. This
379 * method is used when the AMODE line is tied high, which is
380 * the case for the Shark, but not for the evaluation board.
381 */
382
383 bus_space_handle_t scr_access_ioh;
384 bus_space_handle_t scr_ioh;
385 u_short scr_value;
386
387 /*
388 * Set the SCR bit to enable audio.
389 */
390 scr_value = ESS_SCR_AUDIO_ENABLE;
391
392 /*
393 * Set the SCR bits necessary to select the specified audio
394 * base address.
395 */
396 switch(iobase) {
397 case 0x220:
398 scr_value |= ESS_SCR_AUDIO_220;
399 break;
400 case 0x230:
401 scr_value |= ESS_SCR_AUDIO_230;
402 break;
403 case 0x240:
404 scr_value |= ESS_SCR_AUDIO_240;
405 break;
406 case 0x250:
407 scr_value |= ESS_SCR_AUDIO_250;
408 break;
409 default:
410 printf("ess: configured iobase 0x%x invalid\n", iobase);
411 return (1);
412 break;
413 }
414
415 /*
416 * Get a mapping for the System Control Register (SCR) access
417 * registers and the SCR data registers.
418 */
419 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
420 0, &scr_access_ioh)) {
421 printf("ess: can't map SCR access registers\n");
422 return (1);
423 }
424 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
425 0, &scr_ioh)) {
426 printf("ess: can't map SCR registers\n");
427 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
428 return (1);
429 }
430
431 /* Unlock the SCR. */
432 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
433
434 /* Write the base address information into SCR[0]. */
435 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0);
436 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
437
438 /* Lock the SCR. */
439 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
440
441 /* Unmap the SCR access ports and the SCR data ports. */
442 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
443 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
444 #endif
445
446 return 0;
447 }
448
449
450 /*
451 * Configure the ESS chip for the desired IRQ and DMA channels.
452 * Shark interrupt mapping
453 * ESS ISA
454 * --------
455 * IRQA irq9
456 * IRQB irq5
457 * IRQC irq7
458 * IRQD irq10
459 * IRQE irq15
460 * DRQA drq0
461 * DRQB drq1
462 * DRQC drq3
463 * DRQD drq5
464 */
465 void
466 ess_config_intr(sc)
467 struct ess_softc *sc;
468 {
469 int v = 0;
470
471 /* Configure Audio 1 (record) for the appropriate IRQ line. */
472 switch(sc->sc_in.irq) {
473 case 5:
474 v = 0x54;
475 break;
476 case 7:
477 v = 0x58;
478 break;
479 case 9:
480 v = 0x50;
481 break;
482 case 10:
483 v = 0x5c;
484 break;
485 #ifdef DIAGNOSTIC
486 default:
487 printf("ess: configured irq %d not supported for Audio 1\n",
488 sc->sc_in.irq);
489 return;
490 #endif
491 }
492 ess_write_x_reg(sc, 0xb1, v);
493
494 /*
495 * XXX: Does bit 4 really need to be set? Reading the data
496 * sheet, it seems that this is only necessary for
497 * compatibility mode.
498 */
499 /* Configure Audio 1 (record) for DMA on the appropriate channel. */
500 switch(sc->sc_in.drq) {
501 case 0:
502 v = 0x54;
503 break;
504 case 1:
505 v = 0x58;
506 break;
507 case 3:
508 v = 0x5c;
509 break;
510 #ifdef DIAGNOSTIC
511 default:
512 printf("essdsp: configured dma chan %d not supported for Audio 1\n",
513 sc->sc_in.drq);
514 return;
515 }
516 #endif
517 ess_write_x_reg(sc, 0xb2, v);
518
519 /* XXX hardcode audio2 to irq15 and drq1 since this is a mess anyway */
520 /* XXX assume 1887 */
521 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 0x60);
522 ess_write_mix_reg(sc, 0x7d, 0x05); /* DRQB */
523 ess_write_mix_reg(sc, 0x7f, 0x00); /* 1888 method */
524 }
525
526 /*
527 * Determine the model of ESS chip we are talking to. Currently we
528 * only support ES1888, ES1887 and ES888. The method of determining
529 * the chip is based on the information on page 27 of the ES1887 data
530 * sheet.
531 *
532 * This routine sets the values of sc->sc_model and sc->sc_version.
533 */
534 int
535 ess_identify(sc)
536 struct ess_softc *sc;
537 {
538 u_char reg1;
539 u_char reg2;
540 u_char reg3;
541
542 sc->sc_model = ESS_UNSUPPORTED;
543 sc->sc_version = 0;
544
545
546 /*
547 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where
548 * n >= 8 for an ES1887 or an ES888. Other values indicate
549 * earlier (unsupported) chips.
550 */
551 ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
552
553 if ((reg1 = ess_rdsp(sc)) != 0x68) {
554 printf("ess: First ID byte wrong (0x%02x)\n", reg1);
555 return 1;
556 }
557
558 reg2 = ess_rdsp(sc);
559 if (((reg2 & 0xf0) != 0x80) ||
560 ((reg2 & 0x0f) < 8)) {
561 printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
562 return 1;
563 }
564
565 /*
566 * Store the ID bytes as the version.
567 */
568 sc->sc_version = (reg1 << 8) + reg2;
569
570
571 /*
572 * 2. Verify we can change bit 2 in mixer register 0x64. This
573 * should be possible on all supported chips.
574 */
575 reg1 = ess_read_mix_reg(sc, 0x64);
576 reg2 = reg1 ^ 0x04; /* toggle bit 2 */
577
578 ess_write_mix_reg(sc, 0x64, reg2);
579
580 if (ess_read_mix_reg(sc, 0x64) != reg2) {
581 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
582 return 1;
583 }
584
585 /*
586 * Restore the original value of mixer register 0x64.
587 */
588 ess_write_mix_reg(sc, 0x64, reg1);
589
590
591 /*
592 * 3. Verify we can change the value of mixer register 0x70.
593 * This should be possible on all supported chips.
594 */
595 reg1 = ess_read_mix_reg(sc, 0x70);
596 reg2 = reg1 ^ 0xff; /* toggle all bits */
597
598 ess_write_mix_reg(sc, 0x70, reg2);
599
600 if (ess_read_mix_reg(sc, 0x70) != reg2) {
601 printf("ess: Hardware error (unable to change mixer register 0x70)\n");
602 return 1;
603 }
604
605 /*
606 * It is not necessary to restore the value of mixer register 0x70.
607 */
608
609
610 /*
611 * 4. Determine if we can change bit 5 in mixer register 0x64.
612 * This determines whether we have an ES1887:
613 *
614 * - can change indicates ES1887
615 * - can't change indicates ES1888 or ES888
616 */
617 reg1 = ess_read_mix_reg(sc, 0x64);
618 reg2 = reg1 ^ 0x20; /* toggle bit 5 */
619
620 ess_write_mix_reg(sc, 0x64, reg2);
621
622 if (ess_read_mix_reg(sc, 0x64) == reg2) {
623 sc->sc_model = ESS_1887;
624
625 /*
626 * Restore the original value of mixer register 0x64.
627 */
628 ess_write_mix_reg(sc, 0x64, reg1);
629 } else {
630 /*
631 * 5. Determine if we can change the value of mixer
632 * register 0x69 independently of mixer register
633 * 0x68. This determines which chip we have:
634 *
635 * - can modify idependently indicates ES888
636 * - register 0x69 is an alias of 0x68 indicates ES1888
637 */
638 reg1 = ess_read_mix_reg(sc, 0x68);
639 reg2 = ess_read_mix_reg(sc, 0x69);
640 reg3 = reg2 ^ 0xff; /* toggle all bits */
641
642 /*
643 * Write different values to each register.
644 */
645 ess_write_mix_reg(sc, 0x68, reg2);
646 ess_write_mix_reg(sc, 0x69, reg3);
647
648 if (ess_read_mix_reg(sc, 0x68) == reg2)
649 sc->sc_model = ESS_888;
650 else
651 sc->sc_model = ESS_1888;
652
653 /*
654 * Restore the original value of the registers.
655 */
656 ess_write_mix_reg(sc, 0x68, reg1);
657 ess_write_mix_reg(sc, 0x69, reg2);
658 }
659
660 return 0;
661 }
662
663
664 /*
665 * Probe / attach routines.
666 */
667
668 int
669 ess_setup_sc(sc, doinit)
670 struct ess_softc *sc;
671 int doinit;
672 {
673 /* Configure the ESS chip for the desired audio base address. */
674 if (doinit && ess_config_addr(sc))
675 return (1);
676
677 /* Reset the chip. */
678 if (ess_reset(sc) < 0) {
679 DPRINTF(("ess_config_addr: couldn't reset chip\n"));
680 return (1);
681 }
682
683 /* Identify the ESS chip, and check that it is supported. */
684 if (ess_identify(sc)) {
685 DPRINTF(("ess_setup_sc: couldn't identify\n"));
686 return (1);
687 }
688
689 return (0);
690 }
691
692 /*
693 * Probe for the ESS hardware.
694 */
695 int
696 essmatch(sc)
697 struct ess_softc *sc;
698 {
699 if (!ESS_BASE_VALID(sc->sc_iobase)) {
700 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
701 return (0);
702 }
703
704 if (ess_setup_sc(sc, 1))
705 return (0);
706
707 if (sc->sc_model == ESS_UNSUPPORTED) {
708 DPRINTF(("ess: Unsupported model\n"));
709 goto ret0;
710 }
711
712 /* Check that requested DMA channels are valid and different. */
713 if (!ESS_DRQ1_VALID(sc->sc_in.drq, sc->sc_model)) {
714 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
715 goto ret0;
716 }
717 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
718 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
719 goto ret0;
720 }
721 if (sc->sc_in.drq == sc->sc_out.drq) {
722 printf("ess: play and record dma chan both %d\n",
723 sc->sc_in.drq);
724 goto ret0;
725 }
726
727 /* Check that requested IRQ lines are valid and different. */
728 if (!ESS_IRQ1_VALID(sc->sc_in.irq, sc->sc_model)) {
729 printf("ess: record irq %d invalid\n", sc->sc_in.irq);
730 goto ret0;
731 }
732 if (!ESS_IRQ2_VALID(sc->sc_out.irq, sc->sc_model)) {
733 printf("ess: play irq %d invalid\n", sc->sc_out.irq);
734 goto ret0;
735 }
736 if (sc->sc_in.irq == sc->sc_out.irq) {
737 printf("ess: play and record irq both %d\n",
738 sc->sc_in.irq);
739 goto ret0;
740 }
741
742 /* Check that the DRQs are free. */
743 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
744 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
745 goto ret0;
746 /* XXX should we check IRQs as well? */
747
748 return (1);
749
750 ret0:
751 return (0);
752 }
753
754
755 /*
756 * Attach hardware to driver, attach hardware driver to audio
757 * pseudo-device driver .
758 */
759 void
760 essattach(sc)
761 struct ess_softc *sc;
762 {
763 struct audio_params pparams, rparams;
764 int i;
765 u_int v;
766
767 if (ess_setup_sc(sc, 0)) {
768 printf("%s: setup failed\n", sc->sc_dev.dv_xname);
769 return;
770 }
771
772 /*
773 * Establish interrupt handlers for Audio 1 (record) and
774 * Audio 2 (playback). (This must be done before configuring
775 * the chip for interrupts, otherwise we might get a stray
776 * interrupt.
777 */
778 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq,
779 sc->sc_out.ist, IPL_AUDIO,
780 ess_intr_output, sc);
781 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq,
782 sc->sc_in.ist, IPL_AUDIO,
783 ess_intr_input, sc);
784
785 /* Create our DMA maps. */
786 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
787 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
788 printf("%s: can't create map for drq %d\n",
789 sc->sc_dev.dv_xname, sc->sc_in.drq);
790 return;
791 }
792 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
793 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
794 printf("%s: can't create map for drq %d\n",
795 sc->sc_dev.dv_xname, sc->sc_out.drq);
796 return;
797 }
798
799 printf(" ESS Technology ES%s [version 0x%04x]\n",
800 essmodel[sc->sc_model], sc->sc_version);
801
802 /*
803 * Set record and play parameters to default values defined in
804 * generic audio driver.
805 */
806 pparams = audio_default;
807 rparams = audio_default;
808 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
809
810 /* Do a hardware reset on the mixer. */
811 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
812
813 /*
814 * Set volume of Audio 1 to zero and disable Audio 1 DAC input
815 * to playback mixer, since playback is always through Audio 2.
816 */
817 ess_write_mix_reg(sc, 0x14, 0);
818 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
819
820 /*
821 * Set hardware record source to use output of the record
822 * mixer. We do the selection of record source in software by
823 * setting the gain of the unused sources to zero. (See
824 * ess_set_in_ports.)
825 */
826 ess_set_mreg_bits(sc, 0x1c, 0x07);
827 ess_clear_mreg_bits(sc, 0x7a, 0x10);
828 ess_set_mreg_bits(sc, 0x7a, 0x08);
829
830 /*
831 * Set gain on each mixer device to a sensible value.
832 * Devices not normally used are turned off, and other devices
833 * are set to 75% volume.
834 */
835 for (i = 0; i < ESS_NDEVS; i++) {
836 switch(i) {
837 case ESS_MIC_PLAY_VOL:
838 case ESS_LINE_PLAY_VOL:
839 case ESS_CD_PLAY_VOL:
840 case ESS_AUXB_PLAY_VOL:
841 case ESS_DAC_REC_VOL:
842 case ESS_LINE_REC_VOL:
843 case ESS_SYNTH_REC_VOL:
844 case ESS_CD_REC_VOL:
845 case ESS_AUXB_REC_VOL:
846 v = 0;
847 break;
848 default:
849 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4);
850 break;
851 }
852 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
853 ess_set_gain(sc, i, 1);
854 }
855
856 /* Set up IRQs and DRQs. */
857 ess_config_intr(sc);
858
859 /* Disable the speaker until the device is opened. */
860 ess_speaker_off(sc);
861 sc->spkr_state = SPKR_OFF;
862
863 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
864 sprintf(ess_device.version, "0x%04x", sc->sc_version);
865
866 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev);
867
868 #ifdef AUDIO_DEBUG
869 ess_printsc(sc);
870 #endif
871 }
872
873 /*
874 * Various routines to interface to higher level audio driver
875 */
876
877 int
878 ess_open(addr, flags)
879 void *addr;
880 int flags;
881 {
882 struct ess_softc *sc = addr;
883
884 DPRINTF(("ess_open: sc=%p\n", sc));
885
886 if (sc->sc_open != 0 || ess_reset(sc) != 0)
887 return ENXIO;
888
889 ess_config_intr(sc);
890
891 sc->sc_open = 1;
892
893 DPRINTF(("ess_open: opened\n"));
894
895 return (0);
896 }
897
898 void
899 ess_close(addr)
900 void *addr;
901 {
902 struct ess_softc *sc = addr;
903
904 DPRINTF(("ess_close: sc=%p\n", sc));
905
906 sc->sc_open = 0;
907 ess_speaker_off(sc);
908 sc->spkr_state = SPKR_OFF;
909 sc->sc_in.intr = 0;
910 sc->sc_out.intr = 0;
911 ess_halt_output(sc);
912 ess_halt_input(sc);
913
914 DPRINTF(("ess_close: closed\n"));
915 }
916
917 int
918 ess_getdev(addr, retp)
919 void *addr;
920 struct audio_device *retp;
921 {
922 *retp = ess_device;
923 return (0);
924 }
925
926 int
927 ess_query_encoding(addr, fp)
928 void *addr;
929 struct audio_encoding *fp;
930 {
931 /*struct ess_softc *sc = addr;*/
932
933 switch (fp->index) {
934 case 0:
935 strcpy(fp->name, AudioEulinear);
936 fp->encoding = AUDIO_ENCODING_ULINEAR;
937 fp->precision = 8;
938 fp->flags = 0;
939 return (0);
940 case 1:
941 strcpy(fp->name, AudioEmulaw);
942 fp->encoding = AUDIO_ENCODING_ULAW;
943 fp->precision = 8;
944 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
945 return (0);
946 case 2:
947 strcpy(fp->name, AudioEalaw);
948 fp->encoding = AUDIO_ENCODING_ULAW;
949 fp->precision = 8;
950 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
951 return (0);
952 case 3:
953 strcpy(fp->name, AudioEulinear);
954 fp->encoding = AUDIO_ENCODING_ULINEAR;
955 fp->precision = 8;
956 fp->flags = 0;
957 return (0);
958 case 4:
959 strcpy(fp->name, AudioEslinear_le);
960 fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
961 fp->precision = 16;
962 fp->flags = 0;
963 return (0);
964 case 5:
965 strcpy(fp->name, AudioEulinear_le);
966 fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
967 fp->precision = 16;
968 fp->flags = 0;
969 return (0);
970 case 6:
971 strcpy(fp->name, AudioEslinear_be);
972 fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
973 fp->precision = 16;
974 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
975 return (0);
976 case 7:
977 strcpy(fp->name, AudioEulinear_be);
978 fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
979 fp->precision = 16;
980 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
981 return (0);
982 default:
983 return EINVAL;
984 }
985 return (0);
986 }
987
988 int
989 ess_set_params(addr, setmode, usemode, p, q)
990 void *addr;
991 int setmode;
992 int usemode;
993 struct audio_params *p;
994 struct audio_params *q;
995 {
996 struct ess_softc *sc = addr;
997 void (*swcode) __P((void *, u_char *buf, int cnt));
998 int mode = setmode; /* XXX */
999
1000 /* Set first record info, then play info */
1001 for(mode = AUMODE_RECORD; mode != -1;
1002 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
1003 if ((setmode & mode) == 0)
1004 continue;
1005
1006 switch (mode) {
1007 case AUMODE_PLAY:
1008 if (ess_set_out_sr(sc, p->sample_rate) != 0 ||
1009 ess_set_out_precision(sc, p->precision) != 0 ||
1010 ess_set_out_channels(sc, p->channels) != 0) {
1011 return EINVAL;
1012 }
1013 break;
1014
1015 case AUMODE_RECORD:
1016 if (ess_set_in_sr(sc, p->sample_rate) != 0 ||
1017 ess_set_in_precision(sc, p->precision) != 0 ||
1018 ess_set_in_channels(sc, p->channels) != 0) {
1019 return EINVAL;
1020 }
1021 break;
1022
1023 default:
1024 return EINVAL;
1025 break;
1026 }
1027
1028 swcode = 0;
1029
1030 switch (p->encoding) {
1031 case AUDIO_ENCODING_SLINEAR_BE:
1032 if (p->precision == 16)
1033 swcode = swap_bytes;
1034 /* fall into */
1035 case AUDIO_ENCODING_SLINEAR_LE:
1036 if (mode == AUMODE_PLAY)
1037 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1038 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1039 else
1040 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1041 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1042 break;
1043 case AUDIO_ENCODING_ULINEAR_BE:
1044 if (p->precision == 16)
1045 swcode = swap_bytes;
1046 /* fall into */
1047 case AUDIO_ENCODING_ULINEAR_LE:
1048 if (mode == AUMODE_PLAY)
1049 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1050 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1051 else
1052 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1053 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1054 break;
1055 case AUDIO_ENCODING_ULAW:
1056 swcode = mode == AUMODE_PLAY ?
1057 mulaw_to_ulinear8 : ulinear8_to_mulaw;
1058 if (mode == AUMODE_PLAY)
1059 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1060 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1061 else
1062 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1063 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1064 break;
1065 case AUDIO_ENCODING_ALAW:
1066 swcode = mode == AUMODE_PLAY ?
1067 alaw_to_ulinear8 : ulinear8_to_alaw;
1068 if (mode == AUMODE_PLAY)
1069 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1070 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1071 else
1072 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1073 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1074 break;
1075 default:
1076 return EINVAL;
1077 }
1078 p->sw_code = swcode;
1079 }
1080
1081 sc->sc_in.active = 0;
1082 sc->sc_out.active = 0;
1083
1084 return (0);
1085 }
1086 int
1087 ess_set_in_sr(addr, sr)
1088 void *addr;
1089 u_long sr;
1090 {
1091 struct ess_softc *sc = addr;
1092
1093 if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
1094 return (EINVAL);
1095 /*
1096 * Program the sample rate and filter clock for the record
1097 * channel (Audio 1).
1098 */
1099 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(sr));
1100 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(sr));
1101
1102 return (0);
1103 }
1104
1105 int
1106 ess_set_out_sr(addr, sr)
1107 void *addr;
1108 u_long sr;
1109 {
1110 struct ess_softc *sc = addr;
1111
1112 if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
1113 return (EINVAL);
1114 /*
1115 * Program the sample rate and filter clock for the playback
1116 * channel (Audio 2).
1117 */
1118 ess_write_mix_reg(sc, 0x70, ess_srtotc(sr));
1119 ess_write_mix_reg(sc, 0x72, ess_srtofc(sr));
1120
1121 return (0);
1122 }
1123
1124 int
1125 ess_set_in_precision(addr, precision)
1126 void *addr;
1127 u_int precision;
1128 {
1129 struct ess_softc *sc = addr;
1130 int error = 0;
1131
1132 /*
1133 * REVISIT: Should we set DMA transfer type to 2-byte or
1134 * 4-byte demand? This would probably better be done
1135 * when configuring the DMA channel. See xreg 0xB9.
1136 */
1137 switch (precision) {
1138 case 8:
1139 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1140 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1141 break;
1142
1143 case 16:
1144 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1145 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1146 break;
1147
1148 default:
1149 error = EINVAL;
1150 break;
1151 }
1152 return error;
1153 }
1154
1155 int
1156 ess_set_out_precision(addr, precision)
1157 void *addr;
1158 u_int precision;
1159 {
1160 struct ess_softc *sc = addr;
1161 int error = 0;
1162 switch (precision) {
1163 case 8:
1164 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1165 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1166 break;
1167
1168 case 16:
1169 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1170 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1171 break;
1172
1173 default:
1174 error = EINVAL;
1175 break;
1176 }
1177
1178 /*
1179 * REVISIT: This actually sets transfer size to 16
1180 * bits. Should this really be hard-coded? This would
1181 * probably better be done when configuring the DMA
1182 * channel.
1183 */
1184 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1185 ESS_AUDIO2_CTRL1_XFER_SIZE);
1186
1187 #if 0
1188 /*
1189 * REVISIT: Should we set DMA transfer type to 2-byte,
1190 * 4-byte, or 8-byte demand? (Following does 8-byte.)
1191 * This would probably better be done when
1192 * configuring the DMA channel.
1193 */
1194 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1195 0xc0);
1196 #endif
1197 return error;
1198 }
1199
1200 int
1201 ess_set_in_channels(addr, channels)
1202 void *addr;
1203 int channels;
1204 {
1205 struct ess_softc *sc = addr;
1206 int error = 0;
1207
1208 switch(channels) {
1209 case 1:
1210 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1211 ESS_AUDIO_CTRL_MONO);
1212 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1213 ESS_AUDIO_CTRL_STEREO);
1214 break;
1215
1216 case 2:
1217 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1218 ESS_AUDIO_CTRL_STEREO);
1219 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1220 ESS_AUDIO_CTRL_MONO);
1221 break;
1222
1223 default:
1224 error = EINVAL;
1225 break;
1226 }
1227
1228 sc->sc_in.active = 0;
1229 sc->sc_in.channels = channels;
1230
1231 return error;
1232 }
1233
1234 int
1235 ess_set_out_channels(addr, channels)
1236 void *addr;
1237 int channels;
1238 {
1239 struct ess_softc *sc = addr;
1240 int error = 0;
1241
1242 switch(channels) {
1243 case 1:
1244 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1245 ESS_AUDIO2_CTRL2_CHANNELS);
1246 break;
1247
1248 case 2:
1249 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1250 ESS_AUDIO2_CTRL2_CHANNELS);
1251 break;
1252
1253 default:
1254 error = EINVAL;
1255 break;
1256 }
1257
1258 sc->sc_out.active = 0;
1259 sc->sc_out.channels = channels;
1260
1261 return error;
1262 }
1263
1264 int
1265 ess_dma_output(addr, p, cc, intr, arg)
1266 void *addr;
1267 void *p;
1268 int cc;
1269 void (*intr) __P((void *));
1270 void *arg;
1271 {
1272 struct ess_softc *sc = addr;
1273
1274 DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg));
1275 #ifdef DIAGNOSTIC
1276 if (sc->sc_out.channels == 2 && (cc & 1)) {
1277 DPRINTF(("stereo playback odd bytes (%d)\n", cc));
1278 return EIO;
1279 }
1280 #endif
1281
1282 isa_dmastart(sc->sc_ic, sc->sc_out.drq, p, cc,
1283 NULL, DMAMODE_WRITE, BUS_DMA_NOWAIT);
1284
1285 sc->sc_out.active = 1;
1286 sc->sc_out.intr = intr;
1287 sc->sc_out.arg = arg;
1288 sc->sc_out.dmaflags = DMAMODE_WRITE;
1289 sc->sc_out.dmaaddr = p;
1290
1291 if (sc->sc_out.dmacnt != cc) {
1292 sc->sc_out.dmacnt = cc;
1293
1294 /*
1295 * If doing 16-bit DMA transfers, then the number of
1296 * transfers required is half the number of bytes to
1297 * be transferred.
1298 */
1299 if (sc->sc_out.mode == ESS_MODE_16BIT)
1300 cc >>= 1;
1301
1302 /*
1303 * Program transfer count registers with 2's
1304 * complement of count.
1305 */
1306 cc = -cc;
1307 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc);
1308 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8);
1309 }
1310
1311 /* REVISIT: is it really necessary to clear then set these bits to get
1312 the next lot of DMA to happen? Would it be sufficient to set the bits
1313 the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
1314 */
1315 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1316 ESS_AUDIO2_CTRL1_DAC_ENABLE);/* REVISIT: once only */
1317 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1318 ESS_AUDIO2_CTRL1_FIFO_ENABLE);
1319 #if 1
1320 /* REVISIT: seems like the 888 and 1888 have an interlock that
1321 * prevents audio2 channel from working if audio1 channel is not
1322 * connected to the FIFO.
1323 */
1324 ess_set_xreg_bits(sc, 0xB7, 0x80);
1325 #endif
1326 return (0);
1327
1328 }
1329
1330 int
1331 ess_dma_input(addr, p, cc, intr, arg)
1332 void *addr;
1333 void *p;
1334 int cc;
1335 void (*intr) __P((void *));
1336 void *arg;
1337 {
1338 struct ess_softc *sc = addr;
1339
1340 DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg));
1341 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
1342 ess_set_xreg_bits(sc, 0xB7, 0x80);
1343
1344 #ifdef DIAGNOSTIC
1345 if (sc->sc_in.channels == 2 && (cc & 1)) {
1346 DPRINTF(("stereo record odd bytes (%d)\n", cc));
1347 return EIO;
1348 }
1349 #endif
1350
1351 isa_dmastart(sc->sc_ic, sc->sc_in.drq, p,
1352 cc, NULL, DMAMODE_READ, BUS_DMA_NOWAIT);
1353 sc->sc_in.active = 1;
1354 sc->sc_in.intr = intr;
1355 sc->sc_in.arg = arg;
1356 sc->sc_in.dmaflags = DMAMODE_READ;
1357 sc->sc_in.dmaaddr = p;
1358
1359 if (sc->sc_in.dmacnt != cc)
1360 {
1361 sc->sc_in.dmacnt = cc;
1362
1363 /*
1364 * If doing 16-bit DMA transfers, then the number of
1365 * transfers required is half the number of bytes to
1366 * be transferred.
1367 */
1368 if (sc->sc_in.mode == ESS_MODE_16BIT)
1369 {
1370 cc >>= 1;
1371 }
1372
1373 /*
1374 * Program transfer count registers with 2's
1375 * complement of count.
1376 */
1377 cc = -cc;
1378 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc);
1379 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8);
1380 }
1381
1382 /* REVISIT: is it really necessary to clear then set these bits to get
1383 the next lot of DMA to happen? Would it be sufficient to set the bits
1384 the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
1385 */
1386 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1387 ESS_AUDIO1_CTRL2_DMA_READ | /* REVISIT: once only */
1388 ESS_AUDIO1_CTRL2_ADC_ENABLE |/* REVISIT: once only */
1389 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1390
1391 return (0);
1392
1393 }
1394
1395 int
1396 ess_halt_output(addr)
1397 void *addr;
1398 {
1399 struct ess_softc *sc = addr;
1400
1401 DPRINTF(("ess_halt_output: sc=%p\n", sc));
1402
1403 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1404 ESS_AUDIO2_CTRL2_DMA_ENABLE);
1405 return (0);
1406 }
1407
1408 int
1409 ess_halt_input(addr)
1410 void *addr;
1411 {
1412 struct ess_softc *sc = addr;
1413
1414 DPRINTF(("ess_halt_input: sc=%p\n", sc));
1415
1416 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1417 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1418 return (0);
1419 }
1420
1421 int
1422 ess_speaker_ctl(addr, newstate)
1423 void *addr;
1424 int newstate;
1425 {
1426 struct ess_softc *sc = addr;
1427
1428 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
1429 ess_speaker_on(sc);
1430 sc->spkr_state = SPKR_ON;
1431 }
1432 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
1433 ess_speaker_off(sc);
1434 sc->spkr_state = SPKR_OFF;
1435 }
1436 return (0);
1437 }
1438
1439 int
1440 ess_intr_output(arg)
1441 void *arg;
1442 {
1443 struct ess_softc *sc = arg;
1444
1445 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr));
1446
1447 /* clear interrupt on Audio channel 2*/
1448 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 0x80);
1449
1450 sc->sc_out.nintr++;
1451
1452 if (sc->sc_out.intr != 0) {
1453 isa_dmadone(sc->sc_ic, sc->sc_out.drq);
1454 (*sc->sc_out.intr)(sc->sc_out.arg);
1455 } else
1456 return 1; /* revisit: was 0 */
1457
1458 return 1;
1459 }
1460
1461 int
1462 ess_intr_input(arg)
1463 void *arg;
1464 {
1465 struct ess_softc *sc = arg;
1466 u_char x;
1467
1468 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr));
1469
1470 /*
1471 * Disable DMA for Audio 1; it will be enabled again the next
1472 * time ess_dma_input is called. Note that for single DMAs,
1473 * this bit must be toggled for each DMA. For auto-initialize
1474 * DMAs, this bit should be left high.
1475 */
1476 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1477 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1478
1479 /* clear interrupt on Audio channel 1*/
1480 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
1481
1482 sc->sc_in.nintr++;
1483
1484 if (sc->sc_in.intr != 0) {
1485 isa_dmadone(sc->sc_ic, sc->sc_in.drq);
1486 (*sc->sc_in.intr)(sc->sc_in.arg);
1487 } else
1488 return (1);
1489
1490 return (1);
1491 }
1492
1493 int
1494 ess_round_blocksize(addr, blk)
1495 void *addr;
1496 int blk;
1497 {
1498 return (blk & -4);
1499 }
1500
1501 int
1502 ess_set_port(addr, cp)
1503 void *addr;
1504 mixer_ctrl_t *cp;
1505 {
1506 struct ess_softc *sc = addr;
1507 int lgain, rgain;
1508
1509 DPRINTF(("ess_set_port: port=%d num_channels=%d\n",
1510 cp->dev, cp->un.value.num_channels));
1511
1512 switch (cp->dev) {
1513 /*
1514 * The following mixer ports are all stereo. If we get a
1515 * single-channel gain value passed in, then we duplicate it
1516 * to both left and right channels.
1517 */
1518 case ESS_MASTER_VOL:
1519 case ESS_DAC_PLAY_VOL:
1520 case ESS_MIC_PLAY_VOL:
1521 case ESS_LINE_PLAY_VOL:
1522 case ESS_SYNTH_PLAY_VOL:
1523 case ESS_CD_PLAY_VOL:
1524 case ESS_AUXB_PLAY_VOL:
1525 case ESS_DAC_REC_VOL:
1526 case ESS_MIC_REC_VOL:
1527 case ESS_LINE_REC_VOL:
1528 case ESS_SYNTH_REC_VOL:
1529 case ESS_CD_REC_VOL:
1530 case ESS_AUXB_REC_VOL:
1531 case ESS_RECORD_VOL:
1532 if (cp->type != AUDIO_MIXER_VALUE)
1533 return EINVAL;
1534
1535 switch (cp->un.value.num_channels) {
1536 case 1:
1537 lgain = rgain = ESS_4BIT_GAIN(
1538 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1539 break;
1540 case 2:
1541 lgain = ESS_4BIT_GAIN(
1542 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
1543 rgain = ESS_4BIT_GAIN(
1544 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
1545 break;
1546 default:
1547 return EINVAL;
1548 }
1549
1550 sc->gain[cp->dev][ESS_LEFT] = lgain;
1551 sc->gain[cp->dev][ESS_RIGHT] = rgain;
1552
1553 ess_set_gain(sc, cp->dev, 1);
1554 break;
1555
1556
1557 /*
1558 * The PC speaker port is mono. If we get a stereo gain value
1559 * passed in, then we return EINVAL.
1560 */
1561 case ESS_PCSPEAKER_VOL:
1562 if (cp->un.value.num_channels != 1)
1563 return EINVAL;
1564
1565 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
1566 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1567 ess_set_gain(sc, cp->dev, 1);
1568 break;
1569
1570
1571 case ESS_MIC_PREAMP:
1572 if (cp->type != AUDIO_MIXER_ENUM)
1573 return EINVAL;
1574
1575 if (cp->un.ord)
1576 /* Enable microphone preamp */
1577 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1578 ESS_PREAMP_CTRL_ENABLE);
1579 else
1580 /* Disable microphone preamp */
1581 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1582 ESS_PREAMP_CTRL_ENABLE);
1583 break;
1584
1585 case ESS_RECORD_SOURCE:
1586 if (cp->type == AUDIO_MIXER_SET)
1587 return ess_set_in_ports(sc, cp->un.mask);
1588 else
1589 return EINVAL;
1590 break;
1591
1592 case ESS_RECORD_MONITOR:
1593 if (cp->type != AUDIO_MIXER_ENUM)
1594 return EINVAL;
1595
1596 if (cp->un.ord)
1597 /* Enable monitor */
1598 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1599 ESS_AUDIO_CTRL_MONITOR);
1600 else
1601 /* Disable monitor */
1602 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1603 ESS_AUDIO_CTRL_MONITOR);
1604 break;
1605
1606 default:
1607 return EINVAL;
1608 }
1609
1610 return (0);
1611 }
1612
1613 int
1614 ess_get_port(addr, cp)
1615 void *addr;
1616 mixer_ctrl_t *cp;
1617 {
1618 struct ess_softc *sc = addr;
1619
1620 DPRINTF(("ess_get_port: port=%d\n", cp->dev));
1621
1622 switch (cp->dev) {
1623 case ESS_DAC_PLAY_VOL:
1624 case ESS_MIC_PLAY_VOL:
1625 case ESS_LINE_PLAY_VOL:
1626 case ESS_SYNTH_PLAY_VOL:
1627 case ESS_CD_PLAY_VOL:
1628 case ESS_AUXB_PLAY_VOL:
1629 case ESS_MASTER_VOL:
1630 case ESS_PCSPEAKER_VOL:
1631 case ESS_DAC_REC_VOL:
1632 case ESS_MIC_REC_VOL:
1633 case ESS_LINE_REC_VOL:
1634 case ESS_SYNTH_REC_VOL:
1635 case ESS_CD_REC_VOL:
1636 case ESS_AUXB_REC_VOL:
1637 case ESS_RECORD_VOL:
1638 if (cp->dev == ESS_PCSPEAKER_VOL &&
1639 cp->un.value.num_channels != 1)
1640 return EINVAL;
1641
1642 switch (cp->un.value.num_channels) {
1643 case 1:
1644 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1645 sc->gain[cp->dev][ESS_LEFT];
1646 break;
1647 case 2:
1648 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1649 sc->gain[cp->dev][ESS_LEFT];
1650 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1651 sc->gain[cp->dev][ESS_RIGHT];
1652 break;
1653 default:
1654 return EINVAL;
1655 }
1656 break;
1657
1658 case ESS_MIC_PREAMP:
1659 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
1660 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
1661 break;
1662
1663 case ESS_RECORD_SOURCE:
1664 cp->un.mask = sc->in_mask;
1665 break;
1666
1667 case ESS_RECORD_MONITOR:
1668 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
1669 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
1670 break;
1671
1672 default:
1673 return EINVAL;
1674 }
1675
1676 return (0);
1677 }
1678
1679 int
1680 ess_query_devinfo(addr, dip)
1681 void *addr;
1682 mixer_devinfo_t *dip;
1683 {
1684 struct ess_softc *sc = addr;
1685
1686 DPRINTF(("ess_query_devinfo: model=%d index=%d\n",
1687 sc->sc_model, dip->index));
1688
1689 /*
1690 * REVISIT: There are some slight differences between the
1691 * mixers on the different ESS chips, which can
1692 * be sorted out using the chip model rather than a
1693 * separate mixer model.
1694 * This is currently coded assuming an ES1887; we
1695 * need to work out which bits are not applicable to
1696 * the other models (1888 and 888).
1697 */
1698 switch (dip->index) {
1699 case ESS_DAC_PLAY_VOL:
1700 dip->type = AUDIO_MIXER_VALUE;
1701 dip->mixer_class = ESS_INPUT_CLASS;
1702 dip->prev = AUDIO_MIXER_LAST;
1703 dip->next = AUDIO_MIXER_LAST;
1704 strcpy(dip->label.name, AudioNdac);
1705 dip->un.v.num_channels = 2;
1706 strcpy(dip->un.v.units.name, AudioNvolume);
1707 return (0);
1708
1709 case ESS_MIC_PLAY_VOL:
1710 dip->type = AUDIO_MIXER_VALUE;
1711 dip->mixer_class = ESS_INPUT_CLASS;
1712 dip->prev = AUDIO_MIXER_LAST;
1713 dip->next = AUDIO_MIXER_LAST;
1714 strcpy(dip->label.name, AudioNmicrophone);
1715 dip->un.v.num_channels = 2;
1716 strcpy(dip->un.v.units.name, AudioNvolume);
1717 return (0);
1718
1719 case ESS_LINE_PLAY_VOL:
1720 dip->type = AUDIO_MIXER_VALUE;
1721 dip->mixer_class = ESS_INPUT_CLASS;
1722 dip->prev = AUDIO_MIXER_LAST;
1723 dip->next = AUDIO_MIXER_LAST;
1724 strcpy(dip->label.name, AudioNline);
1725 dip->un.v.num_channels = 2;
1726 strcpy(dip->un.v.units.name, AudioNvolume);
1727 return (0);
1728
1729 case ESS_SYNTH_PLAY_VOL:
1730 dip->type = AUDIO_MIXER_VALUE;
1731 dip->mixer_class = ESS_INPUT_CLASS;
1732 dip->prev = AUDIO_MIXER_LAST;
1733 dip->next = AUDIO_MIXER_LAST;
1734 strcpy(dip->label.name, AudioNfmsynth);
1735 dip->un.v.num_channels = 2;
1736 strcpy(dip->un.v.units.name, AudioNvolume);
1737 return (0);
1738
1739 case ESS_CD_PLAY_VOL:
1740 dip->type = AUDIO_MIXER_VALUE;
1741 dip->mixer_class = ESS_INPUT_CLASS;
1742 dip->prev = AUDIO_MIXER_LAST;
1743 dip->next = AUDIO_MIXER_LAST;
1744 strcpy(dip->label.name, AudioNcd);
1745 dip->un.v.num_channels = 2;
1746 strcpy(dip->un.v.units.name, AudioNvolume);
1747 return (0);
1748
1749 case ESS_AUXB_PLAY_VOL:
1750 dip->type = AUDIO_MIXER_VALUE;
1751 dip->mixer_class = ESS_INPUT_CLASS;
1752 dip->prev = AUDIO_MIXER_LAST;
1753 dip->next = AUDIO_MIXER_LAST;
1754 strcpy(dip->label.name, "auxb");
1755 dip->un.v.num_channels = 2;
1756 strcpy(dip->un.v.units.name, AudioNvolume);
1757 return (0);
1758
1759 case ESS_INPUT_CLASS:
1760 dip->type = AUDIO_MIXER_CLASS;
1761 dip->mixer_class = ESS_INPUT_CLASS;
1762 dip->next = dip->prev = AUDIO_MIXER_LAST;
1763 strcpy(dip->label.name, AudioCinputs);
1764 return (0);
1765
1766
1767 case ESS_MASTER_VOL:
1768 dip->type = AUDIO_MIXER_VALUE;
1769 dip->mixer_class = ESS_OUTPUT_CLASS;
1770 dip->prev = dip->next = AUDIO_MIXER_LAST;
1771 strcpy(dip->label.name, AudioNmaster);
1772 dip->un.v.num_channels = 2;
1773 strcpy(dip->un.v.units.name, AudioNvolume);
1774 return (0);
1775
1776 case ESS_PCSPEAKER_VOL:
1777 dip->type = AUDIO_MIXER_VALUE;
1778 dip->mixer_class = ESS_OUTPUT_CLASS;
1779 dip->prev = AUDIO_MIXER_LAST;
1780 dip->next = AUDIO_MIXER_LAST;
1781 strcpy(dip->label.name, "pc_speaker");
1782 dip->un.v.num_channels = 1;
1783 strcpy(dip->un.v.units.name, AudioNvolume);
1784 return (0);
1785
1786 case ESS_OUTPUT_CLASS:
1787 dip->type = AUDIO_MIXER_CLASS;
1788 dip->mixer_class = ESS_OUTPUT_CLASS;
1789 dip->next = dip->prev = AUDIO_MIXER_LAST;
1790 strcpy(dip->label.name, AudioCoutputs);
1791 return (0);
1792
1793
1794 case ESS_DAC_REC_VOL:
1795 dip->type = AUDIO_MIXER_VALUE;
1796 dip->mixer_class = ESS_RECORD_CLASS;
1797 dip->prev = AUDIO_MIXER_LAST;
1798 dip->next = AUDIO_MIXER_LAST;
1799 strcpy(dip->label.name, AudioNdac);
1800 dip->un.v.num_channels = 2;
1801 strcpy(dip->un.v.units.name, AudioNvolume);
1802 return (0);
1803
1804 case ESS_MIC_REC_VOL:
1805 dip->type = AUDIO_MIXER_VALUE;
1806 dip->mixer_class = ESS_RECORD_CLASS;
1807 dip->prev = AUDIO_MIXER_LAST;
1808 dip->next = ESS_MIC_PREAMP;
1809 strcpy(dip->label.name, AudioNmicrophone);
1810 dip->un.v.num_channels = 2;
1811 strcpy(dip->un.v.units.name, AudioNvolume);
1812 return (0);
1813
1814 case ESS_LINE_REC_VOL:
1815 dip->type = AUDIO_MIXER_VALUE;
1816 dip->mixer_class = ESS_RECORD_CLASS;
1817 dip->prev = AUDIO_MIXER_LAST;
1818 dip->next = AUDIO_MIXER_LAST;
1819 strcpy(dip->label.name, AudioNline);
1820 dip->un.v.num_channels = 2;
1821 strcpy(dip->un.v.units.name, AudioNvolume);
1822 return (0);
1823
1824 case ESS_SYNTH_REC_VOL:
1825 dip->type = AUDIO_MIXER_VALUE;
1826 dip->mixer_class = ESS_RECORD_CLASS;
1827 dip->prev = AUDIO_MIXER_LAST;
1828 dip->next = AUDIO_MIXER_LAST;
1829 strcpy(dip->label.name, AudioNfmsynth);
1830 dip->un.v.num_channels = 2;
1831 strcpy(dip->un.v.units.name, AudioNvolume);
1832 return (0);
1833
1834 case ESS_CD_REC_VOL:
1835 dip->type = AUDIO_MIXER_VALUE;
1836 dip->mixer_class = ESS_RECORD_CLASS;
1837 dip->prev = AUDIO_MIXER_LAST;
1838 dip->next = AUDIO_MIXER_LAST;
1839 strcpy(dip->label.name, AudioNcd);
1840 dip->un.v.num_channels = 2;
1841 strcpy(dip->un.v.units.name, AudioNvolume);
1842 return (0);
1843
1844 case ESS_AUXB_REC_VOL:
1845 dip->type = AUDIO_MIXER_VALUE;
1846 dip->mixer_class = ESS_RECORD_CLASS;
1847 dip->prev = AUDIO_MIXER_LAST;
1848 dip->next = AUDIO_MIXER_LAST;
1849 strcpy(dip->label.name, "auxb");
1850 dip->un.v.num_channels = 2;
1851 strcpy(dip->un.v.units.name, AudioNvolume);
1852 return (0);
1853
1854 case ESS_MIC_PREAMP:
1855 dip->type = AUDIO_MIXER_ENUM;
1856 dip->mixer_class = ESS_RECORD_CLASS;
1857 dip->prev = ESS_MIC_REC_VOL;
1858 dip->next = AUDIO_MIXER_LAST;
1859 strcpy(dip->label.name, AudioNenhanced);
1860 dip->un.e.num_mem = 2;
1861 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1862 dip->un.e.member[0].ord = 0;
1863 strcpy(dip->un.e.member[1].label.name, AudioNon);
1864 dip->un.e.member[1].ord = 1;
1865 return (0);
1866
1867 case ESS_RECORD_VOL:
1868 dip->type = AUDIO_MIXER_VALUE;
1869 dip->mixer_class = ESS_RECORD_CLASS;
1870 dip->prev = AUDIO_MIXER_LAST;
1871 dip->next = AUDIO_MIXER_LAST;
1872 strcpy(dip->label.name, AudioNrecord);
1873 dip->un.v.num_channels = 2;
1874 strcpy(dip->un.v.units.name, AudioNvolume);
1875 return (0);
1876
1877 case ESS_RECORD_SOURCE:
1878 dip->mixer_class = ESS_RECORD_CLASS;
1879 dip->prev = dip->next = AUDIO_MIXER_LAST;
1880 strcpy(dip->label.name, AudioNsource);
1881 dip->type = AUDIO_MIXER_SET;
1882 dip->un.s.num_mem = 6;
1883 strcpy(dip->un.s.member[0].label.name, AudioNdac);
1884 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
1885 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
1886 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
1887 strcpy(dip->un.s.member[2].label.name, AudioNline);
1888 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
1889 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
1890 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
1891 strcpy(dip->un.s.member[4].label.name, AudioNcd);
1892 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
1893 strcpy(dip->un.s.member[5].label.name, "auxb");
1894 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
1895 return (0);
1896
1897 case ESS_RECORD_CLASS:
1898 dip->type = AUDIO_MIXER_CLASS;
1899 dip->mixer_class = ESS_RECORD_CLASS;
1900 dip->next = dip->prev = AUDIO_MIXER_LAST;
1901 strcpy(dip->label.name, AudioCrecord);
1902 return (0);
1903
1904
1905 case ESS_RECORD_MONITOR:
1906 dip->mixer_class = ESS_MONITOR_CLASS;
1907 dip->prev = dip->next = AUDIO_MIXER_LAST;
1908 strcpy(dip->label.name, AudioNmonitor);
1909 dip->type = AUDIO_MIXER_ENUM;
1910 dip->un.e.num_mem = 2;
1911 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1912 dip->un.e.member[0].ord = 0;
1913 strcpy(dip->un.e.member[1].label.name, AudioNon);
1914 dip->un.e.member[1].ord = 1;
1915 return (0);
1916
1917 case ESS_MONITOR_CLASS:
1918 dip->type = AUDIO_MIXER_CLASS;
1919 dip->mixer_class = ESS_MONITOR_CLASS;
1920 dip->next = dip->prev = AUDIO_MIXER_LAST;
1921 strcpy(dip->label.name, AudioCmonitor);
1922 return (0);
1923 }
1924
1925 return ENXIO;
1926 }
1927
1928 int
1929 ess_get_props(addr)
1930 void *addr;
1931 {
1932 /*struct ess_softc *sc = addr;*/
1933 return (0);
1934 }
1935
1936 /* ============================================
1937 * Generic functions for ess, not used by audio h/w i/f
1938 * =============================================
1939 */
1940
1941 /*
1942 * Reset the chip.
1943 * Return non-zero if the chip isn't detected.
1944 */
1945 int
1946 ess_reset(sc)
1947 struct ess_softc *sc;
1948 {
1949 /* REVISIT: currently just copied from sbdsp.c */
1950 bus_space_tag_t iot = sc->sc_iot;
1951 bus_space_handle_t ioh = sc->sc_ioh;
1952
1953 sc->sc_in.intr = 0;
1954 sc->sc_in.dmacnt = 0;
1955 if (sc->sc_in.active) {
1956 isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
1957 sc->sc_in.active = 0;
1958 }
1959
1960 sc->sc_out.intr = 0;
1961 sc->sc_out.dmacnt = 0;
1962 if (sc->sc_out.active) {
1963 isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
1964 sc->sc_out.active = 0;
1965 }
1966
1967 /*
1968 * See SBK, section 11.3.
1969 * We pulse a reset signal into the card.
1970 * Gee, what a brilliant hardware design.
1971 */
1972 /* REVISIT: need to properly document the use of 3 below */
1973 EWRITE1(iot, ioh, ESS_DSP_RESET, 3);
1974 delay(10000);
1975 EWRITE1(iot, ioh, ESS_DSP_RESET, 0);
1976 delay(30000);
1977 if (ess_rdsp(sc) != ESS_MAGIC)
1978 return -1;
1979
1980 /*
1981 * Enable access to the ESS extension commands, which are
1982 * disabled by each reset.
1983 */
1984 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
1985
1986 return (0);
1987 }
1988
1989 void
1990 ess_set_gain(sc, port, on)
1991 struct ess_softc *sc;
1992 int port;
1993 int on;
1994 {
1995 int gain, left, right;
1996 int mix;
1997 int src;
1998 int stereo;
1999
2000 /*
2001 * Most gain controls are found in the mixer registers and
2002 * are stereo. Any that are not, must set mix and stereo as
2003 * required.
2004 */
2005 mix = 1;
2006 stereo = 1;
2007
2008 switch (port) {
2009 case ESS_MASTER_VOL:
2010 src = 0x32;
2011 break;
2012 case ESS_DAC_PLAY_VOL:
2013 src = 0x7C;
2014 break;
2015 case ESS_MIC_PLAY_VOL:
2016 src = 0x1A;
2017 break;
2018 case ESS_LINE_PLAY_VOL:
2019 src = 0x3E;
2020 break;
2021 case ESS_SYNTH_PLAY_VOL:
2022 src = 0x36;
2023 break;
2024 case ESS_CD_PLAY_VOL:
2025 src = 0x38;
2026 break;
2027 case ESS_AUXB_PLAY_VOL:
2028 src = 0x3A;
2029 break;
2030 case ESS_PCSPEAKER_VOL:
2031 src = 0x3C;
2032 stereo = 0;
2033 break;
2034 case ESS_DAC_REC_VOL:
2035 src = 0x69;
2036 break;
2037 case ESS_MIC_REC_VOL:
2038 src = 0x68;
2039 break;
2040 case ESS_LINE_REC_VOL:
2041 src = 0x6E;
2042 break;
2043 case ESS_SYNTH_REC_VOL:
2044 src = 0x6B;
2045 break;
2046 case ESS_CD_REC_VOL:
2047 src = 0x6A;
2048 break;
2049 case ESS_AUXB_REC_VOL:
2050 src = 0x6C;
2051 break;
2052 case ESS_RECORD_VOL:
2053 src = 0xB4;
2054 mix = 0;
2055 break;
2056 default:
2057 return;
2058 }
2059
2060 if (on) {
2061 left = sc->gain[port][ESS_LEFT];
2062 right = sc->gain[port][ESS_RIGHT];
2063 } else {
2064 left = right = 0;
2065 }
2066
2067 if (stereo)
2068 gain = ESS_STEREO_GAIN(left, right);
2069 else
2070 gain = ESS_MONO_GAIN(left);
2071
2072 if (mix)
2073 ess_write_mix_reg(sc, src, gain);
2074 else
2075 ess_write_x_reg(sc, src, gain);
2076 }
2077
2078 int
2079 ess_set_in_ports(sc, mask)
2080 struct ess_softc *sc;
2081 int mask;
2082 {
2083 mixer_devinfo_t di;
2084 int i;
2085 int port;
2086 int tmp;
2087
2088 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
2089
2090 /*
2091 * Get the device info for the record source control,
2092 * including the list of available sources.
2093 */
2094 di.index = ESS_RECORD_SOURCE;
2095 if (ess_query_devinfo(sc, &di))
2096 return EINVAL;
2097
2098 /*
2099 * Set or disable the record volume control for each of the
2100 * possible sources.
2101 */
2102 for (i = 0; i < di.un.s.num_mem; i++)
2103 {
2104 /*
2105 * Calculate the source port number from its mask.
2106 */
2107 tmp = di.un.s.member[i].mask >> 1;
2108 for (port = 0; tmp; port++) {
2109 tmp >>= 1;
2110 }
2111
2112 /*
2113 * Set the source gain:
2114 * to the current value if source is enabled
2115 * to zero if source is disabled
2116 */
2117 ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
2118 }
2119
2120 sc->in_mask = mask;
2121
2122 /*
2123 * We have to fake a single port since the upper layer expects
2124 * one only. We choose the lowest numbered port that is enabled.
2125 */
2126 for(i = 0; i < ESS_NPORT; i++) {
2127 if (mask & (1 << i)) {
2128 sc->in_port = i;
2129 break;
2130 }
2131 }
2132
2133 return (0);
2134 }
2135
2136 void
2137 ess_speaker_on(sc)
2138 struct ess_softc *sc;
2139 {
2140 /* Disable mute on left- and right-master volume. */
2141 ess_clear_mreg_bits(sc, 0x60, 0x40);
2142 ess_clear_mreg_bits(sc, 0x62, 0x40);
2143 }
2144
2145 void
2146 ess_speaker_off(sc)
2147 struct ess_softc *sc;
2148 {
2149 /* Enable mute on left- and right-master volume. */
2150 ess_set_mreg_bits(sc, 0x60, 0x40);
2151 ess_set_mreg_bits(sc, 0x62, 0x40);
2152 }
2153
2154 /*
2155 * Calculate the time constant for the requested sampling rate.
2156 */
2157 u_int
2158 ess_srtotc(rate)
2159 u_int rate;
2160 {
2161 u_int tc;
2162
2163 /* The following formulae are from the ESS data sheet. */
2164 if (rate < 22050)
2165 tc = 128 - 397700L / rate;
2166 else
2167 tc = 256 - 795500L / rate;
2168
2169 return (tc);
2170 }
2171
2172
2173 /*
2174 * Calculate the filter constant for the reuqested sampling rate.
2175 */
2176 u_int
2177 ess_srtofc(rate)
2178 u_int rate;
2179 {
2180 /*
2181 * The following formula is derived from the information in
2182 * the ES1887 data sheet, based on a roll-off frequency of
2183 * 87%.
2184 */
2185 return (256 - 200279L / rate);
2186 }
2187
2188
2189 /*
2190 * Return the status of the DSP.
2191 */
2192 u_char
2193 ess_get_dsp_status(sc)
2194 struct ess_softc *sc;
2195 {
2196 bus_space_tag_t iot = sc->sc_iot;
2197 bus_space_handle_t ioh = sc->sc_ioh;
2198
2199 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS));
2200 }
2201
2202
2203 /*
2204 * Return the read status of the DSP: 1 -> DSP ready for reading
2205 * 0 -> DSP not ready for reading
2206 */
2207 u_char
2208 ess_dsp_read_ready(sc)
2209 struct ess_softc *sc;
2210 {
2211 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) ==
2212 ESS_DSP_READ_READY) ? 1 : 0);
2213 }
2214
2215
2216 /*
2217 * Return the write status of the DSP: 1 -> DSP ready for writing
2218 * 0 -> DSP not ready for writing
2219 */
2220 u_char
2221 ess_dsp_write_ready(sc)
2222 struct ess_softc *sc;
2223 {
2224 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
2225 ESS_DSP_WRITE_READY) ? 1 : 0);
2226 }
2227
2228
2229 /*
2230 * Read a byte from the DSP.
2231 */
2232 int
2233 ess_rdsp(sc)
2234 struct ess_softc *sc;
2235 {
2236 bus_space_tag_t iot = sc->sc_iot;
2237 bus_space_handle_t ioh = sc->sc_ioh;
2238 int i;
2239
2240 for (i = ESS_READ_TIMEOUT; i > 0; --i) {
2241 if (ess_dsp_read_ready(sc)) {
2242 i = EREAD1(iot, ioh, ESS_DSP_READ);
2243 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i));
2244 return i;
2245 } else
2246 delay(10);
2247 }
2248
2249 DPRINTF(("ess_rdsp: timed out\n"));
2250 return (-1);
2251 }
2252
2253 /*
2254 * Write a byte to the DSP.
2255 */
2256 int
2257 ess_wdsp(sc, v)
2258 struct ess_softc *sc;
2259 u_char v;
2260 {
2261 bus_space_tag_t iot = sc->sc_iot;
2262 bus_space_handle_t ioh = sc->sc_ioh;
2263 int i;
2264
2265 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v));
2266
2267 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
2268 if (ess_dsp_write_ready(sc)) {
2269 EWRITE1(iot, ioh, ESS_DSP_WRITE, v);
2270 return (0);
2271 } else
2272 delay(10);
2273 }
2274
2275 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
2276 return (-1);
2277 }
2278
2279 /*
2280 * Write a value to one of the ESS extended registers.
2281 */
2282 int
2283 ess_write_x_reg(sc, reg, val)
2284 struct ess_softc *sc;
2285 u_char reg;
2286 u_char val;
2287 {
2288 int error;
2289
2290 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2291 if ((error = ess_wdsp(sc, reg)) == 0)
2292 error = ess_wdsp(sc, val);
2293
2294 return error;
2295 }
2296
2297 /*
2298 * Read the value of one of the ESS extended registers.
2299 */
2300 u_char
2301 ess_read_x_reg(sc, reg)
2302 struct ess_softc *sc;
2303 u_char reg;
2304 {
2305 int error;
2306 int val;
2307
2308 if ((error = ess_wdsp(sc, 0xC0)) == 0)
2309 error = ess_wdsp(sc, reg);
2310 if (error)
2311 DPRINTF(("Error reading extended register 0x%02x\n", reg));
2312 /* REVISIT: what if an error is returned above? */
2313 val = ess_rdsp(sc);
2314 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2315 return val;
2316 }
2317
2318 void
2319 ess_clear_xreg_bits(sc, reg, mask)
2320 struct ess_softc *sc;
2321 u_char reg;
2322 u_char mask;
2323 {
2324 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
2325 DPRINTF(("Error clearing bits in extended register 0x%02x\n",
2326 reg));
2327 }
2328
2329 void
2330 ess_set_xreg_bits(sc, reg, mask)
2331 struct ess_softc *sc;
2332 u_char reg;
2333 u_char mask;
2334 {
2335 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
2336 DPRINTF(("Error setting bits in extended register 0x%02x\n",
2337 reg));
2338 }
2339
2340
2341 /*
2342 * Write a value to one of the ESS mixer registers.
2343 */
2344 void
2345 ess_write_mix_reg(sc, reg, val)
2346 struct ess_softc *sc;
2347 u_char reg;
2348 u_char val;
2349 {
2350 bus_space_tag_t iot = sc->sc_iot;
2351 bus_space_handle_t ioh = sc->sc_ioh;
2352 int s;
2353
2354 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));
2355 s = splaudio();
2356
2357 /*
2358 * Select the register to be written.
2359 */
2360 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2361
2362 /*
2363 * Write the desired value.
2364 */
2365 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);
2366
2367 splx(s);
2368 }
2369
2370 /*
2371 * Read the value of one of the ESS mixer registers.
2372 */
2373 u_char
2374 ess_read_mix_reg(sc, reg)
2375 struct ess_softc *sc;
2376 u_char reg;
2377 {
2378 bus_space_tag_t iot = sc->sc_iot;
2379 bus_space_handle_t ioh = sc->sc_ioh;
2380 int s;
2381 u_char val;
2382
2383 s = splaudio();
2384
2385 /* Select the register to be read. */
2386 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2387
2388 /* Read the current value. */
2389 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);
2390
2391 splx(s);
2392 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));
2393 return val;
2394 }
2395
2396 void
2397 ess_clear_mreg_bits(sc, reg, mask)
2398 struct ess_softc *sc;
2399 u_char reg;
2400 u_char mask;
2401 {
2402 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
2403 }
2404
2405 void
2406 ess_set_mreg_bits(sc, reg, mask)
2407 struct ess_softc *sc;
2408 u_char reg;
2409 u_char mask;
2410 {
2411 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
2412 }
2413