ess.c revision 1.22
1 /* $NetBSD: ess.c,v 1.22 1998/08/12 19:13:14 mycroft Exp $ */ 2 3 /* 4 * Copyright 1997 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36 /* 37 **++ 38 ** 39 ** ess.c 40 ** 41 ** FACILITY: 42 ** 43 ** DIGITAL Network Appliance Reference Design (DNARD) 44 ** 45 ** MODULE DESCRIPTION: 46 ** 47 ** This module contains the device driver for the ESS 48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was 49 ** used as a reference point when implementing this driver. 50 ** 51 ** AUTHORS: 52 ** 53 ** Blair Fidler Software Engineering Australia 54 ** Gold Coast, Australia. 55 ** 56 ** CREATION DATE: 57 ** 58 ** March 10, 1997. 59 ** 60 ** MODIFICATION HISTORY: 61 ** 62 ** Heavily modified by Lennart Augustsson and Charles M. Hannum for 63 ** bus_dma, changes to audio interface, and many bug fixes. 64 **-- 65 */ 66 67 #include <sys/param.h> 68 #include <sys/systm.h> 69 #include <sys/errno.h> 70 #include <sys/ioctl.h> 71 #include <sys/syslog.h> 72 #include <sys/device.h> 73 #include <sys/proc.h> 74 75 #include <machine/cpu.h> 76 #include <machine/intr.h> 77 #include <machine/bus.h> 78 79 #include <sys/audioio.h> 80 #include <dev/audio_if.h> 81 #include <dev/auconv.h> 82 #include <dev/mulaw.h> 83 84 #include <dev/isa/isavar.h> 85 #include <dev/isa/isadmavar.h> 86 87 #include <dev/isa/essvar.h> 88 #include <dev/isa/essreg.h> 89 90 #ifdef AUDIO_DEBUG 91 #define DPRINTF(x) if (essdebug) printf x 92 #define DPRINTFN(n,x) if (essdebug>(n)) printf x 93 int essdebug = 0; 94 #else 95 #define DPRINTF(x) 96 #define DPRINTFN(n,x) 97 #endif 98 99 #if 0 100 unsigned uuu; 101 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu) 102 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d)) 103 #else 104 #define EREAD1(t, h, a) bus_space_read_1(t, h, a) 105 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d) 106 #endif 107 108 109 int ess_setup_sc __P((struct ess_softc *, int)); 110 111 int ess_open __P((void *, int)); 112 void ess_close __P((void *)); 113 int ess_getdev __P((void *, struct audio_device *)); 114 int ess_drain __P((void *)); 115 116 int ess_query_encoding __P((void *, struct audio_encoding *)); 117 118 int ess_set_params __P((void *, int, int, struct audio_params *, 119 struct audio_params *)); 120 121 int ess_round_blocksize __P((void *, int)); 122 123 int ess_trigger_output __P((void *, void *, void *, int, void (*)(void *), 124 void *, struct audio_params *)); 125 int ess_trigger_input __P((void *, void *, void *, int, void (*)(void *), 126 void *, struct audio_params *)); 127 int ess_halt_output __P((void *)); 128 int ess_halt_input __P((void *)); 129 130 int ess_intr_output __P((void *)); 131 int ess_intr_input __P((void *)); 132 133 int ess_speaker_ctl __P((void *, int)); 134 135 int ess_getdev __P((void *, struct audio_device *)); 136 137 int ess_set_port __P((void *, mixer_ctrl_t *)); 138 int ess_get_port __P((void *, mixer_ctrl_t *)); 139 140 void *ess_malloc __P((void *, unsigned long, int, int)); 141 void ess_free __P((void *, void *, int)); 142 unsigned long ess_round __P((void *, unsigned long)); 143 int ess_mappage __P((void *, void *, int, int)); 144 145 146 int ess_query_devinfo __P((void *, mixer_devinfo_t *)); 147 int ess_get_props __P((void *)); 148 149 void ess_speaker_on __P((struct ess_softc *)); 150 void ess_speaker_off __P((struct ess_softc *)); 151 152 int ess_config_addr __P((struct ess_softc *)); 153 void ess_config_irq __P((struct ess_softc *)); 154 void ess_config_drq __P((struct ess_softc *)); 155 void ess_setup __P((struct ess_softc *)); 156 int ess_identify __P((struct ess_softc *)); 157 158 int ess_reset __P((struct ess_softc *)); 159 void ess_set_gain __P((struct ess_softc *, int, int)); 160 int ess_set_in_ports __P((struct ess_softc *, int)); 161 u_int ess_srtotc __P((u_int)); 162 u_int ess_srtofc __P((u_int)); 163 u_char ess_get_dsp_status __P((struct ess_softc *)); 164 u_char ess_dsp_read_ready __P((struct ess_softc *)); 165 u_char ess_dsp_write_ready __P((struct ess_softc *sc)); 166 int ess_rdsp __P((struct ess_softc *)); 167 int ess_wdsp __P((struct ess_softc *, u_char)); 168 u_char ess_read_x_reg __P((struct ess_softc *, u_char)); 169 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char)); 170 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char)); 171 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char)); 172 u_char ess_read_mix_reg __P((struct ess_softc *, u_char)); 173 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char)); 174 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char)); 175 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char)); 176 177 static char *essmodel[] = { 178 "unsupported", 179 "1888", 180 "1887", 181 "888" 182 }; 183 184 struct audio_device ess_device = { 185 "ESS Technology", 186 "x", 187 "ess" 188 }; 189 190 /* 191 * Define our interface to the higher level audio driver. 192 */ 193 194 struct audio_hw_if ess_hw_if = { 195 ess_open, 196 ess_close, 197 ess_drain, 198 ess_query_encoding, 199 ess_set_params, 200 ess_round_blocksize, 201 NULL, 202 NULL, 203 NULL, 204 NULL, 205 NULL, 206 ess_halt_output, 207 ess_halt_input, 208 ess_speaker_ctl, 209 ess_getdev, 210 NULL, 211 ess_set_port, 212 ess_get_port, 213 ess_query_devinfo, 214 ess_malloc, 215 ess_free, 216 ess_round, 217 ess_mappage, 218 ess_get_props, 219 ess_trigger_output, 220 ess_trigger_input, 221 }; 222 223 #ifdef AUDIO_DEBUG 224 void ess_printsc __P((struct ess_softc *)); 225 void ess_dump_mixer __P((struct ess_softc *)); 226 227 void 228 ess_printsc(sc) 229 struct ess_softc *sc; 230 { 231 int i; 232 233 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n", 234 (int)sc->sc_open, sc->sc_iobase, sc->out_port, 235 sc->in_port, sc->spkr_state ? "on" : "off"); 236 237 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n", 238 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr, 239 sc->sc_out.intr, sc->sc_out.arg); 240 241 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n", 242 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr, 243 sc->sc_in.intr, sc->sc_in.arg); 244 245 printf("gain:"); 246 for (i = 0; i < ESS_NDEVS; i++) 247 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]); 248 printf("\n"); 249 } 250 251 void 252 ess_dump_mixer(sc) 253 struct ess_softc *sc; 254 { 255 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 256 0x7C, ess_read_mix_reg(sc, 0x7C)); 257 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 258 0x1A, ess_read_mix_reg(sc, 0x1A)); 259 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 260 0x3E, ess_read_mix_reg(sc, 0x3E)); 261 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 262 0x36, ess_read_mix_reg(sc, 0x36)); 263 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 264 0x38, ess_read_mix_reg(sc, 0x38)); 265 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n", 266 0x3A, ess_read_mix_reg(sc, 0x3A)); 267 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n", 268 0x32, ess_read_mix_reg(sc, 0x32)); 269 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n", 270 0x3C, ess_read_mix_reg(sc, 0x3C)); 271 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n", 272 0x69, ess_read_mix_reg(sc, 0x69)); 273 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n", 274 0x68, ess_read_mix_reg(sc, 0x68)); 275 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n", 276 0x6E, ess_read_mix_reg(sc, 0x6E)); 277 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n", 278 0x6B, ess_read_mix_reg(sc, 0x6B)); 279 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n", 280 0x6A, ess_read_mix_reg(sc, 0x6A)); 281 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n", 282 0x6C, ess_read_mix_reg(sc, 0x6C)); 283 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n", 284 0xB4, ess_read_x_reg(sc, 0xB4)); 285 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n", 286 0x14, ess_read_mix_reg(sc, 0x14)); 287 288 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n", 289 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL)); 290 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n", 291 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL)); 292 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n", 293 0x1c, ess_read_mix_reg(sc, 0x1c), 294 0x7a, ess_read_mix_reg(sc, 0x7a)); 295 } 296 297 #endif 298 299 /* 300 * Configure the ESS chip for the desired audio base address. 301 */ 302 int 303 ess_config_addr(sc) 304 struct ess_softc *sc; 305 { 306 int iobase = sc->sc_iobase; 307 bus_space_tag_t iot = sc->sc_iot; 308 309 /* 310 * Configure using the System Control Register method. This 311 * method is used when the AMODE line is tied high, which is 312 * the case for the Shark, but not for the evaluation board. 313 */ 314 315 bus_space_handle_t scr_access_ioh; 316 bus_space_handle_t scr_ioh; 317 u_short scr_value; 318 319 /* 320 * Set the SCR bit to enable audio. 321 */ 322 scr_value = ESS_SCR_AUDIO_ENABLE; 323 324 /* 325 * Set the SCR bits necessary to select the specified audio 326 * base address. 327 */ 328 switch(iobase) { 329 case 0x220: 330 scr_value |= ESS_SCR_AUDIO_220; 331 break; 332 case 0x230: 333 scr_value |= ESS_SCR_AUDIO_230; 334 break; 335 case 0x240: 336 scr_value |= ESS_SCR_AUDIO_240; 337 break; 338 case 0x250: 339 scr_value |= ESS_SCR_AUDIO_250; 340 break; 341 default: 342 printf("ess: configured iobase 0x%x invalid\n", iobase); 343 return (1); 344 break; 345 } 346 347 /* 348 * Get a mapping for the System Control Register (SCR) access 349 * registers and the SCR data registers. 350 */ 351 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS, 352 0, &scr_access_ioh)) { 353 printf("ess: can't map SCR access registers\n"); 354 return (1); 355 } 356 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS, 357 0, &scr_ioh)) { 358 printf("ess: can't map SCR registers\n"); 359 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS); 360 return (1); 361 } 362 363 /* Unlock the SCR. */ 364 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0); 365 366 /* Write the base address information into SCR[0]. */ 367 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0); 368 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value); 369 370 /* Lock the SCR. */ 371 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0); 372 373 /* Unmap the SCR access ports and the SCR data ports. */ 374 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS); 375 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS); 376 377 return 0; 378 } 379 380 381 /* 382 * Configure the ESS chip for the desired IRQ and DMA channels. 383 * ESS ISA 384 * -------- 385 * IRQA irq9 386 * IRQB irq5 387 * IRQC irq7 388 * IRQD irq10 389 * IRQE irq15 390 * 391 * DRQA drq0 392 * DRQB drq1 393 * DRQC drq3 394 * DRQD drq5 395 */ 396 void 397 ess_config_irq(sc) 398 struct ess_softc *sc; 399 { 400 int v; 401 402 DPRINTFN(2,("ess_config_irq\n")); 403 404 if (sc->sc_in.irq != sc->sc_out.irq) { 405 /* Configure Audio 1 (record) for the appropriate IRQ line. */ 406 v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */ 407 switch(sc->sc_in.irq) { 408 case 5: 409 v |= ESS_IRQ_CTRL_INTRB; 410 break; 411 case 7: 412 v |= ESS_IRQ_CTRL_INTRC; 413 break; 414 case 9: 415 v |= ESS_IRQ_CTRL_INTRA; 416 break; 417 case 10: 418 v |= ESS_IRQ_CTRL_INTRD; 419 break; 420 #ifdef DIAGNOSTIC 421 default: 422 printf("ess: configured irq %d not supported for Audio 1\n", 423 sc->sc_in.irq); 424 return; 425 #endif 426 } 427 ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v); 428 /* irq2 is hardwired to 15 in this mode */ 429 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 430 ESS_AUDIO2_CTRL2_IRQ2_ENABLE); 431 /* Use old method. */ 432 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888); 433 } else { 434 /* Use new method, both interrupts are the same. */ 435 v = ESS_IS_SELECT_IRQ; /* enable intrs */ 436 switch(sc->sc_out.irq) { 437 case 5: 438 v |= ESS_IS_INTRB; 439 break; 440 case 7: 441 v |= ESS_IS_INTRC; 442 break; 443 case 9: 444 v |= ESS_IS_INTRA; 445 break; 446 case 10: 447 v |= ESS_IS_INTRD; 448 break; 449 case 15: 450 v |= ESS_IS_INTRE; 451 break; 452 #ifdef DIAGNOSTIC 453 default: 454 printf("ess_config_irq: configured irq %d not supported for Audio 1\n", 455 sc->sc_in.irq); 456 return; 457 #endif 458 } 459 /* Set the IRQ */ 460 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v); 461 } 462 } 463 464 465 void 466 ess_config_drq(sc) 467 struct ess_softc *sc; 468 { 469 int v; 470 471 DPRINTFN(2,("ess_config_drq\n")); 472 473 /* Configure Audio 1 (record) for DMA on the appropriate channel. */ 474 v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT; 475 switch(sc->sc_in.drq) { 476 case 0: 477 v |= ESS_DRQ_CTRL_DRQA; 478 break; 479 case 1: 480 v |= ESS_DRQ_CTRL_DRQB; 481 break; 482 case 3: 483 v |= ESS_DRQ_CTRL_DRQC; 484 break; 485 #ifdef DIAGNOSTIC 486 default: 487 printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n", 488 sc->sc_in.drq); 489 return; 490 #endif 491 } 492 /* Set DRQ1 */ 493 ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v); 494 495 /* Configure DRQ2 */ 496 v = ESS_AUDIO2_CTRL3_DRQ_PD; 497 switch(sc->sc_out.drq) { 498 case 0: 499 v |= ESS_AUDIO2_CTRL3_DRQA; 500 break; 501 case 1: 502 v |= ESS_AUDIO2_CTRL3_DRQB; 503 break; 504 case 3: 505 v |= ESS_AUDIO2_CTRL3_DRQC; 506 break; 507 case 5: 508 v |= ESS_AUDIO2_CTRL3_DRQC; 509 break; 510 #ifdef DIAGNOSTIC 511 default: 512 printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n", 513 sc->sc_out.drq); 514 return; 515 #endif 516 } 517 ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v); 518 /* Enable DMA 2 */ 519 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 520 ESS_AUDIO2_CTRL2_DMA_ENABLE); 521 } 522 523 /* 524 * Set up registers after a reset. 525 */ 526 void 527 ess_setup(sc) 528 struct ess_softc *sc; 529 { 530 531 ess_config_irq(sc); 532 ess_config_drq(sc); 533 534 DPRINTFN(2,("ess_setup: done\n")); 535 } 536 537 /* 538 * Determine the model of ESS chip we are talking to. Currently we 539 * only support ES1888, ES1887 and ES888. The method of determining 540 * the chip is based on the information on page 27 of the ES1887 data 541 * sheet. 542 * 543 * This routine sets the values of sc->sc_model and sc->sc_version. 544 */ 545 int 546 ess_identify(sc) 547 struct ess_softc *sc; 548 { 549 u_char reg1; 550 u_char reg2; 551 u_char reg3; 552 553 sc->sc_model = ESS_UNSUPPORTED; 554 sc->sc_version = 0; 555 556 557 /* 558 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where 559 * n >= 8 for an ES1887 or an ES888. Other values indicate 560 * earlier (unsupported) chips. 561 */ 562 ess_wdsp(sc, ESS_ACMD_LEGACY_ID); 563 564 if ((reg1 = ess_rdsp(sc)) != 0x68) { 565 printf("ess: First ID byte wrong (0x%02x)\n", reg1); 566 return 1; 567 } 568 569 reg2 = ess_rdsp(sc); 570 if (((reg2 & 0xf0) != 0x80) || 571 ((reg2 & 0x0f) < 8)) { 572 printf("ess: Second ID byte wrong (0x%02x)\n", reg2); 573 return 1; 574 } 575 576 /* 577 * Store the ID bytes as the version. 578 */ 579 sc->sc_version = (reg1 << 8) + reg2; 580 581 582 /* 583 * 2. Verify we can change bit 2 in mixer register 0x64. This 584 * should be possible on all supported chips. 585 */ 586 reg1 = ess_read_mix_reg(sc, 0x64); 587 reg2 = reg1 ^ 0x04; /* toggle bit 2 */ 588 589 ess_write_mix_reg(sc, 0x64, reg2); 590 591 if (ess_read_mix_reg(sc, 0x64) != reg2) { 592 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n"); 593 return 1; 594 } 595 596 /* 597 * Restore the original value of mixer register 0x64. 598 */ 599 ess_write_mix_reg(sc, 0x64, reg1); 600 601 602 /* 603 * 3. Verify we can change the value of mixer register 604 * ESS_MREG_SAMPLE_RATE. 605 * This should be possible on all supported chips. 606 * It is not necessary to restore the value of this mixer register. 607 */ 608 reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE); 609 reg2 = reg1 ^ 0xff; /* toggle all bits */ 610 611 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2); 612 613 if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) { 614 printf("ess: Hardware error (unable to change mixer register 0x70)\n"); 615 return 1; 616 } 617 618 /* 619 * 4. Determine if we can change bit 5 in mixer register 0x64. 620 * This determines whether we have an ES1887: 621 * 622 * - can change indicates ES1887 623 * - can't change indicates ES1888 or ES888 624 */ 625 reg1 = ess_read_mix_reg(sc, 0x64); 626 reg2 = reg1 ^ 0x20; /* toggle bit 5 */ 627 628 ess_write_mix_reg(sc, 0x64, reg2); 629 630 if (ess_read_mix_reg(sc, 0x64) == reg2) { 631 sc->sc_model = ESS_1887; 632 633 /* 634 * Restore the original value of mixer register 0x64. 635 */ 636 ess_write_mix_reg(sc, 0x64, reg1); 637 } else { 638 /* 639 * 5. Determine if we can change the value of mixer 640 * register 0x69 independently of mixer register 641 * 0x68. This determines which chip we have: 642 * 643 * - can modify idependently indicates ES888 644 * - register 0x69 is an alias of 0x68 indicates ES1888 645 */ 646 reg1 = ess_read_mix_reg(sc, 0x68); 647 reg2 = ess_read_mix_reg(sc, 0x69); 648 reg3 = reg2 ^ 0xff; /* toggle all bits */ 649 650 /* 651 * Write different values to each register. 652 */ 653 ess_write_mix_reg(sc, 0x68, reg2); 654 ess_write_mix_reg(sc, 0x69, reg3); 655 656 if (ess_read_mix_reg(sc, 0x68) == reg2) 657 sc->sc_model = ESS_888; 658 else 659 sc->sc_model = ESS_1888; 660 661 /* 662 * Restore the original value of the registers. 663 */ 664 ess_write_mix_reg(sc, 0x68, reg1); 665 ess_write_mix_reg(sc, 0x69, reg2); 666 } 667 668 return 0; 669 } 670 671 672 int 673 ess_setup_sc(sc, doinit) 674 struct ess_softc *sc; 675 int doinit; 676 { 677 /* Reset the chip. */ 678 if (ess_reset(sc) != 0) { 679 DPRINTF(("ess_setup_sc: couldn't reset chip\n")); 680 return (1); 681 } 682 683 /* Identify the ESS chip, and check that it is supported. */ 684 if (ess_identify(sc)) { 685 DPRINTF(("ess_setup_sc: couldn't identify\n")); 686 return (1); 687 } 688 689 return (0); 690 } 691 692 /* 693 * Probe for the ESS hardware. 694 */ 695 int 696 essmatch(sc) 697 struct ess_softc *sc; 698 { 699 if (!ESS_BASE_VALID(sc->sc_iobase)) { 700 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase); 701 return (0); 702 } 703 704 /* Configure the ESS chip for the desired audio base address. */ 705 if (ess_config_addr(sc)) 706 return (0); 707 708 if (ess_setup_sc(sc, 1)) 709 return (0); 710 711 if (sc->sc_model == ESS_UNSUPPORTED) { 712 DPRINTF(("ess: Unsupported model\n")); 713 return (0); 714 } 715 716 /* Check that requested DMA channels are valid and different. */ 717 if (!ESS_DRQ1_VALID(sc->sc_in.drq)) { 718 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq); 719 return (0); 720 } 721 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) { 722 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq); 723 return (0); 724 } 725 if (sc->sc_in.drq == sc->sc_out.drq) { 726 printf("ess: play and record dma chan both %d\n", 727 sc->sc_in.drq); 728 return (0); 729 } 730 731 if (sc->sc_model == ESS_1887) { 732 /* 733 * Either use the 1887 interrupt mode with all interrupts 734 * mapped to the same irq, or use the 1888 method with 735 * irq fixed at 15. 736 */ 737 if (sc->sc_in.irq == sc->sc_out.irq) { 738 if (!ESS_IRQ12_VALID(sc->sc_in.irq)) { 739 printf("ess: irq %d invalid\n", sc->sc_in.irq); 740 return (0); 741 } 742 goto irq_not1888; 743 } 744 } else { 745 /* Must use separate interrupts */ 746 if (sc->sc_in.irq == sc->sc_out.irq) { 747 printf("ess: play and record irq both %d\n", 748 sc->sc_in.irq); 749 return (0); 750 } 751 } 752 753 /* Check that requested IRQ lines are valid and different. */ 754 if (!ESS_IRQ1_VALID(sc->sc_in.irq)) { 755 printf("ess: record irq %d invalid\n", sc->sc_in.irq); 756 return (0); 757 } 758 if (!ESS_IRQ2_VALID(sc->sc_out.irq)) { 759 printf("ess: play irq %d invalid\n", sc->sc_out.irq); 760 return (0); 761 } 762 irq_not1888: 763 764 /* Check that the DRQs are free. */ 765 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) || 766 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq)) 767 return (0); 768 /* XXX should we check IRQs as well? */ 769 770 return (1); 771 } 772 773 774 /* 775 * Attach hardware to driver, attach hardware driver to audio 776 * pseudo-device driver. 777 */ 778 void 779 essattach(sc) 780 struct ess_softc *sc; 781 { 782 struct audio_params pparams, rparams; 783 int i; 784 u_int v; 785 786 if (ess_setup_sc(sc, 0)) { 787 printf("%s: setup failed\n", sc->sc_dev.dv_xname); 788 return; 789 } 790 791 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq, 792 sc->sc_out.ist, IPL_AUDIO, 793 ess_intr_output, sc); 794 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq, 795 sc->sc_in.ist, IPL_AUDIO, 796 ess_intr_input, sc); 797 798 /* Create our DMA maps. */ 799 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq, 800 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 801 printf("%s: can't create map for drq %d\n", 802 sc->sc_dev.dv_xname, sc->sc_in.drq); 803 return; 804 } 805 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq, 806 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 807 printf("%s: can't create map for drq %d\n", 808 sc->sc_dev.dv_xname, sc->sc_out.drq); 809 return; 810 } 811 812 printf(" ESS Technology ES%s [version 0x%04x]\n", 813 essmodel[sc->sc_model], sc->sc_version); 814 815 /* 816 * Set record and play parameters to default values defined in 817 * generic audio driver. 818 */ 819 pparams = audio_default; 820 rparams = audio_default; 821 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams); 822 823 /* Do a hardware reset on the mixer. */ 824 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET); 825 826 /* 827 * Set volume of Audio 1 to zero and disable Audio 1 DAC input 828 * to playback mixer, since playback is always through Audio 2. 829 */ 830 ess_write_mix_reg(sc, 0x14, 0); 831 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR); 832 833 /* 834 * Set hardware record source to use output of the record 835 * mixer. We do the selection of record source in software by 836 * setting the gain of the unused sources to zero. (See 837 * ess_set_in_ports.) 838 */ 839 ess_set_mreg_bits(sc, 0x1c, 0x07); 840 ess_clear_mreg_bits(sc, 0x7a, 0x10); 841 ess_set_mreg_bits(sc, 0x7a, 0x08); 842 843 /* 844 * Set gain on each mixer device to a sensible value. 845 * Devices not normally used are turned off, and other devices 846 * are set to 75% volume. 847 */ 848 for (i = 0; i < ESS_NDEVS; i++) { 849 switch(i) { 850 case ESS_MIC_PLAY_VOL: 851 case ESS_LINE_PLAY_VOL: 852 case ESS_CD_PLAY_VOL: 853 case ESS_AUXB_PLAY_VOL: 854 case ESS_DAC_REC_VOL: 855 case ESS_LINE_REC_VOL: 856 case ESS_SYNTH_REC_VOL: 857 case ESS_CD_REC_VOL: 858 case ESS_AUXB_REC_VOL: 859 v = 0; 860 break; 861 default: 862 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4); 863 break; 864 } 865 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v; 866 ess_set_gain(sc, i, 1); 867 } 868 869 ess_setup(sc); 870 871 /* Disable the speaker until the device is opened. */ 872 ess_speaker_off(sc); 873 sc->spkr_state = SPKR_OFF; 874 875 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]); 876 sprintf(ess_device.version, "0x%04x", sc->sc_version); 877 878 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev); 879 880 #ifdef AUDIO_DEBUG 881 ess_printsc(sc); 882 #endif 883 } 884 885 /* 886 * Various routines to interface to higher level audio driver 887 */ 888 889 int 890 ess_open(addr, flags) 891 void *addr; 892 int flags; 893 { 894 struct ess_softc *sc = addr; 895 896 DPRINTF(("ess_open: sc=%p\n", sc)); 897 898 if (sc->sc_open != 0 || ess_reset(sc) != 0) 899 return ENXIO; 900 901 ess_setup(sc); /* because we did a reset */ 902 903 sc->sc_open = 1; 904 905 DPRINTF(("ess_open: opened\n")); 906 907 return (0); 908 } 909 910 void 911 ess_close(addr) 912 void *addr; 913 { 914 struct ess_softc *sc = addr; 915 916 DPRINTF(("ess_close: sc=%p\n", sc)); 917 918 sc->sc_open = 0; 919 ess_speaker_off(sc); 920 sc->spkr_state = SPKR_OFF; 921 ess_halt_output(sc); 922 ess_halt_input(sc); 923 sc->sc_in.intr = 0; 924 sc->sc_out.intr = 0; 925 926 DPRINTF(("ess_close: closed\n")); 927 } 928 929 /* 930 * Wait for FIFO to drain, and analog section to settle. 931 * XXX should check FIFO full bit. 932 */ 933 int 934 ess_drain(addr) 935 void *addr; 936 { 937 extern int hz; /* XXX */ 938 939 tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */ 940 return (0); 941 } 942 943 int 944 ess_speaker_ctl(addr, newstate) 945 void *addr; 946 int newstate; 947 { 948 struct ess_softc *sc = addr; 949 950 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) { 951 ess_speaker_on(sc); 952 sc->spkr_state = SPKR_ON; 953 } 954 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) { 955 ess_speaker_off(sc); 956 sc->spkr_state = SPKR_OFF; 957 } 958 return (0); 959 } 960 961 int 962 ess_getdev(addr, retp) 963 void *addr; 964 struct audio_device *retp; 965 { 966 *retp = ess_device; 967 return (0); 968 } 969 970 int 971 ess_query_encoding(addr, fp) 972 void *addr; 973 struct audio_encoding *fp; 974 { 975 /*struct ess_softc *sc = addr;*/ 976 977 switch (fp->index) { 978 case 0: 979 strcpy(fp->name, AudioEulinear); 980 fp->encoding = AUDIO_ENCODING_ULINEAR; 981 fp->precision = 8; 982 fp->flags = 0; 983 return (0); 984 case 1: 985 strcpy(fp->name, AudioEmulaw); 986 fp->encoding = AUDIO_ENCODING_ULAW; 987 fp->precision = 8; 988 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 989 return (0); 990 case 2: 991 strcpy(fp->name, AudioEalaw); 992 fp->encoding = AUDIO_ENCODING_ALAW; 993 fp->precision = 8; 994 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 995 return (0); 996 case 3: 997 strcpy(fp->name, AudioEslinear); 998 fp->encoding = AUDIO_ENCODING_SLINEAR; 999 fp->precision = 8; 1000 fp->flags = 0; 1001 return (0); 1002 case 4: 1003 strcpy(fp->name, AudioEslinear_le); 1004 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 1005 fp->precision = 16; 1006 fp->flags = 0; 1007 return (0); 1008 case 5: 1009 strcpy(fp->name, AudioEulinear_le); 1010 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 1011 fp->precision = 16; 1012 fp->flags = 0; 1013 return (0); 1014 case 6: 1015 strcpy(fp->name, AudioEslinear_be); 1016 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 1017 fp->precision = 16; 1018 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1019 return (0); 1020 case 7: 1021 strcpy(fp->name, AudioEulinear_be); 1022 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 1023 fp->precision = 16; 1024 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1025 return (0); 1026 default: 1027 return EINVAL; 1028 } 1029 return (0); 1030 } 1031 1032 int 1033 ess_set_params(addr, setmode, usemode, play, rec) 1034 void *addr; 1035 int setmode, usemode; 1036 struct audio_params *play, *rec; 1037 { 1038 struct ess_softc *sc = addr; 1039 struct audio_params *p; 1040 int mode; 1041 int rate; 1042 1043 DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode)); 1044 1045 /* 1046 * The ES1887 manual (page 39, `Full-Duplex DMA Mode') claims that in 1047 * full-duplex operation the sample rates must be the same for both 1048 * channels. This appears to be false; the only bit in common is the 1049 * clock source selection. However, we'll be conservative here. 1050 * - mycroft 1051 */ 1052 if (play->sample_rate != rec->sample_rate && 1053 usemode == (AUMODE_PLAY | AUMODE_RECORD)) { 1054 if (setmode == AUMODE_PLAY) { 1055 rec->sample_rate = play->sample_rate; 1056 setmode |= AUMODE_RECORD; 1057 } else if (setmode == AUMODE_RECORD) { 1058 play->sample_rate = rec->sample_rate; 1059 setmode |= AUMODE_PLAY; 1060 } else 1061 return (EINVAL); 1062 } 1063 1064 for (mode = AUMODE_RECORD; mode != -1; 1065 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1066 if ((setmode & mode) == 0) 1067 continue; 1068 1069 p = mode == AUMODE_PLAY ? play : rec; 1070 1071 if (p->sample_rate < ESS_MINRATE || 1072 p->sample_rate > ESS_MAXRATE || 1073 (p->precision != 8 && p->precision != 16) || 1074 (p->channels != 1 && p->channels != 2)) 1075 return (EINVAL); 1076 1077 p->factor = 1; 1078 p->sw_code = 0; 1079 switch (p->encoding) { 1080 case AUDIO_ENCODING_SLINEAR_BE: 1081 case AUDIO_ENCODING_ULINEAR_BE: 1082 if (p->precision == 16) 1083 p->sw_code = swap_bytes; 1084 break; 1085 case AUDIO_ENCODING_SLINEAR_LE: 1086 case AUDIO_ENCODING_ULINEAR_LE: 1087 break; 1088 case AUDIO_ENCODING_ULAW: 1089 if (mode == AUMODE_PLAY) { 1090 p->factor = 2; 1091 p->sw_code = mulaw_to_ulinear16; 1092 } else 1093 p->sw_code = ulinear8_to_mulaw; 1094 break; 1095 case AUDIO_ENCODING_ALAW: 1096 if (mode == AUMODE_PLAY) { 1097 p->factor = 2; 1098 p->sw_code = alaw_to_ulinear16; 1099 } else 1100 p->sw_code = ulinear8_to_alaw; 1101 break; 1102 default: 1103 return (EINVAL); 1104 } 1105 } 1106 1107 if (usemode == AUMODE_RECORD) 1108 rate = rec->sample_rate; 1109 else 1110 rate = play->sample_rate; 1111 1112 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(rate)); 1113 ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(rate)); 1114 1115 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(rate)); 1116 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(rate)); 1117 1118 return (0); 1119 } 1120 1121 int 1122 ess_trigger_output(addr, start, end, blksize, intr, arg, param) 1123 void *addr; 1124 void *start, *end; 1125 int blksize; 1126 void (*intr) __P((void *)); 1127 void *arg; 1128 struct audio_params *param; 1129 { 1130 struct ess_softc *sc = addr; 1131 1132 DPRINTFN(1, ("ess_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 1133 addr, start, end, blksize, intr, arg)); 1134 1135 #ifdef DIAGNOSTIC 1136 if (param->channels == 2 && (blksize & 1)) { 1137 DPRINTF(("stereo playback odd bytes (%d)\n", blksize)); 1138 return EIO; 1139 } 1140 if (sc->sc_out.active) 1141 panic("ess_trigger_output: already running"); 1142 #endif 1143 sc->sc_out.active = 1; 1144 1145 sc->sc_out.intr = intr; 1146 sc->sc_out.arg = arg; 1147 1148 if (param->precision * param->factor == 16) 1149 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1150 ESS_AUDIO2_CTRL2_FIFO_SIZE); 1151 else 1152 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1153 ESS_AUDIO2_CTRL2_FIFO_SIZE); 1154 1155 if (param->channels == 2) 1156 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1157 ESS_AUDIO2_CTRL2_CHANNELS); 1158 else 1159 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1160 ESS_AUDIO2_CTRL2_CHANNELS); 1161 1162 if (param->encoding == AUDIO_ENCODING_SLINEAR_BE || 1163 param->encoding == AUDIO_ENCODING_SLINEAR_LE) 1164 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1165 ESS_AUDIO2_CTRL2_FIFO_SIGNED); 1166 else 1167 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1168 ESS_AUDIO2_CTRL2_FIFO_SIGNED); 1169 1170 isa_dmastart(sc->sc_ic, sc->sc_out.drq, start, end - start, NULL, 1171 DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1172 1173 if (IS16BITDRQ(sc->sc_out.drq)) 1174 blksize >>= 1; /* use word count for 16 bit DMA */ 1175 /* Program transfer count registers with 2's complement of count. */ 1176 blksize = -blksize; 1177 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, blksize); 1178 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, blksize >> 8); 1179 1180 if (IS16BITDRQ(sc->sc_out.drq)) 1181 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1182 ESS_AUDIO2_CTRL1_XFER_SIZE); 1183 else 1184 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1185 ESS_AUDIO2_CTRL1_XFER_SIZE); 1186 1187 /* Use 8 bytes per output DMA. */ 1188 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1189 ESS_AUDIO2_CTRL1_DEMAND_8); 1190 1191 /* Start auto-init DMA */ 1192 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1193 ESS_AUDIO2_CTRL1_DAC_ENABLE | 1194 ESS_AUDIO2_CTRL1_FIFO_ENABLE | 1195 ESS_AUDIO2_CTRL1_AUTO_INIT); 1196 1197 return (0); 1198 1199 } 1200 1201 int 1202 ess_trigger_input(addr, start, end, blksize, intr, arg, param) 1203 void *addr; 1204 void *start, *end; 1205 int blksize; 1206 void (*intr) __P((void *)); 1207 void *arg; 1208 struct audio_params *param; 1209 { 1210 struct ess_softc *sc = addr; 1211 1212 DPRINTFN(1, ("ess_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 1213 addr, start, end, blksize, intr, arg)); 1214 1215 #ifdef DIAGNOSTIC 1216 if (param->channels == 2 && (blksize & 1)) { 1217 DPRINTF(("stereo record odd bytes (%d)\n", blksize)); 1218 return EIO; 1219 } 1220 if (sc->sc_in.active) 1221 panic("ess_trigger_input: already running"); 1222 #endif 1223 sc->sc_in.active = 1; 1224 1225 sc->sc_in.intr = intr; 1226 sc->sc_in.arg = arg; 1227 1228 if (param->precision * param->factor == 16) 1229 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1230 ESS_AUDIO1_CTRL1_FIFO_SIZE); 1231 else 1232 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1233 ESS_AUDIO1_CTRL1_FIFO_SIZE); 1234 1235 if (param->channels == 2) { 1236 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL, 1237 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) | 1238 ESS_AUDIO_CTRL_STEREO) &~ ESS_AUDIO_CTRL_MONO); 1239 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1240 ESS_AUDIO1_CTRL1_FIFO_STEREO); 1241 } else { 1242 ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL, 1243 (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) | 1244 ESS_AUDIO_CTRL_MONO) &~ ESS_AUDIO_CTRL_STEREO); 1245 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1246 ESS_AUDIO1_CTRL1_FIFO_STEREO); 1247 } 1248 1249 if (param->encoding == AUDIO_ENCODING_SLINEAR_BE || 1250 param->encoding == AUDIO_ENCODING_SLINEAR_LE) 1251 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1252 ESS_AUDIO1_CTRL1_FIFO_SIGNED); 1253 else 1254 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1255 ESS_AUDIO1_CTRL1_FIFO_SIGNED); 1256 1257 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */ 1258 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1, 1259 ESS_AUDIO1_CTRL1_FIFO_CONNECT); 1260 1261 isa_dmastart(sc->sc_ic, sc->sc_in.drq, start, end - start, NULL, 1262 DMAMODE_READ | DMAMODE_LOOP, BUS_DMA_NOWAIT); 1263 1264 if (IS16BITDRQ(sc->sc_in.drq)) 1265 blksize >>= 1; /* use word count for 16 bit DMA */ 1266 /* Program transfer count registers with 2's complement of count. */ 1267 blksize = -blksize; 1268 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, blksize); 1269 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, blksize >> 8); 1270 1271 /* Use 4 bytes per input DMA. */ 1272 ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL, 1273 ESS_DEMAND_CTRL_DEMAND_4); 1274 1275 /* Start auto-init DMA */ 1276 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2, 1277 ESS_AUDIO1_CTRL2_DMA_READ | 1278 ESS_AUDIO1_CTRL2_ADC_ENABLE | 1279 ESS_AUDIO1_CTRL2_FIFO_ENABLE | 1280 ESS_AUDIO1_CTRL2_AUTO_INIT); 1281 1282 return (0); 1283 1284 } 1285 1286 int 1287 ess_halt_output(addr) 1288 void *addr; 1289 { 1290 struct ess_softc *sc = addr; 1291 1292 DPRINTF(("ess_halt_output: sc=%p\n", sc)); 1293 1294 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 1295 ESS_AUDIO2_CTRL1_FIFO_ENABLE); 1296 1297 return (0); 1298 } 1299 1300 int 1301 ess_halt_input(addr) 1302 void *addr; 1303 { 1304 struct ess_softc *sc = addr; 1305 1306 DPRINTF(("ess_halt_input: sc=%p\n", sc)); 1307 1308 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2, 1309 ESS_AUDIO1_CTRL2_FIFO_ENABLE); 1310 1311 return (0); 1312 } 1313 1314 int 1315 ess_intr_output(arg) 1316 void *arg; 1317 { 1318 struct ess_softc *sc = arg; 1319 1320 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr)); 1321 1322 /* clear interrupt on Audio channel 2 */ 1323 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 1324 ESS_AUDIO2_CTRL2_IRQ_LATCH); 1325 1326 sc->sc_out.nintr++; 1327 1328 if (sc->sc_out.intr != 0) 1329 (*sc->sc_out.intr)(sc->sc_out.arg); 1330 else 1331 return (0); 1332 1333 return (1); 1334 } 1335 1336 int 1337 ess_intr_input(arg) 1338 void *arg; 1339 { 1340 struct ess_softc *sc = arg; 1341 u_char x; 1342 1343 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr)); 1344 1345 /* clear interrupt on Audio channel 1*/ 1346 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR); 1347 1348 sc->sc_in.nintr++; 1349 1350 if (sc->sc_in.intr != 0) 1351 (*sc->sc_in.intr)(sc->sc_in.arg); 1352 else 1353 return (0); 1354 1355 return (1); 1356 } 1357 1358 int 1359 ess_round_blocksize(addr, blk) 1360 void *addr; 1361 int blk; 1362 { 1363 return (blk & -8); /* round for max DMA size */ 1364 } 1365 1366 int 1367 ess_set_port(addr, cp) 1368 void *addr; 1369 mixer_ctrl_t *cp; 1370 { 1371 struct ess_softc *sc = addr; 1372 int lgain, rgain; 1373 1374 DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n", 1375 cp->dev, cp->un.value.num_channels)); 1376 1377 switch (cp->dev) { 1378 /* 1379 * The following mixer ports are all stereo. If we get a 1380 * single-channel gain value passed in, then we duplicate it 1381 * to both left and right channels. 1382 */ 1383 case ESS_MASTER_VOL: 1384 case ESS_DAC_PLAY_VOL: 1385 case ESS_MIC_PLAY_VOL: 1386 case ESS_LINE_PLAY_VOL: 1387 case ESS_SYNTH_PLAY_VOL: 1388 case ESS_CD_PLAY_VOL: 1389 case ESS_AUXB_PLAY_VOL: 1390 case ESS_DAC_REC_VOL: 1391 case ESS_MIC_REC_VOL: 1392 case ESS_LINE_REC_VOL: 1393 case ESS_SYNTH_REC_VOL: 1394 case ESS_CD_REC_VOL: 1395 case ESS_AUXB_REC_VOL: 1396 case ESS_RECORD_VOL: 1397 if (cp->type != AUDIO_MIXER_VALUE) 1398 return EINVAL; 1399 1400 switch (cp->un.value.num_channels) { 1401 case 1: 1402 lgain = rgain = ESS_4BIT_GAIN( 1403 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 1404 break; 1405 case 2: 1406 lgain = ESS_4BIT_GAIN( 1407 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]); 1408 rgain = ESS_4BIT_GAIN( 1409 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]); 1410 break; 1411 default: 1412 return EINVAL; 1413 } 1414 1415 sc->gain[cp->dev][ESS_LEFT] = lgain; 1416 sc->gain[cp->dev][ESS_RIGHT] = rgain; 1417 1418 ess_set_gain(sc, cp->dev, 1); 1419 break; 1420 1421 1422 /* 1423 * The PC speaker port is mono. If we get a stereo gain value 1424 * passed in, then we return EINVAL. 1425 */ 1426 case ESS_PCSPEAKER_VOL: 1427 if (cp->un.value.num_channels != 1) 1428 return EINVAL; 1429 1430 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] = 1431 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 1432 ess_set_gain(sc, cp->dev, 1); 1433 break; 1434 1435 1436 case ESS_MIC_PREAMP: 1437 if (cp->type != AUDIO_MIXER_ENUM) 1438 return EINVAL; 1439 1440 if (cp->un.ord) 1441 /* Enable microphone preamp */ 1442 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL, 1443 ESS_PREAMP_CTRL_ENABLE); 1444 else 1445 /* Disable microphone preamp */ 1446 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL, 1447 ESS_PREAMP_CTRL_ENABLE); 1448 break; 1449 1450 case ESS_RECORD_SOURCE: 1451 if (cp->type == AUDIO_MIXER_SET) 1452 return ess_set_in_ports(sc, cp->un.mask); 1453 else 1454 return EINVAL; 1455 break; 1456 1457 case ESS_RECORD_MONITOR: 1458 if (cp->type != AUDIO_MIXER_ENUM) 1459 return EINVAL; 1460 1461 if (cp->un.ord) 1462 /* Enable monitor */ 1463 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1464 ESS_AUDIO_CTRL_MONITOR); 1465 else 1466 /* Disable monitor */ 1467 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL, 1468 ESS_AUDIO_CTRL_MONITOR); 1469 break; 1470 1471 default: 1472 return EINVAL; 1473 } 1474 1475 return (0); 1476 } 1477 1478 int 1479 ess_get_port(addr, cp) 1480 void *addr; 1481 mixer_ctrl_t *cp; 1482 { 1483 struct ess_softc *sc = addr; 1484 1485 DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev)); 1486 1487 switch (cp->dev) { 1488 case ESS_DAC_PLAY_VOL: 1489 case ESS_MIC_PLAY_VOL: 1490 case ESS_LINE_PLAY_VOL: 1491 case ESS_SYNTH_PLAY_VOL: 1492 case ESS_CD_PLAY_VOL: 1493 case ESS_AUXB_PLAY_VOL: 1494 case ESS_MASTER_VOL: 1495 case ESS_PCSPEAKER_VOL: 1496 case ESS_DAC_REC_VOL: 1497 case ESS_MIC_REC_VOL: 1498 case ESS_LINE_REC_VOL: 1499 case ESS_SYNTH_REC_VOL: 1500 case ESS_CD_REC_VOL: 1501 case ESS_AUXB_REC_VOL: 1502 case ESS_RECORD_VOL: 1503 if (cp->dev == ESS_PCSPEAKER_VOL && 1504 cp->un.value.num_channels != 1) 1505 return EINVAL; 1506 1507 switch (cp->un.value.num_channels) { 1508 case 1: 1509 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1510 sc->gain[cp->dev][ESS_LEFT]; 1511 break; 1512 case 2: 1513 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 1514 sc->gain[cp->dev][ESS_LEFT]; 1515 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 1516 sc->gain[cp->dev][ESS_RIGHT]; 1517 break; 1518 default: 1519 return EINVAL; 1520 } 1521 break; 1522 1523 case ESS_MIC_PREAMP: 1524 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) & 1525 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0; 1526 break; 1527 1528 case ESS_RECORD_SOURCE: 1529 cp->un.mask = sc->in_mask; 1530 break; 1531 1532 case ESS_RECORD_MONITOR: 1533 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) & 1534 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0; 1535 break; 1536 1537 default: 1538 return EINVAL; 1539 } 1540 1541 return (0); 1542 } 1543 1544 int 1545 ess_query_devinfo(addr, dip) 1546 void *addr; 1547 mixer_devinfo_t *dip; 1548 { 1549 #ifdef AUDIO_DEBUG 1550 struct ess_softc *sc = addr; 1551 #endif 1552 1553 DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n", 1554 sc->sc_model, dip->index)); 1555 1556 /* 1557 * REVISIT: There are some slight differences between the 1558 * mixers on the different ESS chips, which can 1559 * be sorted out using the chip model rather than a 1560 * separate mixer model. 1561 * This is currently coded assuming an ES1887; we 1562 * need to work out which bits are not applicable to 1563 * the other models (1888 and 888). 1564 */ 1565 switch (dip->index) { 1566 case ESS_DAC_PLAY_VOL: 1567 dip->type = AUDIO_MIXER_VALUE; 1568 dip->mixer_class = ESS_INPUT_CLASS; 1569 dip->prev = AUDIO_MIXER_LAST; 1570 dip->next = AUDIO_MIXER_LAST; 1571 strcpy(dip->label.name, AudioNdac); 1572 dip->un.v.num_channels = 2; 1573 strcpy(dip->un.v.units.name, AudioNvolume); 1574 return (0); 1575 1576 case ESS_MIC_PLAY_VOL: 1577 dip->type = AUDIO_MIXER_VALUE; 1578 dip->mixer_class = ESS_INPUT_CLASS; 1579 dip->prev = AUDIO_MIXER_LAST; 1580 dip->next = ESS_MIC_PREAMP; 1581 strcpy(dip->label.name, AudioNmicrophone); 1582 dip->un.v.num_channels = 2; 1583 strcpy(dip->un.v.units.name, AudioNvolume); 1584 return (0); 1585 1586 case ESS_LINE_PLAY_VOL: 1587 dip->type = AUDIO_MIXER_VALUE; 1588 dip->mixer_class = ESS_INPUT_CLASS; 1589 dip->prev = AUDIO_MIXER_LAST; 1590 dip->next = AUDIO_MIXER_LAST; 1591 strcpy(dip->label.name, AudioNline); 1592 dip->un.v.num_channels = 2; 1593 strcpy(dip->un.v.units.name, AudioNvolume); 1594 return (0); 1595 1596 case ESS_SYNTH_PLAY_VOL: 1597 dip->type = AUDIO_MIXER_VALUE; 1598 dip->mixer_class = ESS_INPUT_CLASS; 1599 dip->prev = AUDIO_MIXER_LAST; 1600 dip->next = AUDIO_MIXER_LAST; 1601 strcpy(dip->label.name, AudioNfmsynth); 1602 dip->un.v.num_channels = 2; 1603 strcpy(dip->un.v.units.name, AudioNvolume); 1604 return (0); 1605 1606 case ESS_CD_PLAY_VOL: 1607 dip->type = AUDIO_MIXER_VALUE; 1608 dip->mixer_class = ESS_INPUT_CLASS; 1609 dip->prev = AUDIO_MIXER_LAST; 1610 dip->next = AUDIO_MIXER_LAST; 1611 strcpy(dip->label.name, AudioNcd); 1612 dip->un.v.num_channels = 2; 1613 strcpy(dip->un.v.units.name, AudioNvolume); 1614 return (0); 1615 1616 case ESS_AUXB_PLAY_VOL: 1617 dip->type = AUDIO_MIXER_VALUE; 1618 dip->mixer_class = ESS_INPUT_CLASS; 1619 dip->prev = AUDIO_MIXER_LAST; 1620 dip->next = AUDIO_MIXER_LAST; 1621 strcpy(dip->label.name, "auxb"); 1622 dip->un.v.num_channels = 2; 1623 strcpy(dip->un.v.units.name, AudioNvolume); 1624 return (0); 1625 1626 case ESS_INPUT_CLASS: 1627 dip->type = AUDIO_MIXER_CLASS; 1628 dip->mixer_class = ESS_INPUT_CLASS; 1629 dip->next = dip->prev = AUDIO_MIXER_LAST; 1630 strcpy(dip->label.name, AudioCinputs); 1631 return (0); 1632 1633 1634 case ESS_MASTER_VOL: 1635 dip->type = AUDIO_MIXER_VALUE; 1636 dip->mixer_class = ESS_OUTPUT_CLASS; 1637 dip->prev = dip->next = AUDIO_MIXER_LAST; 1638 strcpy(dip->label.name, AudioNmaster); 1639 dip->un.v.num_channels = 2; 1640 strcpy(dip->un.v.units.name, AudioNvolume); 1641 return (0); 1642 1643 case ESS_PCSPEAKER_VOL: 1644 dip->type = AUDIO_MIXER_VALUE; 1645 dip->mixer_class = ESS_OUTPUT_CLASS; 1646 dip->prev = AUDIO_MIXER_LAST; 1647 dip->next = AUDIO_MIXER_LAST; 1648 strcpy(dip->label.name, "pc_speaker"); 1649 dip->un.v.num_channels = 1; 1650 strcpy(dip->un.v.units.name, AudioNvolume); 1651 return (0); 1652 1653 case ESS_OUTPUT_CLASS: 1654 dip->type = AUDIO_MIXER_CLASS; 1655 dip->mixer_class = ESS_OUTPUT_CLASS; 1656 dip->next = dip->prev = AUDIO_MIXER_LAST; 1657 strcpy(dip->label.name, AudioCoutputs); 1658 return (0); 1659 1660 1661 case ESS_DAC_REC_VOL: 1662 dip->type = AUDIO_MIXER_VALUE; 1663 dip->mixer_class = ESS_RECORD_CLASS; 1664 dip->prev = AUDIO_MIXER_LAST; 1665 dip->next = AUDIO_MIXER_LAST; 1666 strcpy(dip->label.name, AudioNdac); 1667 dip->un.v.num_channels = 2; 1668 strcpy(dip->un.v.units.name, AudioNvolume); 1669 return (0); 1670 1671 case ESS_MIC_REC_VOL: 1672 dip->type = AUDIO_MIXER_VALUE; 1673 dip->mixer_class = ESS_RECORD_CLASS; 1674 dip->prev = AUDIO_MIXER_LAST; 1675 dip->next = AUDIO_MIXER_LAST; 1676 strcpy(dip->label.name, AudioNmicrophone); 1677 dip->un.v.num_channels = 2; 1678 strcpy(dip->un.v.units.name, AudioNvolume); 1679 return (0); 1680 1681 case ESS_LINE_REC_VOL: 1682 dip->type = AUDIO_MIXER_VALUE; 1683 dip->mixer_class = ESS_RECORD_CLASS; 1684 dip->prev = AUDIO_MIXER_LAST; 1685 dip->next = AUDIO_MIXER_LAST; 1686 strcpy(dip->label.name, AudioNline); 1687 dip->un.v.num_channels = 2; 1688 strcpy(dip->un.v.units.name, AudioNvolume); 1689 return (0); 1690 1691 case ESS_SYNTH_REC_VOL: 1692 dip->type = AUDIO_MIXER_VALUE; 1693 dip->mixer_class = ESS_RECORD_CLASS; 1694 dip->prev = AUDIO_MIXER_LAST; 1695 dip->next = AUDIO_MIXER_LAST; 1696 strcpy(dip->label.name, AudioNfmsynth); 1697 dip->un.v.num_channels = 2; 1698 strcpy(dip->un.v.units.name, AudioNvolume); 1699 return (0); 1700 1701 case ESS_CD_REC_VOL: 1702 dip->type = AUDIO_MIXER_VALUE; 1703 dip->mixer_class = ESS_RECORD_CLASS; 1704 dip->prev = AUDIO_MIXER_LAST; 1705 dip->next = AUDIO_MIXER_LAST; 1706 strcpy(dip->label.name, AudioNcd); 1707 dip->un.v.num_channels = 2; 1708 strcpy(dip->un.v.units.name, AudioNvolume); 1709 return (0); 1710 1711 case ESS_AUXB_REC_VOL: 1712 dip->type = AUDIO_MIXER_VALUE; 1713 dip->mixer_class = ESS_RECORD_CLASS; 1714 dip->prev = AUDIO_MIXER_LAST; 1715 dip->next = AUDIO_MIXER_LAST; 1716 strcpy(dip->label.name, "auxb"); 1717 dip->un.v.num_channels = 2; 1718 strcpy(dip->un.v.units.name, AudioNvolume); 1719 return (0); 1720 1721 case ESS_MIC_PREAMP: 1722 dip->type = AUDIO_MIXER_ENUM; 1723 dip->mixer_class = ESS_INPUT_CLASS; 1724 dip->prev = ESS_MIC_PLAY_VOL; 1725 dip->next = AUDIO_MIXER_LAST; 1726 strcpy(dip->label.name, AudioNpreamp); 1727 dip->un.e.num_mem = 2; 1728 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1729 dip->un.e.member[0].ord = 0; 1730 strcpy(dip->un.e.member[1].label.name, AudioNon); 1731 dip->un.e.member[1].ord = 1; 1732 return (0); 1733 1734 case ESS_RECORD_VOL: 1735 dip->type = AUDIO_MIXER_VALUE; 1736 dip->mixer_class = ESS_RECORD_CLASS; 1737 dip->prev = AUDIO_MIXER_LAST; 1738 dip->next = AUDIO_MIXER_LAST; 1739 strcpy(dip->label.name, AudioNrecord); 1740 dip->un.v.num_channels = 2; 1741 strcpy(dip->un.v.units.name, AudioNvolume); 1742 return (0); 1743 1744 case ESS_RECORD_SOURCE: 1745 dip->mixer_class = ESS_RECORD_CLASS; 1746 dip->prev = dip->next = AUDIO_MIXER_LAST; 1747 strcpy(dip->label.name, AudioNsource); 1748 dip->type = AUDIO_MIXER_SET; 1749 dip->un.s.num_mem = 6; 1750 strcpy(dip->un.s.member[0].label.name, AudioNdac); 1751 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL; 1752 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone); 1753 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL; 1754 strcpy(dip->un.s.member[2].label.name, AudioNline); 1755 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL; 1756 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1757 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL; 1758 strcpy(dip->un.s.member[4].label.name, AudioNcd); 1759 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL; 1760 strcpy(dip->un.s.member[5].label.name, "auxb"); 1761 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL; 1762 return (0); 1763 1764 case ESS_RECORD_CLASS: 1765 dip->type = AUDIO_MIXER_CLASS; 1766 dip->mixer_class = ESS_RECORD_CLASS; 1767 dip->next = dip->prev = AUDIO_MIXER_LAST; 1768 strcpy(dip->label.name, AudioCrecord); 1769 return (0); 1770 1771 1772 case ESS_RECORD_MONITOR: 1773 dip->mixer_class = ESS_MONITOR_CLASS; 1774 dip->prev = dip->next = AUDIO_MIXER_LAST; 1775 strcpy(dip->label.name, AudioNmonitor); 1776 dip->type = AUDIO_MIXER_ENUM; 1777 dip->un.e.num_mem = 2; 1778 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1779 dip->un.e.member[0].ord = 0; 1780 strcpy(dip->un.e.member[1].label.name, AudioNon); 1781 dip->un.e.member[1].ord = 1; 1782 return (0); 1783 1784 case ESS_MONITOR_CLASS: 1785 dip->type = AUDIO_MIXER_CLASS; 1786 dip->mixer_class = ESS_MONITOR_CLASS; 1787 dip->next = dip->prev = AUDIO_MIXER_LAST; 1788 strcpy(dip->label.name, AudioCmonitor); 1789 return (0); 1790 } 1791 1792 return (ENXIO); 1793 } 1794 1795 void * 1796 ess_malloc(addr, size, pool, flags) 1797 void *addr; 1798 unsigned long size; 1799 int pool; 1800 int flags; 1801 { 1802 struct ess_softc *sc = addr; 1803 1804 return isa_malloc(sc->sc_ic, 4, size, pool, flags); 1805 } 1806 1807 void 1808 ess_free(addr, ptr, pool) 1809 void *addr; 1810 void *ptr; 1811 int pool; 1812 { 1813 isa_free(ptr, pool); 1814 } 1815 1816 unsigned long 1817 ess_round(addr, size) 1818 void *addr; 1819 unsigned long size; 1820 { 1821 if (size > MAX_ISADMA) 1822 size = MAX_ISADMA; 1823 return size; 1824 } 1825 1826 int 1827 ess_mappage(addr, mem, off, prot) 1828 void *addr; 1829 void *mem; 1830 int off; 1831 int prot; 1832 { 1833 return (isa_mappage(mem, off, prot)); 1834 } 1835 1836 int 1837 ess_get_props(addr) 1838 void *addr; 1839 { 1840 struct ess_softc *sc = addr; 1841 1842 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1843 (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0)); 1844 } 1845 1846 /* ============================================ 1847 * Generic functions for ess, not used by audio h/w i/f 1848 * ============================================= 1849 */ 1850 1851 /* 1852 * Reset the chip. 1853 * Return non-zero if the chip isn't detected. 1854 */ 1855 int 1856 ess_reset(sc) 1857 struct ess_softc *sc; 1858 { 1859 bus_space_tag_t iot = sc->sc_iot; 1860 bus_space_handle_t ioh = sc->sc_ioh; 1861 1862 sc->sc_in.intr = 0; 1863 if (sc->sc_in.active) { 1864 isa_dmaabort(sc->sc_ic, sc->sc_in.drq); 1865 sc->sc_in.active = 0; 1866 } 1867 1868 sc->sc_out.intr = 0; 1869 if (sc->sc_out.active) { 1870 isa_dmaabort(sc->sc_ic, sc->sc_out.drq); 1871 sc->sc_out.active = 0; 1872 } 1873 1874 EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT); 1875 delay(10000); 1876 EWRITE1(iot, ioh, ESS_DSP_RESET, 0); 1877 if (ess_rdsp(sc) != ESS_MAGIC) 1878 return (1); 1879 1880 /* Enable access to the ESS extension commands. */ 1881 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT); 1882 1883 return (0); 1884 } 1885 1886 void 1887 ess_set_gain(sc, port, on) 1888 struct ess_softc *sc; 1889 int port; 1890 int on; 1891 { 1892 int gain, left, right; 1893 int mix; 1894 int src; 1895 int stereo; 1896 1897 /* 1898 * Most gain controls are found in the mixer registers and 1899 * are stereo. Any that are not, must set mix and stereo as 1900 * required. 1901 */ 1902 mix = 1; 1903 stereo = 1; 1904 1905 switch (port) { 1906 case ESS_MASTER_VOL: 1907 src = 0x32; 1908 break; 1909 case ESS_DAC_PLAY_VOL: 1910 src = 0x7C; 1911 break; 1912 case ESS_MIC_PLAY_VOL: 1913 src = 0x1A; 1914 break; 1915 case ESS_LINE_PLAY_VOL: 1916 src = 0x3E; 1917 break; 1918 case ESS_SYNTH_PLAY_VOL: 1919 src = 0x36; 1920 break; 1921 case ESS_CD_PLAY_VOL: 1922 src = 0x38; 1923 break; 1924 case ESS_AUXB_PLAY_VOL: 1925 src = 0x3A; 1926 break; 1927 case ESS_PCSPEAKER_VOL: 1928 src = 0x3C; 1929 stereo = 0; 1930 break; 1931 case ESS_DAC_REC_VOL: 1932 src = 0x69; 1933 break; 1934 case ESS_MIC_REC_VOL: 1935 src = 0x68; 1936 break; 1937 case ESS_LINE_REC_VOL: 1938 src = 0x6E; 1939 break; 1940 case ESS_SYNTH_REC_VOL: 1941 src = 0x6B; 1942 break; 1943 case ESS_CD_REC_VOL: 1944 src = 0x6A; 1945 break; 1946 case ESS_AUXB_REC_VOL: 1947 src = 0x6C; 1948 break; 1949 case ESS_RECORD_VOL: 1950 src = 0xB4; 1951 mix = 0; 1952 break; 1953 default: 1954 return; 1955 } 1956 1957 if (on) { 1958 left = sc->gain[port][ESS_LEFT]; 1959 right = sc->gain[port][ESS_RIGHT]; 1960 } else { 1961 left = right = 0; 1962 } 1963 1964 if (stereo) 1965 gain = ESS_STEREO_GAIN(left, right); 1966 else 1967 gain = ESS_MONO_GAIN(left); 1968 1969 if (mix) 1970 ess_write_mix_reg(sc, src, gain); 1971 else 1972 ess_write_x_reg(sc, src, gain); 1973 } 1974 1975 int 1976 ess_set_in_ports(sc, mask) 1977 struct ess_softc *sc; 1978 int mask; 1979 { 1980 mixer_devinfo_t di; 1981 int i; 1982 int port; 1983 int tmp; 1984 1985 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask)); 1986 1987 /* 1988 * Get the device info for the record source control, 1989 * including the list of available sources. 1990 */ 1991 di.index = ESS_RECORD_SOURCE; 1992 if (ess_query_devinfo(sc, &di)) 1993 return EINVAL; 1994 1995 /* 1996 * Set or disable the record volume control for each of the 1997 * possible sources. 1998 */ 1999 for (i = 0; i < di.un.s.num_mem; i++) 2000 { 2001 /* 2002 * Calculate the source port number from its mask. 2003 */ 2004 tmp = di.un.s.member[i].mask >> 1; 2005 for (port = 0; tmp; port++) { 2006 tmp >>= 1; 2007 } 2008 2009 /* 2010 * Set the source gain: 2011 * to the current value if source is enabled 2012 * to zero if source is disabled 2013 */ 2014 ess_set_gain(sc, port, mask & di.un.s.member[i].mask); 2015 } 2016 2017 sc->in_mask = mask; 2018 2019 /* 2020 * We have to fake a single port since the upper layer expects 2021 * one only. We choose the lowest numbered port that is enabled. 2022 */ 2023 for(i = 0; i < ESS_NPORT; i++) { 2024 if (mask & (1 << i)) { 2025 sc->in_port = i; 2026 break; 2027 } 2028 } 2029 2030 return (0); 2031 } 2032 2033 void 2034 ess_speaker_on(sc) 2035 struct ess_softc *sc; 2036 { 2037 /* Disable mute on left- and right-master volume. */ 2038 ess_clear_mreg_bits(sc, 0x60, 0x40); 2039 ess_clear_mreg_bits(sc, 0x62, 0x40); 2040 } 2041 2042 void 2043 ess_speaker_off(sc) 2044 struct ess_softc *sc; 2045 { 2046 /* Enable mute on left- and right-master volume. */ 2047 ess_set_mreg_bits(sc, 0x60, 0x40); 2048 ess_set_mreg_bits(sc, 0x62, 0x40); 2049 } 2050 2051 /* 2052 * Calculate the time constant for the requested sampling rate. 2053 */ 2054 u_int 2055 ess_srtotc(rate) 2056 u_int rate; 2057 { 2058 u_int tc; 2059 2060 /* The following formulae are from the ESS data sheet. */ 2061 if (rate <= 22050) 2062 tc = 128 - 397700L / rate; 2063 else 2064 tc = 256 - 795500L / rate; 2065 2066 return (tc); 2067 } 2068 2069 2070 /* 2071 * Calculate the filter constant for the reuqested sampling rate. 2072 */ 2073 u_int 2074 ess_srtofc(rate) 2075 u_int rate; 2076 { 2077 /* 2078 * The following formula is derived from the information in 2079 * the ES1887 data sheet, based on a roll-off frequency of 2080 * 87%. 2081 */ 2082 return (256 - 200279L / rate); 2083 } 2084 2085 2086 /* 2087 * Return the status of the DSP. 2088 */ 2089 u_char 2090 ess_get_dsp_status(sc) 2091 struct ess_softc *sc; 2092 { 2093 bus_space_tag_t iot = sc->sc_iot; 2094 bus_space_handle_t ioh = sc->sc_ioh; 2095 2096 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS)); 2097 } 2098 2099 2100 /* 2101 * Return the read status of the DSP: 1 -> DSP ready for reading 2102 * 0 -> DSP not ready for reading 2103 */ 2104 u_char 2105 ess_dsp_read_ready(sc) 2106 struct ess_softc *sc; 2107 { 2108 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) == 2109 ESS_DSP_READ_READY) ? 1 : 0); 2110 } 2111 2112 2113 /* 2114 * Return the write status of the DSP: 1 -> DSP ready for writing 2115 * 0 -> DSP not ready for writing 2116 */ 2117 u_char 2118 ess_dsp_write_ready(sc) 2119 struct ess_softc *sc; 2120 { 2121 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) == 2122 ESS_DSP_WRITE_READY) ? 1 : 0); 2123 } 2124 2125 2126 /* 2127 * Read a byte from the DSP. 2128 */ 2129 int 2130 ess_rdsp(sc) 2131 struct ess_softc *sc; 2132 { 2133 bus_space_tag_t iot = sc->sc_iot; 2134 bus_space_handle_t ioh = sc->sc_ioh; 2135 int i; 2136 2137 for (i = ESS_READ_TIMEOUT; i > 0; --i) { 2138 if (ess_dsp_read_ready(sc)) { 2139 i = EREAD1(iot, ioh, ESS_DSP_READ); 2140 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i)); 2141 return i; 2142 } else 2143 delay(10); 2144 } 2145 2146 DPRINTF(("ess_rdsp: timed out\n")); 2147 return (-1); 2148 } 2149 2150 /* 2151 * Write a byte to the DSP. 2152 */ 2153 int 2154 ess_wdsp(sc, v) 2155 struct ess_softc *sc; 2156 u_char v; 2157 { 2158 bus_space_tag_t iot = sc->sc_iot; 2159 bus_space_handle_t ioh = sc->sc_ioh; 2160 int i; 2161 2162 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v)); 2163 2164 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) { 2165 if (ess_dsp_write_ready(sc)) { 2166 EWRITE1(iot, ioh, ESS_DSP_WRITE, v); 2167 return (0); 2168 } else 2169 delay(10); 2170 } 2171 2172 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v)); 2173 return (-1); 2174 } 2175 2176 /* 2177 * Write a value to one of the ESS extended registers. 2178 */ 2179 int 2180 ess_write_x_reg(sc, reg, val) 2181 struct ess_softc *sc; 2182 u_char reg; 2183 u_char val; 2184 { 2185 int error; 2186 2187 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val)); 2188 if ((error = ess_wdsp(sc, reg)) == 0) 2189 error = ess_wdsp(sc, val); 2190 2191 return error; 2192 } 2193 2194 /* 2195 * Read the value of one of the ESS extended registers. 2196 */ 2197 u_char 2198 ess_read_x_reg(sc, reg) 2199 struct ess_softc *sc; 2200 u_char reg; 2201 { 2202 int error; 2203 int val; 2204 2205 if ((error = ess_wdsp(sc, 0xC0)) == 0) 2206 error = ess_wdsp(sc, reg); 2207 if (error) 2208 DPRINTF(("Error reading extended register 0x%02x\n", reg)); 2209 /* REVISIT: what if an error is returned above? */ 2210 val = ess_rdsp(sc); 2211 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val)); 2212 return val; 2213 } 2214 2215 void 2216 ess_clear_xreg_bits(sc, reg, mask) 2217 struct ess_softc *sc; 2218 u_char reg; 2219 u_char mask; 2220 { 2221 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1) 2222 DPRINTF(("Error clearing bits in extended register 0x%02x\n", 2223 reg)); 2224 } 2225 2226 void 2227 ess_set_xreg_bits(sc, reg, mask) 2228 struct ess_softc *sc; 2229 u_char reg; 2230 u_char mask; 2231 { 2232 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1) 2233 DPRINTF(("Error setting bits in extended register 0x%02x\n", 2234 reg)); 2235 } 2236 2237 2238 /* 2239 * Write a value to one of the ESS mixer registers. 2240 */ 2241 void 2242 ess_write_mix_reg(sc, reg, val) 2243 struct ess_softc *sc; 2244 u_char reg; 2245 u_char val; 2246 { 2247 bus_space_tag_t iot = sc->sc_iot; 2248 bus_space_handle_t ioh = sc->sc_ioh; 2249 int s; 2250 2251 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val)); 2252 2253 s = splaudio(); 2254 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg); 2255 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val); 2256 splx(s); 2257 } 2258 2259 /* 2260 * Read the value of one of the ESS mixer registers. 2261 */ 2262 u_char 2263 ess_read_mix_reg(sc, reg) 2264 struct ess_softc *sc; 2265 u_char reg; 2266 { 2267 bus_space_tag_t iot = sc->sc_iot; 2268 bus_space_handle_t ioh = sc->sc_ioh; 2269 int s; 2270 u_char val; 2271 2272 s = splaudio(); 2273 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg); 2274 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA); 2275 splx(s); 2276 2277 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val)); 2278 return val; 2279 } 2280 2281 void 2282 ess_clear_mreg_bits(sc, reg, mask) 2283 struct ess_softc *sc; 2284 u_char reg; 2285 u_char mask; 2286 { 2287 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask); 2288 } 2289 2290 void 2291 ess_set_mreg_bits(sc, reg, mask) 2292 struct ess_softc *sc; 2293 u_char reg; 2294 u_char mask; 2295 { 2296 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask); 2297 } 2298
Indexes created Tue Sep 23 02:09:52 GMT 2025