ess.c revision 1.4 1 /* $NetBSD: ess.c,v 1.4 1998/07/31 15:17:17 augustss Exp $ */
2
3 /*
4 * Copyright 1997
5 * Digital Equipment Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and
8 * copied only in accordance with the following terms and conditions.
9 * Subject to these conditions, you may download, copy, install,
10 * use, modify and distribute this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce
14 * and retain this copyright notice and list of conditions as
15 * they appear in the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 * Digital Equipment Corporation. Neither the "Digital Equipment
19 * Corporation" name nor any trademark or logo of Digital Equipment
20 * Corporation may be used to endorse or promote products derived
21 * from this software without the prior written permission of
22 * Digital Equipment Corporation.
23 *
24 * 3) This software is provided "AS-IS" and any express or implied
25 * warranties, including but not limited to, any implied warranties
26 * of merchantability, fitness for a particular purpose, or
27 * non-infringement are disclaimed. In no event shall DIGITAL be
28 * liable for any damages whatsoever, and in particular, DIGITAL
29 * shall not be liable for special, indirect, consequential, or
30 * incidental damages or damages for lost profits, loss of
31 * revenue or loss of use, whether such damages arise in contract,
32 * negligence, tort, under statute, in equity, at law or otherwise,
33 * even if advised of the possibility of such damage.
34 */
35
36 /*
37 **++
38 **
39 ** ess.c
40 **
41 ** FACILITY:
42 **
43 ** DIGITAL Network Appliance Reference Design (DNARD)
44 **
45 ** MODULE DESCRIPTION:
46 **
47 ** This module contains the device driver for the ESS
48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
49 ** used as a reference point when implementing this driver.
50 **
51 ** AUTHORS:
52 **
53 ** Blair Fidler Software Engineering Australia
54 ** Gold Coast, Australia.
55 **
56 ** CREATION DATE:
57 **
58 ** March 10, 1997.
59 **
60 ** MODIFICATION HISTORY:
61 **
62 **--
63 */
64
65 /*
66 * Modification by Lennart Augustsson:
67 * Adapt for bus dma.
68 * Change to 1.3 audio interface.
69 * Major cleanup.
70 */
71
72 /*
73 * TODO (falling priority):
74 * - add looping DMA (copy from sbdsp.c).
75 * - avoid using wired in IRQ/DRQ levels.
76 * - look over how the two channels are set up, it's rather messy now.
77 */
78
79 #include <sys/param.h>
80 #include <sys/systm.h>
81 #include <sys/errno.h>
82 #include <sys/ioctl.h>
83 #include <sys/syslog.h>
84 #include <sys/device.h>
85 #include <sys/proc.h>
86
87 #include <machine/cpu.h>
88 #include <machine/intr.h>
89 #include <machine/pio.h>
90
91 #include <sys/audioio.h>
92 #include <dev/audio_if.h>
93 #include <dev/auconv.h>
94 #include <dev/mulaw.h>
95
96 #include <dev/isa/isavar.h>
97 #include <dev/isa/isadmavar.h>
98
99 #include <dev/isa/essvar.h>
100 #include <dev/isa/essreg.h>
101
102 #ifdef AUDIO_DEBUG
103 #define DPRINTF(x) if (essdebug) printf x
104 #define DPRINTFN(n,x) if (essdebug>(n)) printf x
105 int essdebug = 0;
106 #else
107 #define DPRINTF(x)
108 #define DPRINTFN(n,x)
109 #endif
110
111 #if 0
112 unsigned uuu;
113 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu)
114 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d))
115 #else
116 #define EREAD1(t, h, a) bus_space_read_1(t, h, a)
117 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d)
118 #endif
119
120
121 int ess_setup_sc __P((struct ess_softc *, int));
122
123 int ess_open __P((void *, int));
124 void ess_close __P((void *));
125 int ess_getdev __P((void *, struct audio_device *));
126 int ess_drain __P((void *));
127
128 int ess_query_encoding __P((void *, struct audio_encoding *));
129
130 int ess_set_params __P((void *, int, int, struct audio_params *,
131 struct audio_params *));
132 int ess_set_in_sr __P((void *, u_long));
133 int ess_set_out_sr __P((void *, u_long));
134 int ess_set_in_precision __P((void *, u_int));
135 int ess_set_out_precision __P((void *, u_int));
136 int ess_set_in_channels __P((void *, int));
137 int ess_set_out_channels __P((void *, int));
138
139 int ess_round_blocksize __P((void *, int));
140
141 int ess_dma_output __P((void *, void *, int, void (*)(void *), void *));
142 int ess_dma_input __P((void *, void *, int, void (*)(void *), void *));
143 int ess_halt_output __P((void *));
144 int ess_halt_input __P((void *));
145
146 int ess_intr_output __P((void *));
147 int ess_intr_input __P((void *));
148
149 int ess_speaker_ctl __P((void *, int));
150
151 int ess_getdev __P((void *, struct audio_device *));
152
153 int ess_set_port __P((void *, mixer_ctrl_t *));
154 int ess_get_port __P((void *, mixer_ctrl_t *));
155
156 void *ess_malloc __P((void *, unsigned long, int, int));
157 void ess_free __P((void *, void *, int));
158 unsigned long ess_round __P((void *, unsigned long));
159 int ess_mappage __P((void *, void *, int, int));
160
161
162 int ess_query_devinfo __P((void *, mixer_devinfo_t *));
163 int ess_get_props __P((void *));
164
165 void ess_speaker_on __P((struct ess_softc *));
166 void ess_speaker_off __P((struct ess_softc *));
167
168 int ess_config_addr __P((struct ess_softc *));
169 void ess_config_irq __P((struct ess_softc *));
170 void ess_config_drq __P((struct ess_softc *));
171 void ess_setup __P((struct ess_softc *));
172 int ess_identify __P((struct ess_softc *));
173
174 int ess_reset __P((struct ess_softc *));
175 void ess_set_gain __P((struct ess_softc *, int, int));
176 int ess_set_in_ports __P((struct ess_softc *, int));
177 u_int ess_srtotc __P((u_int));
178 u_int ess_srtofc __P((u_int));
179 u_char ess_get_dsp_status __P((struct ess_softc *));
180 u_char ess_dsp_read_ready __P((struct ess_softc *));
181 u_char ess_dsp_write_ready __P((struct ess_softc *sc));
182 int ess_rdsp __P((struct ess_softc *));
183 int ess_wdsp __P((struct ess_softc *, u_char));
184 u_char ess_read_x_reg __P((struct ess_softc *, u_char));
185 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
186 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
187 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
188 u_char ess_read_mix_reg __P((struct ess_softc *, u_char));
189 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
190 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
191 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
192
193 static char *essmodel[] = {
194 "unsupported",
195 "1888",
196 "1887",
197 "888"
198 };
199
200 struct audio_device ess_device = {
201 "ESS Technology",
202 "x",
203 "ess"
204 };
205
206 /*
207 * Define our interface to the higher level audio driver.
208 */
209
210 struct audio_hw_if ess_hw_if = {
211 ess_open,
212 ess_close,
213 NULL,
214 ess_query_encoding,
215 ess_set_params,
216 ess_round_blocksize,
217 NULL,
218 NULL,
219 NULL,
220 ess_dma_output,
221 ess_dma_input,
222 ess_halt_output,
223 ess_halt_input,
224 ess_speaker_ctl,
225 ess_getdev,
226 NULL,
227 ess_set_port,
228 ess_get_port,
229 ess_query_devinfo,
230 ess_malloc,
231 ess_free,
232 ess_round,
233 ess_mappage,
234 ess_get_props,
235 };
236
237 #ifdef AUDIO_DEBUG
238 void ess_printsc __P((struct ess_softc *));
239 void ess_dump_mixer __P((struct ess_softc *));
240
241 void
242 ess_printsc(sc)
243 struct ess_softc *sc;
244 {
245 int i;
246
247 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
248 (int)sc->sc_open, sc->sc_iobase, sc->out_port,
249 sc->in_port, sc->spkr_state ? "on" : "off");
250
251 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
252 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
253 sc->sc_out.intr, sc->sc_out.arg);
254
255 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
256 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
257 sc->sc_in.intr, sc->sc_in.arg);
258
259 printf("gain:");
260 for (i = 0; i < ESS_NDEVS; i++)
261 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
262 printf("\n");
263 }
264
265 void
266 ess_dump_mixer(sc)
267 struct ess_softc *sc;
268 {
269 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
270 0x7C, ess_read_mix_reg(sc, 0x7C));
271 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
272 0x1A, ess_read_mix_reg(sc, 0x1A));
273 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
274 0x3E, ess_read_mix_reg(sc, 0x3E));
275 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
276 0x36, ess_read_mix_reg(sc, 0x36));
277 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
278 0x38, ess_read_mix_reg(sc, 0x38));
279 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
280 0x3A, ess_read_mix_reg(sc, 0x3A));
281 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
282 0x32, ess_read_mix_reg(sc, 0x32));
283 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
284 0x3C, ess_read_mix_reg(sc, 0x3C));
285 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
286 0x69, ess_read_mix_reg(sc, 0x69));
287 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
288 0x68, ess_read_mix_reg(sc, 0x68));
289 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
290 0x6E, ess_read_mix_reg(sc, 0x6E));
291 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
292 0x6B, ess_read_mix_reg(sc, 0x6B));
293 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
294 0x6A, ess_read_mix_reg(sc, 0x6A));
295 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
296 0x6C, ess_read_mix_reg(sc, 0x6C));
297 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
298 0xB4, ess_read_x_reg(sc, 0xB4));
299 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
300 0x14, ess_read_mix_reg(sc, 0x14));
301
302 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
303 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
304 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
305 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
306 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
307 0x1c, ess_read_mix_reg(sc, 0x1c),
308 0x7a, ess_read_mix_reg(sc, 0x7a));
309 }
310
311 #endif
312
313 /*
314 * Configure the ESS chip for the desired audio base address.
315 */
316 int
317 ess_config_addr(sc)
318 struct ess_softc *sc;
319 {
320 int iobase = sc->sc_iobase;
321 bus_space_tag_t iot = sc->sc_iot;
322
323 /*
324 * Configure using the System Control Register method. This
325 * method is used when the AMODE line is tied high, which is
326 * the case for the Shark, but not for the evaluation board.
327 */
328
329 bus_space_handle_t scr_access_ioh;
330 bus_space_handle_t scr_ioh;
331 u_short scr_value;
332
333 /*
334 * Set the SCR bit to enable audio.
335 */
336 scr_value = ESS_SCR_AUDIO_ENABLE;
337
338 /*
339 * Set the SCR bits necessary to select the specified audio
340 * base address.
341 */
342 switch(iobase) {
343 case 0x220:
344 scr_value |= ESS_SCR_AUDIO_220;
345 break;
346 case 0x230:
347 scr_value |= ESS_SCR_AUDIO_230;
348 break;
349 case 0x240:
350 scr_value |= ESS_SCR_AUDIO_240;
351 break;
352 case 0x250:
353 scr_value |= ESS_SCR_AUDIO_250;
354 break;
355 default:
356 printf("ess: configured iobase 0x%x invalid\n", iobase);
357 return (1);
358 break;
359 }
360
361 /*
362 * Get a mapping for the System Control Register (SCR) access
363 * registers and the SCR data registers.
364 */
365 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
366 0, &scr_access_ioh)) {
367 printf("ess: can't map SCR access registers\n");
368 return (1);
369 }
370 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
371 0, &scr_ioh)) {
372 printf("ess: can't map SCR registers\n");
373 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
374 return (1);
375 }
376
377 /* Unlock the SCR. */
378 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
379
380 /* Write the base address information into SCR[0]. */
381 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0);
382 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
383
384 /* Lock the SCR. */
385 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
386
387 /* Unmap the SCR access ports and the SCR data ports. */
388 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
389 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
390
391 return 0;
392 }
393
394
395 /*
396 * Configure the ESS chip for the desired IRQ and DMA channels.
397 * ESS ISA
398 * --------
399 * IRQA irq9
400 * IRQB irq5
401 * IRQC irq7
402 * IRQD irq10
403 * IRQE irq15
404 *
405 * DRQA drq0
406 * DRQB drq1
407 * DRQC drq3
408 * DRQD drq5
409 */
410 void
411 ess_config_irq(sc)
412 struct ess_softc *sc;
413 {
414 int v;
415
416 DPRINTFN(2,("ess_config_irq\n"));
417
418 if (sc->sc_in.irq != sc->sc_out.irq) {
419 /* Configure Audio 1 (record) for the appropriate IRQ line. */
420 v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */
421 switch(sc->sc_in.irq) {
422 case 5:
423 v |= ESS_IRQ_CTRL_INTRB;
424 break;
425 case 7:
426 v |= ESS_IRQ_CTRL_INTRC;
427 break;
428 case 9:
429 v |= ESS_IRQ_CTRL_INTRA;
430 break;
431 case 10:
432 v |= ESS_IRQ_CTRL_INTRD;
433 break;
434 #ifdef DIAGNOSTIC
435 default:
436 printf("ess: configured irq %d not supported for Audio 1\n",
437 sc->sc_in.irq);
438 return;
439 #endif
440 }
441 ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v);
442 /* irq2 is hardwired to 15 in this mode */
443 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
444 ESS_AUDIO2_CTRL2_IRQ2_ENABLE);
445 /* Use old method. */
446 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888);
447 } else {
448 /* Use new method, both interrupts are the same. */
449 v = ESS_IS_SELECT_IRQ; /* enable intrs */
450 switch(sc->sc_out.irq) {
451 case 5:
452 v |= ESS_IS_INTRB;
453 break;
454 case 7:
455 v |= ESS_IS_INTRC;
456 break;
457 case 9:
458 v |= ESS_IS_INTRA;
459 break;
460 case 10:
461 v |= ESS_IS_INTRD;
462 break;
463 case 15:
464 v |= ESS_IS_INTRE;
465 break;
466 #ifdef DIAGNOSTIC
467 default:
468 printf("ess_config_irq: configured irq %d not supported for Audio 1\n",
469 sc->sc_in.irq);
470 return;
471 #endif
472 }
473 /* Set the IRQ */
474 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v);
475 }
476 }
477
478
479 void
480 ess_config_drq(sc)
481 struct ess_softc *sc;
482 {
483 int v;
484
485 DPRINTFN(2,("ess_config_drq\n"));
486
487 /* Configure Audio 1 (record) for DMA on the appropriate channel. */
488 v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT;
489 switch(sc->sc_in.drq) {
490 case 0:
491 v |= ESS_DRQ_CTRL_DRQA;
492 break;
493 case 1:
494 v |= ESS_DRQ_CTRL_DRQB;
495 break;
496 case 3:
497 v |= ESS_DRQ_CTRL_DRQC;
498 break;
499 #ifdef DIAGNOSTIC
500 default:
501 printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n",
502 sc->sc_in.drq);
503 return;
504 }
505 #endif
506 /* Set DRQ1 */
507 ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v);
508
509 /* Configure DRQ2 */
510 v = ESS_AUDIO2_CTRL3_DRQ_PD;
511 switch(sc->sc_out.drq) {
512 case 0:
513 v |= ESS_AUDIO2_CTRL3_DRQA;
514 break;
515 case 1:
516 v |= ESS_AUDIO2_CTRL3_DRQB;
517 break;
518 case 3:
519 v |= ESS_AUDIO2_CTRL3_DRQC;
520 break;
521 case 5:
522 v |= ESS_AUDIO2_CTRL3_DRQC;
523 break;
524 #ifdef DIAGNOSTIC
525 default:
526 printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n",
527 sc->sc_out.drq);
528 return;
529 }
530 #endif
531 ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v);
532 /* Enable DMA 2 */
533 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
534 ESS_AUDIO2_CTRL2_DMA_ENABLE);
535 }
536
537 /*
538 * Set up registers after a reset.
539 */
540 void
541 ess_setup(sc)
542 struct ess_softc *sc;
543 {
544 ess_config_irq(sc);
545 ess_config_drq(sc);
546 if (sc->sc_out.drq >= 4)
547 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
548 ESS_AUDIO2_CTRL1_XFER_SIZE);
549 else
550 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
551 ESS_AUDIO2_CTRL1_XFER_SIZE);
552 #if 0
553 /* Use 8 byte per DMA */
554 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 0xc0);
555 #endif
556
557 DPRINTFN(2,("ess_setup: done\n"));
558 }
559
560 /*
561 * Determine the model of ESS chip we are talking to. Currently we
562 * only support ES1888, ES1887 and ES888. The method of determining
563 * the chip is based on the information on page 27 of the ES1887 data
564 * sheet.
565 *
566 * This routine sets the values of sc->sc_model and sc->sc_version.
567 */
568 int
569 ess_identify(sc)
570 struct ess_softc *sc;
571 {
572 u_char reg1;
573 u_char reg2;
574 u_char reg3;
575
576 sc->sc_model = ESS_UNSUPPORTED;
577 sc->sc_version = 0;
578
579
580 /*
581 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where
582 * n >= 8 for an ES1887 or an ES888. Other values indicate
583 * earlier (unsupported) chips.
584 */
585 ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
586
587 if ((reg1 = ess_rdsp(sc)) != 0x68) {
588 printf("ess: First ID byte wrong (0x%02x)\n", reg1);
589 return 1;
590 }
591
592 reg2 = ess_rdsp(sc);
593 if (((reg2 & 0xf0) != 0x80) ||
594 ((reg2 & 0x0f) < 8)) {
595 printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
596 return 1;
597 }
598
599 /*
600 * Store the ID bytes as the version.
601 */
602 sc->sc_version = (reg1 << 8) + reg2;
603
604
605 /*
606 * 2. Verify we can change bit 2 in mixer register 0x64. This
607 * should be possible on all supported chips.
608 */
609 reg1 = ess_read_mix_reg(sc, 0x64);
610 reg2 = reg1 ^ 0x04; /* toggle bit 2 */
611
612 ess_write_mix_reg(sc, 0x64, reg2);
613
614 if (ess_read_mix_reg(sc, 0x64) != reg2) {
615 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
616 return 1;
617 }
618
619 /*
620 * Restore the original value of mixer register 0x64.
621 */
622 ess_write_mix_reg(sc, 0x64, reg1);
623
624
625 /*
626 * 3. Verify we can change the value of mixer register
627 * ESS_MREG_SAMPLE_RATE.
628 * This should be possible on all supported chips.
629 * It is not necessary to restore the value of this mixer register.
630 */
631 reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE);
632 reg2 = reg1 ^ 0xff; /* toggle all bits */
633
634 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2);
635
636 if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) {
637 printf("ess: Hardware error (unable to change mixer register 0x70)\n");
638 return 1;
639 }
640
641 /*
642 * 4. Determine if we can change bit 5 in mixer register 0x64.
643 * This determines whether we have an ES1887:
644 *
645 * - can change indicates ES1887
646 * - can't change indicates ES1888 or ES888
647 */
648 reg1 = ess_read_mix_reg(sc, 0x64);
649 reg2 = reg1 ^ 0x20; /* toggle bit 5 */
650
651 ess_write_mix_reg(sc, 0x64, reg2);
652
653 if (ess_read_mix_reg(sc, 0x64) == reg2) {
654 sc->sc_model = ESS_1887;
655
656 /*
657 * Restore the original value of mixer register 0x64.
658 */
659 ess_write_mix_reg(sc, 0x64, reg1);
660 } else {
661 /*
662 * 5. Determine if we can change the value of mixer
663 * register 0x69 independently of mixer register
664 * 0x68. This determines which chip we have:
665 *
666 * - can modify idependently indicates ES888
667 * - register 0x69 is an alias of 0x68 indicates ES1888
668 */
669 reg1 = ess_read_mix_reg(sc, 0x68);
670 reg2 = ess_read_mix_reg(sc, 0x69);
671 reg3 = reg2 ^ 0xff; /* toggle all bits */
672
673 /*
674 * Write different values to each register.
675 */
676 ess_write_mix_reg(sc, 0x68, reg2);
677 ess_write_mix_reg(sc, 0x69, reg3);
678
679 if (ess_read_mix_reg(sc, 0x68) == reg2)
680 sc->sc_model = ESS_888;
681 else
682 sc->sc_model = ESS_1888;
683
684 /*
685 * Restore the original value of the registers.
686 */
687 ess_write_mix_reg(sc, 0x68, reg1);
688 ess_write_mix_reg(sc, 0x69, reg2);
689 }
690
691 return 0;
692 }
693
694
695 int
696 ess_setup_sc(sc, doinit)
697 struct ess_softc *sc;
698 int doinit;
699 {
700 /* Reset the chip. */
701 if (ess_reset(sc) != 0) {
702 DPRINTF(("ess_setup_sc: couldn't reset chip\n"));
703 return (1);
704 }
705
706 /* Identify the ESS chip, and check that it is supported. */
707 if (ess_identify(sc)) {
708 DPRINTF(("ess_setup_sc: couldn't identify\n"));
709 return (1);
710 }
711
712 return (0);
713 }
714
715 /*
716 * Probe for the ESS hardware.
717 */
718 int
719 essmatch(sc)
720 struct ess_softc *sc;
721 {
722 if (!ESS_BASE_VALID(sc->sc_iobase)) {
723 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
724 return (0);
725 }
726
727 /* Configure the ESS chip for the desired audio base address. */
728 if (ess_config_addr(sc))
729 return (0);
730
731 if (ess_setup_sc(sc, 1))
732 return (0);
733
734 if (sc->sc_model == ESS_UNSUPPORTED) {
735 DPRINTF(("ess: Unsupported model\n"));
736 return (0);
737 }
738
739 /* Check that requested DMA channels are valid and different. */
740 if (!ESS_DRQ1_VALID(sc->sc_in.drq)) {
741 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
742 return (0);
743 }
744 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
745 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
746 return (0);
747 }
748 if (sc->sc_in.drq == sc->sc_out.drq) {
749 printf("ess: play and record dma chan both %d\n",
750 sc->sc_in.drq);
751 return (0);
752 }
753
754 if (sc->sc_model == ESS_1887) {
755 /*
756 * Either use the 1887 interrupt mode with all interrupts
757 * mapped to the same irq, or use the 1888 method with
758 * irq fixed at 15.
759 */
760 if (sc->sc_in.irq == sc->sc_out.irq) {
761 if (!ESS_IRQ12_VALID(sc->sc_in.irq)) {
762 printf("ess: irq %d invalid\n", sc->sc_in.irq);
763 return (0);
764 }
765 } else
766 goto irq1888;
767 } else {
768 /* Must use separate interrupts */
769 if (sc->sc_in.irq == sc->sc_out.irq) {
770 printf("ess: play and record irq both %d\n",
771 sc->sc_in.irq);
772 return (0);
773 }
774 }
775
776 irq1888:
777 /* Check that requested IRQ lines are valid and different. */
778 if (!ESS_IRQ1_VALID(sc->sc_in.irq)) {
779 printf("ess: record irq %d invalid\n", sc->sc_in.irq);
780 return (0);
781 }
782 if (!ESS_IRQ2_VALID(sc->sc_out.irq)) {
783 printf("ess: play irq %d invalid\n", sc->sc_out.irq);
784 return (0);
785 }
786
787 /* Check that the DRQs are free. */
788 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
789 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
790 return (0);
791 /* XXX should we check IRQs as well? */
792
793 return (1);
794 }
795
796
797 /*
798 * Attach hardware to driver, attach hardware driver to audio
799 * pseudo-device driver.
800 */
801 void
802 essattach(sc)
803 struct ess_softc *sc;
804 {
805 struct audio_params pparams, rparams;
806 int i;
807 u_int v;
808
809 if (ess_setup_sc(sc, 0)) {
810 printf("%s: setup failed\n", sc->sc_dev.dv_xname);
811 return;
812 }
813
814 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq,
815 sc->sc_out.ist, IPL_AUDIO,
816 ess_intr_output, sc);
817 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq,
818 sc->sc_in.ist, IPL_AUDIO,
819 ess_intr_input, sc);
820
821 /* Create our DMA maps. */
822 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
823 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
824 printf("%s: can't create map for drq %d\n",
825 sc->sc_dev.dv_xname, sc->sc_in.drq);
826 return;
827 }
828 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
829 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
830 printf("%s: can't create map for drq %d\n",
831 sc->sc_dev.dv_xname, sc->sc_out.drq);
832 return;
833 }
834
835 printf(" ESS Technology ES%s [version 0x%04x]\n",
836 essmodel[sc->sc_model], sc->sc_version);
837
838 /*
839 * Set record and play parameters to default values defined in
840 * generic audio driver.
841 */
842 pparams = audio_default;
843 rparams = audio_default;
844 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
845
846 /* Do a hardware reset on the mixer. */
847 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
848
849 /*
850 * Set volume of Audio 1 to zero and disable Audio 1 DAC input
851 * to playback mixer, since playback is always through Audio 2.
852 */
853 ess_write_mix_reg(sc, 0x14, 0);
854 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
855
856 /*
857 * Set hardware record source to use output of the record
858 * mixer. We do the selection of record source in software by
859 * setting the gain of the unused sources to zero. (See
860 * ess_set_in_ports.)
861 */
862 ess_set_mreg_bits(sc, 0x1c, 0x07);
863 ess_clear_mreg_bits(sc, 0x7a, 0x10);
864 ess_set_mreg_bits(sc, 0x7a, 0x08);
865
866 /*
867 * Set gain on each mixer device to a sensible value.
868 * Devices not normally used are turned off, and other devices
869 * are set to 75% volume.
870 */
871 for (i = 0; i < ESS_NDEVS; i++) {
872 switch(i) {
873 case ESS_MIC_PLAY_VOL:
874 case ESS_LINE_PLAY_VOL:
875 case ESS_CD_PLAY_VOL:
876 case ESS_AUXB_PLAY_VOL:
877 case ESS_DAC_REC_VOL:
878 case ESS_LINE_REC_VOL:
879 case ESS_SYNTH_REC_VOL:
880 case ESS_CD_REC_VOL:
881 case ESS_AUXB_REC_VOL:
882 v = 0;
883 break;
884 default:
885 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4);
886 break;
887 }
888 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
889 ess_set_gain(sc, i, 1);
890 }
891
892 ess_setup(sc);
893
894 /* Disable the speaker until the device is opened. */
895 ess_speaker_off(sc);
896 sc->spkr_state = SPKR_OFF;
897
898 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
899 sprintf(ess_device.version, "0x%04x", sc->sc_version);
900
901 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev);
902
903 #ifdef AUDIO_DEBUG
904 ess_printsc(sc);
905 #endif
906 }
907
908 /*
909 * Various routines to interface to higher level audio driver
910 */
911
912 int
913 ess_open(addr, flags)
914 void *addr;
915 int flags;
916 {
917 struct ess_softc *sc = addr;
918
919 DPRINTF(("ess_open: sc=%p\n", sc));
920
921 if (sc->sc_open != 0 || ess_reset(sc) != 0)
922 return ENXIO;
923
924 ess_setup(sc);
925
926 sc->sc_open = 1;
927
928 DPRINTF(("ess_open: opened\n"));
929
930 return (0);
931 }
932
933 void
934 ess_close(addr)
935 void *addr;
936 {
937 struct ess_softc *sc = addr;
938
939 DPRINTF(("ess_close: sc=%p\n", sc));
940
941 sc->sc_open = 0;
942 ess_speaker_off(sc);
943 sc->spkr_state = SPKR_OFF;
944 sc->sc_in.intr = 0;
945 sc->sc_out.intr = 0;
946 ess_halt_output(sc);
947 ess_halt_input(sc);
948
949 DPRINTF(("ess_close: closed\n"));
950 }
951
952 int
953 ess_speaker_ctl(addr, newstate)
954 void *addr;
955 int newstate;
956 {
957 struct ess_softc *sc = addr;
958
959 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
960 ess_speaker_on(sc);
961 sc->spkr_state = SPKR_ON;
962 }
963 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
964 ess_speaker_off(sc);
965 sc->spkr_state = SPKR_OFF;
966 }
967 return (0);
968 }
969
970 int
971 ess_getdev(addr, retp)
972 void *addr;
973 struct audio_device *retp;
974 {
975 *retp = ess_device;
976 return (0);
977 }
978
979 int
980 ess_query_encoding(addr, fp)
981 void *addr;
982 struct audio_encoding *fp;
983 {
984 /*struct ess_softc *sc = addr;*/
985
986 switch (fp->index) {
987 case 0:
988 strcpy(fp->name, AudioEulinear);
989 fp->encoding = AUDIO_ENCODING_ULINEAR;
990 fp->precision = 8;
991 fp->flags = 0;
992 return (0);
993 case 1:
994 strcpy(fp->name, AudioEmulaw);
995 fp->encoding = AUDIO_ENCODING_ULAW;
996 fp->precision = 8;
997 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
998 return (0);
999 case 2:
1000 strcpy(fp->name, AudioEalaw);
1001 fp->encoding = AUDIO_ENCODING_ALAW;
1002 fp->precision = 8;
1003 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1004 return (0);
1005 case 3:
1006 strcpy(fp->name, AudioEslinear);
1007 fp->encoding = AUDIO_ENCODING_SLINEAR;
1008 fp->precision = 8;
1009 fp->flags = 0;
1010 return (0);
1011 case 4:
1012 strcpy(fp->name, AudioEslinear_le);
1013 fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
1014 fp->precision = 16;
1015 fp->flags = 0;
1016 return (0);
1017 case 5:
1018 strcpy(fp->name, AudioEulinear_le);
1019 fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
1020 fp->precision = 16;
1021 fp->flags = 0;
1022 return (0);
1023 case 6:
1024 strcpy(fp->name, AudioEslinear_be);
1025 fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
1026 fp->precision = 16;
1027 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1028 return (0);
1029 case 7:
1030 strcpy(fp->name, AudioEulinear_be);
1031 fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
1032 fp->precision = 16;
1033 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1034 return (0);
1035 default:
1036 return EINVAL;
1037 }
1038 return (0);
1039 }
1040
1041 int
1042 ess_set_params(addr, setmode, usemode, p, q)
1043 void *addr;
1044 int setmode;
1045 int usemode;
1046 struct audio_params *p;
1047 struct audio_params *q;
1048 {
1049 struct ess_softc *sc = addr;
1050 void (*swcode) __P((void *, u_char *buf, int cnt));
1051 int mode = setmode; /* XXX */
1052
1053 DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode));
1054
1055 /* Set first record info, then play info */
1056 for(mode = AUMODE_RECORD; mode != -1;
1057 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
1058 if ((setmode & mode) == 0)
1059 continue;
1060
1061 switch (mode) {
1062 case AUMODE_PLAY:
1063 if (ess_set_out_sr(sc, p->sample_rate) != 0 ||
1064 ess_set_out_precision(sc, p->precision) != 0 ||
1065 ess_set_out_channels(sc, p->channels) != 0) {
1066 return (EINVAL);
1067 }
1068 break;
1069
1070 case AUMODE_RECORD:
1071 if (ess_set_in_sr(sc, p->sample_rate) != 0 ||
1072 ess_set_in_precision(sc, p->precision) != 0 ||
1073 ess_set_in_channels(sc, p->channels) != 0) {
1074 return (EINVAL);
1075 }
1076 break;
1077 }
1078
1079 swcode = 0;
1080
1081 switch (p->encoding) {
1082 case AUDIO_ENCODING_SLINEAR_BE:
1083 if (p->precision == 16)
1084 swcode = swap_bytes;
1085 /* fall into */
1086 case AUDIO_ENCODING_SLINEAR_LE:
1087 if (mode == AUMODE_PLAY)
1088 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1089 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1090 else
1091 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1092 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1093 break;
1094 case AUDIO_ENCODING_ULINEAR_BE:
1095 if (p->precision == 16)
1096 swcode = swap_bytes;
1097 /* fall into */
1098 case AUDIO_ENCODING_ULINEAR_LE:
1099 ulin8:
1100 if (mode == AUMODE_PLAY)
1101 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1102 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1103 else
1104 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1105 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1106 break;
1107 case AUDIO_ENCODING_ULAW:
1108 swcode = mode == AUMODE_PLAY ?
1109 mulaw_to_ulinear8 : ulinear8_to_mulaw;
1110 goto ulin8;
1111 case AUDIO_ENCODING_ALAW:
1112 swcode = mode == AUMODE_PLAY ?
1113 alaw_to_ulinear8 : ulinear8_to_alaw;
1114 goto ulin8;
1115 default:
1116 return EINVAL;
1117 }
1118 p->sw_code = swcode;
1119 }
1120
1121 sc->sc_in.active = 0;
1122 sc->sc_out.active = 0;
1123
1124 return (0);
1125 }
1126 int
1127 ess_set_in_sr(addr, sr)
1128 void *addr;
1129 u_long sr;
1130 {
1131 struct ess_softc *sc = addr;
1132
1133 if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
1134 return (EINVAL);
1135 /*
1136 * Program the sample rate and filter clock for the record
1137 * channel (Audio 1).
1138 */
1139 DPRINTF(("ess_set_in_sr: %ld\n", sr));
1140 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(sr));
1141 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(sr));
1142
1143 return (0);
1144 }
1145
1146 int
1147 ess_set_out_sr(addr, sr)
1148 void *addr;
1149 u_long sr;
1150 {
1151 struct ess_softc *sc = addr;
1152
1153 if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
1154 return (EINVAL);
1155 /*
1156 * Program the sample rate and filter clock for the playback
1157 * channel (Audio 2).
1158 */
1159 DPRINTF(("ess_set_out_sr: %ld\n", sr));
1160 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(sr));
1161 ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(sr));
1162
1163 return (0);
1164 }
1165
1166 int
1167 ess_set_in_precision(addr, precision)
1168 void *addr;
1169 u_int precision;
1170 {
1171 struct ess_softc *sc = addr;
1172
1173 /*
1174 * REVISIT: Should we set DMA transfer type to 2-byte or
1175 * 4-byte demand? This would probably better be done
1176 * when configuring the DMA channel. See xreg 0xB9.
1177 */
1178 DPRINTF(("ess_set_in_precision: %d\n", precision));
1179 switch (precision) {
1180 case 8:
1181 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1182 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1183 break;
1184
1185 case 16:
1186 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1187 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1188 break;
1189
1190 default:
1191 return (EINVAL);
1192 }
1193 return (0);
1194 }
1195
1196 int
1197 ess_set_out_precision(addr, precision)
1198 void *addr;
1199 u_int precision;
1200 {
1201 struct ess_softc *sc = addr;
1202
1203 DPRINTF(("ess_set_in_precision: %d\n", precision));
1204 switch (precision) {
1205 case 8:
1206 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1207 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1208 break;
1209
1210 case 16:
1211 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1212 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1213 break;
1214
1215 default:
1216 return (EINVAL);
1217 }
1218 return (0);
1219 }
1220
1221 int
1222 ess_set_in_channels(addr, channels)
1223 void *addr;
1224 int channels;
1225 {
1226 struct ess_softc *sc = addr;
1227
1228 switch(channels) {
1229 case 1:
1230 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1231 ESS_AUDIO_CTRL_MONO);
1232 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1233 ESS_AUDIO_CTRL_STEREO);
1234 break;
1235
1236 case 2:
1237 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1238 ESS_AUDIO_CTRL_STEREO);
1239 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1240 ESS_AUDIO_CTRL_MONO);
1241 break;
1242
1243 default:
1244 return (EINVAL);
1245 break;
1246 }
1247
1248 sc->sc_in.channels = channels;
1249
1250 return (0);
1251 }
1252
1253 int
1254 ess_set_out_channels(addr, channels)
1255 void *addr;
1256 int channels;
1257 {
1258 struct ess_softc *sc = addr;
1259
1260 switch(channels) {
1261 case 1:
1262 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1263 ESS_AUDIO2_CTRL2_CHANNELS);
1264 break;
1265
1266 case 2:
1267 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1268 ESS_AUDIO2_CTRL2_CHANNELS);
1269 break;
1270
1271 default:
1272 return (EINVAL);
1273 break;
1274 }
1275
1276 sc->sc_out.channels = channels;
1277
1278 return (0);
1279 }
1280
1281 int
1282 ess_dma_output(addr, p, cc, intr, arg)
1283 void *addr;
1284 void *p;
1285 int cc;
1286 void (*intr) __P((void *));
1287 void *arg;
1288 {
1289 struct ess_softc *sc = addr;
1290
1291 DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg));
1292 #ifdef DIAGNOSTIC
1293 if (sc->sc_out.channels == 2 && (cc & 1)) {
1294 DPRINTF(("stereo playback odd bytes (%d)\n", cc));
1295 return EIO;
1296 }
1297 #endif
1298
1299 isa_dmastart(sc->sc_ic, sc->sc_out.drq, p, cc,
1300 NULL, DMAMODE_WRITE, BUS_DMA_NOWAIT);
1301
1302 sc->sc_out.active = 1;
1303 sc->sc_out.intr = intr;
1304 sc->sc_out.arg = arg;
1305 sc->sc_out.dmaflags = DMAMODE_WRITE;
1306 sc->sc_out.dmaaddr = p;
1307
1308 if (sc->sc_out.dmacnt != cc) {
1309 sc->sc_out.dmacnt = cc;
1310
1311 /*
1312 * If doing 16-bit DMA transfers, then the number of
1313 * transfers required is half the number of bytes to
1314 * be transferred.
1315 */
1316 if (sc->sc_out.drq >= 4)
1317 cc >>= 1;
1318
1319 /*
1320 * Program transfer count registers with 2's
1321 * complement of count.
1322 */
1323 cc = -cc;
1324 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc);
1325 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8);
1326 }
1327
1328 /* REVISIT: is it really necessary to clear then set these bits to get
1329 the next lot of DMA to happen? Would it be sufficient to set the bits
1330 the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
1331 */
1332 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1333 ESS_AUDIO2_CTRL1_DAC_ENABLE);/* REVISIT: once only */
1334 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1335 ESS_AUDIO2_CTRL1_FIFO_ENABLE);
1336 #if 0
1337 /* REVISIT: seems like the 888 and 1888 have an interlock that
1338 * prevents audio2 channel from working if audio1 channel is not
1339 * connected to the FIFO.
1340 */
1341 ess_set_xreg_bits(sc, 0xB7, 0x80);
1342 #endif
1343 return (0);
1344
1345 }
1346
1347 int
1348 ess_dma_input(addr, p, cc, intr, arg)
1349 void *addr;
1350 void *p;
1351 int cc;
1352 void (*intr) __P((void *));
1353 void *arg;
1354 {
1355 struct ess_softc *sc = addr;
1356
1357 DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg));
1358 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
1359 ess_set_xreg_bits(sc, 0xB7, 0x80);
1360
1361 #ifdef DIAGNOSTIC
1362 if (sc->sc_in.channels == 2 && (cc & 1)) {
1363 DPRINTF(("stereo record odd bytes (%d)\n", cc));
1364 return EIO;
1365 }
1366 #endif
1367
1368 isa_dmastart(sc->sc_ic, sc->sc_in.drq, p,
1369 cc, NULL, DMAMODE_READ, BUS_DMA_NOWAIT);
1370 sc->sc_in.active = 1;
1371 sc->sc_in.intr = intr;
1372 sc->sc_in.arg = arg;
1373 sc->sc_in.dmaflags = DMAMODE_READ;
1374 sc->sc_in.dmaaddr = p;
1375
1376 if (sc->sc_in.dmacnt != cc)
1377 {
1378 sc->sc_in.dmacnt = cc;
1379
1380 /*
1381 * If doing 16-bit DMA transfers, then the number of
1382 * transfers required is half the number of bytes to
1383 * be transferred.
1384 */
1385 if (sc->sc_out.drq >= 4)
1386 cc >>= 1;
1387
1388 /*
1389 * Program transfer count registers with 2's
1390 * complement of count.
1391 */
1392 cc = -cc;
1393 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc);
1394 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8);
1395 }
1396
1397 /* REVISIT: is it really necessary to clear then set these bits to get
1398 the next lot of DMA to happen? Would it be sufficient to set the bits
1399 the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
1400 */
1401 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1402 ESS_AUDIO1_CTRL2_DMA_READ | /* REVISIT: once only */
1403 ESS_AUDIO1_CTRL2_ADC_ENABLE |/* REVISIT: once only */
1404 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1405
1406 return (0);
1407
1408 }
1409
1410 int
1411 ess_halt_output(addr)
1412 void *addr;
1413 {
1414 struct ess_softc *sc = addr;
1415
1416 DPRINTF(("ess_halt_output: sc=%p\n", sc));
1417
1418 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1419 ESS_AUDIO2_CTRL2_DMA_ENABLE);
1420 return (0);
1421 }
1422
1423 int
1424 ess_halt_input(addr)
1425 void *addr;
1426 {
1427 struct ess_softc *sc = addr;
1428
1429 DPRINTF(("ess_halt_input: sc=%p\n", sc));
1430
1431 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1432 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1433 return (0);
1434 }
1435
1436 int
1437 ess_intr_output(arg)
1438 void *arg;
1439 {
1440 struct ess_softc *sc = arg;
1441
1442 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr));
1443
1444 /* clear interrupt on Audio channel 2 */
1445 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1446 ESS_AUDIO2_CTRL2_IRQ_LATCH);
1447
1448 sc->sc_out.nintr++;
1449
1450 if (sc->sc_out.intr != 0) {
1451 isa_dmadone(sc->sc_ic, sc->sc_out.drq);
1452 (*sc->sc_out.intr)(sc->sc_out.arg);
1453 } else
1454 return (0);
1455
1456 return (1);
1457 }
1458
1459 int
1460 ess_intr_input(arg)
1461 void *arg;
1462 {
1463 struct ess_softc *sc = arg;
1464 u_char x;
1465
1466 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr));
1467
1468 /*
1469 * Disable DMA for Audio 1; it will be enabled again the next
1470 * time ess_dma_input is called. Note that for single DMAs,
1471 * this bit must be toggled for each DMA. For auto-initialize
1472 * DMAs, this bit should be left high.
1473 */
1474 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1475 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1476
1477 /* clear interrupt on Audio channel 1*/
1478 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
1479
1480 sc->sc_in.nintr++;
1481
1482 if (sc->sc_in.intr != 0) {
1483 isa_dmadone(sc->sc_ic, sc->sc_in.drq);
1484 (*sc->sc_in.intr)(sc->sc_in.arg);
1485 } else
1486 return (0);
1487
1488 return (1);
1489 }
1490
1491 int
1492 ess_round_blocksize(addr, blk)
1493 void *addr;
1494 int blk;
1495 {
1496 return (blk & -8); /* round for max DMA size */
1497 }
1498
1499 int
1500 ess_set_port(addr, cp)
1501 void *addr;
1502 mixer_ctrl_t *cp;
1503 {
1504 struct ess_softc *sc = addr;
1505 int lgain, rgain;
1506
1507 DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n",
1508 cp->dev, cp->un.value.num_channels));
1509
1510 switch (cp->dev) {
1511 /*
1512 * The following mixer ports are all stereo. If we get a
1513 * single-channel gain value passed in, then we duplicate it
1514 * to both left and right channels.
1515 */
1516 case ESS_MASTER_VOL:
1517 case ESS_DAC_PLAY_VOL:
1518 case ESS_MIC_PLAY_VOL:
1519 case ESS_LINE_PLAY_VOL:
1520 case ESS_SYNTH_PLAY_VOL:
1521 case ESS_CD_PLAY_VOL:
1522 case ESS_AUXB_PLAY_VOL:
1523 case ESS_DAC_REC_VOL:
1524 case ESS_MIC_REC_VOL:
1525 case ESS_LINE_REC_VOL:
1526 case ESS_SYNTH_REC_VOL:
1527 case ESS_CD_REC_VOL:
1528 case ESS_AUXB_REC_VOL:
1529 case ESS_RECORD_VOL:
1530 if (cp->type != AUDIO_MIXER_VALUE)
1531 return EINVAL;
1532
1533 switch (cp->un.value.num_channels) {
1534 case 1:
1535 lgain = rgain = ESS_4BIT_GAIN(
1536 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1537 break;
1538 case 2:
1539 lgain = ESS_4BIT_GAIN(
1540 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
1541 rgain = ESS_4BIT_GAIN(
1542 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
1543 break;
1544 default:
1545 return EINVAL;
1546 }
1547
1548 sc->gain[cp->dev][ESS_LEFT] = lgain;
1549 sc->gain[cp->dev][ESS_RIGHT] = rgain;
1550
1551 ess_set_gain(sc, cp->dev, 1);
1552 break;
1553
1554
1555 /*
1556 * The PC speaker port is mono. If we get a stereo gain value
1557 * passed in, then we return EINVAL.
1558 */
1559 case ESS_PCSPEAKER_VOL:
1560 if (cp->un.value.num_channels != 1)
1561 return EINVAL;
1562
1563 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
1564 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1565 ess_set_gain(sc, cp->dev, 1);
1566 break;
1567
1568
1569 case ESS_MIC_PREAMP:
1570 if (cp->type != AUDIO_MIXER_ENUM)
1571 return EINVAL;
1572
1573 if (cp->un.ord)
1574 /* Enable microphone preamp */
1575 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1576 ESS_PREAMP_CTRL_ENABLE);
1577 else
1578 /* Disable microphone preamp */
1579 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1580 ESS_PREAMP_CTRL_ENABLE);
1581 break;
1582
1583 case ESS_RECORD_SOURCE:
1584 if (cp->type == AUDIO_MIXER_SET)
1585 return ess_set_in_ports(sc, cp->un.mask);
1586 else
1587 return EINVAL;
1588 break;
1589
1590 case ESS_RECORD_MONITOR:
1591 if (cp->type != AUDIO_MIXER_ENUM)
1592 return EINVAL;
1593
1594 if (cp->un.ord)
1595 /* Enable monitor */
1596 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1597 ESS_AUDIO_CTRL_MONITOR);
1598 else
1599 /* Disable monitor */
1600 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1601 ESS_AUDIO_CTRL_MONITOR);
1602 break;
1603
1604 default:
1605 return EINVAL;
1606 }
1607
1608 return (0);
1609 }
1610
1611 int
1612 ess_get_port(addr, cp)
1613 void *addr;
1614 mixer_ctrl_t *cp;
1615 {
1616 struct ess_softc *sc = addr;
1617
1618 DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev));
1619
1620 switch (cp->dev) {
1621 case ESS_DAC_PLAY_VOL:
1622 case ESS_MIC_PLAY_VOL:
1623 case ESS_LINE_PLAY_VOL:
1624 case ESS_SYNTH_PLAY_VOL:
1625 case ESS_CD_PLAY_VOL:
1626 case ESS_AUXB_PLAY_VOL:
1627 case ESS_MASTER_VOL:
1628 case ESS_PCSPEAKER_VOL:
1629 case ESS_DAC_REC_VOL:
1630 case ESS_MIC_REC_VOL:
1631 case ESS_LINE_REC_VOL:
1632 case ESS_SYNTH_REC_VOL:
1633 case ESS_CD_REC_VOL:
1634 case ESS_AUXB_REC_VOL:
1635 case ESS_RECORD_VOL:
1636 if (cp->dev == ESS_PCSPEAKER_VOL &&
1637 cp->un.value.num_channels != 1)
1638 return EINVAL;
1639
1640 switch (cp->un.value.num_channels) {
1641 case 1:
1642 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1643 sc->gain[cp->dev][ESS_LEFT];
1644 break;
1645 case 2:
1646 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1647 sc->gain[cp->dev][ESS_LEFT];
1648 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1649 sc->gain[cp->dev][ESS_RIGHT];
1650 break;
1651 default:
1652 return EINVAL;
1653 }
1654 break;
1655
1656 case ESS_MIC_PREAMP:
1657 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
1658 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
1659 break;
1660
1661 case ESS_RECORD_SOURCE:
1662 cp->un.mask = sc->in_mask;
1663 break;
1664
1665 case ESS_RECORD_MONITOR:
1666 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
1667 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
1668 break;
1669
1670 default:
1671 return EINVAL;
1672 }
1673
1674 return (0);
1675 }
1676
1677 int
1678 ess_query_devinfo(addr, dip)
1679 void *addr;
1680 mixer_devinfo_t *dip;
1681 {
1682 #ifdef AUDIO_DEBUG
1683 struct ess_softc *sc = addr;
1684 #endif
1685
1686 DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n",
1687 sc->sc_model, dip->index));
1688
1689 /*
1690 * REVISIT: There are some slight differences between the
1691 * mixers on the different ESS chips, which can
1692 * be sorted out using the chip model rather than a
1693 * separate mixer model.
1694 * This is currently coded assuming an ES1887; we
1695 * need to work out which bits are not applicable to
1696 * the other models (1888 and 888).
1697 */
1698 switch (dip->index) {
1699 case ESS_DAC_PLAY_VOL:
1700 dip->type = AUDIO_MIXER_VALUE;
1701 dip->mixer_class = ESS_INPUT_CLASS;
1702 dip->prev = AUDIO_MIXER_LAST;
1703 dip->next = AUDIO_MIXER_LAST;
1704 strcpy(dip->label.name, AudioNdac);
1705 dip->un.v.num_channels = 2;
1706 strcpy(dip->un.v.units.name, AudioNvolume);
1707 return (0);
1708
1709 case ESS_MIC_PLAY_VOL:
1710 dip->type = AUDIO_MIXER_VALUE;
1711 dip->mixer_class = ESS_INPUT_CLASS;
1712 dip->prev = AUDIO_MIXER_LAST;
1713 dip->next = AUDIO_MIXER_LAST;
1714 strcpy(dip->label.name, AudioNmicrophone);
1715 dip->un.v.num_channels = 2;
1716 strcpy(dip->un.v.units.name, AudioNvolume);
1717 return (0);
1718
1719 case ESS_LINE_PLAY_VOL:
1720 dip->type = AUDIO_MIXER_VALUE;
1721 dip->mixer_class = ESS_INPUT_CLASS;
1722 dip->prev = AUDIO_MIXER_LAST;
1723 dip->next = AUDIO_MIXER_LAST;
1724 strcpy(dip->label.name, AudioNline);
1725 dip->un.v.num_channels = 2;
1726 strcpy(dip->un.v.units.name, AudioNvolume);
1727 return (0);
1728
1729 case ESS_SYNTH_PLAY_VOL:
1730 dip->type = AUDIO_MIXER_VALUE;
1731 dip->mixer_class = ESS_INPUT_CLASS;
1732 dip->prev = AUDIO_MIXER_LAST;
1733 dip->next = AUDIO_MIXER_LAST;
1734 strcpy(dip->label.name, AudioNfmsynth);
1735 dip->un.v.num_channels = 2;
1736 strcpy(dip->un.v.units.name, AudioNvolume);
1737 return (0);
1738
1739 case ESS_CD_PLAY_VOL:
1740 dip->type = AUDIO_MIXER_VALUE;
1741 dip->mixer_class = ESS_INPUT_CLASS;
1742 dip->prev = AUDIO_MIXER_LAST;
1743 dip->next = AUDIO_MIXER_LAST;
1744 strcpy(dip->label.name, AudioNcd);
1745 dip->un.v.num_channels = 2;
1746 strcpy(dip->un.v.units.name, AudioNvolume);
1747 return (0);
1748
1749 case ESS_AUXB_PLAY_VOL:
1750 dip->type = AUDIO_MIXER_VALUE;
1751 dip->mixer_class = ESS_INPUT_CLASS;
1752 dip->prev = AUDIO_MIXER_LAST;
1753 dip->next = AUDIO_MIXER_LAST;
1754 strcpy(dip->label.name, "auxb");
1755 dip->un.v.num_channels = 2;
1756 strcpy(dip->un.v.units.name, AudioNvolume);
1757 return (0);
1758
1759 case ESS_INPUT_CLASS:
1760 dip->type = AUDIO_MIXER_CLASS;
1761 dip->mixer_class = ESS_INPUT_CLASS;
1762 dip->next = dip->prev = AUDIO_MIXER_LAST;
1763 strcpy(dip->label.name, AudioCinputs);
1764 return (0);
1765
1766
1767 case ESS_MASTER_VOL:
1768 dip->type = AUDIO_MIXER_VALUE;
1769 dip->mixer_class = ESS_OUTPUT_CLASS;
1770 dip->prev = dip->next = AUDIO_MIXER_LAST;
1771 strcpy(dip->label.name, AudioNmaster);
1772 dip->un.v.num_channels = 2;
1773 strcpy(dip->un.v.units.name, AudioNvolume);
1774 return (0);
1775
1776 case ESS_PCSPEAKER_VOL:
1777 dip->type = AUDIO_MIXER_VALUE;
1778 dip->mixer_class = ESS_OUTPUT_CLASS;
1779 dip->prev = AUDIO_MIXER_LAST;
1780 dip->next = AUDIO_MIXER_LAST;
1781 strcpy(dip->label.name, "pc_speaker");
1782 dip->un.v.num_channels = 1;
1783 strcpy(dip->un.v.units.name, AudioNvolume);
1784 return (0);
1785
1786 case ESS_OUTPUT_CLASS:
1787 dip->type = AUDIO_MIXER_CLASS;
1788 dip->mixer_class = ESS_OUTPUT_CLASS;
1789 dip->next = dip->prev = AUDIO_MIXER_LAST;
1790 strcpy(dip->label.name, AudioCoutputs);
1791 return (0);
1792
1793
1794 case ESS_DAC_REC_VOL:
1795 dip->type = AUDIO_MIXER_VALUE;
1796 dip->mixer_class = ESS_RECORD_CLASS;
1797 dip->prev = AUDIO_MIXER_LAST;
1798 dip->next = AUDIO_MIXER_LAST;
1799 strcpy(dip->label.name, AudioNdac);
1800 dip->un.v.num_channels = 2;
1801 strcpy(dip->un.v.units.name, AudioNvolume);
1802 return (0);
1803
1804 case ESS_MIC_REC_VOL:
1805 dip->type = AUDIO_MIXER_VALUE;
1806 dip->mixer_class = ESS_RECORD_CLASS;
1807 dip->prev = AUDIO_MIXER_LAST;
1808 dip->next = ESS_MIC_PREAMP;
1809 strcpy(dip->label.name, AudioNmicrophone);
1810 dip->un.v.num_channels = 2;
1811 strcpy(dip->un.v.units.name, AudioNvolume);
1812 return (0);
1813
1814 case ESS_LINE_REC_VOL:
1815 dip->type = AUDIO_MIXER_VALUE;
1816 dip->mixer_class = ESS_RECORD_CLASS;
1817 dip->prev = AUDIO_MIXER_LAST;
1818 dip->next = AUDIO_MIXER_LAST;
1819 strcpy(dip->label.name, AudioNline);
1820 dip->un.v.num_channels = 2;
1821 strcpy(dip->un.v.units.name, AudioNvolume);
1822 return (0);
1823
1824 case ESS_SYNTH_REC_VOL:
1825 dip->type = AUDIO_MIXER_VALUE;
1826 dip->mixer_class = ESS_RECORD_CLASS;
1827 dip->prev = AUDIO_MIXER_LAST;
1828 dip->next = AUDIO_MIXER_LAST;
1829 strcpy(dip->label.name, AudioNfmsynth);
1830 dip->un.v.num_channels = 2;
1831 strcpy(dip->un.v.units.name, AudioNvolume);
1832 return (0);
1833
1834 case ESS_CD_REC_VOL:
1835 dip->type = AUDIO_MIXER_VALUE;
1836 dip->mixer_class = ESS_RECORD_CLASS;
1837 dip->prev = AUDIO_MIXER_LAST;
1838 dip->next = AUDIO_MIXER_LAST;
1839 strcpy(dip->label.name, AudioNcd);
1840 dip->un.v.num_channels = 2;
1841 strcpy(dip->un.v.units.name, AudioNvolume);
1842 return (0);
1843
1844 case ESS_AUXB_REC_VOL:
1845 dip->type = AUDIO_MIXER_VALUE;
1846 dip->mixer_class = ESS_RECORD_CLASS;
1847 dip->prev = AUDIO_MIXER_LAST;
1848 dip->next = AUDIO_MIXER_LAST;
1849 strcpy(dip->label.name, "auxb");
1850 dip->un.v.num_channels = 2;
1851 strcpy(dip->un.v.units.name, AudioNvolume);
1852 return (0);
1853
1854 case ESS_MIC_PREAMP:
1855 dip->type = AUDIO_MIXER_ENUM;
1856 dip->mixer_class = ESS_RECORD_CLASS;
1857 dip->prev = ESS_MIC_REC_VOL;
1858 dip->next = AUDIO_MIXER_LAST;
1859 strcpy(dip->label.name, AudioNenhanced);
1860 dip->un.e.num_mem = 2;
1861 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1862 dip->un.e.member[0].ord = 0;
1863 strcpy(dip->un.e.member[1].label.name, AudioNon);
1864 dip->un.e.member[1].ord = 1;
1865 return (0);
1866
1867 case ESS_RECORD_VOL:
1868 dip->type = AUDIO_MIXER_VALUE;
1869 dip->mixer_class = ESS_RECORD_CLASS;
1870 dip->prev = AUDIO_MIXER_LAST;
1871 dip->next = AUDIO_MIXER_LAST;
1872 strcpy(dip->label.name, AudioNrecord);
1873 dip->un.v.num_channels = 2;
1874 strcpy(dip->un.v.units.name, AudioNvolume);
1875 return (0);
1876
1877 case ESS_RECORD_SOURCE:
1878 dip->mixer_class = ESS_RECORD_CLASS;
1879 dip->prev = dip->next = AUDIO_MIXER_LAST;
1880 strcpy(dip->label.name, AudioNsource);
1881 dip->type = AUDIO_MIXER_SET;
1882 dip->un.s.num_mem = 6;
1883 strcpy(dip->un.s.member[0].label.name, AudioNdac);
1884 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
1885 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
1886 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
1887 strcpy(dip->un.s.member[2].label.name, AudioNline);
1888 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
1889 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
1890 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
1891 strcpy(dip->un.s.member[4].label.name, AudioNcd);
1892 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
1893 strcpy(dip->un.s.member[5].label.name, "auxb");
1894 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
1895 return (0);
1896
1897 case ESS_RECORD_CLASS:
1898 dip->type = AUDIO_MIXER_CLASS;
1899 dip->mixer_class = ESS_RECORD_CLASS;
1900 dip->next = dip->prev = AUDIO_MIXER_LAST;
1901 strcpy(dip->label.name, AudioCrecord);
1902 return (0);
1903
1904
1905 case ESS_RECORD_MONITOR:
1906 dip->mixer_class = ESS_MONITOR_CLASS;
1907 dip->prev = dip->next = AUDIO_MIXER_LAST;
1908 strcpy(dip->label.name, AudioNmonitor);
1909 dip->type = AUDIO_MIXER_ENUM;
1910 dip->un.e.num_mem = 2;
1911 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1912 dip->un.e.member[0].ord = 0;
1913 strcpy(dip->un.e.member[1].label.name, AudioNon);
1914 dip->un.e.member[1].ord = 1;
1915 return (0);
1916
1917 case ESS_MONITOR_CLASS:
1918 dip->type = AUDIO_MIXER_CLASS;
1919 dip->mixer_class = ESS_MONITOR_CLASS;
1920 dip->next = dip->prev = AUDIO_MIXER_LAST;
1921 strcpy(dip->label.name, AudioCmonitor);
1922 return (0);
1923 }
1924
1925 return (ENXIO);
1926 }
1927
1928 void *
1929 ess_malloc(addr, size, pool, flags)
1930 void *addr;
1931 unsigned long size;
1932 int pool;
1933 int flags;
1934 {
1935 struct ess_softc *sc = addr;
1936
1937 return isa_malloc(sc->sc_ic, 4, size, pool, flags);
1938 }
1939
1940 void
1941 ess_free(addr, ptr, pool)
1942 void *addr;
1943 void *ptr;
1944 int pool;
1945 {
1946 isa_free(ptr, pool);
1947 }
1948
1949 unsigned long
1950 ess_round(addr, size)
1951 void *addr;
1952 unsigned long size;
1953 {
1954 if (size > MAX_ISADMA)
1955 size = MAX_ISADMA;
1956 return size;
1957 }
1958
1959 int
1960 ess_mappage(addr, mem, off, prot)
1961 void *addr;
1962 void *mem;
1963 int off;
1964 int prot;
1965 {
1966 return (isa_mappage(mem, off, prot));
1967 }
1968
1969 int
1970 ess_get_props(addr)
1971 void *addr;
1972 {
1973 struct ess_softc *sc = addr;
1974 return (AUDIO_PROP_MMAP |
1975 (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0));
1976 }
1977
1978 /* ============================================
1979 * Generic functions for ess, not used by audio h/w i/f
1980 * =============================================
1981 */
1982
1983 /*
1984 * Reset the chip.
1985 * Return non-zero if the chip isn't detected.
1986 */
1987 int
1988 ess_reset(sc)
1989 struct ess_softc *sc;
1990 {
1991 bus_space_tag_t iot = sc->sc_iot;
1992 bus_space_handle_t ioh = sc->sc_ioh;
1993
1994 sc->sc_in.intr = 0;
1995 sc->sc_in.dmacnt = 0;
1996 if (sc->sc_in.active) {
1997 isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
1998 sc->sc_in.active = 0;
1999 }
2000
2001 sc->sc_out.intr = 0;
2002 sc->sc_out.dmacnt = 0;
2003 if (sc->sc_out.active) {
2004 isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
2005 sc->sc_out.active = 0;
2006 }
2007
2008 EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT);
2009 delay(10000);
2010 EWRITE1(iot, ioh, ESS_DSP_RESET, 0);
2011 if (ess_rdsp(sc) != ESS_MAGIC)
2012 return (1);
2013
2014 /* Enable access to the ESS extension commands. */
2015 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
2016
2017 return (0);
2018 }
2019
2020 void
2021 ess_set_gain(sc, port, on)
2022 struct ess_softc *sc;
2023 int port;
2024 int on;
2025 {
2026 int gain, left, right;
2027 int mix;
2028 int src;
2029 int stereo;
2030
2031 /*
2032 * Most gain controls are found in the mixer registers and
2033 * are stereo. Any that are not, must set mix and stereo as
2034 * required.
2035 */
2036 mix = 1;
2037 stereo = 1;
2038
2039 switch (port) {
2040 case ESS_MASTER_VOL:
2041 src = 0x32;
2042 break;
2043 case ESS_DAC_PLAY_VOL:
2044 src = 0x7C;
2045 break;
2046 case ESS_MIC_PLAY_VOL:
2047 src = 0x1A;
2048 break;
2049 case ESS_LINE_PLAY_VOL:
2050 src = 0x3E;
2051 break;
2052 case ESS_SYNTH_PLAY_VOL:
2053 src = 0x36;
2054 break;
2055 case ESS_CD_PLAY_VOL:
2056 src = 0x38;
2057 break;
2058 case ESS_AUXB_PLAY_VOL:
2059 src = 0x3A;
2060 break;
2061 case ESS_PCSPEAKER_VOL:
2062 src = 0x3C;
2063 stereo = 0;
2064 break;
2065 case ESS_DAC_REC_VOL:
2066 src = 0x69;
2067 break;
2068 case ESS_MIC_REC_VOL:
2069 src = 0x68;
2070 break;
2071 case ESS_LINE_REC_VOL:
2072 src = 0x6E;
2073 break;
2074 case ESS_SYNTH_REC_VOL:
2075 src = 0x6B;
2076 break;
2077 case ESS_CD_REC_VOL:
2078 src = 0x6A;
2079 break;
2080 case ESS_AUXB_REC_VOL:
2081 src = 0x6C;
2082 break;
2083 case ESS_RECORD_VOL:
2084 src = 0xB4;
2085 mix = 0;
2086 break;
2087 default:
2088 return;
2089 }
2090
2091 if (on) {
2092 left = sc->gain[port][ESS_LEFT];
2093 right = sc->gain[port][ESS_RIGHT];
2094 } else {
2095 left = right = 0;
2096 }
2097
2098 if (stereo)
2099 gain = ESS_STEREO_GAIN(left, right);
2100 else
2101 gain = ESS_MONO_GAIN(left);
2102
2103 if (mix)
2104 ess_write_mix_reg(sc, src, gain);
2105 else
2106 ess_write_x_reg(sc, src, gain);
2107 }
2108
2109 int
2110 ess_set_in_ports(sc, mask)
2111 struct ess_softc *sc;
2112 int mask;
2113 {
2114 mixer_devinfo_t di;
2115 int i;
2116 int port;
2117 int tmp;
2118
2119 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
2120
2121 /*
2122 * Get the device info for the record source control,
2123 * including the list of available sources.
2124 */
2125 di.index = ESS_RECORD_SOURCE;
2126 if (ess_query_devinfo(sc, &di))
2127 return EINVAL;
2128
2129 /*
2130 * Set or disable the record volume control for each of the
2131 * possible sources.
2132 */
2133 for (i = 0; i < di.un.s.num_mem; i++)
2134 {
2135 /*
2136 * Calculate the source port number from its mask.
2137 */
2138 tmp = di.un.s.member[i].mask >> 1;
2139 for (port = 0; tmp; port++) {
2140 tmp >>= 1;
2141 }
2142
2143 /*
2144 * Set the source gain:
2145 * to the current value if source is enabled
2146 * to zero if source is disabled
2147 */
2148 ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
2149 }
2150
2151 sc->in_mask = mask;
2152
2153 /*
2154 * We have to fake a single port since the upper layer expects
2155 * one only. We choose the lowest numbered port that is enabled.
2156 */
2157 for(i = 0; i < ESS_NPORT; i++) {
2158 if (mask & (1 << i)) {
2159 sc->in_port = i;
2160 break;
2161 }
2162 }
2163
2164 return (0);
2165 }
2166
2167 void
2168 ess_speaker_on(sc)
2169 struct ess_softc *sc;
2170 {
2171 /* Disable mute on left- and right-master volume. */
2172 ess_clear_mreg_bits(sc, 0x60, 0x40);
2173 ess_clear_mreg_bits(sc, 0x62, 0x40);
2174 }
2175
2176 void
2177 ess_speaker_off(sc)
2178 struct ess_softc *sc;
2179 {
2180 /* Enable mute on left- and right-master volume. */
2181 ess_set_mreg_bits(sc, 0x60, 0x40);
2182 ess_set_mreg_bits(sc, 0x62, 0x40);
2183 }
2184
2185 /*
2186 * Calculate the time constant for the requested sampling rate.
2187 */
2188 u_int
2189 ess_srtotc(rate)
2190 u_int rate;
2191 {
2192 u_int tc;
2193
2194 /* The following formulae are from the ESS data sheet. */
2195 if (rate < 22050)
2196 tc = 128 - 397700L / rate;
2197 else
2198 tc = 256 - 795500L / rate;
2199
2200 return (tc);
2201 }
2202
2203
2204 /*
2205 * Calculate the filter constant for the reuqested sampling rate.
2206 */
2207 u_int
2208 ess_srtofc(rate)
2209 u_int rate;
2210 {
2211 /*
2212 * The following formula is derived from the information in
2213 * the ES1887 data sheet, based on a roll-off frequency of
2214 * 87%.
2215 */
2216 return (256 - 200279L / rate);
2217 }
2218
2219
2220 /*
2221 * Return the status of the DSP.
2222 */
2223 u_char
2224 ess_get_dsp_status(sc)
2225 struct ess_softc *sc;
2226 {
2227 bus_space_tag_t iot = sc->sc_iot;
2228 bus_space_handle_t ioh = sc->sc_ioh;
2229
2230 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS));
2231 }
2232
2233
2234 /*
2235 * Return the read status of the DSP: 1 -> DSP ready for reading
2236 * 0 -> DSP not ready for reading
2237 */
2238 u_char
2239 ess_dsp_read_ready(sc)
2240 struct ess_softc *sc;
2241 {
2242 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) ==
2243 ESS_DSP_READ_READY) ? 1 : 0);
2244 }
2245
2246
2247 /*
2248 * Return the write status of the DSP: 1 -> DSP ready for writing
2249 * 0 -> DSP not ready for writing
2250 */
2251 u_char
2252 ess_dsp_write_ready(sc)
2253 struct ess_softc *sc;
2254 {
2255 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
2256 ESS_DSP_WRITE_READY) ? 1 : 0);
2257 }
2258
2259
2260 /*
2261 * Read a byte from the DSP.
2262 */
2263 int
2264 ess_rdsp(sc)
2265 struct ess_softc *sc;
2266 {
2267 bus_space_tag_t iot = sc->sc_iot;
2268 bus_space_handle_t ioh = sc->sc_ioh;
2269 int i;
2270
2271 for (i = ESS_READ_TIMEOUT; i > 0; --i) {
2272 if (ess_dsp_read_ready(sc)) {
2273 i = EREAD1(iot, ioh, ESS_DSP_READ);
2274 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i));
2275 return i;
2276 } else
2277 delay(10);
2278 }
2279
2280 DPRINTF(("ess_rdsp: timed out\n"));
2281 return (-1);
2282 }
2283
2284 /*
2285 * Write a byte to the DSP.
2286 */
2287 int
2288 ess_wdsp(sc, v)
2289 struct ess_softc *sc;
2290 u_char v;
2291 {
2292 bus_space_tag_t iot = sc->sc_iot;
2293 bus_space_handle_t ioh = sc->sc_ioh;
2294 int i;
2295
2296 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v));
2297
2298 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
2299 if (ess_dsp_write_ready(sc)) {
2300 EWRITE1(iot, ioh, ESS_DSP_WRITE, v);
2301 return (0);
2302 } else
2303 delay(10);
2304 }
2305
2306 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
2307 return (-1);
2308 }
2309
2310 /*
2311 * Write a value to one of the ESS extended registers.
2312 */
2313 int
2314 ess_write_x_reg(sc, reg, val)
2315 struct ess_softc *sc;
2316 u_char reg;
2317 u_char val;
2318 {
2319 int error;
2320
2321 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2322 if ((error = ess_wdsp(sc, reg)) == 0)
2323 error = ess_wdsp(sc, val);
2324
2325 return error;
2326 }
2327
2328 /*
2329 * Read the value of one of the ESS extended registers.
2330 */
2331 u_char
2332 ess_read_x_reg(sc, reg)
2333 struct ess_softc *sc;
2334 u_char reg;
2335 {
2336 int error;
2337 int val;
2338
2339 if ((error = ess_wdsp(sc, 0xC0)) == 0)
2340 error = ess_wdsp(sc, reg);
2341 if (error)
2342 DPRINTF(("Error reading extended register 0x%02x\n", reg));
2343 /* REVISIT: what if an error is returned above? */
2344 val = ess_rdsp(sc);
2345 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2346 return val;
2347 }
2348
2349 void
2350 ess_clear_xreg_bits(sc, reg, mask)
2351 struct ess_softc *sc;
2352 u_char reg;
2353 u_char mask;
2354 {
2355 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
2356 DPRINTF(("Error clearing bits in extended register 0x%02x\n",
2357 reg));
2358 }
2359
2360 void
2361 ess_set_xreg_bits(sc, reg, mask)
2362 struct ess_softc *sc;
2363 u_char reg;
2364 u_char mask;
2365 {
2366 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
2367 DPRINTF(("Error setting bits in extended register 0x%02x\n",
2368 reg));
2369 }
2370
2371
2372 /*
2373 * Write a value to one of the ESS mixer registers.
2374 */
2375 void
2376 ess_write_mix_reg(sc, reg, val)
2377 struct ess_softc *sc;
2378 u_char reg;
2379 u_char val;
2380 {
2381 bus_space_tag_t iot = sc->sc_iot;
2382 bus_space_handle_t ioh = sc->sc_ioh;
2383 int s;
2384
2385 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));
2386
2387 s = splaudio();
2388 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2389 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);
2390 splx(s);
2391 }
2392
2393 /*
2394 * Read the value of one of the ESS mixer registers.
2395 */
2396 u_char
2397 ess_read_mix_reg(sc, reg)
2398 struct ess_softc *sc;
2399 u_char reg;
2400 {
2401 bus_space_tag_t iot = sc->sc_iot;
2402 bus_space_handle_t ioh = sc->sc_ioh;
2403 int s;
2404 u_char val;
2405
2406 s = splaudio();
2407 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2408 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);
2409 splx(s);
2410
2411 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));
2412 return val;
2413 }
2414
2415 void
2416 ess_clear_mreg_bits(sc, reg, mask)
2417 struct ess_softc *sc;
2418 u_char reg;
2419 u_char mask;
2420 {
2421 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
2422 }
2423
2424 void
2425 ess_set_mreg_bits(sc, reg, mask)
2426 struct ess_softc *sc;
2427 u_char reg;
2428 u_char mask;
2429 {
2430 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
2431 }
2432