ess.c revision 1.9 1 /* $NetBSD: ess.c,v 1.9 1998/08/08 21:37:00 mycroft Exp $ */
2
3 /*
4 * Copyright 1997
5 * Digital Equipment Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and
8 * copied only in accordance with the following terms and conditions.
9 * Subject to these conditions, you may download, copy, install,
10 * use, modify and distribute this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce
14 * and retain this copyright notice and list of conditions as
15 * they appear in the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 * Digital Equipment Corporation. Neither the "Digital Equipment
19 * Corporation" name nor any trademark or logo of Digital Equipment
20 * Corporation may be used to endorse or promote products derived
21 * from this software without the prior written permission of
22 * Digital Equipment Corporation.
23 *
24 * 3) This software is provided "AS-IS" and any express or implied
25 * warranties, including but not limited to, any implied warranties
26 * of merchantability, fitness for a particular purpose, or
27 * non-infringement are disclaimed. In no event shall DIGITAL be
28 * liable for any damages whatsoever, and in particular, DIGITAL
29 * shall not be liable for special, indirect, consequential, or
30 * incidental damages or damages for lost profits, loss of
31 * revenue or loss of use, whether such damages arise in contract,
32 * negligence, tort, under statute, in equity, at law or otherwise,
33 * even if advised of the possibility of such damage.
34 */
35
36 /*
37 **++
38 **
39 ** ess.c
40 **
41 ** FACILITY:
42 **
43 ** DIGITAL Network Appliance Reference Design (DNARD)
44 **
45 ** MODULE DESCRIPTION:
46 **
47 ** This module contains the device driver for the ESS
48 ** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
49 ** used as a reference point when implementing this driver.
50 **
51 ** AUTHORS:
52 **
53 ** Blair Fidler Software Engineering Australia
54 ** Gold Coast, Australia.
55 **
56 ** CREATION DATE:
57 **
58 ** March 10, 1997.
59 **
60 ** MODIFICATION HISTORY:
61 **
62 **--
63 */
64
65 /*
66 * Modification by Lennart Augustsson:
67 * Adapt for bus dma.
68 * Change to 1.3 audio interface.
69 * Major cleanup.
70 */
71
72 /*
73 * TODO (falling priority):
74 * - add looping DMA for input.
75 */
76
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/errno.h>
80 #include <sys/ioctl.h>
81 #include <sys/syslog.h>
82 #include <sys/device.h>
83 #include <sys/proc.h>
84
85 #include <machine/cpu.h>
86 #include <machine/intr.h>
87 #include <machine/bus.h>
88
89 #include <sys/audioio.h>
90 #include <dev/audio_if.h>
91 #include <dev/auconv.h>
92 #include <dev/mulaw.h>
93
94 #include <dev/isa/isavar.h>
95 #include <dev/isa/isadmavar.h>
96
97 #include <dev/isa/essvar.h>
98 #include <dev/isa/essreg.h>
99
100 #ifdef AUDIO_DEBUG
101 #define DPRINTF(x) if (essdebug) printf x
102 #define DPRINTFN(n,x) if (essdebug>(n)) printf x
103 int essdebug = 0;
104 #else
105 #define DPRINTF(x)
106 #define DPRINTFN(n,x)
107 #endif
108
109 #if 0
110 unsigned uuu;
111 #define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu)
112 #define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d))
113 #else
114 #define EREAD1(t, h, a) bus_space_read_1(t, h, a)
115 #define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d)
116 #endif
117
118
119 int ess_setup_sc __P((struct ess_softc *, int));
120
121 int ess_open __P((void *, int));
122 void ess_close __P((void *));
123 int ess_getdev __P((void *, struct audio_device *));
124 int ess_drain __P((void *));
125
126 int ess_query_encoding __P((void *, struct audio_encoding *));
127
128 int ess_set_params __P((void *, int, int, struct audio_params *,
129 struct audio_params *));
130 int ess_set_in_sr __P((void *, u_long));
131 int ess_set_out_sr __P((void *, u_long));
132 int ess_set_in_precision __P((void *, u_int));
133 int ess_set_out_precision __P((void *, u_int));
134 int ess_set_in_channels __P((void *, int));
135 int ess_set_out_channels __P((void *, int));
136
137 int ess_round_blocksize __P((void *, int));
138
139 int ess_dma_init_output __P((void *, void *, int));
140 int ess_dma_output __P((void *, void *, int, void (*)(void *), void *));
141 int ess_dma_input __P((void *, void *, int, void (*)(void *), void *));
142 int ess_halt_output __P((void *));
143 int ess_halt_input __P((void *));
144
145 int ess_intr_output __P((void *));
146 int ess_intr_input __P((void *));
147
148 int ess_speaker_ctl __P((void *, int));
149
150 int ess_getdev __P((void *, struct audio_device *));
151
152 int ess_set_port __P((void *, mixer_ctrl_t *));
153 int ess_get_port __P((void *, mixer_ctrl_t *));
154
155 void *ess_malloc __P((void *, unsigned long, int, int));
156 void ess_free __P((void *, void *, int));
157 unsigned long ess_round __P((void *, unsigned long));
158 int ess_mappage __P((void *, void *, int, int));
159
160
161 int ess_query_devinfo __P((void *, mixer_devinfo_t *));
162 int ess_get_props __P((void *));
163
164 void ess_speaker_on __P((struct ess_softc *));
165 void ess_speaker_off __P((struct ess_softc *));
166
167 int ess_config_addr __P((struct ess_softc *));
168 void ess_config_irq __P((struct ess_softc *));
169 void ess_config_drq __P((struct ess_softc *));
170 void ess_setup __P((struct ess_softc *));
171 int ess_identify __P((struct ess_softc *));
172
173 int ess_reset __P((struct ess_softc *));
174 void ess_set_gain __P((struct ess_softc *, int, int));
175 int ess_set_in_ports __P((struct ess_softc *, int));
176 u_int ess_srtotc __P((u_int));
177 u_int ess_srtofc __P((u_int));
178 u_char ess_get_dsp_status __P((struct ess_softc *));
179 u_char ess_dsp_read_ready __P((struct ess_softc *));
180 u_char ess_dsp_write_ready __P((struct ess_softc *sc));
181 int ess_rdsp __P((struct ess_softc *));
182 int ess_wdsp __P((struct ess_softc *, u_char));
183 u_char ess_read_x_reg __P((struct ess_softc *, u_char));
184 int ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
185 void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
186 void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
187 u_char ess_read_mix_reg __P((struct ess_softc *, u_char));
188 void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
189 void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
190 void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
191
192 static char *essmodel[] = {
193 "unsupported",
194 "1888",
195 "1887",
196 "888"
197 };
198
199 struct audio_device ess_device = {
200 "ESS Technology",
201 "x",
202 "ess"
203 };
204
205 /*
206 * Define our interface to the higher level audio driver.
207 */
208
209 struct audio_hw_if ess_hw_if = {
210 ess_open,
211 ess_close,
212 ess_drain,
213 ess_query_encoding,
214 ess_set_params,
215 ess_round_blocksize,
216 NULL,
217 ess_dma_init_output,
218 NULL,
219 ess_dma_output,
220 ess_dma_input,
221 ess_halt_output,
222 ess_halt_input,
223 ess_speaker_ctl,
224 ess_getdev,
225 NULL,
226 ess_set_port,
227 ess_get_port,
228 ess_query_devinfo,
229 ess_malloc,
230 ess_free,
231 ess_round,
232 ess_mappage,
233 ess_get_props,
234 };
235
236 #ifdef AUDIO_DEBUG
237 void ess_printsc __P((struct ess_softc *));
238 void ess_dump_mixer __P((struct ess_softc *));
239
240 void
241 ess_printsc(sc)
242 struct ess_softc *sc;
243 {
244 int i;
245
246 printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
247 (int)sc->sc_open, sc->sc_iobase, sc->out_port,
248 sc->in_port, sc->spkr_state ? "on" : "off");
249
250 printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
251 sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
252 sc->sc_out.intr, sc->sc_out.arg);
253
254 printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
255 sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
256 sc->sc_in.intr, sc->sc_in.arg);
257
258 printf("gain:");
259 for (i = 0; i < ESS_NDEVS; i++)
260 printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
261 printf("\n");
262 }
263
264 void
265 ess_dump_mixer(sc)
266 struct ess_softc *sc;
267 {
268 printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
269 0x7C, ess_read_mix_reg(sc, 0x7C));
270 printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
271 0x1A, ess_read_mix_reg(sc, 0x1A));
272 printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
273 0x3E, ess_read_mix_reg(sc, 0x3E));
274 printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
275 0x36, ess_read_mix_reg(sc, 0x36));
276 printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
277 0x38, ess_read_mix_reg(sc, 0x38));
278 printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
279 0x3A, ess_read_mix_reg(sc, 0x3A));
280 printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
281 0x32, ess_read_mix_reg(sc, 0x32));
282 printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
283 0x3C, ess_read_mix_reg(sc, 0x3C));
284 printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
285 0x69, ess_read_mix_reg(sc, 0x69));
286 printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
287 0x68, ess_read_mix_reg(sc, 0x68));
288 printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
289 0x6E, ess_read_mix_reg(sc, 0x6E));
290 printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
291 0x6B, ess_read_mix_reg(sc, 0x6B));
292 printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
293 0x6A, ess_read_mix_reg(sc, 0x6A));
294 printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
295 0x6C, ess_read_mix_reg(sc, 0x6C));
296 printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
297 0xB4, ess_read_x_reg(sc, 0xB4));
298 printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
299 0x14, ess_read_mix_reg(sc, 0x14));
300
301 printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
302 ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
303 printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
304 ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
305 printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
306 0x1c, ess_read_mix_reg(sc, 0x1c),
307 0x7a, ess_read_mix_reg(sc, 0x7a));
308 }
309
310 #endif
311
312 /*
313 * Configure the ESS chip for the desired audio base address.
314 */
315 int
316 ess_config_addr(sc)
317 struct ess_softc *sc;
318 {
319 int iobase = sc->sc_iobase;
320 bus_space_tag_t iot = sc->sc_iot;
321
322 /*
323 * Configure using the System Control Register method. This
324 * method is used when the AMODE line is tied high, which is
325 * the case for the Shark, but not for the evaluation board.
326 */
327
328 bus_space_handle_t scr_access_ioh;
329 bus_space_handle_t scr_ioh;
330 u_short scr_value;
331
332 /*
333 * Set the SCR bit to enable audio.
334 */
335 scr_value = ESS_SCR_AUDIO_ENABLE;
336
337 /*
338 * Set the SCR bits necessary to select the specified audio
339 * base address.
340 */
341 switch(iobase) {
342 case 0x220:
343 scr_value |= ESS_SCR_AUDIO_220;
344 break;
345 case 0x230:
346 scr_value |= ESS_SCR_AUDIO_230;
347 break;
348 case 0x240:
349 scr_value |= ESS_SCR_AUDIO_240;
350 break;
351 case 0x250:
352 scr_value |= ESS_SCR_AUDIO_250;
353 break;
354 default:
355 printf("ess: configured iobase 0x%x invalid\n", iobase);
356 return (1);
357 break;
358 }
359
360 /*
361 * Get a mapping for the System Control Register (SCR) access
362 * registers and the SCR data registers.
363 */
364 if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
365 0, &scr_access_ioh)) {
366 printf("ess: can't map SCR access registers\n");
367 return (1);
368 }
369 if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
370 0, &scr_ioh)) {
371 printf("ess: can't map SCR registers\n");
372 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
373 return (1);
374 }
375
376 /* Unlock the SCR. */
377 EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
378
379 /* Write the base address information into SCR[0]. */
380 EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0);
381 EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
382
383 /* Lock the SCR. */
384 EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
385
386 /* Unmap the SCR access ports and the SCR data ports. */
387 bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
388 bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
389
390 return 0;
391 }
392
393
394 /*
395 * Configure the ESS chip for the desired IRQ and DMA channels.
396 * ESS ISA
397 * --------
398 * IRQA irq9
399 * IRQB irq5
400 * IRQC irq7
401 * IRQD irq10
402 * IRQE irq15
403 *
404 * DRQA drq0
405 * DRQB drq1
406 * DRQC drq3
407 * DRQD drq5
408 */
409 void
410 ess_config_irq(sc)
411 struct ess_softc *sc;
412 {
413 int v;
414
415 DPRINTFN(2,("ess_config_irq\n"));
416
417 if (sc->sc_in.irq != sc->sc_out.irq) {
418 /* Configure Audio 1 (record) for the appropriate IRQ line. */
419 v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */
420 switch(sc->sc_in.irq) {
421 case 5:
422 v |= ESS_IRQ_CTRL_INTRB;
423 break;
424 case 7:
425 v |= ESS_IRQ_CTRL_INTRC;
426 break;
427 case 9:
428 v |= ESS_IRQ_CTRL_INTRA;
429 break;
430 case 10:
431 v |= ESS_IRQ_CTRL_INTRD;
432 break;
433 #ifdef DIAGNOSTIC
434 default:
435 printf("ess: configured irq %d not supported for Audio 1\n",
436 sc->sc_in.irq);
437 return;
438 #endif
439 }
440 ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v);
441 /* irq2 is hardwired to 15 in this mode */
442 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
443 ESS_AUDIO2_CTRL2_IRQ2_ENABLE);
444 /* Use old method. */
445 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888);
446 } else {
447 /* Use new method, both interrupts are the same. */
448 v = ESS_IS_SELECT_IRQ; /* enable intrs */
449 switch(sc->sc_out.irq) {
450 case 5:
451 v |= ESS_IS_INTRB;
452 break;
453 case 7:
454 v |= ESS_IS_INTRC;
455 break;
456 case 9:
457 v |= ESS_IS_INTRA;
458 break;
459 case 10:
460 v |= ESS_IS_INTRD;
461 break;
462 case 15:
463 v |= ESS_IS_INTRE;
464 break;
465 #ifdef DIAGNOSTIC
466 default:
467 printf("ess_config_irq: configured irq %d not supported for Audio 1\n",
468 sc->sc_in.irq);
469 return;
470 #endif
471 }
472 /* Set the IRQ */
473 ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v);
474 }
475 }
476
477
478 void
479 ess_config_drq(sc)
480 struct ess_softc *sc;
481 {
482 int v;
483
484 DPRINTFN(2,("ess_config_drq\n"));
485
486 /* Configure Audio 1 (record) for DMA on the appropriate channel. */
487 v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT;
488 switch(sc->sc_in.drq) {
489 case 0:
490 v |= ESS_DRQ_CTRL_DRQA;
491 break;
492 case 1:
493 v |= ESS_DRQ_CTRL_DRQB;
494 break;
495 case 3:
496 v |= ESS_DRQ_CTRL_DRQC;
497 break;
498 #ifdef DIAGNOSTIC
499 default:
500 printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n",
501 sc->sc_in.drq);
502 return;
503 #endif
504 }
505 /* Set DRQ1 */
506 ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v);
507
508 /* Configure DRQ2 */
509 v = ESS_AUDIO2_CTRL3_DRQ_PD;
510 switch(sc->sc_out.drq) {
511 case 0:
512 v |= ESS_AUDIO2_CTRL3_DRQA;
513 break;
514 case 1:
515 v |= ESS_AUDIO2_CTRL3_DRQB;
516 break;
517 case 3:
518 v |= ESS_AUDIO2_CTRL3_DRQC;
519 break;
520 case 5:
521 v |= ESS_AUDIO2_CTRL3_DRQC;
522 break;
523 #ifdef DIAGNOSTIC
524 default:
525 printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n",
526 sc->sc_out.drq);
527 return;
528 #endif
529 }
530 ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v);
531 /* Enable DMA 2 */
532 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
533 ESS_AUDIO2_CTRL2_DMA_ENABLE);
534 }
535
536 /*
537 * Set up registers after a reset.
538 */
539 void
540 ess_setup(sc)
541 struct ess_softc *sc;
542 {
543 ess_config_irq(sc);
544 ess_config_drq(sc);
545 if (IS16BITDRQ(sc->sc_out.drq))
546 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
547 ESS_AUDIO2_CTRL1_XFER_SIZE);
548 else
549 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
550 ESS_AUDIO2_CTRL1_XFER_SIZE);
551 #if 0
552 /* Use 8 byte per DMA */
553 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1, 0xc0);
554 #endif
555
556 DPRINTFN(2,("ess_setup: done\n"));
557 }
558
559 /*
560 * Determine the model of ESS chip we are talking to. Currently we
561 * only support ES1888, ES1887 and ES888. The method of determining
562 * the chip is based on the information on page 27 of the ES1887 data
563 * sheet.
564 *
565 * This routine sets the values of sc->sc_model and sc->sc_version.
566 */
567 int
568 ess_identify(sc)
569 struct ess_softc *sc;
570 {
571 u_char reg1;
572 u_char reg2;
573 u_char reg3;
574
575 sc->sc_model = ESS_UNSUPPORTED;
576 sc->sc_version = 0;
577
578
579 /*
580 * 1. Check legacy ID bytes. These should be 0x68 0x8n, where
581 * n >= 8 for an ES1887 or an ES888. Other values indicate
582 * earlier (unsupported) chips.
583 */
584 ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
585
586 if ((reg1 = ess_rdsp(sc)) != 0x68) {
587 printf("ess: First ID byte wrong (0x%02x)\n", reg1);
588 return 1;
589 }
590
591 reg2 = ess_rdsp(sc);
592 if (((reg2 & 0xf0) != 0x80) ||
593 ((reg2 & 0x0f) < 8)) {
594 printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
595 return 1;
596 }
597
598 /*
599 * Store the ID bytes as the version.
600 */
601 sc->sc_version = (reg1 << 8) + reg2;
602
603
604 /*
605 * 2. Verify we can change bit 2 in mixer register 0x64. This
606 * should be possible on all supported chips.
607 */
608 reg1 = ess_read_mix_reg(sc, 0x64);
609 reg2 = reg1 ^ 0x04; /* toggle bit 2 */
610
611 ess_write_mix_reg(sc, 0x64, reg2);
612
613 if (ess_read_mix_reg(sc, 0x64) != reg2) {
614 printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
615 return 1;
616 }
617
618 /*
619 * Restore the original value of mixer register 0x64.
620 */
621 ess_write_mix_reg(sc, 0x64, reg1);
622
623
624 /*
625 * 3. Verify we can change the value of mixer register
626 * ESS_MREG_SAMPLE_RATE.
627 * This should be possible on all supported chips.
628 * It is not necessary to restore the value of this mixer register.
629 */
630 reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE);
631 reg2 = reg1 ^ 0xff; /* toggle all bits */
632
633 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2);
634
635 if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) {
636 printf("ess: Hardware error (unable to change mixer register 0x70)\n");
637 return 1;
638 }
639
640 /*
641 * 4. Determine if we can change bit 5 in mixer register 0x64.
642 * This determines whether we have an ES1887:
643 *
644 * - can change indicates ES1887
645 * - can't change indicates ES1888 or ES888
646 */
647 reg1 = ess_read_mix_reg(sc, 0x64);
648 reg2 = reg1 ^ 0x20; /* toggle bit 5 */
649
650 ess_write_mix_reg(sc, 0x64, reg2);
651
652 if (ess_read_mix_reg(sc, 0x64) == reg2) {
653 sc->sc_model = ESS_1887;
654
655 /*
656 * Restore the original value of mixer register 0x64.
657 */
658 ess_write_mix_reg(sc, 0x64, reg1);
659 } else {
660 /*
661 * 5. Determine if we can change the value of mixer
662 * register 0x69 independently of mixer register
663 * 0x68. This determines which chip we have:
664 *
665 * - can modify idependently indicates ES888
666 * - register 0x69 is an alias of 0x68 indicates ES1888
667 */
668 reg1 = ess_read_mix_reg(sc, 0x68);
669 reg2 = ess_read_mix_reg(sc, 0x69);
670 reg3 = reg2 ^ 0xff; /* toggle all bits */
671
672 /*
673 * Write different values to each register.
674 */
675 ess_write_mix_reg(sc, 0x68, reg2);
676 ess_write_mix_reg(sc, 0x69, reg3);
677
678 if (ess_read_mix_reg(sc, 0x68) == reg2)
679 sc->sc_model = ESS_888;
680 else
681 sc->sc_model = ESS_1888;
682
683 /*
684 * Restore the original value of the registers.
685 */
686 ess_write_mix_reg(sc, 0x68, reg1);
687 ess_write_mix_reg(sc, 0x69, reg2);
688 }
689
690 return 0;
691 }
692
693
694 int
695 ess_setup_sc(sc, doinit)
696 struct ess_softc *sc;
697 int doinit;
698 {
699 /* Reset the chip. */
700 if (ess_reset(sc) != 0) {
701 DPRINTF(("ess_setup_sc: couldn't reset chip\n"));
702 return (1);
703 }
704
705 /* Identify the ESS chip, and check that it is supported. */
706 if (ess_identify(sc)) {
707 DPRINTF(("ess_setup_sc: couldn't identify\n"));
708 return (1);
709 }
710
711 return (0);
712 }
713
714 /*
715 * Probe for the ESS hardware.
716 */
717 int
718 essmatch(sc)
719 struct ess_softc *sc;
720 {
721 if (!ESS_BASE_VALID(sc->sc_iobase)) {
722 printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
723 return (0);
724 }
725
726 /* Configure the ESS chip for the desired audio base address. */
727 if (ess_config_addr(sc))
728 return (0);
729
730 if (ess_setup_sc(sc, 1))
731 return (0);
732
733 if (sc->sc_model == ESS_UNSUPPORTED) {
734 DPRINTF(("ess: Unsupported model\n"));
735 return (0);
736 }
737
738 /* Check that requested DMA channels are valid and different. */
739 if (!ESS_DRQ1_VALID(sc->sc_in.drq)) {
740 printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
741 return (0);
742 }
743 if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
744 printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
745 return (0);
746 }
747 if (sc->sc_in.drq == sc->sc_out.drq) {
748 printf("ess: play and record dma chan both %d\n",
749 sc->sc_in.drq);
750 return (0);
751 }
752
753 if (sc->sc_model == ESS_1887) {
754 /*
755 * Either use the 1887 interrupt mode with all interrupts
756 * mapped to the same irq, or use the 1888 method with
757 * irq fixed at 15.
758 */
759 if (sc->sc_in.irq == sc->sc_out.irq) {
760 if (!ESS_IRQ12_VALID(sc->sc_in.irq)) {
761 printf("ess: irq %d invalid\n", sc->sc_in.irq);
762 return (0);
763 }
764 goto irq_not1888;
765 }
766 } else {
767 /* Must use separate interrupts */
768 if (sc->sc_in.irq == sc->sc_out.irq) {
769 printf("ess: play and record irq both %d\n",
770 sc->sc_in.irq);
771 return (0);
772 }
773 }
774
775 /* Check that requested IRQ lines are valid and different. */
776 if (!ESS_IRQ1_VALID(sc->sc_in.irq)) {
777 printf("ess: record irq %d invalid\n", sc->sc_in.irq);
778 return (0);
779 }
780 if (!ESS_IRQ2_VALID(sc->sc_out.irq)) {
781 printf("ess: play irq %d invalid\n", sc->sc_out.irq);
782 return (0);
783 }
784 irq_not1888:
785
786 /* Check that the DRQs are free. */
787 if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
788 !isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
789 return (0);
790 /* XXX should we check IRQs as well? */
791
792 return (1);
793 }
794
795
796 /*
797 * Attach hardware to driver, attach hardware driver to audio
798 * pseudo-device driver.
799 */
800 void
801 essattach(sc)
802 struct ess_softc *sc;
803 {
804 struct audio_params pparams, rparams;
805 int i;
806 u_int v;
807
808 if (ess_setup_sc(sc, 0)) {
809 printf("%s: setup failed\n", sc->sc_dev.dv_xname);
810 return;
811 }
812
813 sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq,
814 sc->sc_out.ist, IPL_AUDIO,
815 ess_intr_output, sc);
816 sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq,
817 sc->sc_in.ist, IPL_AUDIO,
818 ess_intr_input, sc);
819
820 /* Create our DMA maps. */
821 if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
822 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
823 printf("%s: can't create map for drq %d\n",
824 sc->sc_dev.dv_xname, sc->sc_in.drq);
825 return;
826 }
827 if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
828 MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
829 printf("%s: can't create map for drq %d\n",
830 sc->sc_dev.dv_xname, sc->sc_out.drq);
831 return;
832 }
833
834 printf(" ESS Technology ES%s [version 0x%04x]\n",
835 essmodel[sc->sc_model], sc->sc_version);
836
837 /*
838 * Set record and play parameters to default values defined in
839 * generic audio driver.
840 */
841 pparams = audio_default;
842 rparams = audio_default;
843 ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
844
845 /* Do a hardware reset on the mixer. */
846 ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
847
848 /*
849 * Set volume of Audio 1 to zero and disable Audio 1 DAC input
850 * to playback mixer, since playback is always through Audio 2.
851 */
852 ess_write_mix_reg(sc, 0x14, 0);
853 ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
854
855 /*
856 * Set hardware record source to use output of the record
857 * mixer. We do the selection of record source in software by
858 * setting the gain of the unused sources to zero. (See
859 * ess_set_in_ports.)
860 */
861 ess_set_mreg_bits(sc, 0x1c, 0x07);
862 ess_clear_mreg_bits(sc, 0x7a, 0x10);
863 ess_set_mreg_bits(sc, 0x7a, 0x08);
864
865 /*
866 * Set gain on each mixer device to a sensible value.
867 * Devices not normally used are turned off, and other devices
868 * are set to 75% volume.
869 */
870 for (i = 0; i < ESS_NDEVS; i++) {
871 switch(i) {
872 case ESS_MIC_PLAY_VOL:
873 case ESS_LINE_PLAY_VOL:
874 case ESS_CD_PLAY_VOL:
875 case ESS_AUXB_PLAY_VOL:
876 case ESS_DAC_REC_VOL:
877 case ESS_LINE_REC_VOL:
878 case ESS_SYNTH_REC_VOL:
879 case ESS_CD_REC_VOL:
880 case ESS_AUXB_REC_VOL:
881 v = 0;
882 break;
883 default:
884 v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN * 3 / 4);
885 break;
886 }
887 sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
888 ess_set_gain(sc, i, 1);
889 }
890
891 ess_setup(sc);
892
893 /* Disable the speaker until the device is opened. */
894 ess_speaker_off(sc);
895 sc->spkr_state = SPKR_OFF;
896
897 sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
898 sprintf(ess_device.version, "0x%04x", sc->sc_version);
899
900 audio_attach_mi(&ess_hw_if, 0, sc, &sc->sc_dev);
901
902 #ifdef AUDIO_DEBUG
903 ess_printsc(sc);
904 #endif
905 }
906
907 /*
908 * Various routines to interface to higher level audio driver
909 */
910
911 int
912 ess_open(addr, flags)
913 void *addr;
914 int flags;
915 {
916 struct ess_softc *sc = addr;
917
918 DPRINTF(("ess_open: sc=%p\n", sc));
919
920 if (sc->sc_open != 0 || ess_reset(sc) != 0)
921 return ENXIO;
922
923 ess_setup(sc); /* because we did a reset */
924
925 sc->sc_open = 1;
926
927 DPRINTF(("ess_open: opened\n"));
928
929 return (0);
930 }
931
932 void
933 ess_close(addr)
934 void *addr;
935 {
936 struct ess_softc *sc = addr;
937
938 DPRINTF(("ess_close: sc=%p\n", sc));
939
940 sc->sc_open = 0;
941 ess_speaker_off(sc);
942 sc->spkr_state = SPKR_OFF;
943 ess_halt_output(sc);
944 ess_halt_input(sc);
945 sc->sc_in.intr = 0;
946 sc->sc_out.intr = 0;
947
948 DPRINTF(("ess_close: closed\n"));
949 }
950
951 /*
952 * Wait for FIFO to drain, and analog section to settle.
953 * XXX should check FIFO full bit.
954 */
955 int
956 ess_drain(addr)
957 void *addr;
958 {
959 extern int hz; /* XXX */
960
961 tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */
962 return (0);
963 }
964
965 int
966 ess_speaker_ctl(addr, newstate)
967 void *addr;
968 int newstate;
969 {
970 struct ess_softc *sc = addr;
971
972 if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
973 ess_speaker_on(sc);
974 sc->spkr_state = SPKR_ON;
975 }
976 if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
977 ess_speaker_off(sc);
978 sc->spkr_state = SPKR_OFF;
979 }
980 return (0);
981 }
982
983 int
984 ess_getdev(addr, retp)
985 void *addr;
986 struct audio_device *retp;
987 {
988 *retp = ess_device;
989 return (0);
990 }
991
992 int
993 ess_query_encoding(addr, fp)
994 void *addr;
995 struct audio_encoding *fp;
996 {
997 /*struct ess_softc *sc = addr;*/
998
999 switch (fp->index) {
1000 case 0:
1001 strcpy(fp->name, AudioEulinear);
1002 fp->encoding = AUDIO_ENCODING_ULINEAR;
1003 fp->precision = 8;
1004 fp->flags = 0;
1005 return (0);
1006 case 1:
1007 strcpy(fp->name, AudioEmulaw);
1008 fp->encoding = AUDIO_ENCODING_ULAW;
1009 fp->precision = 8;
1010 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1011 return (0);
1012 case 2:
1013 strcpy(fp->name, AudioEalaw);
1014 fp->encoding = AUDIO_ENCODING_ALAW;
1015 fp->precision = 8;
1016 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1017 return (0);
1018 case 3:
1019 strcpy(fp->name, AudioEslinear);
1020 fp->encoding = AUDIO_ENCODING_SLINEAR;
1021 fp->precision = 8;
1022 fp->flags = 0;
1023 return (0);
1024 case 4:
1025 strcpy(fp->name, AudioEslinear_le);
1026 fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
1027 fp->precision = 16;
1028 fp->flags = 0;
1029 return (0);
1030 case 5:
1031 strcpy(fp->name, AudioEulinear_le);
1032 fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
1033 fp->precision = 16;
1034 fp->flags = 0;
1035 return (0);
1036 case 6:
1037 strcpy(fp->name, AudioEslinear_be);
1038 fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
1039 fp->precision = 16;
1040 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1041 return (0);
1042 case 7:
1043 strcpy(fp->name, AudioEulinear_be);
1044 fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
1045 fp->precision = 16;
1046 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
1047 return (0);
1048 default:
1049 return EINVAL;
1050 }
1051 return (0);
1052 }
1053
1054 int
1055 ess_set_params(addr, setmode, usemode, play, rec)
1056 void *addr;
1057 int setmode, usemode;
1058 struct audio_params *play, *rec;
1059 {
1060 struct ess_softc *sc = addr;
1061 void (*swcode) __P((void *, u_char *buf, int cnt));
1062 struct audio_params *p;
1063 int mode;
1064
1065 DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode));
1066
1067 /* Set first record info, then play info */
1068 for(mode = AUMODE_RECORD; mode != -1;
1069 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
1070 if ((setmode & mode) == 0)
1071 continue;
1072
1073 p = mode == AUMODE_PLAY ? play : rec;
1074 switch (mode) {
1075 case AUMODE_PLAY:
1076 if (ess_set_out_sr(sc, p->sample_rate) != 0 ||
1077 ess_set_out_precision(sc, p->precision) != 0 ||
1078 ess_set_out_channels(sc, p->channels) != 0) {
1079 return (EINVAL);
1080 }
1081 break;
1082
1083 case AUMODE_RECORD:
1084 if (ess_set_in_sr(sc, p->sample_rate) != 0 ||
1085 ess_set_in_precision(sc, p->precision) != 0 ||
1086 ess_set_in_channels(sc, p->channels) != 0) {
1087 return (EINVAL);
1088 }
1089 break;
1090 }
1091
1092 swcode = 0;
1093
1094 switch (p->encoding) {
1095 case AUDIO_ENCODING_SLINEAR_BE:
1096 if (p->precision == 16)
1097 swcode = swap_bytes;
1098 /* fall into */
1099 case AUDIO_ENCODING_SLINEAR_LE:
1100 if (mode == AUMODE_PLAY)
1101 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1102 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1103 else
1104 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1105 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1106 break;
1107 case AUDIO_ENCODING_ULINEAR_BE:
1108 if (p->precision == 16)
1109 swcode = swap_bytes;
1110 /* fall into */
1111 case AUDIO_ENCODING_ULINEAR_LE:
1112 ulin8:
1113 if (mode == AUMODE_PLAY)
1114 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1115 ESS_AUDIO2_CTRL2_FIFO_SIGNED);
1116 else
1117 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1118 ESS_AUDIO1_CTRL1_FIFO_SIGNED);
1119 break;
1120 case AUDIO_ENCODING_ULAW:
1121 swcode = mode == AUMODE_PLAY ?
1122 mulaw_to_ulinear8 : ulinear8_to_mulaw;
1123 goto ulin8;
1124 case AUDIO_ENCODING_ALAW:
1125 swcode = mode == AUMODE_PLAY ?
1126 alaw_to_ulinear8 : ulinear8_to_alaw;
1127 goto ulin8;
1128 default:
1129 return EINVAL;
1130 }
1131 p->sw_code = swcode;
1132 }
1133
1134 sc->sc_in.active = 0;
1135 sc->sc_out.active = 0;
1136
1137 return (0);
1138 }
1139 int
1140 ess_set_in_sr(addr, sr)
1141 void *addr;
1142 u_long sr;
1143 {
1144 struct ess_softc *sc = addr;
1145
1146 if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
1147 return (EINVAL);
1148 /*
1149 * Program the sample rate and filter clock for the record
1150 * channel (Audio 1).
1151 */
1152 DPRINTF(("ess_set_in_sr: %ld\n", sr));
1153 ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(sr));
1154 ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(sr));
1155
1156 return (0);
1157 }
1158
1159 int
1160 ess_set_out_sr(addr, sr)
1161 void *addr;
1162 u_long sr;
1163 {
1164 struct ess_softc *sc = addr;
1165
1166 if (sr < ESS_MINRATE || sr > ESS_MAXRATE)
1167 return (EINVAL);
1168 /*
1169 * Program the sample rate and filter clock for the playback
1170 * channel (Audio 2).
1171 */
1172 DPRINTF(("ess_set_out_sr: %ld\n", sr));
1173 ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(sr));
1174 ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(sr));
1175
1176 return (0);
1177 }
1178
1179 int
1180 ess_set_in_precision(addr, precision)
1181 void *addr;
1182 u_int precision;
1183 {
1184 struct ess_softc *sc = addr;
1185
1186 /*
1187 * REVISIT: Should we set DMA transfer type to 2-byte or
1188 * 4-byte demand? This would probably better be done
1189 * when configuring the DMA channel. See xreg 0xB9.
1190 */
1191 DPRINTF(("ess_set_in_precision: %d\n", precision));
1192 switch (precision) {
1193 case 8:
1194 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1195 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1196 break;
1197
1198 case 16:
1199 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
1200 ESS_AUDIO1_CTRL1_FIFO_SIZE);
1201 break;
1202
1203 default:
1204 return (EINVAL);
1205 }
1206 return (0);
1207 }
1208
1209 int
1210 ess_set_out_precision(addr, precision)
1211 void *addr;
1212 u_int precision;
1213 {
1214 struct ess_softc *sc = addr;
1215
1216 DPRINTF(("ess_set_in_precision: %d\n", precision));
1217 switch (precision) {
1218 case 8:
1219 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1220 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1221 break;
1222
1223 case 16:
1224 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1225 ESS_AUDIO2_CTRL2_FIFO_SIZE);
1226 break;
1227
1228 default:
1229 return (EINVAL);
1230 }
1231 return (0);
1232 }
1233
1234 int
1235 ess_set_in_channels(addr, channels)
1236 void *addr;
1237 int channels;
1238 {
1239 struct ess_softc *sc = addr;
1240
1241 switch(channels) {
1242 case 1:
1243 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1244 ESS_AUDIO_CTRL_MONO);
1245 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1246 ESS_AUDIO_CTRL_STEREO);
1247 break;
1248
1249 case 2:
1250 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1251 ESS_AUDIO_CTRL_STEREO);
1252 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1253 ESS_AUDIO_CTRL_MONO);
1254 break;
1255
1256 default:
1257 return (EINVAL);
1258 break;
1259 }
1260
1261 sc->sc_in.channels = channels;
1262
1263 return (0);
1264 }
1265
1266 int
1267 ess_set_out_channels(addr, channels)
1268 void *addr;
1269 int channels;
1270 {
1271 struct ess_softc *sc = addr;
1272
1273 switch(channels) {
1274 case 1:
1275 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1276 ESS_AUDIO2_CTRL2_CHANNELS);
1277 break;
1278
1279 case 2:
1280 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1281 ESS_AUDIO2_CTRL2_CHANNELS);
1282 break;
1283
1284 default:
1285 return (EINVAL);
1286 break;
1287 }
1288
1289 sc->sc_out.channels = channels;
1290
1291 return (0);
1292 }
1293
1294 int
1295 ess_dma_init_output(addr, buf, cc)
1296 void *addr;
1297 void *buf;
1298 int cc;
1299 {
1300 struct ess_softc *sc = addr;
1301
1302 DPRINTF(("ess_dma_init_output: buf=%p cc=%d chan=%d\n",
1303 buf, cc, sc->sc_out.drq));
1304 isa_dmastart(sc->sc_ic, sc->sc_out.drq, buf,
1305 cc, NULL, DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT);
1306 return 0;
1307 }
1308
1309 int
1310 ess_dma_output(addr, p, cc, intr, arg)
1311 void *addr;
1312 void *p;
1313 int cc;
1314 void (*intr) __P((void *));
1315 void *arg;
1316 {
1317 struct ess_softc *sc = addr;
1318
1319 DPRINTFN(1,("ess_dma_output: cc=%d %p (%p)\n", cc, intr, arg));
1320 #ifdef DIAGNOSTIC
1321 if (sc->sc_out.channels == 2 && (cc & 1)) {
1322 DPRINTF(("stereo playback odd bytes (%d)\n", cc));
1323 return EIO;
1324 }
1325 #endif
1326
1327 sc->sc_out.intr = intr;
1328 sc->sc_out.arg = arg;
1329 if (sc->sc_out.active)
1330 return (0);
1331
1332 DPRINTF(("ess_dma_output: set up DMA\n"));
1333
1334 sc->sc_out.active = 1;
1335
1336 if (IS16BITDRQ(sc->sc_out.drq))
1337 cc >>= 1; /* use word count for 16 bit DMA */
1338 /* Program transfer count registers with 2's complement of count. */
1339 cc = -cc;
1340 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, cc);
1341 ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, cc >> 8);
1342
1343 /* Start auto-init DMA */
1344 ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1345 ESS_AUDIO2_CTRL1_DAC_ENABLE |
1346 ESS_AUDIO2_CTRL1_FIFO_ENABLE |
1347 ESS_AUDIO2_CTRL1_AUTO_INIT);
1348 #if 0
1349 /* XXX
1350 * seems like the 888 and 1888 have an interlock that
1351 * prevents audio2 channel from working if audio1 channel is not
1352 * connected to the FIFO.
1353 */
1354 ess_set_xreg_bits(sc, 0xB7, 0x80);
1355 #endif
1356 return (0);
1357
1358 }
1359
1360 int
1361 ess_dma_input(addr, p, cc, intr, arg)
1362 void *addr;
1363 void *p;
1364 int cc;
1365 void (*intr) __P((void *));
1366 void *arg;
1367 {
1368 struct ess_softc *sc = addr;
1369
1370 DPRINTFN(1,("ess_dma_input: cc=%d %p (%p)\n", cc, intr, arg));
1371 /* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
1372 ess_set_xreg_bits(sc, 0xB7, 0x80);
1373
1374 #ifdef DIAGNOSTIC
1375 if (sc->sc_in.channels == 2 && (cc & 1)) {
1376 DPRINTF(("stereo record odd bytes (%d)\n", cc));
1377 return EIO;
1378 }
1379 #endif
1380
1381 isa_dmastart(sc->sc_ic, sc->sc_in.drq, p,
1382 cc, NULL, DMAMODE_READ, BUS_DMA_NOWAIT);
1383 sc->sc_in.active = 1;
1384 sc->sc_in.intr = intr;
1385 sc->sc_in.arg = arg;
1386
1387 if (sc->sc_in.dmacnt != cc)
1388 {
1389 sc->sc_in.dmacnt = cc;
1390
1391 /*
1392 * If doing 16-bit DMA transfers, then the number of
1393 * transfers required is half the number of bytes to
1394 * be transferred.
1395 */
1396 if (IS16BITDRQ(sc->sc_out.drq))
1397 cc >>= 1;
1398
1399 /*
1400 * Program transfer count registers with 2's
1401 * complement of count.
1402 */
1403 cc = -cc;
1404 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, cc);
1405 ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, cc >> 8);
1406 }
1407
1408 /* REVISIT: is it really necessary to clear then set these bits to get
1409 the next lot of DMA to happen? Would it be sufficient to set the bits
1410 the first time round and leave it at that? (No, because the chip automatically clears the FIFO_ENABLE bit after the DMA is complete.)
1411 */
1412 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1413 ESS_AUDIO1_CTRL2_DMA_READ | /* REVISIT: once only */
1414 ESS_AUDIO1_CTRL2_ADC_ENABLE |/* REVISIT: once only */
1415 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1416
1417 return (0);
1418
1419 }
1420
1421 int
1422 ess_halt_output(addr)
1423 void *addr;
1424 {
1425 struct ess_softc *sc = addr;
1426
1427 DPRINTF(("ess_halt_output: sc=%p\n", sc));
1428
1429 #if 0
1430 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1431 ESS_AUDIO2_CTRL2_DMA_ENABLE);
1432 #else
1433 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
1434 ESS_AUDIO2_CTRL1_FIFO_ENABLE);
1435 #endif
1436 return (0);
1437 }
1438
1439 int
1440 ess_halt_input(addr)
1441 void *addr;
1442 {
1443 struct ess_softc *sc = addr;
1444
1445 DPRINTF(("ess_halt_input: sc=%p\n", sc));
1446
1447 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1448 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1449 return (0);
1450 }
1451
1452 int
1453 ess_intr_output(arg)
1454 void *arg;
1455 {
1456 struct ess_softc *sc = arg;
1457
1458 DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr));
1459
1460 /* clear interrupt on Audio channel 2 */
1461 ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
1462 ESS_AUDIO2_CTRL2_IRQ_LATCH);
1463 sc->sc_out.nintr++;
1464
1465 if (sc->sc_out.intr != 0)
1466 (*sc->sc_out.intr)(sc->sc_out.arg);
1467 else
1468 return (0);
1469
1470 return (1);
1471 }
1472
1473 int
1474 ess_intr_input(arg)
1475 void *arg;
1476 {
1477 struct ess_softc *sc = arg;
1478 u_char x;
1479
1480 DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr));
1481
1482 /*
1483 * Disable DMA for Audio 1; it will be enabled again the next
1484 * time ess_dma_input is called. Note that for single DMAs,
1485 * this bit must be toggled for each DMA. For auto-initialize
1486 * DMAs, this bit should be left high.
1487 */
1488 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
1489 ESS_AUDIO1_CTRL2_FIFO_ENABLE);
1490
1491 /* clear interrupt on Audio channel 1*/
1492 x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
1493
1494 sc->sc_in.nintr++;
1495
1496 if (sc->sc_in.intr != 0) {
1497 isa_dmadone(sc->sc_ic, sc->sc_in.drq);
1498 (*sc->sc_in.intr)(sc->sc_in.arg);
1499 } else
1500 return (0);
1501
1502 return (1);
1503 }
1504
1505 int
1506 ess_round_blocksize(addr, blk)
1507 void *addr;
1508 int blk;
1509 {
1510 return (blk & -8); /* round for max DMA size */
1511 }
1512
1513 int
1514 ess_set_port(addr, cp)
1515 void *addr;
1516 mixer_ctrl_t *cp;
1517 {
1518 struct ess_softc *sc = addr;
1519 int lgain, rgain;
1520
1521 DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n",
1522 cp->dev, cp->un.value.num_channels));
1523
1524 switch (cp->dev) {
1525 /*
1526 * The following mixer ports are all stereo. If we get a
1527 * single-channel gain value passed in, then we duplicate it
1528 * to both left and right channels.
1529 */
1530 case ESS_MASTER_VOL:
1531 case ESS_DAC_PLAY_VOL:
1532 case ESS_MIC_PLAY_VOL:
1533 case ESS_LINE_PLAY_VOL:
1534 case ESS_SYNTH_PLAY_VOL:
1535 case ESS_CD_PLAY_VOL:
1536 case ESS_AUXB_PLAY_VOL:
1537 case ESS_DAC_REC_VOL:
1538 case ESS_MIC_REC_VOL:
1539 case ESS_LINE_REC_VOL:
1540 case ESS_SYNTH_REC_VOL:
1541 case ESS_CD_REC_VOL:
1542 case ESS_AUXB_REC_VOL:
1543 case ESS_RECORD_VOL:
1544 if (cp->type != AUDIO_MIXER_VALUE)
1545 return EINVAL;
1546
1547 switch (cp->un.value.num_channels) {
1548 case 1:
1549 lgain = rgain = ESS_4BIT_GAIN(
1550 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1551 break;
1552 case 2:
1553 lgain = ESS_4BIT_GAIN(
1554 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
1555 rgain = ESS_4BIT_GAIN(
1556 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
1557 break;
1558 default:
1559 return EINVAL;
1560 }
1561
1562 sc->gain[cp->dev][ESS_LEFT] = lgain;
1563 sc->gain[cp->dev][ESS_RIGHT] = rgain;
1564
1565 ess_set_gain(sc, cp->dev, 1);
1566 break;
1567
1568
1569 /*
1570 * The PC speaker port is mono. If we get a stereo gain value
1571 * passed in, then we return EINVAL.
1572 */
1573 case ESS_PCSPEAKER_VOL:
1574 if (cp->un.value.num_channels != 1)
1575 return EINVAL;
1576
1577 sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
1578 ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
1579 ess_set_gain(sc, cp->dev, 1);
1580 break;
1581
1582
1583 case ESS_MIC_PREAMP:
1584 if (cp->type != AUDIO_MIXER_ENUM)
1585 return EINVAL;
1586
1587 if (cp->un.ord)
1588 /* Enable microphone preamp */
1589 ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1590 ESS_PREAMP_CTRL_ENABLE);
1591 else
1592 /* Disable microphone preamp */
1593 ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
1594 ESS_PREAMP_CTRL_ENABLE);
1595 break;
1596
1597 case ESS_RECORD_SOURCE:
1598 if (cp->type == AUDIO_MIXER_SET)
1599 return ess_set_in_ports(sc, cp->un.mask);
1600 else
1601 return EINVAL;
1602 break;
1603
1604 case ESS_RECORD_MONITOR:
1605 if (cp->type != AUDIO_MIXER_ENUM)
1606 return EINVAL;
1607
1608 if (cp->un.ord)
1609 /* Enable monitor */
1610 ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1611 ESS_AUDIO_CTRL_MONITOR);
1612 else
1613 /* Disable monitor */
1614 ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
1615 ESS_AUDIO_CTRL_MONITOR);
1616 break;
1617
1618 default:
1619 return EINVAL;
1620 }
1621
1622 return (0);
1623 }
1624
1625 int
1626 ess_get_port(addr, cp)
1627 void *addr;
1628 mixer_ctrl_t *cp;
1629 {
1630 struct ess_softc *sc = addr;
1631
1632 DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev));
1633
1634 switch (cp->dev) {
1635 case ESS_DAC_PLAY_VOL:
1636 case ESS_MIC_PLAY_VOL:
1637 case ESS_LINE_PLAY_VOL:
1638 case ESS_SYNTH_PLAY_VOL:
1639 case ESS_CD_PLAY_VOL:
1640 case ESS_AUXB_PLAY_VOL:
1641 case ESS_MASTER_VOL:
1642 case ESS_PCSPEAKER_VOL:
1643 case ESS_DAC_REC_VOL:
1644 case ESS_MIC_REC_VOL:
1645 case ESS_LINE_REC_VOL:
1646 case ESS_SYNTH_REC_VOL:
1647 case ESS_CD_REC_VOL:
1648 case ESS_AUXB_REC_VOL:
1649 case ESS_RECORD_VOL:
1650 if (cp->dev == ESS_PCSPEAKER_VOL &&
1651 cp->un.value.num_channels != 1)
1652 return EINVAL;
1653
1654 switch (cp->un.value.num_channels) {
1655 case 1:
1656 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1657 sc->gain[cp->dev][ESS_LEFT];
1658 break;
1659 case 2:
1660 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1661 sc->gain[cp->dev][ESS_LEFT];
1662 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1663 sc->gain[cp->dev][ESS_RIGHT];
1664 break;
1665 default:
1666 return EINVAL;
1667 }
1668 break;
1669
1670 case ESS_MIC_PREAMP:
1671 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
1672 ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
1673 break;
1674
1675 case ESS_RECORD_SOURCE:
1676 cp->un.mask = sc->in_mask;
1677 break;
1678
1679 case ESS_RECORD_MONITOR:
1680 cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
1681 ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
1682 break;
1683
1684 default:
1685 return EINVAL;
1686 }
1687
1688 return (0);
1689 }
1690
1691 int
1692 ess_query_devinfo(addr, dip)
1693 void *addr;
1694 mixer_devinfo_t *dip;
1695 {
1696 #ifdef AUDIO_DEBUG
1697 struct ess_softc *sc = addr;
1698 #endif
1699
1700 DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n",
1701 sc->sc_model, dip->index));
1702
1703 /*
1704 * REVISIT: There are some slight differences between the
1705 * mixers on the different ESS chips, which can
1706 * be sorted out using the chip model rather than a
1707 * separate mixer model.
1708 * This is currently coded assuming an ES1887; we
1709 * need to work out which bits are not applicable to
1710 * the other models (1888 and 888).
1711 */
1712 switch (dip->index) {
1713 case ESS_DAC_PLAY_VOL:
1714 dip->type = AUDIO_MIXER_VALUE;
1715 dip->mixer_class = ESS_INPUT_CLASS;
1716 dip->prev = AUDIO_MIXER_LAST;
1717 dip->next = AUDIO_MIXER_LAST;
1718 strcpy(dip->label.name, AudioNdac);
1719 dip->un.v.num_channels = 2;
1720 strcpy(dip->un.v.units.name, AudioNvolume);
1721 return (0);
1722
1723 case ESS_MIC_PLAY_VOL:
1724 dip->type = AUDIO_MIXER_VALUE;
1725 dip->mixer_class = ESS_INPUT_CLASS;
1726 dip->prev = AUDIO_MIXER_LAST;
1727 dip->next = AUDIO_MIXER_LAST;
1728 strcpy(dip->label.name, AudioNmicrophone);
1729 dip->un.v.num_channels = 2;
1730 strcpy(dip->un.v.units.name, AudioNvolume);
1731 return (0);
1732
1733 case ESS_LINE_PLAY_VOL:
1734 dip->type = AUDIO_MIXER_VALUE;
1735 dip->mixer_class = ESS_INPUT_CLASS;
1736 dip->prev = AUDIO_MIXER_LAST;
1737 dip->next = AUDIO_MIXER_LAST;
1738 strcpy(dip->label.name, AudioNline);
1739 dip->un.v.num_channels = 2;
1740 strcpy(dip->un.v.units.name, AudioNvolume);
1741 return (0);
1742
1743 case ESS_SYNTH_PLAY_VOL:
1744 dip->type = AUDIO_MIXER_VALUE;
1745 dip->mixer_class = ESS_INPUT_CLASS;
1746 dip->prev = AUDIO_MIXER_LAST;
1747 dip->next = AUDIO_MIXER_LAST;
1748 strcpy(dip->label.name, AudioNfmsynth);
1749 dip->un.v.num_channels = 2;
1750 strcpy(dip->un.v.units.name, AudioNvolume);
1751 return (0);
1752
1753 case ESS_CD_PLAY_VOL:
1754 dip->type = AUDIO_MIXER_VALUE;
1755 dip->mixer_class = ESS_INPUT_CLASS;
1756 dip->prev = AUDIO_MIXER_LAST;
1757 dip->next = AUDIO_MIXER_LAST;
1758 strcpy(dip->label.name, AudioNcd);
1759 dip->un.v.num_channels = 2;
1760 strcpy(dip->un.v.units.name, AudioNvolume);
1761 return (0);
1762
1763 case ESS_AUXB_PLAY_VOL:
1764 dip->type = AUDIO_MIXER_VALUE;
1765 dip->mixer_class = ESS_INPUT_CLASS;
1766 dip->prev = AUDIO_MIXER_LAST;
1767 dip->next = AUDIO_MIXER_LAST;
1768 strcpy(dip->label.name, "auxb");
1769 dip->un.v.num_channels = 2;
1770 strcpy(dip->un.v.units.name, AudioNvolume);
1771 return (0);
1772
1773 case ESS_INPUT_CLASS:
1774 dip->type = AUDIO_MIXER_CLASS;
1775 dip->mixer_class = ESS_INPUT_CLASS;
1776 dip->next = dip->prev = AUDIO_MIXER_LAST;
1777 strcpy(dip->label.name, AudioCinputs);
1778 return (0);
1779
1780
1781 case ESS_MASTER_VOL:
1782 dip->type = AUDIO_MIXER_VALUE;
1783 dip->mixer_class = ESS_OUTPUT_CLASS;
1784 dip->prev = dip->next = AUDIO_MIXER_LAST;
1785 strcpy(dip->label.name, AudioNmaster);
1786 dip->un.v.num_channels = 2;
1787 strcpy(dip->un.v.units.name, AudioNvolume);
1788 return (0);
1789
1790 case ESS_PCSPEAKER_VOL:
1791 dip->type = AUDIO_MIXER_VALUE;
1792 dip->mixer_class = ESS_OUTPUT_CLASS;
1793 dip->prev = AUDIO_MIXER_LAST;
1794 dip->next = AUDIO_MIXER_LAST;
1795 strcpy(dip->label.name, "pc_speaker");
1796 dip->un.v.num_channels = 1;
1797 strcpy(dip->un.v.units.name, AudioNvolume);
1798 return (0);
1799
1800 case ESS_OUTPUT_CLASS:
1801 dip->type = AUDIO_MIXER_CLASS;
1802 dip->mixer_class = ESS_OUTPUT_CLASS;
1803 dip->next = dip->prev = AUDIO_MIXER_LAST;
1804 strcpy(dip->label.name, AudioCoutputs);
1805 return (0);
1806
1807
1808 case ESS_DAC_REC_VOL:
1809 dip->type = AUDIO_MIXER_VALUE;
1810 dip->mixer_class = ESS_RECORD_CLASS;
1811 dip->prev = AUDIO_MIXER_LAST;
1812 dip->next = AUDIO_MIXER_LAST;
1813 strcpy(dip->label.name, AudioNdac);
1814 dip->un.v.num_channels = 2;
1815 strcpy(dip->un.v.units.name, AudioNvolume);
1816 return (0);
1817
1818 case ESS_MIC_REC_VOL:
1819 dip->type = AUDIO_MIXER_VALUE;
1820 dip->mixer_class = ESS_RECORD_CLASS;
1821 dip->prev = AUDIO_MIXER_LAST;
1822 dip->next = ESS_MIC_PREAMP;
1823 strcpy(dip->label.name, AudioNmicrophone);
1824 dip->un.v.num_channels = 2;
1825 strcpy(dip->un.v.units.name, AudioNvolume);
1826 return (0);
1827
1828 case ESS_LINE_REC_VOL:
1829 dip->type = AUDIO_MIXER_VALUE;
1830 dip->mixer_class = ESS_RECORD_CLASS;
1831 dip->prev = AUDIO_MIXER_LAST;
1832 dip->next = AUDIO_MIXER_LAST;
1833 strcpy(dip->label.name, AudioNline);
1834 dip->un.v.num_channels = 2;
1835 strcpy(dip->un.v.units.name, AudioNvolume);
1836 return (0);
1837
1838 case ESS_SYNTH_REC_VOL:
1839 dip->type = AUDIO_MIXER_VALUE;
1840 dip->mixer_class = ESS_RECORD_CLASS;
1841 dip->prev = AUDIO_MIXER_LAST;
1842 dip->next = AUDIO_MIXER_LAST;
1843 strcpy(dip->label.name, AudioNfmsynth);
1844 dip->un.v.num_channels = 2;
1845 strcpy(dip->un.v.units.name, AudioNvolume);
1846 return (0);
1847
1848 case ESS_CD_REC_VOL:
1849 dip->type = AUDIO_MIXER_VALUE;
1850 dip->mixer_class = ESS_RECORD_CLASS;
1851 dip->prev = AUDIO_MIXER_LAST;
1852 dip->next = AUDIO_MIXER_LAST;
1853 strcpy(dip->label.name, AudioNcd);
1854 dip->un.v.num_channels = 2;
1855 strcpy(dip->un.v.units.name, AudioNvolume);
1856 return (0);
1857
1858 case ESS_AUXB_REC_VOL:
1859 dip->type = AUDIO_MIXER_VALUE;
1860 dip->mixer_class = ESS_RECORD_CLASS;
1861 dip->prev = AUDIO_MIXER_LAST;
1862 dip->next = AUDIO_MIXER_LAST;
1863 strcpy(dip->label.name, "auxb");
1864 dip->un.v.num_channels = 2;
1865 strcpy(dip->un.v.units.name, AudioNvolume);
1866 return (0);
1867
1868 case ESS_MIC_PREAMP:
1869 dip->type = AUDIO_MIXER_ENUM;
1870 dip->mixer_class = ESS_RECORD_CLASS;
1871 dip->prev = ESS_MIC_REC_VOL;
1872 dip->next = AUDIO_MIXER_LAST;
1873 strcpy(dip->label.name, AudioNenhanced);
1874 dip->un.e.num_mem = 2;
1875 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1876 dip->un.e.member[0].ord = 0;
1877 strcpy(dip->un.e.member[1].label.name, AudioNon);
1878 dip->un.e.member[1].ord = 1;
1879 return (0);
1880
1881 case ESS_RECORD_VOL:
1882 dip->type = AUDIO_MIXER_VALUE;
1883 dip->mixer_class = ESS_RECORD_CLASS;
1884 dip->prev = AUDIO_MIXER_LAST;
1885 dip->next = AUDIO_MIXER_LAST;
1886 strcpy(dip->label.name, AudioNrecord);
1887 dip->un.v.num_channels = 2;
1888 strcpy(dip->un.v.units.name, AudioNvolume);
1889 return (0);
1890
1891 case ESS_RECORD_SOURCE:
1892 dip->mixer_class = ESS_RECORD_CLASS;
1893 dip->prev = dip->next = AUDIO_MIXER_LAST;
1894 strcpy(dip->label.name, AudioNsource);
1895 dip->type = AUDIO_MIXER_SET;
1896 dip->un.s.num_mem = 6;
1897 strcpy(dip->un.s.member[0].label.name, AudioNdac);
1898 dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
1899 strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
1900 dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
1901 strcpy(dip->un.s.member[2].label.name, AudioNline);
1902 dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
1903 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
1904 dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
1905 strcpy(dip->un.s.member[4].label.name, AudioNcd);
1906 dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
1907 strcpy(dip->un.s.member[5].label.name, "auxb");
1908 dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
1909 return (0);
1910
1911 case ESS_RECORD_CLASS:
1912 dip->type = AUDIO_MIXER_CLASS;
1913 dip->mixer_class = ESS_RECORD_CLASS;
1914 dip->next = dip->prev = AUDIO_MIXER_LAST;
1915 strcpy(dip->label.name, AudioCrecord);
1916 return (0);
1917
1918
1919 case ESS_RECORD_MONITOR:
1920 dip->mixer_class = ESS_MONITOR_CLASS;
1921 dip->prev = dip->next = AUDIO_MIXER_LAST;
1922 strcpy(dip->label.name, AudioNmonitor);
1923 dip->type = AUDIO_MIXER_ENUM;
1924 dip->un.e.num_mem = 2;
1925 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1926 dip->un.e.member[0].ord = 0;
1927 strcpy(dip->un.e.member[1].label.name, AudioNon);
1928 dip->un.e.member[1].ord = 1;
1929 return (0);
1930
1931 case ESS_MONITOR_CLASS:
1932 dip->type = AUDIO_MIXER_CLASS;
1933 dip->mixer_class = ESS_MONITOR_CLASS;
1934 dip->next = dip->prev = AUDIO_MIXER_LAST;
1935 strcpy(dip->label.name, AudioCmonitor);
1936 return (0);
1937 }
1938
1939 return (ENXIO);
1940 }
1941
1942 void *
1943 ess_malloc(addr, size, pool, flags)
1944 void *addr;
1945 unsigned long size;
1946 int pool;
1947 int flags;
1948 {
1949 struct ess_softc *sc = addr;
1950
1951 return isa_malloc(sc->sc_ic, 4, size, pool, flags);
1952 }
1953
1954 void
1955 ess_free(addr, ptr, pool)
1956 void *addr;
1957 void *ptr;
1958 int pool;
1959 {
1960 isa_free(ptr, pool);
1961 }
1962
1963 unsigned long
1964 ess_round(addr, size)
1965 void *addr;
1966 unsigned long size;
1967 {
1968 if (size > MAX_ISADMA)
1969 size = MAX_ISADMA;
1970 return size;
1971 }
1972
1973 int
1974 ess_mappage(addr, mem, off, prot)
1975 void *addr;
1976 void *mem;
1977 int off;
1978 int prot;
1979 {
1980 return (isa_mappage(mem, off, prot));
1981 }
1982
1983 int
1984 ess_get_props(addr)
1985 void *addr;
1986 {
1987 struct ess_softc *sc = addr;
1988 return (AUDIO_PROP_MMAP |
1989 (sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0));
1990 }
1991
1992 /* ============================================
1993 * Generic functions for ess, not used by audio h/w i/f
1994 * =============================================
1995 */
1996
1997 /*
1998 * Reset the chip.
1999 * Return non-zero if the chip isn't detected.
2000 */
2001 int
2002 ess_reset(sc)
2003 struct ess_softc *sc;
2004 {
2005 bus_space_tag_t iot = sc->sc_iot;
2006 bus_space_handle_t ioh = sc->sc_ioh;
2007
2008 sc->sc_in.intr = 0;
2009
2010 if (sc->sc_in.active) {
2011 isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
2012 sc->sc_in.active = 0;
2013 }
2014
2015 sc->sc_out.intr = 0;
2016 sc->sc_out.dmacnt = 0;
2017 if (sc->sc_out.active) {
2018 isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
2019 sc->sc_out.active = 0;
2020 }
2021
2022 EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT);
2023 delay(10000);
2024 EWRITE1(iot, ioh, ESS_DSP_RESET, 0);
2025 if (ess_rdsp(sc) != ESS_MAGIC)
2026 return (1);
2027
2028 /* Enable access to the ESS extension commands. */
2029 ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
2030
2031 return (0);
2032 }
2033
2034 void
2035 ess_set_gain(sc, port, on)
2036 struct ess_softc *sc;
2037 int port;
2038 int on;
2039 {
2040 int gain, left, right;
2041 int mix;
2042 int src;
2043 int stereo;
2044
2045 /*
2046 * Most gain controls are found in the mixer registers and
2047 * are stereo. Any that are not, must set mix and stereo as
2048 * required.
2049 */
2050 mix = 1;
2051 stereo = 1;
2052
2053 switch (port) {
2054 case ESS_MASTER_VOL:
2055 src = 0x32;
2056 break;
2057 case ESS_DAC_PLAY_VOL:
2058 src = 0x7C;
2059 break;
2060 case ESS_MIC_PLAY_VOL:
2061 src = 0x1A;
2062 break;
2063 case ESS_LINE_PLAY_VOL:
2064 src = 0x3E;
2065 break;
2066 case ESS_SYNTH_PLAY_VOL:
2067 src = 0x36;
2068 break;
2069 case ESS_CD_PLAY_VOL:
2070 src = 0x38;
2071 break;
2072 case ESS_AUXB_PLAY_VOL:
2073 src = 0x3A;
2074 break;
2075 case ESS_PCSPEAKER_VOL:
2076 src = 0x3C;
2077 stereo = 0;
2078 break;
2079 case ESS_DAC_REC_VOL:
2080 src = 0x69;
2081 break;
2082 case ESS_MIC_REC_VOL:
2083 src = 0x68;
2084 break;
2085 case ESS_LINE_REC_VOL:
2086 src = 0x6E;
2087 break;
2088 case ESS_SYNTH_REC_VOL:
2089 src = 0x6B;
2090 break;
2091 case ESS_CD_REC_VOL:
2092 src = 0x6A;
2093 break;
2094 case ESS_AUXB_REC_VOL:
2095 src = 0x6C;
2096 break;
2097 case ESS_RECORD_VOL:
2098 src = 0xB4;
2099 mix = 0;
2100 break;
2101 default:
2102 return;
2103 }
2104
2105 if (on) {
2106 left = sc->gain[port][ESS_LEFT];
2107 right = sc->gain[port][ESS_RIGHT];
2108 } else {
2109 left = right = 0;
2110 }
2111
2112 if (stereo)
2113 gain = ESS_STEREO_GAIN(left, right);
2114 else
2115 gain = ESS_MONO_GAIN(left);
2116
2117 if (mix)
2118 ess_write_mix_reg(sc, src, gain);
2119 else
2120 ess_write_x_reg(sc, src, gain);
2121 }
2122
2123 int
2124 ess_set_in_ports(sc, mask)
2125 struct ess_softc *sc;
2126 int mask;
2127 {
2128 mixer_devinfo_t di;
2129 int i;
2130 int port;
2131 int tmp;
2132
2133 DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
2134
2135 /*
2136 * Get the device info for the record source control,
2137 * including the list of available sources.
2138 */
2139 di.index = ESS_RECORD_SOURCE;
2140 if (ess_query_devinfo(sc, &di))
2141 return EINVAL;
2142
2143 /*
2144 * Set or disable the record volume control for each of the
2145 * possible sources.
2146 */
2147 for (i = 0; i < di.un.s.num_mem; i++)
2148 {
2149 /*
2150 * Calculate the source port number from its mask.
2151 */
2152 tmp = di.un.s.member[i].mask >> 1;
2153 for (port = 0; tmp; port++) {
2154 tmp >>= 1;
2155 }
2156
2157 /*
2158 * Set the source gain:
2159 * to the current value if source is enabled
2160 * to zero if source is disabled
2161 */
2162 ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
2163 }
2164
2165 sc->in_mask = mask;
2166
2167 /*
2168 * We have to fake a single port since the upper layer expects
2169 * one only. We choose the lowest numbered port that is enabled.
2170 */
2171 for(i = 0; i < ESS_NPORT; i++) {
2172 if (mask & (1 << i)) {
2173 sc->in_port = i;
2174 break;
2175 }
2176 }
2177
2178 return (0);
2179 }
2180
2181 void
2182 ess_speaker_on(sc)
2183 struct ess_softc *sc;
2184 {
2185 /* Disable mute on left- and right-master volume. */
2186 ess_clear_mreg_bits(sc, 0x60, 0x40);
2187 ess_clear_mreg_bits(sc, 0x62, 0x40);
2188 }
2189
2190 void
2191 ess_speaker_off(sc)
2192 struct ess_softc *sc;
2193 {
2194 /* Enable mute on left- and right-master volume. */
2195 ess_set_mreg_bits(sc, 0x60, 0x40);
2196 ess_set_mreg_bits(sc, 0x62, 0x40);
2197 }
2198
2199 /*
2200 * Calculate the time constant for the requested sampling rate.
2201 */
2202 u_int
2203 ess_srtotc(rate)
2204 u_int rate;
2205 {
2206 u_int tc;
2207
2208 /* The following formulae are from the ESS data sheet. */
2209 if (rate < 22050)
2210 tc = 128 - 397700L / rate;
2211 else
2212 tc = 256 - 795500L / rate;
2213
2214 return (tc);
2215 }
2216
2217
2218 /*
2219 * Calculate the filter constant for the reuqested sampling rate.
2220 */
2221 u_int
2222 ess_srtofc(rate)
2223 u_int rate;
2224 {
2225 /*
2226 * The following formula is derived from the information in
2227 * the ES1887 data sheet, based on a roll-off frequency of
2228 * 87%.
2229 */
2230 return (256 - 200279L / rate);
2231 }
2232
2233
2234 /*
2235 * Return the status of the DSP.
2236 */
2237 u_char
2238 ess_get_dsp_status(sc)
2239 struct ess_softc *sc;
2240 {
2241 bus_space_tag_t iot = sc->sc_iot;
2242 bus_space_handle_t ioh = sc->sc_ioh;
2243
2244 return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS));
2245 }
2246
2247
2248 /*
2249 * Return the read status of the DSP: 1 -> DSP ready for reading
2250 * 0 -> DSP not ready for reading
2251 */
2252 u_char
2253 ess_dsp_read_ready(sc)
2254 struct ess_softc *sc;
2255 {
2256 return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) ==
2257 ESS_DSP_READ_READY) ? 1 : 0);
2258 }
2259
2260
2261 /*
2262 * Return the write status of the DSP: 1 -> DSP ready for writing
2263 * 0 -> DSP not ready for writing
2264 */
2265 u_char
2266 ess_dsp_write_ready(sc)
2267 struct ess_softc *sc;
2268 {
2269 return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
2270 ESS_DSP_WRITE_READY) ? 1 : 0);
2271 }
2272
2273
2274 /*
2275 * Read a byte from the DSP.
2276 */
2277 int
2278 ess_rdsp(sc)
2279 struct ess_softc *sc;
2280 {
2281 bus_space_tag_t iot = sc->sc_iot;
2282 bus_space_handle_t ioh = sc->sc_ioh;
2283 int i;
2284
2285 for (i = ESS_READ_TIMEOUT; i > 0; --i) {
2286 if (ess_dsp_read_ready(sc)) {
2287 i = EREAD1(iot, ioh, ESS_DSP_READ);
2288 DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i));
2289 return i;
2290 } else
2291 delay(10);
2292 }
2293
2294 DPRINTF(("ess_rdsp: timed out\n"));
2295 return (-1);
2296 }
2297
2298 /*
2299 * Write a byte to the DSP.
2300 */
2301 int
2302 ess_wdsp(sc, v)
2303 struct ess_softc *sc;
2304 u_char v;
2305 {
2306 bus_space_tag_t iot = sc->sc_iot;
2307 bus_space_handle_t ioh = sc->sc_ioh;
2308 int i;
2309
2310 DPRINTFN(8,("ess_wdsp(0x%02x)\n", v));
2311
2312 for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
2313 if (ess_dsp_write_ready(sc)) {
2314 EWRITE1(iot, ioh, ESS_DSP_WRITE, v);
2315 return (0);
2316 } else
2317 delay(10);
2318 }
2319
2320 DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
2321 return (-1);
2322 }
2323
2324 /*
2325 * Write a value to one of the ESS extended registers.
2326 */
2327 int
2328 ess_write_x_reg(sc, reg, val)
2329 struct ess_softc *sc;
2330 u_char reg;
2331 u_char val;
2332 {
2333 int error;
2334
2335 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2336 if ((error = ess_wdsp(sc, reg)) == 0)
2337 error = ess_wdsp(sc, val);
2338
2339 return error;
2340 }
2341
2342 /*
2343 * Read the value of one of the ESS extended registers.
2344 */
2345 u_char
2346 ess_read_x_reg(sc, reg)
2347 struct ess_softc *sc;
2348 u_char reg;
2349 {
2350 int error;
2351 int val;
2352
2353 if ((error = ess_wdsp(sc, 0xC0)) == 0)
2354 error = ess_wdsp(sc, reg);
2355 if (error)
2356 DPRINTF(("Error reading extended register 0x%02x\n", reg));
2357 /* REVISIT: what if an error is returned above? */
2358 val = ess_rdsp(sc);
2359 DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
2360 return val;
2361 }
2362
2363 void
2364 ess_clear_xreg_bits(sc, reg, mask)
2365 struct ess_softc *sc;
2366 u_char reg;
2367 u_char mask;
2368 {
2369 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
2370 DPRINTF(("Error clearing bits in extended register 0x%02x\n",
2371 reg));
2372 }
2373
2374 void
2375 ess_set_xreg_bits(sc, reg, mask)
2376 struct ess_softc *sc;
2377 u_char reg;
2378 u_char mask;
2379 {
2380 if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
2381 DPRINTF(("Error setting bits in extended register 0x%02x\n",
2382 reg));
2383 }
2384
2385
2386 /*
2387 * Write a value to one of the ESS mixer registers.
2388 */
2389 void
2390 ess_write_mix_reg(sc, reg, val)
2391 struct ess_softc *sc;
2392 u_char reg;
2393 u_char val;
2394 {
2395 bus_space_tag_t iot = sc->sc_iot;
2396 bus_space_handle_t ioh = sc->sc_ioh;
2397 int s;
2398
2399 DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));
2400
2401 s = splaudio();
2402 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2403 EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);
2404 splx(s);
2405 }
2406
2407 /*
2408 * Read the value of one of the ESS mixer registers.
2409 */
2410 u_char
2411 ess_read_mix_reg(sc, reg)
2412 struct ess_softc *sc;
2413 u_char reg;
2414 {
2415 bus_space_tag_t iot = sc->sc_iot;
2416 bus_space_handle_t ioh = sc->sc_ioh;
2417 int s;
2418 u_char val;
2419
2420 s = splaudio();
2421 EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
2422 val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);
2423 splx(s);
2424
2425 DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));
2426 return val;
2427 }
2428
2429 void
2430 ess_clear_mreg_bits(sc, reg, mask)
2431 struct ess_softc *sc;
2432 u_char reg;
2433 u_char mask;
2434 {
2435 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
2436 }
2437
2438 void
2439 ess_set_mreg_bits(sc, reg, mask)
2440 struct ess_softc *sc;
2441 u_char reg;
2442 u_char mask;
2443 {
2444 ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
2445 }
2446