finsio_isa.c revision 1.1
1 /* $OpenBSD: fins.c,v 1.1 2008/03/19 19:33:09 deraadt Exp $ */ 2 /* $NetBSD: finsio_isa.c,v 1.1 2008/04/03 22:46:22 xtraeme Exp $ */ 3 4 /* 5 * Copyright (c) 2008 Juan Romero Pardines 6 * Copyright (c) 2007, 2008 Geoff Steckel 7 * Copyright (c) 2005, 2006 Mark Kettenis 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 #include <sys/cdefs.h> 22 __KERNEL_RCSID(0, "$NetBSD: finsio_isa.c,v 1.1 2008/04/03 22:46:22 xtraeme Exp $"); 23 24 #include <sys/param.h> 25 #include <sys/systm.h> 26 #include <sys/device.h> 27 #include <sys/bus.h> 28 29 #include <dev/isa/isareg.h> 30 #include <dev/isa/isavar.h> 31 32 #include <dev/sysmon/sysmonvar.h> 33 34 /* Derived from LM78 code. Only handles chips attached to ISA bus */ 35 36 /* 37 * Fintek F71805/F71883 Super I/O datasheets: 38 * http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf 39 * http://www.fintek.com.tw/files/productfiles/F71883_V026P.pdf 40 * 41 * This chip is a multi-io chip with many functions. 42 * Each function may be relocated in I/O space by the BIOS. 43 * The base address (2E or 4E) accesses a configuration space which 44 * has pointers to the individual functions. The config space must be 45 * unlocked with a cookie and relocked afterwards. The chip ID is stored 46 * in config space so it is not normally visible. 47 * 48 * The voltage dividers specified are from reading the chips on one board. 49 * There is no way to determine what they are in the general case. 50 */ 51 52 #define FINSIO_UNLOCK 0x87 /* magic constant - write 2x to select chip */ 53 #define FINSIO_LOCK 0xaa /* magic constant - write 1x to deselect reg */ 54 55 #define FINSIO_FUNC_SEL 0x07 /* select which subchip to access */ 56 # define FINSIO_FUNC_HWMON 0x4 57 58 /* ISA registers index to an internal register space on chip */ 59 #define FINSIO_ADDR 0 /* global configuration index registers */ 60 #define FINSIO_DATA 1 61 62 /* 63 * The F71882/F71883 chips use a different Hardware Monitor 64 * address offset. 65 */ 66 #define FINSIO_F71882_HWM_OFFSET 5 67 68 /* Global configuration registers */ 69 #define FINSIO_MANUF 0x23 /* manufacturer ID */ 70 # define FINTEK_ID 0x1934 71 #define FINSIO_CHIP 0x20 /* chip ID */ 72 # define FINSIO_IDF71805 0x0406 73 # define FINSIO_IDF71806 0x0341 /* F71872 and F1806 F/FG */ 74 # define FINSIO_IDF71883 0x0541 /* F71882 and F1883 */ 75 # define FINSIO_IDF71862 0x0601 /* F71862FG */ 76 77 /* in bank sensors of config space */ 78 #define FINSIO_SENSADDR 0x60 /* sensors assigned I/O address (2 bytes) */ 79 80 #define FINSIO_HWMON_CONF 0x01 /* Hardware Monitor Config. Register */ 81 82 /* in sensors space */ 83 #define FINSIO_TMODE 0x01 /* temperature mode reg */ 84 85 #define FINSIO_MAX_SENSORS 20 86 /* 87 * Fintek chips typically measure voltages using 8mv steps. 88 * To measure higher voltages the input is attenuated with (external) 89 * resistors. Negative voltages are measured using inverting op amps 90 * and resistors. So we have to convert the sensor values back to 91 * real voltages by applying the appropriate resistor factor. 92 */ 93 #define FRFACT_NONE 8000 94 #define FRFACT(x, y) (FRFACT_NONE * ((x) + (y)) / (y)) 95 #define FNRFACT(x, y) (-FRFACT_NONE * (x) / (y)) 96 97 #if defined(FINSIODEBUG) 98 #define DPRINTF(x) do { printf x; } while (0) 99 #else 100 #define DPRINTF(x) 101 #endif 102 103 struct finsio_softc { 104 bus_space_tag_t sc_iot; 105 bus_space_handle_t sc_ioh; 106 107 struct sysmon_envsys *sc_sme; 108 envsys_data_t sc_sensor[FINSIO_MAX_SENSORS]; 109 struct finsio_sensor *sc_finsio_sensors; 110 111 bool sc_is_f71882; 112 113 u_int sc_tempsel; 114 }; 115 116 struct finsio_sensor { 117 const char *fs_desc; 118 u_int fs_type; 119 uint8_t fs_aux; 120 uint8_t fs_reg; 121 void (*fs_refresh)(struct finsio_softc *, envsys_data_t *); 122 int fs_rfact; 123 }; 124 125 static int finsio_isa_match(device_t, cfdata_t, void *); 126 static void finsio_isa_attach(device_t, device_t, void *); 127 128 static void finsio_enter(bus_space_tag_t, bus_space_handle_t); 129 static void finsio_exit(bus_space_tag_t, bus_space_handle_t); 130 static uint8_t finsio_readreg(bus_space_tag_t, bus_space_handle_t, int); 131 static void finsio_writereg(bus_space_tag_t, bus_space_handle_t, int, int); 132 133 static void finsio_refresh(struct sysmon_envsys *, envsys_data_t *); 134 static void finsio_refresh_volt(struct finsio_softc *, envsys_data_t *); 135 static void finsio_refresh_temp(struct finsio_softc *, envsys_data_t *); 136 static void finsio_refresh_fanrpm(struct finsio_softc *, envsys_data_t *); 137 138 CFATTACH_DECL_NEW(finsio, sizeof(struct finsio_softc), 139 finsio_isa_match, finsio_isa_attach, NULL, NULL); 140 141 /* Sensors available in F71805/F71806 */ 142 static struct finsio_sensor f71805_sensors[] = { 143 /* Voltage */ 144 { 145 .fs_desc = "+3.3V", 146 .fs_type = ENVSYS_SVOLTS_DC, 147 .fs_aux = 0, 148 .fs_reg = 0x10, 149 .fs_refresh = finsio_refresh_volt, 150 .fs_rfact = FRFACT(100, 100) 151 }, 152 { 153 .fs_desc = "Vtt", 154 .fs_type = ENVSYS_SVOLTS_DC, 155 .fs_aux = 0, 156 .fs_reg = 0x11, 157 .fs_refresh = finsio_refresh_volt, 158 .fs_rfact = FRFACT_NONE 159 }, 160 { 161 .fs_desc = "Vram", 162 .fs_type = ENVSYS_SVOLTS_DC, 163 .fs_aux = 0, 164 .fs_reg = 0x12, 165 .fs_refresh = finsio_refresh_volt, 166 .fs_rfact = FRFACT(100, 100) 167 }, 168 { 169 .fs_desc = "Vchips", 170 .fs_type = ENVSYS_SVOLTS_DC, 171 .fs_aux = 0, 172 .fs_reg = 0x13, 173 .fs_refresh = finsio_refresh_volt, 174 .fs_rfact = FRFACT(47, 100) 175 }, 176 { 177 .fs_desc = "+5V", 178 .fs_type = ENVSYS_SVOLTS_DC, 179 .fs_aux = 0, 180 .fs_reg = 0x14, 181 .fs_refresh = finsio_refresh_volt, 182 .fs_rfact = FRFACT(200, 47) 183 }, 184 { 185 .fs_desc = "+12V", 186 .fs_type = ENVSYS_SVOLTS_DC, 187 .fs_aux = 0, 188 .fs_reg = 0x15, 189 .fs_refresh = finsio_refresh_volt, 190 .fs_rfact = FRFACT(200, 20) 191 }, 192 { 193 .fs_desc = "Vcc 1.5V", 194 .fs_type = ENVSYS_SVOLTS_DC, 195 .fs_aux = 0, 196 .fs_reg = 0x16, 197 .fs_refresh = finsio_refresh_volt, 198 .fs_rfact = FRFACT_NONE 199 }, 200 { 201 .fs_desc = "VCore", 202 .fs_type = ENVSYS_SVOLTS_DC, 203 .fs_aux = 0, 204 .fs_reg = 0x17, 205 .fs_refresh = finsio_refresh_volt, 206 .fs_rfact = FRFACT_NONE 207 }, 208 { 209 .fs_desc = "Vsb", 210 .fs_type = ENVSYS_SVOLTS_DC, 211 .fs_aux = 0, 212 .fs_reg = 0x18, 213 .fs_refresh = finsio_refresh_volt, 214 .fs_rfact = FRFACT(200, 47) 215 }, 216 { 217 .fs_desc = "Vsbint", 218 .fs_type = ENVSYS_SVOLTS_DC, 219 .fs_aux = 0, 220 .fs_reg = 0x19, 221 .fs_refresh = finsio_refresh_volt, 222 .fs_rfact = FRFACT(200, 47) 223 }, 224 { 225 .fs_desc = "Vbat", 226 .fs_type = ENVSYS_SVOLTS_DC, 227 .fs_aux = 0, 228 .fs_reg = 0x1a, 229 .fs_refresh = finsio_refresh_volt, 230 .fs_rfact = FRFACT(200, 47) 231 }, 232 /* Temperature */ 233 { 234 .fs_desc = "Temp1", 235 .fs_type = ENVSYS_STEMP, 236 .fs_aux = 0x01, 237 .fs_reg = 0x1b, 238 .fs_refresh = finsio_refresh_temp, 239 .fs_rfact = 0 240 }, 241 { 242 .fs_desc = "Temp2", 243 .fs_type = ENVSYS_STEMP, 244 .fs_aux = 0x02, 245 .fs_reg = 0x1c, 246 .fs_refresh = finsio_refresh_temp, 247 .fs_rfact = 0 248 }, 249 { 250 .fs_desc = "Temp3", 251 .fs_type = ENVSYS_STEMP, 252 .fs_aux = 0x04, 253 .fs_reg = 0x1d, 254 .fs_refresh = finsio_refresh_temp, 255 .fs_rfact = 0 256 }, 257 /* Fans */ 258 { 259 .fs_desc = "Fan1", 260 .fs_type = ENVSYS_SFANRPM, 261 .fs_aux = 0, 262 .fs_reg = 0x20, 263 .fs_refresh = finsio_refresh_fanrpm, 264 .fs_rfact = 0 265 }, 266 { 267 .fs_desc = "Fan2", 268 .fs_type = ENVSYS_SFANRPM, 269 .fs_aux = 0, 270 .fs_reg = 0x22, 271 .fs_refresh = finsio_refresh_fanrpm, 272 .fs_rfact = 0 273 }, 274 { 275 .fs_desc = "Fan3", 276 .fs_type = ENVSYS_SFANRPM, 277 .fs_aux = 0, 278 .fs_reg = 0x24, 279 .fs_refresh = finsio_refresh_fanrpm, 280 .fs_rfact = 0 281 }, 282 283 { .fs_desc = NULL } 284 }; 285 286 /* Sensors available in F71862/F71882/F71883 */ 287 static struct finsio_sensor f71883_sensors[] = { 288 /* Voltage */ 289 { 290 .fs_desc = "+3.3V", 291 .fs_type = ENVSYS_SVOLTS_DC, 292 .fs_aux = 0, 293 .fs_reg = 0x20, 294 .fs_refresh = finsio_refresh_volt, 295 .fs_rfact = FRFACT(100, 100) 296 }, 297 { 298 .fs_desc = "Vcore", 299 .fs_type = ENVSYS_SVOLTS_DC, 300 .fs_aux = 0, 301 .fs_reg = 0x21, 302 .fs_refresh = finsio_refresh_volt, 303 .fs_rfact = FRFACT_NONE 304 }, 305 { 306 .fs_desc = "VIN2", 307 .fs_type = ENVSYS_SVOLTS_DC, 308 .fs_aux = 0, 309 .fs_reg = 0x22, 310 .fs_refresh = finsio_refresh_volt, 311 .fs_rfact = FRFACT(100, 100) 312 }, 313 { 314 .fs_desc = "VIN3", 315 .fs_type = ENVSYS_SVOLTS_DC, 316 .fs_aux = 0, 317 .fs_reg = 0x23, 318 .fs_refresh = finsio_refresh_volt, 319 .fs_rfact = FRFACT(47, 100) 320 }, 321 { 322 .fs_desc = "VIN4", 323 .fs_type = ENVSYS_SVOLTS_DC, 324 .fs_aux = 0, 325 .fs_reg = 0x24, 326 .fs_refresh = finsio_refresh_volt, 327 .fs_rfact = FRFACT(200, 47) 328 }, 329 { 330 .fs_desc = "VIN5", 331 .fs_type = ENVSYS_SVOLTS_DC, 332 .fs_aux = 0, 333 .fs_reg = 0x25, 334 .fs_refresh = finsio_refresh_volt, 335 .fs_rfact = FRFACT(200, 20) 336 }, 337 { 338 .fs_desc = "VIN6", 339 .fs_type = ENVSYS_SVOLTS_DC, 340 .fs_aux = 0, 341 .fs_reg = 0x26, 342 .fs_refresh = finsio_refresh_volt, 343 .fs_rfact = FRFACT(100, 100) 344 }, 345 { 346 .fs_desc = "VSB +3.3V", 347 .fs_type = ENVSYS_SVOLTS_DC, 348 .fs_aux = 0, 349 .fs_reg = 0x27, 350 .fs_refresh = finsio_refresh_volt, 351 .fs_rfact = FRFACT(200, 47) 352 }, 353 { 354 .fs_desc = "VBAT", 355 .fs_type = ENVSYS_SVOLTS_DC, 356 .fs_aux = 0, 357 .fs_reg = 0x28, 358 .fs_refresh = finsio_refresh_volt, 359 .fs_rfact = FRFACT(200, 47) 360 }, 361 /* Temperature */ 362 { 363 .fs_desc = "Temp1", 364 .fs_type = ENVSYS_STEMP, 365 .fs_aux = 0x1, 366 .fs_reg = 0x72, 367 .fs_refresh = finsio_refresh_temp, 368 .fs_rfact = 0 369 }, 370 { 371 .fs_desc = "Temp2", 372 .fs_type = ENVSYS_STEMP, 373 .fs_aux = 0x2, 374 .fs_reg = 0x74, 375 .fs_refresh = finsio_refresh_temp, 376 .fs_rfact = 0 377 }, 378 { 379 .fs_desc = "Temp3", 380 .fs_type = ENVSYS_STEMP, 381 .fs_aux = 0x4, 382 .fs_reg = 0x76, 383 .fs_refresh = finsio_refresh_temp, 384 .fs_rfact = 0 385 }, 386 /* Fan */ 387 { 388 .fs_desc = "Fan1", 389 .fs_type = ENVSYS_SFANRPM, 390 .fs_aux = 0, 391 .fs_reg = 0xa0, 392 .fs_refresh = finsio_refresh_fanrpm, 393 .fs_rfact = 0 394 }, 395 { 396 .fs_desc = "Fan2", 397 .fs_type = ENVSYS_SFANRPM, 398 .fs_aux = 0, 399 .fs_reg = 0xb0, 400 .fs_refresh = finsio_refresh_fanrpm, 401 .fs_rfact = 0 402 }, 403 { 404 .fs_desc = "Fan3", 405 .fs_type = ENVSYS_SFANRPM, 406 .fs_aux = 0, 407 .fs_reg = 0xc0, 408 .fs_refresh = finsio_refresh_fanrpm, 409 .fs_rfact = 0 410 }, 411 { 412 .fs_desc = "Fan4", 413 .fs_type = ENVSYS_SFANRPM, 414 .fs_aux = 0, 415 .fs_reg = 0xd0, 416 .fs_refresh = finsio_refresh_fanrpm, 417 .fs_rfact = 0 418 }, 419 420 { .fs_desc = NULL } 421 }; 422 423 static int 424 finsio_isa_match(device_t parent, cfdata_t match, void *aux) 425 { 426 struct isa_attach_args *ia = aux; 427 bus_space_handle_t ioh; 428 uint16_t val; 429 430 /* Must supply an address */ 431 if (ia->ia_nio < 1) 432 return 0; 433 434 if (ISA_DIRECT_CONFIG(ia)) 435 return 0; 436 437 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 438 return 0; 439 440 if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh)) 441 return 0; 442 443 finsio_enter(ia->ia_iot, ioh); 444 /* Find out Manufacturer ID */ 445 val = finsio_readreg(ia->ia_iot, ioh, FINSIO_MANUF) << 8; 446 val |= finsio_readreg(ia->ia_iot, ioh, FINSIO_MANUF + 1); 447 finsio_exit(ia->ia_iot, ioh); 448 bus_space_unmap(ia->ia_iot, ioh, 2); 449 450 if (val != FINTEK_ID) 451 return 0; 452 453 ia->ia_nio = 1; 454 ia->ia_io[0].ir_size = 2; 455 ia->ia_niomem = 0; 456 ia->ia_nirq = 0; 457 ia->ia_ndrq = 0; 458 459 return 1; 460 } 461 462 static void 463 finsio_isa_attach(device_t parent, device_t self, void *aux) 464 { 465 struct finsio_softc *sc = device_private(self); 466 struct isa_attach_args *ia = aux; 467 bus_space_handle_t ioh; 468 uint16_t hwmon_baddr, chipid, cr; 469 int i, rv = 0; 470 471 aprint_naive("\n"); 472 473 sc->sc_iot = ia->ia_iot; 474 475 /* Map Super I/O configuration space */ 476 if (bus_space_map(sc->sc_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh)) { 477 aprint_error(": can't map configuration I/O space\n"); 478 return; 479 } 480 481 finsio_enter(sc->sc_iot, ioh); 482 /* Get the Chip ID */ 483 chipid = finsio_readreg(sc->sc_iot, ioh, FINSIO_CHIP) << 8; 484 chipid |= finsio_readreg(sc->sc_iot, ioh, FINSIO_CHIP + 1); 485 /* 486 * Select the Hardware Monitor LDN to find out the I/O 487 * address space. 488 */ 489 finsio_writereg(sc->sc_iot, ioh, FINSIO_FUNC_SEL, FINSIO_FUNC_HWMON); 490 hwmon_baddr = finsio_readreg(sc->sc_iot, ioh, FINSIO_SENSADDR) << 8; 491 hwmon_baddr |= finsio_readreg(sc->sc_iot, ioh, FINSIO_SENSADDR + 1); 492 finsio_exit(sc->sc_iot, ioh); 493 bus_space_unmap(sc->sc_iot, ioh, 2); 494 495 switch (chipid) { 496 case FINSIO_IDF71805: 497 sc->sc_finsio_sensors = f71805_sensors; 498 aprint_normal(": Fintek F71805 Super I/O\n"); 499 break; 500 case FINSIO_IDF71806: 501 sc->sc_finsio_sensors = f71805_sensors; 502 aprint_normal(": Fintek F71806/F71872 Super I/O\n"); 503 break; 504 case FINSIO_IDF71862: 505 hwmon_baddr += FINSIO_F71882_HWM_OFFSET; 506 sc->sc_finsio_sensors = f71883_sensors; 507 aprint_normal(": Fintek F71862 Super I/O\n"); 508 break; 509 case FINSIO_IDF71883: 510 hwmon_baddr += FINSIO_F71882_HWM_OFFSET; 511 sc->sc_finsio_sensors = f71883_sensors; 512 aprint_normal(": Fintek F71882/F71883 Super I/O\n"); 513 break; 514 default: 515 /* 516 * Unknown Chip ID, assume the same register layout 517 * than F71805 for now. 518 */ 519 sc->sc_finsio_sensors = f71805_sensors; 520 aprint_normal(": Fintek Super I/O (unknown chip ID %x)\n", 521 chipid); 522 break; 523 } 524 525 /* Map Hardware Monitor I/O space */ 526 if (bus_space_map(sc->sc_iot, hwmon_baddr, 2, 0, &sc->sc_ioh)) { 527 aprint_error(": can't map hwmon I/O space\n"); 528 return; 529 } 530 531 /* 532 * Enable Hardware monitoring for fan/temperature and 533 * voltage sensors. 534 */ 535 cr = finsio_readreg(sc->sc_iot, sc->sc_ioh, FINSIO_HWMON_CONF); 536 finsio_writereg(sc->sc_iot, sc->sc_ioh, FINSIO_HWMON_CONF, cr | 0x3); 537 538 /* Find out the temperature mode */ 539 sc->sc_tempsel = finsio_readreg(sc->sc_iot, sc->sc_ioh, FINSIO_TMODE); 540 541 /* 542 * Initialize and attach sensors with sysmon_envsys(9). 543 */ 544 sc->sc_sme = sysmon_envsys_create(); 545 for (i = 0; sc->sc_finsio_sensors[i].fs_desc; i++) { 546 sc->sc_sensor[i].units = sc->sc_finsio_sensors[i].fs_type; 547 strlcpy(sc->sc_sensor[i].desc, sc->sc_finsio_sensors[i].fs_desc, 548 sizeof(sc->sc_sensor[i].desc)); 549 if (sysmon_envsys_sensor_attach(sc->sc_sme, 550 &sc->sc_sensor[i])) 551 goto fail; 552 } 553 554 sc->sc_sme->sme_name = device_xname(self); 555 sc->sc_sme->sme_cookie = sc; 556 sc->sc_sme->sme_refresh = finsio_refresh; 557 if ((rv = sysmon_envsys_register(sc->sc_sme))) { 558 aprint_error(": unable to register with sysmon (%d)\n", rv); 559 goto fail; 560 } 561 562 aprint_normal_dev(self, 563 "Hardware Monitor registers at 0x%x\n", hwmon_baddr); 564 return; 565 566 fail: 567 sysmon_envsys_destroy(sc->sc_sme); 568 bus_space_unmap(sc->sc_iot, sc->sc_ioh, 2); 569 } 570 571 /* Enter Super I/O configuration mode */ 572 static void 573 finsio_enter(bus_space_tag_t iot, bus_space_handle_t ioh) 574 { 575 bus_space_write_1(iot, ioh, FINSIO_ADDR, FINSIO_UNLOCK); 576 bus_space_write_1(iot, ioh, FINSIO_ADDR, FINSIO_UNLOCK); 577 } 578 579 /* Exit Super I/O configuration mode */ 580 static void 581 finsio_exit(bus_space_tag_t iot, bus_space_handle_t ioh) 582 { 583 bus_space_write_1(iot, ioh, FINSIO_ADDR, FINSIO_LOCK); 584 } 585 586 static uint8_t 587 finsio_readreg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg) 588 { 589 bus_space_write_1(iot, ioh, FINSIO_ADDR, reg); 590 return bus_space_read_1(iot, ioh, FINSIO_DATA); 591 } 592 593 static void 594 finsio_writereg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, int val) 595 { 596 bus_space_write_1(iot, ioh, FINSIO_ADDR, reg); 597 bus_space_write_1(iot, ioh, FINSIO_DATA, val); 598 } 599 600 static void 601 finsio_refresh(struct sysmon_envsys *sme, envsys_data_t *edata) 602 { 603 struct finsio_softc *sc = sme->sme_cookie; 604 int i = edata->sensor; 605 606 sc->sc_finsio_sensors[i].fs_refresh(sc, edata); 607 } 608 609 static void 610 finsio_refresh_volt(struct finsio_softc *sc, envsys_data_t *edata) 611 { 612 struct finsio_sensor *fs = &sc->sc_finsio_sensors[edata->sensor]; 613 int data; 614 615 data = finsio_readreg(sc->sc_iot, sc->sc_ioh, fs->fs_reg); 616 DPRINTF(("%s: data 0x%x\n", __func__, data)); 617 618 if (data == 0xff || data == 0) 619 edata->state = ENVSYS_SINVALID; 620 else { 621 edata->state = ENVSYS_SVALID; 622 edata->value_cur = data * fs->fs_rfact; 623 } 624 } 625 626 /* The BIOS seems to add a fudge factor to the CPU temp of +5C */ 627 static void 628 finsio_refresh_temp(struct finsio_softc *sc, envsys_data_t *edata) 629 { 630 struct finsio_sensor *fs = &sc->sc_finsio_sensors[edata->sensor]; 631 u_int data; 632 u_int llmax; 633 634 /* 635 * The data sheet says that the range of the temperature 636 * sensor is between 0 and 127 or 140 degrees C depending on 637 * what kind of sensor is used. 638 * A disconnected sensor seems to read over 110 or so. 639 */ 640 data = finsio_readreg(sc->sc_iot, sc->sc_ioh, fs->fs_reg) & 0xFF; 641 DPRINTF(("%s: data 0x%x\n", __func__, data)); 642 643 llmax = (sc->sc_tempsel & fs->fs_aux) ? 111 : 128; 644 if (data == 0 || data >= llmax) /* disconnected? */ 645 edata->state = ENVSYS_SINVALID; 646 else { 647 edata->state = ENVSYS_SVALID; 648 edata->value_cur = data * 1000000 + 273150000; 649 } 650 } 651 652 /* fan speed appears to be a 12-bit number */ 653 static void 654 finsio_refresh_fanrpm(struct finsio_softc *sc, envsys_data_t *edata) 655 { 656 struct finsio_sensor *fs = &sc->sc_finsio_sensors[edata->sensor]; 657 int data; 658 659 data = finsio_readreg(sc->sc_iot, sc->sc_ioh, fs->fs_reg) << 8; 660 data |= finsio_readreg(sc->sc_iot, sc->sc_ioh, fs->fs_reg + 1); 661 DPRINTF(("%s: data 0x%x\n", __func__, data)); 662 663 if (data >= 0xfff) 664 edata->state = ENVSYS_SINVALID; 665 else { 666 edata->value_cur = 1500000 / data; 667 edata->state = ENVSYS_SVALID; 668 } 669 } 670
Indexes created Tue Sep 30 20:09:53 GMT 2025