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gusreg.h revision 1.5
      1  1.5  augustss /* $NetBSD: gusreg.h,v 1.5 1997/09/06 14:23:14 augustss Exp $ */
      2  1.2       jtc 
      3  1.1    brezak /*-
      4  1.2       jtc  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  1.1    brezak  * All rights reserved.
      6  1.1    brezak  *
      7  1.2       jtc  * This code is derived from software contributed to The NetBSD Foundation
      8  1.2       jtc  * by Ken Hornstein and John Kohl.
      9  1.1    brezak  *
     10  1.1    brezak  * Redistribution and use in source and binary forms, with or without
     11  1.1    brezak  * modification, are permitted provided that the following conditions
     12  1.1    brezak  * are met:
     13  1.1    brezak  * 1. Redistributions of source code must retain the above copyright
     14  1.1    brezak  *    notice, this list of conditions and the following disclaimer.
     15  1.1    brezak  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1    brezak  *    notice, this list of conditions and the following disclaimer in the
     17  1.1    brezak  *    documentation and/or other materials provided with the distribution.
     18  1.1    brezak  * 3. All advertising materials mentioning features or use of this software
     19  1.1    brezak  *    must display the following acknowledgement:
     20  1.2       jtc  *        This product includes software developed by the NetBSD
     21  1.2       jtc  *	  Foundation, Inc. and its contributors.
     22  1.2       jtc  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.2       jtc  *    contributors may be used to endorse or promote products derived
     24  1.2       jtc  *    from this software without specific prior written permission.
     25  1.1    brezak  *
     26  1.3       jtc  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.3       jtc  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.3       jtc  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.3       jtc  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
     30  1.3       jtc  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.3       jtc  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.3       jtc  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.3       jtc  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.3       jtc  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.3       jtc  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.3       jtc  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1    brezak  */
     38  1.1    brezak 
     39  1.1    brezak /*
     40  1.1    brezak  * Register definitions of Gravis UltraSound card
     41  1.1    brezak  */
     42  1.1    brezak 
     43  1.1    brezak /*
     44  1.1    brezak  * MIDI control registers.  Essentially a MC6850 UART.  Note the MC6850's
     45  1.1    brezak  * "feature" of having read-only and write-only registers combined on one
     46  1.1    brezak  * address.
     47  1.1    brezak  */
     48  1.1    brezak 
     49  1.5  augustss #define GUS_IOH4_OFFSET		0x100
     50  1.5  augustss #define GUS_NPORT4		2
     51  1.5  augustss 
     52  1.5  augustss #define GUS_MIDI_CONTROL	(0x100-GUS_IOH4_OFFSET)
     53  1.5  augustss #define GUS_MIDI_STATUS		(0x100-GUS_IOH4_OFFSET)
     54  1.5  augustss #define GUS_MIDI_READ		(0x101-GUS_IOH4_OFFSET)
     55  1.5  augustss #define GUS_MIDI_WRITE		(0x101-GUS_IOH4_OFFSET)
     56  1.1    brezak 
     57  1.1    brezak /*
     58  1.1    brezak  * Joystick interface - note this is an absolute address, NOT an offset from
     59  1.1    brezak  * the GUS base address.
     60  1.1    brezak  */
     61  1.1    brezak 
     62  1.1    brezak #define GUS_JOYSTICK		0x201
     63  1.1    brezak 
     64  1.1    brezak /*
     65  1.1    brezak  * GUS control registers
     66  1.1    brezak  */
     67  1.1    brezak 
     68  1.1    brezak #define GUS_MIX_CONTROL		0x000
     69  1.1    brezak #define GUS_IRQ_STATUS		0x006
     70  1.1    brezak #define GUS_TIMER_CONTROL	0x008
     71  1.1    brezak #define GUS_TIMER_DATA		0x009
     72  1.1    brezak #define GUS_REG_CONTROL		0x00f	/* rev 3.4 or later only: select reg
     73  1.1    brezak 					   at 2XB */
     74  1.1    brezak #define		GUS_REG_NORMAL		0x00 /* IRQ/DMA as usual */
     75  1.1    brezak #define		GUS_REG_IRQCTL		0x05 /* IRQ ctl: write 0 to clear IRQ state */
     76  1.1    brezak #define		GUS_REG_JUMPER		0x06 /* jumper control: */
     77  1.1    brezak #define		GUS_JUMPER_MIDIEN	0x02 /* bit: enable MIDI ports */
     78  1.1    brezak #define		GUS_JUMPER_JOYEN	0x04 /* bit: enable joystick ports */
     79  1.1    brezak 
     80  1.1    brezak #define GUS_IRQ_CONTROL		0x00b
     81  1.1    brezak #define GUS_DMA_CONTROL		0x00b
     82  1.1    brezak #define GUS_IRQCTL_CONTROL	0x00b
     83  1.1    brezak #define GUS_JUMPER_CONTROL	0x00b
     84  1.5  augustss 
     85  1.5  augustss #define GUS_NPORT1 16
     86  1.5  augustss 
     87  1.5  augustss #define GUS_IOH2_OFFSET		0x102
     88  1.5  augustss #define GUS_VOICE_SELECT	(0x102-GUS_IOH2_OFFSET)
     89  1.5  augustss #define GUS_REG_SELECT		(0x103-GUS_IOH2_OFFSET)
     90  1.5  augustss #define GUS_DATA_LOW		(0x104-GUS_IOH2_OFFSET)
     91  1.5  augustss #define GUS_DATA_HIGH		(0x105-GUS_IOH2_OFFSET)
     92  1.5  augustss /* GUS_MIXER_SELECT 106 */
     93  1.5  augustss #define GUS_DRAM_DATA		(0x107-GUS_IOH2_OFFSET)
     94  1.5  augustss 
     95  1.5  augustss #define GUS_NPORT2 6
     96  1.1    brezak 
     97  1.1    brezak /*
     98  1.1    brezak  * GUS on-board global registers
     99  1.1    brezak  */
    100  1.1    brezak 
    101  1.1    brezak #define GUSREG_DMA_CONTROL	0x41
    102  1.1    brezak #define GUSREG_DMA_START	0x42
    103  1.1    brezak #define GUSREG_DRAM_ADDR_LOW	0x43
    104  1.1    brezak #define GUSREG_DRAM_ADDR_HIGH	0x44
    105  1.1    brezak #define GUSREG_TIMER_CONTROL	0x45
    106  1.1    brezak #define GUSREG_TIMER1_COUNT	0x46	/* count-up, then interrupt, 80usec */
    107  1.1    brezak #define GUSREG_TIMER2_COUNT	0x47	/* count-up, then interrupt, 320usec */
    108  1.1    brezak #define GUSREG_SAMPLE_FREQ	0x48	/* 9878400/(16*(rate+2)) */
    109  1.1    brezak #define GUSREG_SAMPLE_CONTROL	0x49
    110  1.1    brezak #define GUSREG_JOYSTICK_TRIM	0x4b
    111  1.1    brezak #define GUSREG_RESET		0x4c
    112  1.1    brezak 
    113  1.1    brezak /*
    114  1.1    brezak  * GUS voice specific registers (some of which aren't!).  Add 0x80 to these
    115  1.1    brezak  * registers for reads
    116  1.1    brezak  */
    117  1.1    brezak 
    118  1.1    brezak #define GUSREG_READ		0x80
    119  1.1    brezak #define GUSREG_VOICE_CNTL	0x00
    120  1.1    brezak #define GUSREG_FREQ_CONTROL	0x01
    121  1.1    brezak #define GUSREG_START_ADDR_HIGH	0x02
    122  1.1    brezak #define GUSREG_START_ADDR_LOW	0x03
    123  1.1    brezak #define GUSREG_END_ADDR_HIGH	0x04
    124  1.1    brezak #define GUSREG_END_ADDR_LOW	0x05
    125  1.1    brezak #define GUSREG_VOLUME_RATE	0x06
    126  1.1    brezak #define GUSREG_START_VOLUME	0x07
    127  1.1    brezak #define GUSREG_END_VOLUME	0x08
    128  1.1    brezak #define GUSREG_CUR_VOLUME	0x09
    129  1.1    brezak #define GUSREG_CUR_ADDR_HIGH	0x0a
    130  1.1    brezak #define GUSREG_CUR_ADDR_LOW	0x0b
    131  1.1    brezak #define GUSREG_PAN_POS		0x0c
    132  1.1    brezak #define GUSREG_VOLUME_CONTROL	0x0d
    133  1.1    brezak #define GUSREG_ACTIVE_VOICES	0x0e	/* voice-independent:set voice count */
    134  1.1    brezak #define GUSREG_IRQ_STATUS	0x8f	/* voice-independent */
    135  1.1    brezak 
    136  1.1    brezak #define GUS_PAN_FULL_LEFT	0x0
    137  1.1    brezak #define GUS_PAN_FULL_RIGHT	0xf
    138  1.1    brezak 
    139  1.1    brezak /*
    140  1.1    brezak  * GUS Bitmasks for reset register
    141  1.1    brezak  */
    142  1.1    brezak 
    143  1.1    brezak #define GUSMASK_MASTER_RESET	0x01
    144  1.1    brezak #define GUSMASK_DAC_ENABLE	0x02
    145  1.1    brezak #define GUSMASK_IRQ_ENABLE	0x04
    146  1.1    brezak 
    147  1.1    brezak /*
    148  1.1    brezak  * Bitmasks for IRQ status port
    149  1.1    brezak  */
    150  1.1    brezak 
    151  1.1    brezak #define GUSMASK_IRQ_MIDIXMIT	0x01		/* MIDI transmit IRQ */
    152  1.1    brezak #define GUSMASK_IRQ_MIDIRCVR	0x02		/* MIDI received IRQ */
    153  1.1    brezak #define GUSMASK_IRQ_TIMER1	0x04		/* timer 1 IRQ */
    154  1.1    brezak #define GUSMASK_IRQ_TIMER2	0x08		/* timer 2 IRQ */
    155  1.1    brezak #define GUSMASK_IRQ_RESERVED	0x10		/* Reserved (set to 0) */
    156  1.1    brezak #define GUSMASK_IRQ_VOICE	0x20		/* Wavetable IRQ (any voice) */
    157  1.1    brezak #define GUSMASK_IRQ_VOLUME	0x40		/* Volume ramp IRQ (any voc) */
    158  1.1    brezak #define GUSMASK_IRQ_DMATC	0x80		/* DMA transfer complete */
    159  1.1    brezak 
    160  1.1    brezak /*
    161  1.1    brezak  * Bitmasks for sampling control register
    162  1.1    brezak  */
    163  1.1    brezak #define	GUSMASK_SAMPLE_START	0x01		/* start sampling */
    164  1.1    brezak #define	GUSMASK_SAMPLE_STEREO	0x02		/* mono or stereo */
    165  1.1    brezak #define	GUSMASK_SAMPLE_DATA16	0x04		/* 16-bit DMA channel */
    166  1.1    brezak #define	GUSMASK_SAMPLE_IRQ	0x20		/* enable IRQ */
    167  1.1    brezak #define	GUSMASK_SAMPLE_DMATC	0x40		/* DMA transfer complete */
    168  1.1    brezak #define	GUSMASK_SAMPLE_INVBIT	0x80		/* invert MSbit */
    169  1.1    brezak 
    170  1.1    brezak /*
    171  1.1    brezak  * Bitmasks for IRQ status register (different than IRQ status _port_ - the
    172  1.1    brezak  * register is internal to the GUS)
    173  1.1    brezak  */
    174  1.1    brezak 
    175  1.1    brezak #define GUSMASK_WIRQ_VOLUME	0x40		/* Flag for volume interrupt */
    176  1.1    brezak #define GUSMASK_WIRQ_VOICE	0x80		/* Flag for voice interrupt */
    177  1.1    brezak #define GUSMASK_WIRQ_VOICEMASK	0x1f		/* Bits holding voice # */
    178  1.1    brezak 
    179  1.1    brezak /*
    180  1.1    brezak  * GUS bitmasks for built-in mixer control (separate from the ICS or CS chips)
    181  1.1    brezak  */
    182  1.1    brezak 
    183  1.1    brezak #define GUSMASK_LINE_IN		0x01		/* 0=enable */
    184  1.1    brezak #define GUSMASK_LINE_OUT	0x02		/* 0=enable */
    185  1.1    brezak #define GUSMASK_MIC_IN		0x04		/* 1=enable */
    186  1.1    brezak #define GUSMASK_LATCHES		0x08		/* enable IRQ latches */
    187  1.1    brezak #define GUSMASK_COMBINE		0x10		/* combine Ch 1 IRQ & Ch 2 (MIDI) */
    188  1.1    brezak #define GUSMASK_MIDI_LOOPBACK	0x20		/* MIDI loopback */
    189  1.1    brezak #define GUSMASK_CONTROL_SEL	0x40		/* Select control register */
    190  1.1    brezak 
    191  1.1    brezak #define GUSMASK_BOTH_RQ		0x40		/* Combine both RQ lines */
    192  1.1    brezak 
    193  1.1    brezak /*
    194  1.1    brezak  * GUS bitmaks for DMA control
    195  1.1    brezak  */
    196  1.1    brezak 
    197  1.1    brezak #define GUSMASK_DMA_ENABLE	0x01		/* Enable DMA transfer */
    198  1.1    brezak #define GUSMASK_DMA_READ	0x02		/* 1=read, 0=write */
    199  1.1    brezak #define GUSMASK_DMA_WRITE	0x00		/* for consistancy */
    200  1.1    brezak #define GUSMASK_DMA_WIDTH	0x04		/* Data transfer width */
    201  1.1    brezak #define GUSMASK_DMA_R0		0x00		/* Various DMA speeds */
    202  1.1    brezak #define GUSMASK_DMA_R1		0x08
    203  1.1    brezak #define GUSMASK_DMA_R2		0x10
    204  1.1    brezak #define GUSMASK_DMA_R3		0x18
    205  1.1    brezak #define GUSMASK_DMA_IRQ		0x20		/* Enable DMA to IRQ */
    206  1.1    brezak #define GUSMASK_DMA_IRQPEND	0x40		/* DMA IRQ pending */
    207  1.1    brezak #define GUSMASK_DMA_DATA_SIZE	0x40		/* 0=8 bit, 1=16 bit */
    208  1.1    brezak #define GUSMASK_DMA_INVBIT	0x80		/* invert high bit */
    209  1.1    brezak 
    210  1.1    brezak /*
    211  1.1    brezak  * GUS bitmasks for voice control
    212  1.1    brezak  */
    213  1.1    brezak 
    214  1.1    brezak #define GUSMASK_VOICE_STOPPED	0x01		/* The voice is stopped */
    215  1.1    brezak #define GUSMASK_STOP_VOICE	0x02		/* Force voice to stop */
    216  1.1    brezak #define GUSMASK_DATA_SIZE16	0x04		/* 1=16 bit, 0=8 bit data */
    217  1.1    brezak #define GUSMASK_LOOP_ENABLE	0x08		/* Loop voice at end */
    218  1.1    brezak #define	GUSMASK_VOICE_BIDIR	0x10		/* Bi-directional looping */
    219  1.1    brezak #define GUSMASK_VOICE_IRQ	0x20		/* Enable the voice IRQ */
    220  1.1    brezak #define GUSMASK_INCR_DIR	0x40		/* Direction of address incr */
    221  1.1    brezak #define GUSMASK_VOICE_IRQPEND	0x80		/* Pending IRQ for voice */
    222  1.1    brezak 
    223  1.1    brezak /*
    224  1.1    brezak  * Bitmasks for volume control
    225  1.1    brezak  */
    226  1.1    brezak 
    227  1.1    brezak #define GUSMASK_VOLUME_STOPPED	0x01		/* Volume ramping stopped */
    228  1.1    brezak #define GUSMASK_STOP_VOLUME	0x02		/* Manually stop volume */
    229  1.1    brezak #define GUSMASK_VOICE_ROLL	0x04		/* Roll over/low water condition */
    230  1.1    brezak #define GUSMASK_VOLUME_LOOP	0x08		/* Volume ramp looping */
    231  1.1    brezak #define GUSMASK_VOLUME_BIDIR	0x10		/* Bi-dir volume looping */
    232  1.1    brezak #define GUSMASK_VOLUME_IRQ	0x20		/* IRQ on end of volume ramp */
    233  1.1    brezak #define GUSMASK_VOLUME_DIR	0x40		/* Direction of volume ramp */
    234  1.1    brezak #define GUSMASK_VOLUME_IRQPEND	0x80		/* Pending volume IRQ */
    235  1.1    brezak #define MIDI_RESET		0x03
    236  1.1    brezak 
    237  1.1    brezak /*
    238  1.1    brezak  * ICS Mixer registers
    239  1.1    brezak  */
    240  1.1    brezak 
    241  1.5  augustss #define GUS_IOH3_OFFSET		0x506
    242  1.5  augustss #define GUS_NPORT3		1
    243  1.5  augustss 
    244  1.5  augustss #define GUS_MIXER_SELECT	(0x506-GUS_IOH3_OFFSET)		/* read=board rev, wr=mixer */
    245  1.5  augustss #define GUS_BOARD_REV		(0x506-GUS_IOH3_OFFSET)
    246  1.5  augustss #define GUS_MIXER_DATA		(0x106-GUS_IOH2_OFFSET)		/* data for mixer control */
    247  1.1    brezak 
    248  1.1    brezak #define GUSMIX_CHAN_MIC		ICSMIX_CHAN_0
    249  1.1    brezak #define GUSMIX_CHAN_LINE	ICSMIX_CHAN_1
    250  1.1    brezak #define GUSMIX_CHAN_CD		ICSMIX_CHAN_2
    251  1.1    brezak #define GUSMIX_CHAN_DAC		ICSMIX_CHAN_3
    252  1.1    brezak #define GUSMIX_CHAN_MASTER	ICSMIX_CHAN_5
    253  1.1    brezak 
    254  1.1    brezak /*
    255  1.1    brezak  * Codec/Mixer registers
    256  1.1    brezak  */
    257  1.1    brezak 
    258  1.4     mikel #define GUS_MAX_CODEC_BASE		0x10C
    259  1.4     mikel #define GUS_DAUGHTER_CODEC_BASE		0x530
    260  1.4     mikel #define GUS_DAUGHTER_CODEC_BASE2	0x604
    261  1.4     mikel #define GUS_DAUGHTER_CODEC_BASE3	0xE80
    262  1.4     mikel #define GUS_DAUGHTER_CODEC_BASE4	0xF40
    263  1.4     mikel 
    264  1.4     mikel #define GUS_CODEC_SELECT	0
    265  1.4     mikel #define GUS_CODEC_DATA		1
    266  1.4     mikel #define GUS_CODEC_STATUS	2
    267  1.4     mikel #define GUS_CODEC_PIO		3
    268  1.1    brezak 
    269  1.1    brezak #define GUS_MAX_CTRL		0x106
    270  1.1    brezak #define	GUS_MAX_BASEBITS	0xf	/* sets middle nibble of 3X6 */
    271  1.1    brezak #define	GUS_MAX_RECCHAN16	0x10	/* 0=8bit DMA read, 1=16bit DMA read */
    272  1.1    brezak #define	GUS_MAX_PLAYCHAN16	0x20	/* 0=8bit, 1=16bit */
    273  1.1    brezak #define GUS_MAX_CODEC_ENABLE	0x40	/* 0=disable, 1=enable */
    274