gusreg.h revision 1.1 1 /* $NetBSD: gusreg.h,v 1.1 1995/07/19 19:58:47 brezak Exp $ */
2 /*-
3 * Copyright (c) 1995 John T. Kohl. All Rights Reserved.
4 * Copyright (c) 1994 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Ken Hornstein.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * $Id: gusreg.h,v 1.1 1995/07/19 19:58:47 brezak Exp $
39 */
40
41 /*
42 * Register definitions of Gravis UltraSound card
43 */
44
45 /*
46 * MIDI control registers. Essentially a MC6850 UART. Note the MC6850's
47 * "feature" of having read-only and write-only registers combined on one
48 * address.
49 */
50
51 #define GUS_MIDI_CONTROL 0x100
52 #define GUS_MIDI_STATUS 0x100
53 #define GUS_MIDI_READ 0x101
54 #define GUS_MIDI_WRITE 0x101
55
56 /*
57 * Joystick interface - note this is an absolute address, NOT an offset from
58 * the GUS base address.
59 */
60
61 #define GUS_JOYSTICK 0x201
62
63 /*
64 * GUS control registers
65 */
66
67 #define GUS_MIX_CONTROL 0x000
68 #define GUS_IRQ_STATUS 0x006
69 #define GUS_TIMER_CONTROL 0x008
70 #define GUS_TIMER_DATA 0x009
71 #define GUS_REG_CONTROL 0x00f /* rev 3.4 or later only: select reg
72 at 2XB */
73 #define GUS_REG_NORMAL 0x00 /* IRQ/DMA as usual */
74 #define GUS_REG_IRQCTL 0x05 /* IRQ ctl: write 0 to clear IRQ state */
75 #define GUS_REG_JUMPER 0x06 /* jumper control: */
76 #define GUS_JUMPER_MIDIEN 0x02 /* bit: enable MIDI ports */
77 #define GUS_JUMPER_JOYEN 0x04 /* bit: enable joystick ports */
78
79 #define GUS_IRQ_CONTROL 0x00b
80 #define GUS_DMA_CONTROL 0x00b
81 #define GUS_IRQCTL_CONTROL 0x00b
82 #define GUS_JUMPER_CONTROL 0x00b
83 #define GUS_VOICE_SELECT 0x102
84 #define GUS_REG_SELECT 0x103
85 #define GUS_DATA_LOW 0x104
86 #define GUS_DATA_HIGH 0x105
87 #define GUS_DRAM_DATA 0x107
88
89 /*
90 * GUS on-board global registers
91 */
92
93 #define GUSREG_DMA_CONTROL 0x41
94 #define GUSREG_DMA_START 0x42
95 #define GUSREG_DRAM_ADDR_LOW 0x43
96 #define GUSREG_DRAM_ADDR_HIGH 0x44
97 #define GUSREG_TIMER_CONTROL 0x45
98 #define GUSREG_TIMER1_COUNT 0x46 /* count-up, then interrupt, 80usec */
99 #define GUSREG_TIMER2_COUNT 0x47 /* count-up, then interrupt, 320usec */
100 #define GUSREG_SAMPLE_FREQ 0x48 /* 9878400/(16*(rate+2)) */
101 #define GUSREG_SAMPLE_CONTROL 0x49
102 #define GUSREG_JOYSTICK_TRIM 0x4b
103 #define GUSREG_RESET 0x4c
104
105 /*
106 * GUS voice specific registers (some of which aren't!). Add 0x80 to these
107 * registers for reads
108 */
109
110 #define GUSREG_READ 0x80
111 #define GUSREG_VOICE_CNTL 0x00
112 #define GUSREG_FREQ_CONTROL 0x01
113 #define GUSREG_START_ADDR_HIGH 0x02
114 #define GUSREG_START_ADDR_LOW 0x03
115 #define GUSREG_END_ADDR_HIGH 0x04
116 #define GUSREG_END_ADDR_LOW 0x05
117 #define GUSREG_VOLUME_RATE 0x06
118 #define GUSREG_START_VOLUME 0x07
119 #define GUSREG_END_VOLUME 0x08
120 #define GUSREG_CUR_VOLUME 0x09
121 #define GUSREG_CUR_ADDR_HIGH 0x0a
122 #define GUSREG_CUR_ADDR_LOW 0x0b
123 #define GUSREG_PAN_POS 0x0c
124 #define GUSREG_VOLUME_CONTROL 0x0d
125 #define GUSREG_ACTIVE_VOICES 0x0e /* voice-independent:set voice count */
126 #define GUSREG_IRQ_STATUS 0x8f /* voice-independent */
127
128 #define GUS_PAN_FULL_LEFT 0x0
129 #define GUS_PAN_FULL_RIGHT 0xf
130
131 /*
132 * GUS Bitmasks for reset register
133 */
134
135 #define GUSMASK_MASTER_RESET 0x01
136 #define GUSMASK_DAC_ENABLE 0x02
137 #define GUSMASK_IRQ_ENABLE 0x04
138
139 /*
140 * Bitmasks for IRQ status port
141 */
142
143 #define GUSMASK_IRQ_MIDIXMIT 0x01 /* MIDI transmit IRQ */
144 #define GUSMASK_IRQ_MIDIRCVR 0x02 /* MIDI received IRQ */
145 #define GUSMASK_IRQ_TIMER1 0x04 /* timer 1 IRQ */
146 #define GUSMASK_IRQ_TIMER2 0x08 /* timer 2 IRQ */
147 #define GUSMASK_IRQ_RESERVED 0x10 /* Reserved (set to 0) */
148 #define GUSMASK_IRQ_VOICE 0x20 /* Wavetable IRQ (any voice) */
149 #define GUSMASK_IRQ_VOLUME 0x40 /* Volume ramp IRQ (any voc) */
150 #define GUSMASK_IRQ_DMATC 0x80 /* DMA transfer complete */
151
152 /*
153 * Bitmasks for sampling control register
154 */
155 #define GUSMASK_SAMPLE_START 0x01 /* start sampling */
156 #define GUSMASK_SAMPLE_STEREO 0x02 /* mono or stereo */
157 #define GUSMASK_SAMPLE_DATA16 0x04 /* 16-bit DMA channel */
158 #define GUSMASK_SAMPLE_IRQ 0x20 /* enable IRQ */
159 #define GUSMASK_SAMPLE_DMATC 0x40 /* DMA transfer complete */
160 #define GUSMASK_SAMPLE_INVBIT 0x80 /* invert MSbit */
161
162 /*
163 * Bitmasks for IRQ status register (different than IRQ status _port_ - the
164 * register is internal to the GUS)
165 */
166
167 #define GUSMASK_WIRQ_VOLUME 0x40 /* Flag for volume interrupt */
168 #define GUSMASK_WIRQ_VOICE 0x80 /* Flag for voice interrupt */
169 #define GUSMASK_WIRQ_VOICEMASK 0x1f /* Bits holding voice # */
170
171 /*
172 * GUS bitmasks for built-in mixer control (separate from the ICS or CS chips)
173 */
174
175 #define GUSMASK_LINE_IN 0x01 /* 0=enable */
176 #define GUSMASK_LINE_OUT 0x02 /* 0=enable */
177 #define GUSMASK_MIC_IN 0x04 /* 1=enable */
178 #define GUSMASK_LATCHES 0x08 /* enable IRQ latches */
179 #define GUSMASK_COMBINE 0x10 /* combine Ch 1 IRQ & Ch 2 (MIDI) */
180 #define GUSMASK_MIDI_LOOPBACK 0x20 /* MIDI loopback */
181 #define GUSMASK_CONTROL_SEL 0x40 /* Select control register */
182
183 #define GUSMASK_BOTH_RQ 0x40 /* Combine both RQ lines */
184
185 /*
186 * GUS bitmaks for DMA control
187 */
188
189 #define GUSMASK_DMA_ENABLE 0x01 /* Enable DMA transfer */
190 #define GUSMASK_DMA_READ 0x02 /* 1=read, 0=write */
191 #define GUSMASK_DMA_WRITE 0x00 /* for consistancy */
192 #define GUSMASK_DMA_WIDTH 0x04 /* Data transfer width */
193 #define GUSMASK_DMA_R0 0x00 /* Various DMA speeds */
194 #define GUSMASK_DMA_R1 0x08
195 #define GUSMASK_DMA_R2 0x10
196 #define GUSMASK_DMA_R3 0x18
197 #define GUSMASK_DMA_IRQ 0x20 /* Enable DMA to IRQ */
198 #define GUSMASK_DMA_IRQPEND 0x40 /* DMA IRQ pending */
199 #define GUSMASK_DMA_DATA_SIZE 0x40 /* 0=8 bit, 1=16 bit */
200 #define GUSMASK_DMA_INVBIT 0x80 /* invert high bit */
201
202 /*
203 * GUS bitmasks for voice control
204 */
205
206 #define GUSMASK_VOICE_STOPPED 0x01 /* The voice is stopped */
207 #define GUSMASK_STOP_VOICE 0x02 /* Force voice to stop */
208 #define GUSMASK_DATA_SIZE16 0x04 /* 1=16 bit, 0=8 bit data */
209 #define GUSMASK_LOOP_ENABLE 0x08 /* Loop voice at end */
210 #define GUSMASK_VOICE_BIDIR 0x10 /* Bi-directional looping */
211 #define GUSMASK_VOICE_IRQ 0x20 /* Enable the voice IRQ */
212 #define GUSMASK_INCR_DIR 0x40 /* Direction of address incr */
213 #define GUSMASK_VOICE_IRQPEND 0x80 /* Pending IRQ for voice */
214
215 /*
216 * Bitmasks for volume control
217 */
218
219 #define GUSMASK_VOLUME_STOPPED 0x01 /* Volume ramping stopped */
220 #define GUSMASK_STOP_VOLUME 0x02 /* Manually stop volume */
221 #define GUSMASK_VOICE_ROLL 0x04 /* Roll over/low water condition */
222 #define GUSMASK_VOLUME_LOOP 0x08 /* Volume ramp looping */
223 #define GUSMASK_VOLUME_BIDIR 0x10 /* Bi-dir volume looping */
224 #define GUSMASK_VOLUME_IRQ 0x20 /* IRQ on end of volume ramp */
225 #define GUSMASK_VOLUME_DIR 0x40 /* Direction of volume ramp */
226 #define GUSMASK_VOLUME_IRQPEND 0x80 /* Pending volume IRQ */
227 #define MIDI_RESET 0x03
228
229 /*
230 * ICS Mixer registers
231 */
232
233 #define GUS_MIXER_SELECT 0x506 /* read=board rev, wr=mixer */
234 #define GUS_BOARD_REV 0x506
235 #define GUS_MIXER_DATA 0x106 /* data for mixer control */
236
237 #define GUSMIX_CHAN_MIC ICSMIX_CHAN_0
238 #define GUSMIX_CHAN_LINE ICSMIX_CHAN_1
239 #define GUSMIX_CHAN_CD ICSMIX_CHAN_2
240 #define GUSMIX_CHAN_DAC ICSMIX_CHAN_3
241 #define GUSMIX_CHAN_MASTER ICSMIX_CHAN_5
242
243 /*
244 * Codec/Mixer registers
245 */
246
247 /* all these get +4 more in ad1848, sigh. */
248 #define GUS_MAX_CODEC_BASE 0x108
249 #define GUS_DAUGHTER_CODEC_BASE 0x52C
250 #define GUS_DAUGHTER_CODEC_BASE2 0x600
251 #define GUS_DAUGHTER_CODEC_BASE3 0xE7C
252 #define GUS_DAUGHTER_CODEC_BASE4 0xF3C
253
254 #define GUS_CODEC_SELECT 4 /* base + 0 */
255 #define GUS_CODEC_DATA 5 /* base + 1 */
256 #define GUS_CODEC_STATUS 6 /* base + 2 */
257 #define GUS_CODEC_PIO 7 /* base + 3 */
258
259 #define GUS_MAX_CTRL 0x106
260 #define GUS_MAX_BASEBITS 0xf /* sets middle nibble of 3X6 */
261 #define GUS_MAX_RECCHAN16 0x10 /* 0=8bit DMA read, 1=16bit DMA read */
262 #define GUS_MAX_PLAYCHAN16 0x20 /* 0=8bit, 1=16bit */
263 #define GUS_MAX_CODEC_ENABLE 0x40 /* 0=disable, 1=enable */
264