gusreg.h revision 1.4 1 /* $NetBSD: gusreg.h,v 1.4 1997/03/19 06:45:23 mikel Exp $ */
2
3 /*-
4 * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Ken Hornstein and John Kohl.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Register definitions of Gravis UltraSound card
41 */
42
43 /*
44 * MIDI control registers. Essentially a MC6850 UART. Note the MC6850's
45 * "feature" of having read-only and write-only registers combined on one
46 * address.
47 */
48
49 #define GUS_MIDI_CONTROL 0x100
50 #define GUS_MIDI_STATUS 0x100
51 #define GUS_MIDI_READ 0x101
52 #define GUS_MIDI_WRITE 0x101
53
54 /*
55 * Joystick interface - note this is an absolute address, NOT an offset from
56 * the GUS base address.
57 */
58
59 #define GUS_JOYSTICK 0x201
60
61 /*
62 * GUS control registers
63 */
64
65 #define GUS_MIX_CONTROL 0x000
66 #define GUS_IRQ_STATUS 0x006
67 #define GUS_TIMER_CONTROL 0x008
68 #define GUS_TIMER_DATA 0x009
69 #define GUS_REG_CONTROL 0x00f /* rev 3.4 or later only: select reg
70 at 2XB */
71 #define GUS_REG_NORMAL 0x00 /* IRQ/DMA as usual */
72 #define GUS_REG_IRQCTL 0x05 /* IRQ ctl: write 0 to clear IRQ state */
73 #define GUS_REG_JUMPER 0x06 /* jumper control: */
74 #define GUS_JUMPER_MIDIEN 0x02 /* bit: enable MIDI ports */
75 #define GUS_JUMPER_JOYEN 0x04 /* bit: enable joystick ports */
76
77 #define GUS_IRQ_CONTROL 0x00b
78 #define GUS_DMA_CONTROL 0x00b
79 #define GUS_IRQCTL_CONTROL 0x00b
80 #define GUS_JUMPER_CONTROL 0x00b
81 #define GUS_VOICE_SELECT 0x102
82 #define GUS_REG_SELECT 0x103
83 #define GUS_DATA_LOW 0x104
84 #define GUS_DATA_HIGH 0x105
85 #define GUS_DRAM_DATA 0x107
86
87 /*
88 * GUS on-board global registers
89 */
90
91 #define GUSREG_DMA_CONTROL 0x41
92 #define GUSREG_DMA_START 0x42
93 #define GUSREG_DRAM_ADDR_LOW 0x43
94 #define GUSREG_DRAM_ADDR_HIGH 0x44
95 #define GUSREG_TIMER_CONTROL 0x45
96 #define GUSREG_TIMER1_COUNT 0x46 /* count-up, then interrupt, 80usec */
97 #define GUSREG_TIMER2_COUNT 0x47 /* count-up, then interrupt, 320usec */
98 #define GUSREG_SAMPLE_FREQ 0x48 /* 9878400/(16*(rate+2)) */
99 #define GUSREG_SAMPLE_CONTROL 0x49
100 #define GUSREG_JOYSTICK_TRIM 0x4b
101 #define GUSREG_RESET 0x4c
102
103 /*
104 * GUS voice specific registers (some of which aren't!). Add 0x80 to these
105 * registers for reads
106 */
107
108 #define GUSREG_READ 0x80
109 #define GUSREG_VOICE_CNTL 0x00
110 #define GUSREG_FREQ_CONTROL 0x01
111 #define GUSREG_START_ADDR_HIGH 0x02
112 #define GUSREG_START_ADDR_LOW 0x03
113 #define GUSREG_END_ADDR_HIGH 0x04
114 #define GUSREG_END_ADDR_LOW 0x05
115 #define GUSREG_VOLUME_RATE 0x06
116 #define GUSREG_START_VOLUME 0x07
117 #define GUSREG_END_VOLUME 0x08
118 #define GUSREG_CUR_VOLUME 0x09
119 #define GUSREG_CUR_ADDR_HIGH 0x0a
120 #define GUSREG_CUR_ADDR_LOW 0x0b
121 #define GUSREG_PAN_POS 0x0c
122 #define GUSREG_VOLUME_CONTROL 0x0d
123 #define GUSREG_ACTIVE_VOICES 0x0e /* voice-independent:set voice count */
124 #define GUSREG_IRQ_STATUS 0x8f /* voice-independent */
125
126 #define GUS_PAN_FULL_LEFT 0x0
127 #define GUS_PAN_FULL_RIGHT 0xf
128
129 /*
130 * GUS Bitmasks for reset register
131 */
132
133 #define GUSMASK_MASTER_RESET 0x01
134 #define GUSMASK_DAC_ENABLE 0x02
135 #define GUSMASK_IRQ_ENABLE 0x04
136
137 /*
138 * Bitmasks for IRQ status port
139 */
140
141 #define GUSMASK_IRQ_MIDIXMIT 0x01 /* MIDI transmit IRQ */
142 #define GUSMASK_IRQ_MIDIRCVR 0x02 /* MIDI received IRQ */
143 #define GUSMASK_IRQ_TIMER1 0x04 /* timer 1 IRQ */
144 #define GUSMASK_IRQ_TIMER2 0x08 /* timer 2 IRQ */
145 #define GUSMASK_IRQ_RESERVED 0x10 /* Reserved (set to 0) */
146 #define GUSMASK_IRQ_VOICE 0x20 /* Wavetable IRQ (any voice) */
147 #define GUSMASK_IRQ_VOLUME 0x40 /* Volume ramp IRQ (any voc) */
148 #define GUSMASK_IRQ_DMATC 0x80 /* DMA transfer complete */
149
150 /*
151 * Bitmasks for sampling control register
152 */
153 #define GUSMASK_SAMPLE_START 0x01 /* start sampling */
154 #define GUSMASK_SAMPLE_STEREO 0x02 /* mono or stereo */
155 #define GUSMASK_SAMPLE_DATA16 0x04 /* 16-bit DMA channel */
156 #define GUSMASK_SAMPLE_IRQ 0x20 /* enable IRQ */
157 #define GUSMASK_SAMPLE_DMATC 0x40 /* DMA transfer complete */
158 #define GUSMASK_SAMPLE_INVBIT 0x80 /* invert MSbit */
159
160 /*
161 * Bitmasks for IRQ status register (different than IRQ status _port_ - the
162 * register is internal to the GUS)
163 */
164
165 #define GUSMASK_WIRQ_VOLUME 0x40 /* Flag for volume interrupt */
166 #define GUSMASK_WIRQ_VOICE 0x80 /* Flag for voice interrupt */
167 #define GUSMASK_WIRQ_VOICEMASK 0x1f /* Bits holding voice # */
168
169 /*
170 * GUS bitmasks for built-in mixer control (separate from the ICS or CS chips)
171 */
172
173 #define GUSMASK_LINE_IN 0x01 /* 0=enable */
174 #define GUSMASK_LINE_OUT 0x02 /* 0=enable */
175 #define GUSMASK_MIC_IN 0x04 /* 1=enable */
176 #define GUSMASK_LATCHES 0x08 /* enable IRQ latches */
177 #define GUSMASK_COMBINE 0x10 /* combine Ch 1 IRQ & Ch 2 (MIDI) */
178 #define GUSMASK_MIDI_LOOPBACK 0x20 /* MIDI loopback */
179 #define GUSMASK_CONTROL_SEL 0x40 /* Select control register */
180
181 #define GUSMASK_BOTH_RQ 0x40 /* Combine both RQ lines */
182
183 /*
184 * GUS bitmaks for DMA control
185 */
186
187 #define GUSMASK_DMA_ENABLE 0x01 /* Enable DMA transfer */
188 #define GUSMASK_DMA_READ 0x02 /* 1=read, 0=write */
189 #define GUSMASK_DMA_WRITE 0x00 /* for consistancy */
190 #define GUSMASK_DMA_WIDTH 0x04 /* Data transfer width */
191 #define GUSMASK_DMA_R0 0x00 /* Various DMA speeds */
192 #define GUSMASK_DMA_R1 0x08
193 #define GUSMASK_DMA_R2 0x10
194 #define GUSMASK_DMA_R3 0x18
195 #define GUSMASK_DMA_IRQ 0x20 /* Enable DMA to IRQ */
196 #define GUSMASK_DMA_IRQPEND 0x40 /* DMA IRQ pending */
197 #define GUSMASK_DMA_DATA_SIZE 0x40 /* 0=8 bit, 1=16 bit */
198 #define GUSMASK_DMA_INVBIT 0x80 /* invert high bit */
199
200 /*
201 * GUS bitmasks for voice control
202 */
203
204 #define GUSMASK_VOICE_STOPPED 0x01 /* The voice is stopped */
205 #define GUSMASK_STOP_VOICE 0x02 /* Force voice to stop */
206 #define GUSMASK_DATA_SIZE16 0x04 /* 1=16 bit, 0=8 bit data */
207 #define GUSMASK_LOOP_ENABLE 0x08 /* Loop voice at end */
208 #define GUSMASK_VOICE_BIDIR 0x10 /* Bi-directional looping */
209 #define GUSMASK_VOICE_IRQ 0x20 /* Enable the voice IRQ */
210 #define GUSMASK_INCR_DIR 0x40 /* Direction of address incr */
211 #define GUSMASK_VOICE_IRQPEND 0x80 /* Pending IRQ for voice */
212
213 /*
214 * Bitmasks for volume control
215 */
216
217 #define GUSMASK_VOLUME_STOPPED 0x01 /* Volume ramping stopped */
218 #define GUSMASK_STOP_VOLUME 0x02 /* Manually stop volume */
219 #define GUSMASK_VOICE_ROLL 0x04 /* Roll over/low water condition */
220 #define GUSMASK_VOLUME_LOOP 0x08 /* Volume ramp looping */
221 #define GUSMASK_VOLUME_BIDIR 0x10 /* Bi-dir volume looping */
222 #define GUSMASK_VOLUME_IRQ 0x20 /* IRQ on end of volume ramp */
223 #define GUSMASK_VOLUME_DIR 0x40 /* Direction of volume ramp */
224 #define GUSMASK_VOLUME_IRQPEND 0x80 /* Pending volume IRQ */
225 #define MIDI_RESET 0x03
226
227 /*
228 * ICS Mixer registers
229 */
230
231 #define GUS_MIXER_SELECT 0x506 /* read=board rev, wr=mixer */
232 #define GUS_BOARD_REV 0x506
233 #define GUS_MIXER_DATA 0x106 /* data for mixer control */
234
235 #define GUSMIX_CHAN_MIC ICSMIX_CHAN_0
236 #define GUSMIX_CHAN_LINE ICSMIX_CHAN_1
237 #define GUSMIX_CHAN_CD ICSMIX_CHAN_2
238 #define GUSMIX_CHAN_DAC ICSMIX_CHAN_3
239 #define GUSMIX_CHAN_MASTER ICSMIX_CHAN_5
240
241 /*
242 * Codec/Mixer registers
243 */
244
245 #define GUS_MAX_CODEC_BASE 0x10C
246 #define GUS_DAUGHTER_CODEC_BASE 0x530
247 #define GUS_DAUGHTER_CODEC_BASE2 0x604
248 #define GUS_DAUGHTER_CODEC_BASE3 0xE80
249 #define GUS_DAUGHTER_CODEC_BASE4 0xF40
250
251 #define GUS_CODEC_SELECT 0
252 #define GUS_CODEC_DATA 1
253 #define GUS_CODEC_STATUS 2
254 #define GUS_CODEC_PIO 3
255
256 #define GUS_MAX_CTRL 0x106
257 #define GUS_MAX_BASEBITS 0xf /* sets middle nibble of 3X6 */
258 #define GUS_MAX_RECCHAN16 0x10 /* 0=8bit DMA read, 1=16bit DMA read */
259 #define GUS_MAX_PLAYCHAN16 0x20 /* 0=8bit, 1=16bit */
260 #define GUS_MAX_CODEC_ENABLE 0x40 /* 0=disable, 1=enable */
261