Home | History | Annotate | Line # | Download | only in isa
gusreg.h revision 1.8
      1 /* $NetBSD: gusreg.h,v 1.8 2005/12/11 12:22:02 christos Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Ken Hornstein and John Kohl.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *	  Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * Register definitions of Gravis UltraSound card
     41  */
     42 
     43 /*
     44  * MIDI control registers.  Essentially a MC6850 UART.  Note the MC6850's
     45  * "feature" of having read-only and write-only registers combined on one
     46  * address.
     47  */
     48 
     49 #define GUS_IOH4_OFFSET		0x100
     50 #define GUS_NPORT4		2
     51 
     52 #define GUS_MIDI_CONTROL	(0x100-GUS_IOH4_OFFSET)
     53 #define GUS_MIDI_STATUS		(0x100-GUS_IOH4_OFFSET)
     54 #define GUS_MIDI_READ		(0x101-GUS_IOH4_OFFSET)
     55 #define GUS_MIDI_WRITE		(0x101-GUS_IOH4_OFFSET)
     56 
     57 /*
     58  * Joystick interface - note this is an absolute address, NOT an offset from
     59  * the GUS base address.
     60  */
     61 
     62 #define GUS_JOYSTICK		0x201
     63 
     64 /*
     65  * GUS control registers
     66  */
     67 
     68 #define GUS_MIX_CONTROL		0x000
     69 #define GUS_IRQ_STATUS		0x006
     70 #define GUS_TIMER_CONTROL	0x008
     71 #define GUS_TIMER_DATA		0x009
     72 #define GUS_REG_CONTROL		0x00f	/* rev 3.4 or later only: select reg
     73 					   at 2XB */
     74 #define		GUS_REG_NORMAL		0x00 /* IRQ/DMA as usual */
     75 #define		GUS_REG_IRQCTL		0x05 /* IRQ ctl: write 0 to clear IRQ state */
     76 #define		GUS_REG_JUMPER		0x06 /* jumper control: */
     77 #define		GUS_JUMPER_MIDIEN	0x02 /* bit: enable MIDI ports */
     78 #define		GUS_JUMPER_JOYEN	0x04 /* bit: enable joystick ports */
     79 
     80 #define GUS_IRQ_CONTROL		0x00b
     81 #define GUS_DMA_CONTROL		0x00b
     82 #define GUS_IRQCTL_CONTROL	0x00b
     83 #define GUS_JUMPER_CONTROL	0x00b
     84 
     85 #define GUS_NPORT1 16
     86 
     87 #define GUS_IOH2_OFFSET		0x102
     88 #define GUS_VOICE_SELECT	(0x102-GUS_IOH2_OFFSET)
     89 #define GUS_REG_SELECT		(0x103-GUS_IOH2_OFFSET)
     90 #define GUS_DATA_LOW		(0x104-GUS_IOH2_OFFSET)
     91 #define GUS_DATA_HIGH		(0x105-GUS_IOH2_OFFSET)
     92 /* GUS_MIXER_SELECT 106 */
     93 #define GUS_DRAM_DATA		(0x107-GUS_IOH2_OFFSET)
     94 
     95 #define GUS_NPORT2 6
     96 
     97 /*
     98  * GUS on-board global registers
     99  */
    100 
    101 #define GUSREG_DMA_CONTROL	0x41
    102 #define GUSREG_DMA_START	0x42
    103 #define GUSREG_DRAM_ADDR_LOW	0x43
    104 #define GUSREG_DRAM_ADDR_HIGH	0x44
    105 #define GUSREG_TIMER_CONTROL	0x45
    106 #define GUSREG_TIMER1_COUNT	0x46	/* count-up, then interrupt, 80usec */
    107 #define GUSREG_TIMER2_COUNT	0x47	/* count-up, then interrupt, 320usec */
    108 #define GUSREG_SAMPLE_FREQ	0x48	/* 9878400/(16*(rate+2)) */
    109 #define GUSREG_SAMPLE_CONTROL	0x49
    110 #define GUSREG_JOYSTICK_TRIM	0x4b
    111 #define GUSREG_RESET		0x4c
    112 
    113 /*
    114  * GUS voice specific registers (some of which aren't!).  Add 0x80 to these
    115  * registers for reads
    116  */
    117 
    118 #define GUSREG_READ		0x80
    119 #define GUSREG_VOICE_CNTL	0x00
    120 #define GUSREG_FREQ_CONTROL	0x01
    121 #define GUSREG_START_ADDR_HIGH	0x02
    122 #define GUSREG_START_ADDR_LOW	0x03
    123 #define GUSREG_END_ADDR_HIGH	0x04
    124 #define GUSREG_END_ADDR_LOW	0x05
    125 #define GUSREG_VOLUME_RATE	0x06
    126 #define GUSREG_START_VOLUME	0x07
    127 #define GUSREG_END_VOLUME	0x08
    128 #define GUSREG_CUR_VOLUME	0x09
    129 #define GUSREG_CUR_ADDR_HIGH	0x0a
    130 #define GUSREG_CUR_ADDR_LOW	0x0b
    131 #define GUSREG_PAN_POS		0x0c
    132 #define GUSREG_VOLUME_CONTROL	0x0d
    133 #define GUSREG_ACTIVE_VOICES	0x0e	/* voice-independent:set voice count */
    134 #define GUSREG_IRQ_STATUS	0x8f	/* voice-independent */
    135 
    136 #define GUS_PAN_FULL_LEFT	0x0
    137 #define GUS_PAN_FULL_RIGHT	0xf
    138 
    139 /*
    140  * GUS Bitmasks for reset register
    141  */
    142 
    143 #define GUSMASK_MASTER_RESET	0x01
    144 #define GUSMASK_DAC_ENABLE	0x02
    145 #define GUSMASK_IRQ_ENABLE	0x04
    146 
    147 /*
    148  * Bitmasks for IRQ status port
    149  */
    150 
    151 #define GUSMASK_IRQ_MIDIXMIT	0x01		/* MIDI transmit IRQ */
    152 #define GUSMASK_IRQ_MIDIRCVR	0x02		/* MIDI received IRQ */
    153 #define GUSMASK_IRQ_TIMER1	0x04		/* timer 1 IRQ */
    154 #define GUSMASK_IRQ_TIMER2	0x08		/* timer 2 IRQ */
    155 #define GUSMASK_IRQ_RESERVED	0x10		/* Reserved (set to 0) */
    156 #define GUSMASK_IRQ_VOICE	0x20		/* Wavetable IRQ (any voice) */
    157 #define GUSMASK_IRQ_VOLUME	0x40		/* Volume ramp IRQ (any voc) */
    158 #define GUSMASK_IRQ_DMATC	0x80		/* DMA transfer complete */
    159 
    160 /*
    161  * Bitmasks for sampling control register
    162  */
    163 #define	GUSMASK_SAMPLE_START	0x01		/* start sampling */
    164 #define	GUSMASK_SAMPLE_STEREO	0x02		/* mono or stereo */
    165 #define	GUSMASK_SAMPLE_DATA16	0x04		/* 16-bit DMA channel */
    166 #define	GUSMASK_SAMPLE_IRQ	0x20		/* enable IRQ */
    167 #define	GUSMASK_SAMPLE_DMATC	0x40		/* DMA transfer complete */
    168 #define	GUSMASK_SAMPLE_INVBIT	0x80		/* invert MSbit */
    169 
    170 /*
    171  * Bitmasks for IRQ status register (different than IRQ status _port_ - the
    172  * register is internal to the GUS)
    173  */
    174 
    175 #define GUSMASK_WIRQ_VOLUME	0x40		/* Flag for volume interrupt */
    176 #define GUSMASK_WIRQ_VOICE	0x80		/* Flag for voice interrupt */
    177 #define GUSMASK_WIRQ_VOICEMASK	0x1f		/* Bits holding voice # */
    178 
    179 /*
    180  * GUS bitmasks for built-in mixer control (separate from the ICS or CS chips)
    181  */
    182 
    183 #define GUSMASK_LINE_IN		0x01		/* 0=enable */
    184 #define GUSMASK_LINE_OUT	0x02		/* 0=enable */
    185 #define GUSMASK_MIC_IN		0x04		/* 1=enable */
    186 #define GUSMASK_LATCHES		0x08		/* enable IRQ latches */
    187 #define GUSMASK_COMBINE		0x10		/* combine Ch 1 IRQ & Ch 2 (MIDI) */
    188 #define GUSMASK_MIDI_LOOPBACK	0x20		/* MIDI loopback */
    189 #define GUSMASK_CONTROL_SEL	0x40		/* Select control register */
    190 
    191 #define GUSMASK_BOTH_RQ		0x40		/* Combine both RQ lines */
    192 
    193 /*
    194  * GUS bitmaks for DMA control
    195  */
    196 
    197 #define GUSMASK_DMA_ENABLE	0x01		/* Enable DMA transfer */
    198 #define GUSMASK_DMA_READ	0x02		/* 1=read, 0=write */
    199 #define GUSMASK_DMA_WRITE	0x00		/* for consistancy */
    200 #define GUSMASK_DMA_WIDTH	0x04		/* Data transfer width */
    201 #define GUSMASK_DMA_R0		0x00		/* Various DMA speeds */
    202 #define GUSMASK_DMA_R1		0x08
    203 #define GUSMASK_DMA_R2		0x10
    204 #define GUSMASK_DMA_R3		0x18
    205 #define GUSMASK_DMA_IRQ		0x20		/* Enable DMA to IRQ */
    206 #define GUSMASK_DMA_IRQPEND	0x40		/* DMA IRQ pending */
    207 #define GUSMASK_DMA_DATA_SIZE	0x40		/* 0=8 bit, 1=16 bit */
    208 #define GUSMASK_DMA_INVBIT	0x80		/* invert high bit */
    209 
    210 /*
    211  * GUS bitmasks for voice control
    212  */
    213 
    214 #define GUSMASK_VOICE_STOPPED	0x01		/* The voice is stopped */
    215 #define GUSMASK_STOP_VOICE	0x02		/* Force voice to stop */
    216 #define GUSMASK_DATA_SIZE16	0x04		/* 1=16 bit, 0=8 bit data */
    217 #define GUSMASK_LOOP_ENABLE	0x08		/* Loop voice at end */
    218 #define	GUSMASK_VOICE_BIDIR	0x10		/* Bi-directional looping */
    219 #define GUSMASK_VOICE_IRQ	0x20		/* Enable the voice IRQ */
    220 #define GUSMASK_INCR_DIR	0x40		/* Direction of address incr */
    221 #define GUSMASK_VOICE_IRQPEND	0x80		/* Pending IRQ for voice */
    222 
    223 /*
    224  * Bitmasks for volume control
    225  */
    226 
    227 #define GUSMASK_VOLUME_STOPPED	0x01		/* Volume ramping stopped */
    228 #define GUSMASK_STOP_VOLUME	0x02		/* Manually stop volume */
    229 #define GUSMASK_VOICE_ROLL	0x04		/* Roll over/low water condition */
    230 #define GUSMASK_VOLUME_LOOP	0x08		/* Volume ramp looping */
    231 #define GUSMASK_VOLUME_BIDIR	0x10		/* Bi-dir volume looping */
    232 #define GUSMASK_VOLUME_IRQ	0x20		/* IRQ on end of volume ramp */
    233 #define GUSMASK_VOLUME_DIR	0x40		/* Direction of volume ramp */
    234 #define GUSMASK_VOLUME_IRQPEND	0x80		/* Pending volume IRQ */
    235 #define MIDI_RESET		0x03
    236 
    237 /*
    238  * ICS Mixer registers
    239  */
    240 
    241 #define GUS_IOH3_OFFSET		0x506
    242 #define GUS_NPORT3		1
    243 
    244 #define GUS_MIXER_SELECT	(0x506-GUS_IOH3_OFFSET)		/* read=board rev, wr=mixer */
    245 #define GUS_BOARD_REV		(0x506-GUS_IOH3_OFFSET)
    246 #define GUS_MIXER_DATA		(0x106-GUS_IOH2_OFFSET)		/* data for mixer control */
    247 
    248 #define GUSMIX_CHAN_MIC		ICSMIX_CHAN_0
    249 #define GUSMIX_CHAN_LINE	ICSMIX_CHAN_1
    250 #define GUSMIX_CHAN_CD		ICSMIX_CHAN_2
    251 #define GUSMIX_CHAN_DAC		ICSMIX_CHAN_3
    252 #define GUSMIX_CHAN_MASTER	ICSMIX_CHAN_5
    253 
    254 /*
    255  * Codec/Mixer registers
    256  */
    257 
    258 #define GUS_MAX_CODEC_BASE		0x10C
    259 #define GUS_DAUGHTER_CODEC_BASE		0x530
    260 #define GUS_DAUGHTER_CODEC_BASE2	0x604
    261 #define GUS_DAUGHTER_CODEC_BASE3	0xE80
    262 #define GUS_DAUGHTER_CODEC_BASE4	0xF40
    263 
    264 #define GUS_CODEC_SELECT	0
    265 #define GUS_CODEC_DATA		1
    266 #define GUS_CODEC_STATUS	2
    267 #define GUS_CODEC_PIO		3
    268 
    269 #define GUS_MAX_CTRL		0x106
    270 #define	GUS_MAX_BASEBITS	0xf	/* sets middle nibble of 3X6 */
    271 #define	GUS_MAX_RECCHAN16	0x10	/* 0=8bit DMA read, 1=16bit DMA read */
    272 #define	GUS_MAX_PLAYCHAN16	0x20	/* 0=8bit, 1=16bit */
    273 #define GUS_MAX_CODEC_ENABLE	0x40	/* 0=disable, 1=enable */
    274