i82365_isa.c revision 1.1.2.3 1 1.1.2.3 thorpej /* $NetBSD: i82365_isa.c,v 1.1.2.3 1997/10/16 02:57:10 thorpej Exp $ */
2 1.1.2.3 thorpej
3 1.1.2.3 thorpej #define PCICISADEBUG
4 1.1.2.2 marc
5 1.1.2.1 marc #include <sys/types.h>
6 1.1.2.1 marc #include <sys/param.h>
7 1.1.2.1 marc #include <sys/systm.h>
8 1.1.2.1 marc #include <sys/device.h>
9 1.1.2.1 marc #include <sys/extent.h>
10 1.1.2.1 marc #include <sys/malloc.h>
11 1.1.2.1 marc
12 1.1.2.1 marc #include <vm/vm.h>
13 1.1.2.1 marc
14 1.1.2.1 marc #include <machine/bus.h>
15 1.1.2.1 marc #include <machine/intr.h>
16 1.1.2.1 marc
17 1.1.2.1 marc #include <dev/isa/isareg.h>
18 1.1.2.1 marc #include <dev/isa/isavar.h>
19 1.1.2.1 marc
20 1.1.2.1 marc #include <dev/pcmcia/pcmciareg.h>
21 1.1.2.1 marc #include <dev/pcmcia/pcmciavar.h>
22 1.1.2.1 marc #include <dev/pcmcia/pcmciachip.h>
23 1.1.2.1 marc
24 1.1.2.1 marc #include <dev/ic/i82365reg.h>
25 1.1.2.1 marc #include <dev/ic/i82365var.h>
26 1.1.2.1 marc
27 1.1.2.2 marc #ifdef PCICISADEBUG
28 1.1.2.3 thorpej int pcicisa_debug = 0 /* XXX */ ;
29 1.1.2.3 thorpej #define DPRINTF(arg) if (pcicisa_debug) printf arg;
30 1.1.2.2 marc #else
31 1.1.2.3 thorpej #define DPRINTF(arg)
32 1.1.2.2 marc #endif
33 1.1.2.2 marc
34 1.1.2.3 thorpej int pcic_isa_probe __P((struct device *, void *, void *));
35 1.1.2.3 thorpej void pcic_isa_attach __P((struct device *, struct device *, void *));
36 1.1.2.1 marc
37 1.1.2.3 thorpej void *pcic_isa_chip_intr_establish __P((pcmcia_chipset_handle_t,
38 1.1.2.3 thorpej struct pcmcia_function *, int, int (*) (void *), void *));
39 1.1.2.3 thorpej void pcic_isa_chip_intr_disestablish __P((pcmcia_chipset_handle_t, void *));
40 1.1.2.1 marc
41 1.1.2.1 marc struct cfattach pcic_isa_ca = {
42 1.1.2.1 marc sizeof(struct pcic_softc), pcic_isa_probe, pcic_isa_attach
43 1.1.2.1 marc };
44 1.1.2.1 marc
45 1.1.2.1 marc static struct pcmcia_chip_functions pcic_isa_functions = {
46 1.1.2.3 thorpej pcic_chip_mem_alloc,
47 1.1.2.3 thorpej pcic_chip_mem_free,
48 1.1.2.3 thorpej pcic_chip_mem_map,
49 1.1.2.3 thorpej pcic_chip_mem_unmap,
50 1.1.2.3 thorpej
51 1.1.2.3 thorpej pcic_chip_io_alloc,
52 1.1.2.3 thorpej pcic_chip_io_free,
53 1.1.2.3 thorpej pcic_chip_io_map,
54 1.1.2.3 thorpej pcic_chip_io_unmap,
55 1.1.2.1 marc
56 1.1.2.3 thorpej pcic_isa_chip_intr_establish,
57 1.1.2.3 thorpej pcic_isa_chip_intr_disestablish,
58 1.1.2.1 marc
59 1.1.2.3 thorpej pcic_chip_socket_enable,
60 1.1.2.3 thorpej pcic_chip_socket_disable,
61 1.1.2.1 marc };
62 1.1.2.1 marc
63 1.1.2.1 marc int
64 1.1.2.1 marc pcic_isa_probe(parent, match, aux)
65 1.1.2.1 marc struct device *parent;
66 1.1.2.1 marc void *match, *aux;
67 1.1.2.1 marc {
68 1.1.2.3 thorpej struct isa_attach_args *ia = aux;
69 1.1.2.3 thorpej bus_space_tag_t iot = ia->ia_iot;
70 1.1.2.3 thorpej bus_space_handle_t ioh, memh;
71 1.1.2.3 thorpej int val, found;
72 1.1.2.1 marc
73 1.1.2.3 thorpej if (bus_space_map(iot, ia->ia_iobase, PCIC_IOSIZE, 0, &ioh))
74 1.1.2.3 thorpej return (0);
75 1.1.2.1 marc
76 1.1.2.3 thorpej if (ia->ia_msize == -1)
77 1.1.2.3 thorpej ia->ia_msize = PCIC_MEMSIZE;
78 1.1.2.1 marc
79 1.1.2.3 thorpej if (bus_space_map(ia->ia_memt, ia->ia_maddr, ia->ia_msize, 0, &memh))
80 1.1.2.3 thorpej return (0);
81 1.1.2.1 marc
82 1.1.2.3 thorpej found = 0;
83 1.1.2.1 marc
84 1.1.2.3 thorpej /*
85 1.1.2.3 thorpej * this could be done with a loop, but it would violate the
86 1.1.2.3 thorpej * abstraction
87 1.1.2.3 thorpej */
88 1.1.2.1 marc
89 1.1.2.3 thorpej bus_space_write_1(iot, ioh, PCIC_REG_INDEX, C0SA + PCIC_IDENT);
90 1.1.2.1 marc
91 1.1.2.3 thorpej val = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
92 1.1.2.1 marc
93 1.1.2.3 thorpej if (pcic_ident_ok(val))
94 1.1.2.3 thorpej found++;
95 1.1.2.1 marc
96 1.1.2.1 marc
97 1.1.2.3 thorpej bus_space_write_1(iot, ioh, PCIC_REG_INDEX, C0SB + PCIC_IDENT);
98 1.1.2.1 marc
99 1.1.2.3 thorpej val = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
100 1.1.2.1 marc
101 1.1.2.3 thorpej if (pcic_ident_ok(val))
102 1.1.2.3 thorpej found++;
103 1.1.2.1 marc
104 1.1.2.1 marc
105 1.1.2.3 thorpej bus_space_write_1(iot, ioh, PCIC_REG_INDEX, C1SA + PCIC_IDENT);
106 1.1.2.1 marc
107 1.1.2.3 thorpej val = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
108 1.1.2.1 marc
109 1.1.2.3 thorpej if (pcic_ident_ok(val))
110 1.1.2.3 thorpej found++;
111 1.1.2.1 marc
112 1.1.2.1 marc
113 1.1.2.3 thorpej bus_space_write_1(iot, ioh, PCIC_REG_INDEX, C1SB + PCIC_IDENT);
114 1.1.2.1 marc
115 1.1.2.3 thorpej val = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
116 1.1.2.1 marc
117 1.1.2.3 thorpej if (pcic_ident_ok(val))
118 1.1.2.3 thorpej found++;
119 1.1.2.1 marc
120 1.1.2.1 marc
121 1.1.2.3 thorpej bus_space_unmap(iot, ioh, PCIC_IOSIZE);
122 1.1.2.3 thorpej bus_space_unmap(ia->ia_memt, memh, ia->ia_msize);
123 1.1.2.1 marc
124 1.1.2.3 thorpej if (!found)
125 1.1.2.3 thorpej return (0);
126 1.1.2.1 marc
127 1.1.2.3 thorpej ia->ia_iosize = PCIC_IOSIZE;
128 1.1.2.1 marc
129 1.1.2.3 thorpej return (1);
130 1.1.2.1 marc }
131 1.1.2.1 marc
132 1.1.2.2 marc #ifndef PCIC_ISA_ALLOC_IOBASE
133 1.1.2.3 thorpej #define PCIC_ISA_ALLOC_IOBASE 0
134 1.1.2.2 marc #endif
135 1.1.2.2 marc
136 1.1.2.2 marc #ifndef PCIC_ISA_ALLOC_IOSIZE
137 1.1.2.3 thorpej #define PCIC_ISA_ALLOC_IOSIZE 0
138 1.1.2.2 marc #endif
139 1.1.2.2 marc
140 1.1.2.3 thorpej int pcic_isa_alloc_iobase = PCIC_ISA_ALLOC_IOBASE;
141 1.1.2.3 thorpej int pcic_isa_alloc_iosize = PCIC_ISA_ALLOC_IOSIZE;
142 1.1.2.2 marc
143 1.1.2.1 marc void
144 1.1.2.1 marc pcic_isa_attach(parent, self, aux)
145 1.1.2.3 thorpej struct device *parent, *self;
146 1.1.2.3 thorpej void *aux;
147 1.1.2.1 marc {
148 1.1.2.3 thorpej struct pcic_softc *sc = (void *) self;
149 1.1.2.3 thorpej struct isa_attach_args *ia = aux;
150 1.1.2.3 thorpej isa_chipset_tag_t ic = ia->ia_ic;
151 1.1.2.3 thorpej bus_space_tag_t iot = ia->ia_iot;
152 1.1.2.3 thorpej bus_space_tag_t memt = ia->ia_memt;
153 1.1.2.3 thorpej bus_space_handle_t ioh;
154 1.1.2.3 thorpej bus_space_handle_t memh;
155 1.1.2.3 thorpej bus_space_handle_t ioh_high;
156 1.1.2.3 thorpej int i, iobuswidth, tmp1, tmp2;
157 1.1.2.3 thorpej
158 1.1.2.3 thorpej /* Map i/o space. */
159 1.1.2.3 thorpej if (bus_space_map(iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh))
160 1.1.2.3 thorpej panic("pcic_isa_attach: can't map i/o space");
161 1.1.2.3 thorpej
162 1.1.2.3 thorpej /* Map mem space. */
163 1.1.2.3 thorpej if (bus_space_map(memt, ia->ia_maddr, ia->ia_msize, 0, &memh))
164 1.1.2.3 thorpej panic("pcic_isa_attach: can't map i/o space");
165 1.1.2.3 thorpej
166 1.1.2.3 thorpej sc->membase = ia->ia_maddr;
167 1.1.2.3 thorpej sc->subregionmask = (1 << (ia->ia_msize / PCIC_MEM_PAGESIZE)) - 1;
168 1.1.2.3 thorpej
169 1.1.2.3 thorpej sc->intr_est = ic;
170 1.1.2.3 thorpej sc->pct = (pcmcia_chipset_tag_t) & pcic_isa_functions;
171 1.1.2.3 thorpej
172 1.1.2.3 thorpej sc->iot = iot;
173 1.1.2.3 thorpej sc->ioh = ioh;
174 1.1.2.3 thorpej sc->memt = memt;
175 1.1.2.3 thorpej sc->memh = memh;
176 1.1.2.3 thorpej
177 1.1.2.3 thorpej /*
178 1.1.2.3 thorpej * allocate an irq. it will be used by both controllers. I could
179 1.1.2.3 thorpej * use two different interrupts, but interrupts are relatively
180 1.1.2.3 thorpej * scarce, shareable, and for PCIC controllers, very infrequent.
181 1.1.2.3 thorpej */
182 1.1.2.3 thorpej
183 1.1.2.3 thorpej if ((sc->irq = ia->ia_irq) == IRQUNK) {
184 1.1.2.3 thorpej /* XXX CHECK RETURN VALUE */
185 1.1.2.3 thorpej (void) isa_intr_alloc(ic, PCIC_CSC_INTR_IRQ_VALIDMASK,
186 1.1.2.3 thorpej IST_EDGE, &sc->irq);
187 1.1.2.3 thorpej printf(": using irq %d", sc->irq);
188 1.1.2.2 marc }
189 1.1.2.3 thorpej printf("\n");
190 1.1.2.2 marc
191 1.1.2.3 thorpej pcic_attach(sc);
192 1.1.2.2 marc
193 1.1.2.3 thorpej /*
194 1.1.2.3 thorpej * figure out how wide the isa bus is. Do this by checking if the
195 1.1.2.3 thorpej * pcic controller is mirrored 0x400 above where we expect it to be.
196 1.1.2.3 thorpej */
197 1.1.2.3 thorpej
198 1.1.2.3 thorpej iobuswidth = 12;
199 1.1.2.3 thorpej
200 1.1.2.3 thorpej /* Map i/o space. */
201 1.1.2.3 thorpej if (bus_space_map(iot, ia->ia_iobase + 0x400, ia->ia_iosize, 0,
202 1.1.2.3 thorpej &ioh_high))
203 1.1.2.3 thorpej panic("pcic_isa_attach: can't map high i/o space");
204 1.1.2.3 thorpej
205 1.1.2.3 thorpej for (i = 0; i < PCIC_NSLOTS; i++) {
206 1.1.2.3 thorpej if (sc->handle[i].flags & PCIC_FLAG_SOCKETP) {
207 1.1.2.3 thorpej /*
208 1.1.2.3 thorpej * read the ident flags from the normal space and
209 1.1.2.3 thorpej * from the mirror, and compare them
210 1.1.2.3 thorpej */
211 1.1.2.3 thorpej
212 1.1.2.3 thorpej bus_space_write_1(iot, ioh, PCIC_REG_INDEX,
213 1.1.2.3 thorpej sc->handle[i].sock + PCIC_IDENT);
214 1.1.2.3 thorpej tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
215 1.1.2.3 thorpej
216 1.1.2.3 thorpej bus_space_write_1(iot, ioh_high, PCIC_REG_INDEX,
217 1.1.2.3 thorpej sc->handle[i].sock + PCIC_IDENT);
218 1.1.2.3 thorpej tmp2 = bus_space_read_1(iot, ioh_high, PCIC_REG_DATA);
219 1.1.2.3 thorpej
220 1.1.2.3 thorpej if (tmp1 == tmp2)
221 1.1.2.3 thorpej iobuswidth = 10;
222 1.1.2.3 thorpej }
223 1.1.2.3 thorpej }
224 1.1.2.2 marc
225 1.1.2.3 thorpej bus_space_free(iot, ioh_high, ia->ia_iosize);
226 1.1.2.2 marc
227 1.1.2.3 thorpej /*
228 1.1.2.3 thorpej * XXX mycroft recommends I/O space range 0x400-0xfff . I should put
229 1.1.2.3 thorpej * this in a header somewhere
230 1.1.2.3 thorpej */
231 1.1.2.3 thorpej
232 1.1.2.3 thorpej /*
233 1.1.2.3 thorpej * XXX some hardware doesn't seem to grok addresses in 0x400 range--
234 1.1.2.3 thorpej * apparently missing a bit or more of address lines. (e.g.
235 1.1.2.3 thorpej * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
236 1.1.2.3 thorpej * TravelMate 5000--not clear which is at fault)
237 1.1.2.3 thorpej *
238 1.1.2.3 thorpej * Add a kludge to detect 10 bit wide buses and deal with them,
239 1.1.2.3 thorpej * and also a config file option to override the probe.
240 1.1.2.3 thorpej */
241 1.1.2.3 thorpej
242 1.1.2.3 thorpej if (iobuswidth == 10) {
243 1.1.2.3 thorpej sc->iobase = 0x300;
244 1.1.2.3 thorpej sc->iosize = 0x0ff;
245 1.1.2.3 thorpej } else {
246 1.1.2.3 thorpej sc->iobase = 0x400;
247 1.1.2.3 thorpej sc->iosize = 0xbff;
248 1.1.2.3 thorpej }
249 1.1.2.2 marc
250 1.1.2.3 thorpej DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx (probed)\n",
251 1.1.2.3 thorpej sc->dev.dv_xname, (long) sc->iobase,
252 1.1.2.3 thorpej (long) sc->iobase + sc->iosize));
253 1.1.2.3 thorpej
254 1.1.2.3 thorpej if (pcic_isa_alloc_iobase && pcic_isa_alloc_iosize) {
255 1.1.2.3 thorpej sc->iobase = pcic_isa_alloc_iobase;
256 1.1.2.3 thorpej sc->iosize = pcic_isa_alloc_iosize;
257 1.1.2.3 thorpej
258 1.1.2.3 thorpej DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
259 1.1.2.3 thorpej "(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
260 1.1.2.3 thorpej (long) sc->iobase + sc->iosize));
261 1.1.2.3 thorpej }
262 1.1.2.3 thorpej sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
263 1.1.2.3 thorpej pcic_intr, sc);
264 1.1.2.1 marc
265 1.1.2.3 thorpej pcic_attach_sockets(sc);
266 1.1.2.1 marc }
267 1.1.2.1 marc
268 1.1.2.3 thorpej /*
269 1.1.2.3 thorpej * allow patching or kernel option file override of available IRQs. Useful if
270 1.1.2.3 thorpej * order of probing would screw up other devices, or if PCIC hardware/cards
271 1.1.2.3 thorpej * have trouble with certain interrupt lines.
272 1.1.2.3 thorpej */
273 1.1.2.1 marc
274 1.1.2.1 marc #ifndef PCIC_INTR_ALLOC_MASK
275 1.1.2.1 marc #define PCIC_INTR_ALLOC_MASK 0xffff
276 1.1.2.1 marc #endif
277 1.1.2.1 marc
278 1.1.2.1 marc int pcic_intr_alloc_mask = PCIC_INTR_ALLOC_MASK;
279 1.1.2.1 marc
280 1.1.2.1 marc void *
281 1.1.2.1 marc pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
282 1.1.2.3 thorpej pcmcia_chipset_handle_t pch;
283 1.1.2.3 thorpej struct pcmcia_function *pf;
284 1.1.2.3 thorpej int ipl;
285 1.1.2.3 thorpej int (*fct) __P((void *));
286 1.1.2.3 thorpej void *arg;
287 1.1.2.1 marc {
288 1.1.2.3 thorpej struct pcic_handle *h = (struct pcic_handle *) pch;
289 1.1.2.3 thorpej int irq, ist;
290 1.1.2.3 thorpej void *ih;
291 1.1.2.3 thorpej int reg;
292 1.1.2.3 thorpej
293 1.1.2.3 thorpej if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
294 1.1.2.3 thorpej ist = IST_LEVEL;
295 1.1.2.3 thorpej else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
296 1.1.2.3 thorpej ist = IST_PULSE;
297 1.1.2.3 thorpej else
298 1.1.2.3 thorpej ist = IST_LEVEL;
299 1.1.2.3 thorpej
300 1.1.2.3 thorpej if (isa_intr_alloc(h->sc->intr_est,
301 1.1.2.3 thorpej PCIC_INTR_IRQ_VALIDMASK & pcic_intr_alloc_mask, ist, &irq))
302 1.1.2.3 thorpej return (NULL);
303 1.1.2.3 thorpej if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl,
304 1.1.2.3 thorpej fct, arg)) == NULL)
305 1.1.2.3 thorpej return (NULL);
306 1.1.2.3 thorpej
307 1.1.2.3 thorpej reg = pcic_read(h, PCIC_INTR);
308 1.1.2.3 thorpej reg &= ~PCIC_INTR_IRQ_MASK;
309 1.1.2.3 thorpej reg |= irq;
310 1.1.2.3 thorpej pcic_write(h, PCIC_INTR, reg);
311 1.1.2.1 marc
312 1.1.2.3 thorpej h->ih_irq = irq;
313 1.1.2.2 marc
314 1.1.2.3 thorpej printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq);
315 1.1.2.1 marc
316 1.1.2.3 thorpej return (ih);
317 1.1.2.1 marc }
318 1.1.2.1 marc
319 1.1.2.3 thorpej void
320 1.1.2.3 thorpej pcic_isa_chip_intr_disestablish(pch, ih)
321 1.1.2.3 thorpej pcmcia_chipset_handle_t pch;
322 1.1.2.3 thorpej void *ih;
323 1.1.2.1 marc {
324 1.1.2.3 thorpej struct pcic_handle *h = (struct pcic_handle *) pch;
325 1.1.2.3 thorpej int reg;
326 1.1.2.2 marc
327 1.1.2.3 thorpej h->ih_irq = 0;
328 1.1.2.1 marc
329 1.1.2.3 thorpej reg = pcic_read(h, PCIC_INTR);
330 1.1.2.3 thorpej reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
331 1.1.2.3 thorpej pcic_write(h, PCIC_INTR, reg);
332 1.1.2.1 marc
333 1.1.2.3 thorpej isa_intr_disestablish(h->sc->intr_est, ih);
334 1.1.2.1 marc }
335