if_ate.c revision 1.12 1 /*
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
9 *
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
20 * SUCH DAMAGE.
21 */
22
23 /*
24 * Portions copyright (C) 1993, David Greenman. This software may be used,
25 * modified, copied, distributed, and sold, in both source and binary form
26 * provided that the above copyright and these terms are retained. Under no
27 * circumstances is the author responsible for the proper functioning of this
28 * software, nor does the author assume any responsibility for damages
29 * incurred with its use.
30 */
31
32 #define FE_VERSION "if_fe.c ver. 0.8"
33
34 /*
35 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
36 * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp>
37 *
38 * This version is intended to be a generic template for various
39 * MB86960A/MB86965A based Ethernet cards. It currently supports
40 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
41 * Telesis AT1700 series and RE2000 series. There are some
42 * unnecessary hooks embedded, which are primarily intended to support
43 * other types of Ethernet cards, but the author is not sure whether
44 * they are useful.
45 */
46
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/errno.h>
52 #include <sys/ioctl.h>
53 #include <sys/mbuf.h>
54 #include <sys/socket.h>
55 #include <sys/syslog.h>
56 #include <sys/device.h>
57
58 #include <net/if.h>
59 #include <net/if_dl.h>
60 #include <net/if_types.h>
61 #include <net/netisr.h>
62
63 #ifdef INET
64 #include <netinet/in.h>
65 #include <netinet/in_systm.h>
66 #include <netinet/in_var.h>
67 #include <netinet/ip.h>
68 #include <netinet/if_ether.h>
69 #endif
70
71 #ifdef NS
72 #include <netns/ns.h>
73 #include <netns/ns_if.h>
74 #endif
75
76 #if NBPFILTER > 0
77 #include <net/bpf.h>
78 #include <net/bpfdesc.h>
79 #endif
80
81 #include <machine/cpu.h>
82 #include <machine/pio.h>
83
84 #include <dev/isa/isareg.h>
85 #include <dev/isa/isavar.h>
86 #include <dev/ic/mb86960reg.h>
87 #include <dev/isa/if_fereg.h>
88
89 /*
90 * Default settings for fe driver specific options.
91 * They can be set in config file by "options" statements.
92 */
93
94 /*
95 * Debug control.
96 * 0: No debug at all. All debug specific codes are stripped off.
97 * 1: Silent. No debug messages are logged except emergent ones.
98 * 2: Brief. Lair events and/or important information are logged.
99 * 3: Detailed. Logs all information which *may* be useful for debugging.
100 * 4: Trace. All actions in the driver is logged. Super verbose.
101 */
102 #ifndef FE_DEBUG
103 #define FE_DEBUG 1
104 #endif
105
106 /*
107 * Delay padding of short transmission packets to minimum Ethernet size.
108 * This may or may not gain performance. An EXPERIMENTAL option.
109 */
110 #ifndef FE_DELAYED_PADDING
111 #define FE_DELAYED_PADDING 0
112 #endif
113
114 /*
115 * Transmit just one packet per a "send" command to 86960.
116 * This option is intended for performance test. An EXPERIMENTAL option.
117 */
118 #ifndef FE_SINGLE_TRANSMISSION
119 #define FE_SINGLE_TRANSMISSION 0
120 #endif
121
122 /*
123 * Device configuration flags.
124 */
125
126 /* DLCR6 settings. */
127 #define FE_FLAGS_DLCR6_VALUE 0x007F
128
129 /* Force DLCR6 override. */
130 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
131
132 /* A cludge for PCMCIA support. */
133 #define FE_FLAGS_PCMCIA 0x8000
134
135 /* Identification of the driver version. */
136 static char const fe_version[] = FE_VERSION " / " FE_REG_VERSION;
137
138 /*
139 * Supported hardware (Ethernet card) types
140 * This information is currently used only for debugging
141 */
142 enum fe_type {
143 /* For cards which are successfully probed but not identified. */
144 FE_TYPE_UNKNOWN,
145
146 /* Fujitsu FMV-180 series. */
147 FE_TYPE_FMV181,
148 FE_TYPE_FMV182,
149
150 /* Allied-Telesis AT1700 series and RE2000 series. */
151 FE_TYPE_AT1700T,
152 FE_TYPE_AT1700BT,
153 FE_TYPE_AT1700FT,
154 FE_TYPE_AT1700AT,
155 FE_TYPE_RE2000,
156
157 /* PCMCIA by Fujitsu. */
158 FE_TYPE_MBH10302,
159 FE_TYPE_MBH10304,
160 };
161
162 /*
163 * fe_softc: per line info and status
164 */
165 struct fe_softc {
166 struct device sc_dev;
167 void *sc_ih;
168
169 struct arpcom sc_arpcom; /* ethernet common */
170
171 /* Set by probe() and not modified in later phases. */
172 enum fe_type type; /* interface type code */
173 char *typestr; /* printable name of the interface. */
174 int sc_iobase; /* MB86960A I/O base address */
175
176 u_char proto_dlcr4; /* DLCR4 prototype. */
177 u_char proto_dlcr5; /* DLCR5 prototype. */
178 u_char proto_dlcr6; /* DLCR6 prototype. */
179 u_char proto_dlcr7; /* DLCR7 prototype. */
180 u_char proto_bmpr13; /* BMPR13 prototype. */
181
182 /* Vendor specific hooks. */
183 void (*init) __P((struct fe_softc *)); /* Just before fe_init(). */
184 void (*stop) __P((struct fe_softc *)); /* Just after fe_stop(). */
185
186 /* Transmission buffer management. */
187 u_short txb_size; /* total bytes in TX buffer */
188 u_short txb_free; /* free bytes in TX buffer */
189 u_char txb_count; /* number of packets in TX buffer */
190 u_char txb_sched; /* number of scheduled packets */
191 u_char txb_padding; /* number of delayed padding bytes */
192
193 /* Multicast address filter management. */
194 u_char filter_change; /* MARs must be changed ASAP. */
195 u_char filter[FE_FILTER_LEN]; /* new filter value. */
196 };
197
198 /* Frequently accessed members in arpcom. */
199 #define sc_enaddr sc_arpcom.ac_enaddr
200
201 /* Standard driver entry points. These can be static. */
202 int feprobe __P((struct device *, void *, void *));
203 void feattach __P((struct device *, struct device *, void *));
204 int feintr __P((void *));
205 void fe_init __P((struct fe_softc *));
206 int fe_ioctl __P((struct ifnet *, u_long, caddr_t));
207 void fe_start __P((struct ifnet *));
208 void fe_reset __P((struct fe_softc *));
209 void fe_watchdog __P((struct ifnet *));
210
211 /* Local functions. Order of declaration is confused. FIXME. */
212 int fe_probe_fmv __P((struct fe_softc *, struct isa_attach_args *));
213 int fe_probe_ati __P((struct fe_softc *, struct isa_attach_args *));
214 int fe_probe_mbh __P((struct fe_softc *, struct isa_attach_args *));
215 void fe_init_mbh __P((struct fe_softc *));
216 int fe_get_packet __P((struct fe_softc *, int));
217 void fe_stop __P((struct fe_softc *));
218 void fe_tint __P((/*struct fe_softc *, u_char*/));
219 void fe_rint __P((/*struct fe_softc *, u_char*/));
220 static inline
221 void fe_xmit __P((struct fe_softc *));
222 void fe_write_mbufs __P((struct fe_softc *, struct mbuf *));
223 void fe_getmcaf __P((struct arpcom *, u_char *));
224 void fe_setmode __P((struct fe_softc *));
225 void fe_loadmar __P((struct fe_softc *));
226 #if FE_DEBUG >= 1
227 void fe_dump __P((int, struct fe_softc *));
228 #endif
229
230 struct cfattach fe_ca = {
231 sizeof(struct fe_softc), feprobe, feattach
232 };
233
234 struct cfdriver fe_cd = {
235 NULL, "fe", DV_IFNET
236 };
237
238 /* Ethernet constants. To be defined in if_ehter.h? FIXME. */
239 #define ETHER_MIN_LEN 60 /* with header, without CRC. */
240 #define ETHER_MAX_LEN 1514 /* with header, without CRC. */
241 #define ETHER_ADDR_LEN 6 /* number of bytes in an address. */
242 #define ETHER_HDR_SIZE 14 /* src addr, dst addr, and data type. */
243
244 /*
245 * Fe driver specific constants which relate to 86960/86965.
246 */
247
248 /* Interrupt masks. */
249 #define FE_TMASK (FE_D2_COLL16 | FE_D2_TXDONE)
250 #define FE_RMASK (FE_D3_OVRFLO | FE_D3_CRCERR | \
251 FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY)
252
253 /* Maximum number of iterrations for a receive interrupt. */
254 #define FE_MAX_RECV_COUNT ((65536 - 2048 * 2) / 64)
255 /* Maximum size of SRAM is 65536,
256 * minimum size of transmission buffer in fe is 2x2KB,
257 * and minimum amount of received packet including headers
258 * added by the chip is 64 bytes.
259 * Hence FE_MAX_RECV_COUNT is the upper limit for number
260 * of packets in the receive buffer. */
261
262 /*
263 * Convenient routines to access contiguous I/O ports.
264 */
265
266 static inline void
267 inblk (int addr, u_char * mem, int len)
268 {
269 while (--len >= 0) {
270 *mem++ = inb(addr++);
271 }
272 }
273
274 static inline void
275 outblk (int addr, u_char const * mem, int len)
276 {
277 while (--len >= 0) {
278 outb(addr++, *mem++);
279 }
280 }
281
282 /*
283 * Hardware probe routines.
284 */
285
286 /*
287 * Determine if the device is present.
288 */
289 int
290 feprobe(parent, match, aux)
291 struct device *parent;
292 void *match, *aux;
293 {
294 struct fe_softc *sc = match;
295 struct isa_attach_args *ia = aux;
296
297 #if FE_DEBUG >= 2
298 log(LOG_INFO, "%s: %s\n", sc->sc_dev.dv_xname, fe_version);
299 #endif
300
301 /* Probe an address. */
302 sc->sc_iobase = ia->ia_iobase;
303
304 if (fe_probe_fmv(sc, ia))
305 return (1);
306 if (fe_probe_ati(sc, ia))
307 return (1);
308 if (fe_probe_mbh(sc, ia))
309 return (1);
310 return (0);
311 }
312
313 /*
314 * Check for specific bits in specific registers have specific values.
315 */
316 struct fe_simple_probe_struct {
317 u_char port; /* Offset from the base I/O address. */
318 u_char mask; /* Bits to be checked. */
319 u_char bits; /* Values to be compared against. */
320 };
321
322 static inline int
323 fe_simple_probe (int addr, struct fe_simple_probe_struct const * sp)
324 {
325 struct fe_simple_probe_struct const * p;
326
327 for (p = sp; p->mask != 0; p++) {
328 if ((inb(addr + p->port) & p->mask) != p->bits) {
329 return (0);
330 }
331 }
332 return (1);
333 }
334
335 /*
336 * Routines to read all bytes from the config EEPROM through MB86965A.
337 * I'm not sure what exactly I'm doing here... I was told just to follow
338 * the steps, and it worked. Could someone tell me why the following
339 * code works? (Or, why all similar codes I tried previously doesn't
340 * work.) FIXME.
341 */
342
343 static inline void
344 strobe (int bmpr16)
345 {
346 /*
347 * Output same value twice. To speed-down execution?
348 */
349 outb(bmpr16, FE_B16_SELECT);
350 outb(bmpr16, FE_B16_SELECT);
351 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
352 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
353 outb(bmpr16, FE_B16_SELECT);
354 outb(bmpr16, FE_B16_SELECT);
355 }
356
357 void
358 fe_read_eeprom(sc, data)
359 struct fe_softc *sc;
360 u_char *data;
361 {
362 int iobase = sc->sc_iobase;
363 int bmpr16 = iobase + FE_BMPR16;
364 int bmpr17 = iobase + FE_BMPR17;
365 u_char n, val, bit;
366
367 /* Read bytes from EEPROM; two bytes per an iterration. */
368 for (n = 0; n < FE_EEPROM_SIZE / 2; n++) {
369 /* Reset the EEPROM interface. */
370 outb(bmpr16, 0x00);
371 outb(bmpr17, 0x00);
372 outb(bmpr16, FE_B16_SELECT);
373
374 /* Start EEPROM access. */
375 outb(bmpr17, FE_B17_DATA);
376 strobe(bmpr16);
377
378 /* Pass the iterration count to the chip. */
379 val = 0x80 | n;
380 for (bit = 0x80; bit != 0x00; bit >>= 1) {
381 outb(bmpr17, (val & bit) ? FE_B17_DATA : 0);
382 strobe(bmpr16);
383 }
384 outb(bmpr17, 0x00);
385
386 /* Read a byte. */
387 val = 0;
388 for (bit = 0x80; bit != 0x00; bit >>= 1) {
389 strobe(bmpr16);
390 if (inb(bmpr17) & FE_B17_DATA)
391 val |= bit;
392 }
393 *data++ = val;
394
395 /* Read one more byte. */
396 val = 0;
397 for (bit = 0x80; bit != 0x00; bit >>= 1) {
398 strobe(bmpr16);
399 if (inb(bmpr17) & FE_B17_DATA)
400 val |= bit;
401 }
402 *data++ = val;
403 }
404
405 #if FE_DEBUG >= 3
406 /* Report what we got. */
407 data -= FE_EEPROM_SIZE;
408 log(LOG_INFO, "%s: EEPROM at %04x:"
409 " %02x%02x%02x%02x %02x%02x%02x%02x -"
410 " %02x%02x%02x%02x %02x%02x%02x%02x -"
411 " %02x%02x%02x%02x %02x%02x%02x%02x -"
412 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
413 sc->sc_dev.dv_xname, iobase,
414 data[ 0], data[ 1], data[ 2], data[ 3],
415 data[ 4], data[ 5], data[ 6], data[ 7],
416 data[ 8], data[ 9], data[10], data[11],
417 data[12], data[13], data[14], data[15],
418 data[16], data[17], data[18], data[19],
419 data[20], data[21], data[22], data[23],
420 data[24], data[25], data[26], data[27],
421 data[28], data[29], data[30], data[31]);
422 #endif
423 }
424
425 /*
426 * Hardware (vendor) specific probe routines.
427 */
428
429 /*
430 * Probe and initialization for Fujitsu FMV-180 series boards
431 */
432 int
433 fe_probe_fmv(sc, ia)
434 struct fe_softc *sc;
435 struct isa_attach_args *ia;
436 {
437 int i, n;
438 int iobase = sc->sc_iobase;
439 int irq;
440
441 static int const iomap[8] =
442 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 };
443 static int const irqmap[4] =
444 { 3, 7, 10, 15 };
445
446 static struct fe_simple_probe_struct const probe_table[] = {
447 { FE_DLCR2, 0x70, 0x00 },
448 { FE_DLCR4, 0x08, 0x00 },
449 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
450
451 { FE_FMV0, FE_FMV0_MAGIC_MASK, FE_FMV0_MAGIC_VALUE },
452 { FE_FMV1, FE_FMV1_CARDID_MASK, FE_FMV1_CARDID_ID },
453 { FE_FMV3, FE_FMV3_EXTRA_MASK, FE_FMV3_EXTRA_VALUE },
454 #if 1
455 /*
456 * Test *vendor* part of the station address for Fujitsu.
457 * The test will gain reliability of probe process, but
458 * it rejects FMV-180 clone boards manufactured by other vendors.
459 * We have to turn the test off when such cards are made available.
460 */
461 { FE_FMV4, 0xFF, 0x00 },
462 { FE_FMV5, 0xFF, 0x00 },
463 { FE_FMV6, 0xFF, 0x0E },
464 #else
465 /*
466 * We can always verify the *first* 2 bits (in Ehternet
467 * bit order) are "no multicast" and "no local" even for
468 * unknown vendors.
469 */
470 { FE_FMV4, 0x03, 0x00 },
471 #endif
472 { 0 }
473 };
474
475 #if 0
476 /*
477 * Dont probe at all if the config says we are PCMCIA...
478 */
479 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
480 return (0);
481 #endif
482
483 /*
484 * See if the sepcified address is possible for FMV-180 series.
485 */
486 for (i = 0; i < 8; i++) {
487 if (iomap[i] == iobase)
488 break;
489 }
490 if (i == 8)
491 return (0);
492
493 /* Simple probe. */
494 if (!fe_simple_probe(iobase, probe_table))
495 return (0);
496
497 /* Check if our I/O address matches config info on EEPROM. */
498 n = (inb(iobase + FE_FMV2) & FE_FMV2_ADDR) >> FE_FMV2_ADDR_SHIFT;
499 if (iomap[n] != iobase)
500 return (0);
501
502 /* Determine the card type. */
503 switch (inb(iobase + FE_FMV0) & FE_FMV0_MODEL) {
504 case FE_FMV0_MODEL_FMV181:
505 sc->type = FE_TYPE_FMV181;
506 sc->typestr = "FMV-181";
507 break;
508 case FE_FMV0_MODEL_FMV182:
509 sc->type = FE_TYPE_FMV182;
510 sc->typestr = "FMV-182";
511 break;
512 default:
513 /* Unknown card type: maybe a new model, but... */
514 return (0);
515 }
516
517 /*
518 * An FMV-180 has successfully been proved.
519 * Determine which IRQ to be used.
520 *
521 * In this version, we always get an IRQ assignment from the
522 * FMV-180's configuration EEPROM, ignoring that specified in
523 * config file.
524 */
525 n = (inb(iobase + FE_FMV2) & FE_FMV2_IRQ) >> FE_FMV2_IRQ_SHIFT;
526 irq = irqmap[n];
527
528 if (ia->ia_irq != IRQUNK) {
529 if (ia->ia_irq != irq) {
530 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
531 sc->sc_dev.dv_xname, ia->ia_irq, irq);
532 return (0);
533 }
534 } else
535 ia->ia_irq = irq;
536
537 /*
538 * Initialize constants in the per-line structure.
539 */
540
541 /* Get our station address from EEPROM. */
542 inblk(iobase + FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
543
544 /* Make sure we got a valid station address. */
545 if ((sc->sc_enaddr[0] & 0x03) != 0x00
546 || (sc->sc_enaddr[0] == 0x00
547 && sc->sc_enaddr[1] == 0x00
548 && sc->sc_enaddr[2] == 0x00))
549 return (0);
550
551 /* Register values which depend on board design. */
552 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
553 sc->proto_dlcr5 = 0;
554 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
555 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
556
557 /*
558 * Program the 86960 as follows:
559 * SRAM: 32KB, 100ns, byte-wide access.
560 * Transmission buffer: 4KB x 2.
561 * System bus interface: 16 bits.
562 * We cannot change these values but TXBSIZE, because they
563 * are hard-wired on the board. Modifying TXBSIZE will affect
564 * the driver performance.
565 */
566 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
567 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
568
569 /*
570 * Minimum initialization of the hardware.
571 * We write into registers; hope I/O ports have no
572 * overlap with other boards.
573 */
574
575 /* Initialize ASIC. */
576 outb(iobase + FE_FMV3, 0);
577 outb(iobase + FE_FMV10, 0);
578
579 /* Wait for a while. I'm not sure this is necessary. FIXME. */
580 delay(200);
581
582 /* Initialize 86960. */
583 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
584 delay(200);
585
586 /* Disable all interrupts. */
587 outb(iobase + FE_DLCR2, 0);
588 outb(iobase + FE_DLCR3, 0);
589
590 /* Turn the "master interrupt control" flag of ASIC on. */
591 outb(iobase + FE_FMV3, FE_FMV3_ENABLE_FLAG);
592
593 /*
594 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
595 */
596 ia->ia_iosize = 32;
597 ia->ia_msize = 0;
598 return (1);
599 }
600
601 /*
602 * Probe and initialization for Allied-Telesis AT1700/RE2000 series.
603 */
604 int
605 fe_probe_ati(sc, ia)
606 struct fe_softc *sc;
607 struct isa_attach_args *ia;
608 {
609 int i, n;
610 int iobase = sc->sc_iobase;
611 u_char eeprom[FE_EEPROM_SIZE];
612 u_char save16, save17;
613 int irq;
614
615 static int const iomap[8] =
616 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
617 static int const irqmap[4][4] = {
618 { 3, 4, 5, 9 },
619 { 10, 11, 12, 15 },
620 { 3, 11, 5, 15 },
621 { 10, 11, 14, 15 },
622 };
623 static struct fe_simple_probe_struct const probe_table[] = {
624 { FE_DLCR2, 0x70, 0x00 },
625 { FE_DLCR4, 0x08, 0x00 },
626 { FE_DLCR5, 0x80, 0x00 },
627 #if 0
628 { FE_BMPR16, 0x1B, 0x00 },
629 { FE_BMPR17, 0x7F, 0x00 },
630 #endif
631 { 0 }
632 };
633
634 #if 0
635 /*
636 * Don't probe at all if the config says we are PCMCIA...
637 */
638 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
639 return (0);
640 #endif
641
642 #if FE_DEBUG >= 4
643 log(LOG_INFO, "%s: probe (0x%x) for ATI\n", sc->sc_dev.dv_xname, iobase);
644 fe_dump(LOG_INFO, sc);
645 #endif
646
647 /*
648 * See if the sepcified address is possible for MB86965A JLI mode.
649 */
650 for (i = 0; i < 8; i++) {
651 if (iomap[i] == iobase)
652 break;
653 }
654 if (i == 8)
655 return (0);
656
657 /*
658 * We should test if MB86965A is on the base address now.
659 * Unfortunately, it is very hard to probe it reliably, since
660 * we have no way to reset the chip under software control.
661 * On cold boot, we could check the "signature" bit patterns
662 * described in the Fujitsu document. On warm boot, however,
663 * we can predict almost nothing about register values.
664 */
665 if (!fe_simple_probe(iobase, probe_table))
666 return (0);
667
668 /* Save old values of the registers. */
669 save16 = inb(iobase + FE_BMPR16);
670 save17 = inb(iobase + FE_BMPR17);
671
672 /* Check if our I/O address matches config info on 86965. */
673 n = (inb(iobase + FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
674 if (iomap[n] != iobase)
675 goto fail;
676
677 /*
678 * We are now almost sure we have an AT1700 at the given
679 * address. So, read EEPROM through 86965. We have to write
680 * into LSI registers to read from EEPROM. I want to avoid it
681 * at this stage, but I cannot test the presense of the chip
682 * any further without reading EEPROM. FIXME.
683 */
684 fe_read_eeprom(sc, eeprom);
685
686 /* Make sure the EEPROM is turned off. */
687 outb(iobase + FE_BMPR16, 0);
688 outb(iobase + FE_BMPR17, 0);
689
690 /* Make sure that config info in EEPROM and 86965 agree. */
691 if (eeprom[FE_EEPROM_CONF] != inb(iobase + FE_BMPR19))
692 goto fail;
693
694 /*
695 * Determine the card type.
696 */
697 switch (eeprom[FE_ATI_EEP_MODEL]) {
698 case FE_ATI_MODEL_AT1700T:
699 sc->type = FE_TYPE_AT1700T;
700 sc->typestr = "AT-1700T";
701 break;
702 case FE_ATI_MODEL_AT1700BT:
703 sc->type = FE_TYPE_AT1700BT;
704 sc->typestr = "AT-1700BT";
705 break;
706 case FE_ATI_MODEL_AT1700FT:
707 sc->type = FE_TYPE_AT1700FT;
708 sc->typestr = "AT-1700FT";
709 break;
710 case FE_ATI_MODEL_AT1700AT:
711 sc->type = FE_TYPE_AT1700AT;
712 sc->typestr = "AT-1700AT";
713 break;
714 default:
715 sc->type = FE_TYPE_RE2000;
716 sc->typestr = "unknown (RE-2000?)";
717 break;
718 }
719
720 /*
721 * Try to determine IRQ settings.
722 * Different models use different ranges of IRQs.
723 */
724 n = (inb(iobase + FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
725 switch (eeprom[FE_ATI_EEP_REVISION] & 0xf0) {
726 case 0x30:
727 irq = irqmap[3][n];
728 break;
729 case 0x10:
730 case 0x50:
731 irq = irqmap[2][n];
732 break;
733 case 0x40:
734 case 0x60:
735 if (eeprom[FE_ATI_EEP_MAGIC] & 0x04) {
736 irq = irqmap[1][n];
737 break;
738 }
739 default:
740 irq = irqmap[0][n];
741 break;
742 }
743
744 if (ia->ia_irq != IRQUNK) {
745 if (ia->ia_irq != irq) {
746 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
747 sc->sc_dev.dv_xname, ia->ia_irq, irq);
748 return (0);
749 }
750 } else
751 ia->ia_irq = irq;
752
753 /*
754 * Initialize constants in the per-line structure.
755 */
756
757 /* Get our station address from EEPROM. */
758 bcopy(eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
759
760 /* Make sure we got a valid station address. */
761 if ((sc->sc_enaddr[0] & 0x03) != 0x00
762 || (sc->sc_enaddr[0] == 0x00
763 && sc->sc_enaddr[1] == 0x00
764 && sc->sc_enaddr[2] == 0x00))
765 goto fail;
766
767 /* Should find all register prototypes here. FIXME. */
768 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */
769 sc->proto_dlcr5 = 0;
770 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
771 #if 0 /* XXXX Should we use this? */
772 sc->proto_bmpr13 = eeprom[FE_ATI_EEP_MEDIA];
773 #else
774 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
775 #endif
776
777 /*
778 * Program the 86965 as follows:
779 * SRAM: 32KB, 100ns, byte-wide access.
780 * Transmission buffer: 4KB x 2.
781 * System bus interface: 16 bits.
782 * We cannot change these values but TXBSIZE, because they
783 * are hard-wired on the board. Modifying TXBSIZE will affect
784 * the driver performance.
785 */
786 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
787 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
788
789 #if FE_DEBUG >= 3
790 log(LOG_INFO, "%s: ATI found\n", sc->sc_dev.dv_xname);
791 fe_dump(LOG_INFO, sc);
792 #endif
793
794 /* Initialize 86965. */
795 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
796 delay(200);
797
798 /* Disable all interrupts. */
799 outb(iobase + FE_DLCR2, 0);
800 outb(iobase + FE_DLCR3, 0);
801
802 #if FE_DEBUG >= 3
803 log(LOG_INFO, "%s: end of fe_probe_ati()\n", sc->sc_dev.dv_xname);
804 fe_dump(LOG_INFO, sc);
805 #endif
806
807 /*
808 * That's all. AT1700 occupies 32 I/O addresses, by the way.
809 */
810 ia->ia_iosize = 32;
811 ia->ia_msize = 0;
812 return (1);
813
814 fail:
815 /* Restore register values, in the case we had no 86965. */
816 outb(iobase + FE_BMPR16, save16);
817 outb(iobase + FE_BMPR17, save17);
818 return (0);
819 }
820
821 /*
822 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
823 */
824 int
825 fe_probe_mbh(sc, ia)
826 struct fe_softc *sc;
827 struct isa_attach_args *ia;
828 {
829 int iobase = sc->sc_iobase;
830
831 static struct fe_simple_probe_struct probe_table[] = {
832 { FE_DLCR2, 0x70, 0x00 },
833 { FE_DLCR4, 0x08, 0x00 },
834 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
835 #if 0
836 /*
837 * Test *vendor* part of the address for Fujitsu.
838 * The test will gain reliability of probe process, but
839 * it rejects clones by other vendors, or OEM product
840 * supplied by resalers other than Fujitsu.
841 */
842 { FE_MBH10, 0xFF, 0x00 },
843 { FE_MBH11, 0xFF, 0x00 },
844 { FE_MBH12, 0xFF, 0x0E },
845 #else
846 /*
847 * We can always verify the *first* 2 bits (in Ehternet
848 * bit order) are "global" and "unicast" even for
849 * unknown vendors.
850 */
851 { FE_MBH10, 0x03, 0x00 },
852 #endif
853 /* Just a gap? Seems reliable, anyway. */
854 { 0x12, 0xFF, 0x00 },
855 { 0x13, 0xFF, 0x00 },
856 { 0x14, 0xFF, 0x00 },
857 { 0x15, 0xFF, 0x00 },
858 { 0x16, 0xFF, 0x00 },
859 { 0x17, 0xFF, 0x00 },
860 { 0x18, 0xFF, 0xFF },
861 { 0x19, 0xFF, 0xFF },
862
863 { 0 }
864 };
865
866 #if 0
867 /*
868 * We need a PCMCIA flag.
869 */
870 if ((cf->cf_flags & FE_FLAGS_PCMCIA) == 0)
871 return (0);
872 #endif
873
874 /*
875 * We need explicit IRQ and supported address.
876 */
877 if (ia->ia_irq == IRQUNK || (iobase & ~0x3E0) != 0)
878 return (0);
879
880 #if FE_DEBUG >= 3
881 log(LOG_INFO, "%s: top of fe_probe_mbh()\n", sc->sc_dev.dv_xname);
882 fe_dump(LOG_INFO, sc);
883 #endif
884
885 /*
886 * See if MBH10302 is on its address.
887 * I'm not sure the following probe code works. FIXME.
888 */
889 if (!fe_simple_probe(iobase, probe_table))
890 return (0);
891
892 /* Determine the card type. */
893 sc->type = FE_TYPE_MBH10302;
894 sc->typestr = "MBH10302 (PCMCIA)";
895
896 /*
897 * Initialize constants in the per-line structure.
898 */
899
900 /* Get our station address from EEPROM. */
901 inblk(iobase + FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN);
902
903 /* Make sure we got a valid station address. */
904 if ((sc->sc_enaddr[0] & 0x03) != 0x00
905 || (sc->sc_enaddr[0] == 0x00
906 && sc->sc_enaddr[1] == 0x00
907 && sc->sc_enaddr[2] == 0x00))
908 return (0);
909
910 /* Should find all register prototypes here. FIXME. */
911 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
912 sc->proto_dlcr5 = 0;
913 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
914 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
915
916 /*
917 * Program the 86960 as follows:
918 * SRAM: 32KB, 100ns, byte-wide access.
919 * Transmission buffer: 4KB x 2.
920 * System bus interface: 16 bits.
921 * We cannot change these values but TXBSIZE, because they
922 * are hard-wired on the board. Modifying TXBSIZE will affect
923 * the driver performance.
924 */
925 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
926 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
927
928 /* Setup hooks. We need a special initialization procedure. */
929 sc->init = fe_init_mbh;
930
931 /*
932 * Minimum initialization.
933 */
934
935 /* Wait for a while. I'm not sure this is necessary. FIXME. */
936 delay(200);
937
938 /* Minimul initialization of 86960. */
939 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
940 delay(200);
941
942 /* Disable all interrupts. */
943 outb(iobase + FE_DLCR2, 0);
944 outb(iobase + FE_DLCR3, 0);
945
946 #if 1 /* FIXME. */
947 /* Initialize system bus interface and encoder/decoder operation. */
948 outb(iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE);
949 #endif
950
951 /*
952 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
953 */
954 ia->ia_iosize = 32;
955 ia->ia_msize = 0;
956 return (1);
957 }
958
959 /* MBH specific initialization routine. */
960 void
961 fe_init_mbh(sc)
962 struct fe_softc *sc;
963 {
964
965 /* Probably required after hot-insertion... */
966
967 /* Wait for a while. I'm not sure this is necessary. FIXME. */
968 delay(200);
969
970 /* Minimul initialization of 86960. */
971 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
972 delay(200);
973
974 /* Disable all interrupts. */
975 outb(sc->sc_iobase + FE_DLCR2, 0);
976 outb(sc->sc_iobase + FE_DLCR3, 0);
977
978 /* Enable master interrupt flag. */
979 outb(sc->sc_iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE);
980 }
981
982 /*
983 * Install interface into kernel networking data structures
984 */
985 void
986 feattach(parent, self, aux)
987 struct device *parent, *self;
988 void *aux;
989 {
990 struct fe_softc *sc = (void *)self;
991 struct isa_attach_args *ia = aux;
992 struct cfdata *cf = sc->sc_dev.dv_cfdata;
993 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
994
995 /* Stop the 86960. */
996 fe_stop(sc);
997
998 /* Initialize ifnet structure. */
999 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
1000 ifp->if_softc = sc;
1001 ifp->if_start = fe_start;
1002 ifp->if_ioctl = fe_ioctl;
1003 ifp->if_watchdog = fe_watchdog;
1004 ifp->if_flags =
1005 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
1006
1007 /*
1008 * Set maximum size of output queue, if it has not been set.
1009 * It is done here as this driver may be started after the
1010 * system intialization (i.e., the interface is PCMCIA.)
1011 *
1012 * I'm not sure this is really necessary, but, even if it is,
1013 * it should be done somewhere else, e.g., in if_attach(),
1014 * since it must be a common workaround for all network drivers.
1015 * FIXME.
1016 */
1017 if (ifp->if_snd.ifq_maxlen == 0) {
1018 extern int ifqmaxlen; /* Don't be so shocked... */
1019 ifp->if_snd.ifq_maxlen = ifqmaxlen;
1020 }
1021
1022 #if FE_DEBUG >= 3
1023 log(LOG_INFO, "%s: feattach()\n", sc->sc_dev.dv_xname);
1024 fe_dump(LOG_INFO, sc);
1025 #endif
1026
1027 #if FE_SINGLE_TRANSMISSION
1028 /* Override txb config to allocate minimum. */
1029 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
1030 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1031 #endif
1032
1033 /* Modify hardware config if it is requested. */
1034 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
1035 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
1036
1037 /* Find TX buffer size, based on the hardware dependent proto. */
1038 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1039 case FE_D6_TXBSIZ_2x2KB:
1040 sc->txb_size = 2048;
1041 break;
1042 case FE_D6_TXBSIZ_2x4KB:
1043 sc->txb_size = 4096;
1044 break;
1045 case FE_D6_TXBSIZ_2x8KB:
1046 sc->txb_size = 8192;
1047 break;
1048 default:
1049 /* Oops, we can't work with single buffer configuration. */
1050 #if FE_DEBUG >= 2
1051 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
1052 sc->sc_dev.dv_xname);
1053 #endif
1054 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
1055 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1056 sc->txb_size = 2048;
1057 break;
1058 }
1059
1060 /* Attach the interface. */
1061 if_attach(ifp);
1062 ether_ifattach(ifp);
1063
1064 /* Print additional info when attached. */
1065 printf(": address %s, type %s\n",
1066 ether_sprintf(sc->sc_arpcom.ac_enaddr), sc->typestr);
1067 #if FE_DEBUG >= 3
1068 {
1069 int buf, txb, bbw, sbw, ram;
1070
1071 buf = txb = bbw = sbw = ram = -1;
1072 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
1073 case FE_D6_BUFSIZ_8KB:
1074 buf = 8;
1075 break;
1076 case FE_D6_BUFSIZ_16KB:
1077 buf = 16;
1078 break;
1079 case FE_D6_BUFSIZ_32KB:
1080 buf = 32;
1081 break;
1082 case FE_D6_BUFSIZ_64KB:
1083 buf = 64;
1084 break;
1085 }
1086 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1087 case FE_D6_TXBSIZ_2x2KB:
1088 txb = 2;
1089 break;
1090 case FE_D6_TXBSIZ_2x4KB:
1091 txb = 4;
1092 break;
1093 case FE_D6_TXBSIZ_2x8KB:
1094 txb = 8;
1095 break;
1096 }
1097 switch (sc->proto_dlcr6 & FE_D6_BBW) {
1098 case FE_D6_BBW_BYTE:
1099 bbw = 8;
1100 break;
1101 case FE_D6_BBW_WORD:
1102 bbw = 16;
1103 break;
1104 }
1105 switch (sc->proto_dlcr6 & FE_D6_SBW) {
1106 case FE_D6_SBW_BYTE:
1107 sbw = 8;
1108 break;
1109 case FE_D6_SBW_WORD:
1110 sbw = 16;
1111 break;
1112 }
1113 switch (sc->proto_dlcr6 & FE_D6_SRAM) {
1114 case FE_D6_SRAM_100ns:
1115 ram = 100;
1116 break;
1117 case FE_D6_SRAM_150ns:
1118 ram = 150;
1119 break;
1120 }
1121 printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
1122 sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw);
1123 }
1124 #endif
1125
1126 #if NBPFILTER > 0
1127 /* If BPF is in the kernel, call the attach for it. */
1128 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
1129 #endif
1130
1131 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
1132 IPL_NET, feintr, sc);
1133 }
1134
1135 /*
1136 * Reset interface.
1137 */
1138 void
1139 fe_reset(sc)
1140 struct fe_softc *sc;
1141 {
1142 int s;
1143
1144 s = splnet();
1145 fe_stop(sc);
1146 fe_init(sc);
1147 splx(s);
1148 }
1149
1150 /*
1151 * Stop everything on the interface.
1152 *
1153 * All buffered packets, both transmitting and receiving,
1154 * if any, will be lost by stopping the interface.
1155 */
1156 void
1157 fe_stop(sc)
1158 struct fe_softc *sc;
1159 {
1160
1161 #if FE_DEBUG >= 3
1162 log(LOG_INFO, "%s: top of fe_stop()\n", sc->sc_dev.dv_xname);
1163 fe_dump(LOG_INFO, sc);
1164 #endif
1165
1166 /* Disable interrupts. */
1167 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1168 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1169
1170 /* Stop interface hardware. */
1171 delay(200);
1172 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1173 delay(200);
1174
1175 /* Clear all interrupt status. */
1176 outb(sc->sc_iobase + FE_DLCR0, 0xFF);
1177 outb(sc->sc_iobase + FE_DLCR1, 0xFF);
1178
1179 /* Put the chip in stand-by mode. */
1180 delay(200);
1181 outb(sc->sc_iobase + FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
1182 delay(200);
1183
1184 /* MAR loading can be delayed. */
1185 sc->filter_change = 0;
1186
1187 /* Call a hook. */
1188 if (sc->stop)
1189 sc->stop(sc);
1190
1191 #if DEBUG >= 3
1192 log(LOG_INFO, "%s: end of fe_stop()\n", sc->sc_dev.dv_xname);
1193 fe_dump(LOG_INFO, sc);
1194 #endif
1195 }
1196
1197 /*
1198 * Device timeout/watchdog routine. Entered if the device neglects to
1199 * generate an interrupt after a transmit has been started on it.
1200 */
1201 void
1202 fe_watchdog(ifp)
1203 struct ifnet *ifp;
1204 {
1205 struct fe_softc *sc = ifp->if_softc;
1206
1207 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1208 #if FE_DEBUG >= 3
1209 fe_dump(LOG_INFO, sc);
1210 #endif
1211
1212 /* Record how many packets are lost by this accident. */
1213 sc->sc_arpcom.ac_if.if_oerrors += sc->txb_sched + sc->txb_count;
1214
1215 fe_reset(sc);
1216 }
1217
1218 /*
1219 * Drop (skip) a packet from receive buffer in 86960 memory.
1220 */
1221 static inline void
1222 fe_droppacket(sc)
1223 struct fe_softc *sc;
1224 {
1225
1226 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
1227 }
1228
1229 /*
1230 * Initialize device.
1231 */
1232 void
1233 fe_init(sc)
1234 struct fe_softc *sc;
1235 {
1236 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1237 int i;
1238
1239 #if FE_DEBUG >= 3
1240 log(LOG_INFO, "%s: top of fe_init()\n", sc->sc_dev.dv_xname);
1241 fe_dump(LOG_INFO, sc);
1242 #endif
1243
1244 /* Reset transmitter flags. */
1245 ifp->if_flags &= ~IFF_OACTIVE;
1246 ifp->if_timer = 0;
1247
1248 sc->txb_free = sc->txb_size;
1249 sc->txb_count = 0;
1250 sc->txb_sched = 0;
1251
1252 /* Call a hook. */
1253 if (sc->init)
1254 sc->init(sc);
1255
1256 #if FE_DEBUG >= 3
1257 log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname);
1258 fe_dump(LOG_INFO, sc);
1259 #endif
1260
1261 /*
1262 * Make sure to disable the chip, also.
1263 * This may also help re-programming the chip after
1264 * hot insertion of PCMCIAs.
1265 */
1266 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1267
1268 /* Power up the chip and select register bank for DLCRs. */
1269 delay(200);
1270 outb(sc->sc_iobase + FE_DLCR7,
1271 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1272 delay(200);
1273
1274 /* Feed the station address. */
1275 outblk(sc->sc_iobase + FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1276
1277 /* Select the BMPR bank for runtime register access. */
1278 outb(sc->sc_iobase + FE_DLCR7,
1279 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1280
1281 /* Initialize registers. */
1282 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1283 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1284 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1285 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1286 outb(sc->sc_iobase + FE_DLCR4, sc->proto_dlcr4);
1287 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5);
1288 outb(sc->sc_iobase + FE_BMPR10, 0x00);
1289 outb(sc->sc_iobase + FE_BMPR11, FE_B11_CTRL_SKIP);
1290 outb(sc->sc_iobase + FE_BMPR12, 0x00);
1291 outb(sc->sc_iobase + FE_BMPR13, sc->proto_bmpr13);
1292 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER);
1293 outb(sc->sc_iobase + FE_BMPR15, 0x00);
1294
1295 #if FE_DEBUG >= 3
1296 log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname);
1297 fe_dump(LOG_INFO, sc);
1298 #endif
1299
1300 /* Enable interrupts. */
1301 outb(sc->sc_iobase + FE_DLCR2, FE_TMASK);
1302 outb(sc->sc_iobase + FE_DLCR3, FE_RMASK);
1303
1304 /* Enable transmitter and receiver. */
1305 delay(200);
1306 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1307 delay(200);
1308
1309 #if FE_DEBUG >= 3
1310 log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname);
1311 fe_dump(LOG_INFO, sc);
1312 #endif
1313
1314 /*
1315 * Make sure to empty the receive buffer.
1316 *
1317 * This may be redundant, but *if* the receive buffer were full
1318 * at this point, the driver would hang. I have experienced
1319 * some strange hangups just after UP. I hope the following
1320 * code solve the problem.
1321 *
1322 * I have changed the order of hardware initialization.
1323 * I think the receive buffer cannot have any packets at this
1324 * point in this version. The following code *must* be
1325 * redundant now. FIXME.
1326 */
1327 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1328 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1329 break;
1330 fe_droppacket(sc);
1331 }
1332 #if FE_DEBUG >= 1
1333 if (i >= FE_MAX_RECV_COUNT) {
1334 log(LOG_ERR, "%s: cannot empty receive buffer\n",
1335 sc->sc_dev.dv_xname);
1336 }
1337 #endif
1338 #if FE_DEBUG >= 3
1339 if (i < FE_MAX_RECV_COUNT) {
1340 log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
1341 sc->sc_dev.dv_xname, i);
1342 }
1343 #endif
1344
1345 #if FE_DEBUG >= 3
1346 log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname);
1347 fe_dump(LOG_INFO, sc);
1348 #endif
1349
1350 /* Do we need this here? */
1351 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1352 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1353
1354 #if FE_DEBUG >= 3
1355 log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname);
1356 fe_dump(LOG_INFO, sc);
1357 #endif
1358
1359 /* Set 'running' flag. */
1360 ifp->if_flags |= IFF_RUNNING;
1361
1362 /*
1363 * At this point, the interface is runnung properly,
1364 * except that it receives *no* packets. we then call
1365 * fe_setmode() to tell the chip what packets to be
1366 * received, based on the if_flags and multicast group
1367 * list. It completes the initialization process.
1368 */
1369 fe_setmode(sc);
1370
1371 #if FE_DEBUG >= 3
1372 log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname);
1373 fe_dump(LOG_INFO, sc);
1374 #endif
1375
1376 /* ...and attempt to start output. */
1377 fe_start(ifp);
1378
1379 #if FE_DEBUG >= 3
1380 log(LOG_INFO, "%s: end of fe_init()\n", sc->sc_dev.dv_xname);
1381 fe_dump(LOG_INFO, sc);
1382 #endif
1383 }
1384
1385 /*
1386 * This routine actually starts the transmission on the interface
1387 */
1388 static inline void
1389 fe_xmit(sc)
1390 struct fe_softc *sc;
1391 {
1392
1393 /*
1394 * Set a timer just in case we never hear from the board again.
1395 * We use longer timeout for multiple packet transmission.
1396 * I'm not sure this timer value is appropriate. FIXME.
1397 */
1398 sc->sc_arpcom.ac_if.if_timer = 1 + sc->txb_count;
1399
1400 /* Update txb variables. */
1401 sc->txb_sched = sc->txb_count;
1402 sc->txb_count = 0;
1403 sc->txb_free = sc->txb_size;
1404
1405 #if FE_DELAYED_PADDING
1406 /* Omit the postponed padding process. */
1407 sc->txb_padding = 0;
1408 #endif
1409
1410 /* Start transmitter, passing packets in TX buffer. */
1411 outb(sc->sc_iobase + FE_BMPR10, sc->txb_sched | FE_B10_START);
1412 }
1413
1414 /*
1415 * Start output on interface.
1416 * We make two assumptions here:
1417 * 1) that the current priority is set to splnet _before_ this code
1418 * is called *and* is returned to the appropriate priority after
1419 * return
1420 * 2) that the IFF_OACTIVE flag is checked before this code is called
1421 * (i.e. that the output part of the interface is idle)
1422 */
1423 void
1424 fe_start(ifp)
1425 struct ifnet *ifp;
1426 {
1427 struct fe_softc *sc = ifp->if_softc;
1428 struct mbuf *m;
1429
1430 #if FE_DEBUG >= 1
1431 /* Just a sanity check. */
1432 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1433 /*
1434 * Txb_count and txb_free co-works to manage the
1435 * transmission buffer. Txb_count keeps track of the
1436 * used potion of the buffer, while txb_free does unused
1437 * potion. So, as long as the driver runs properly,
1438 * txb_count is zero if and only if txb_free is same
1439 * as txb_size (which represents whole buffer.)
1440 */
1441 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
1442 sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free);
1443 /*
1444 * So, what should I do, then?
1445 *
1446 * We now know txb_count and txb_free contradicts. We
1447 * cannot, however, tell which is wrong. More
1448 * over, we cannot peek 86960 transmission buffer or
1449 * reset the transmission buffer. (In fact, we can
1450 * reset the entire interface. I don't want to do it.)
1451 *
1452 * If txb_count is incorrect, leaving it as is will cause
1453 * sending of gabages after next interrupt. We have to
1454 * avoid it. Hence, we reset the txb_count here. If
1455 * txb_free was incorrect, resetting txb_count just loose
1456 * some packets. We can live with it.
1457 */
1458 sc->txb_count = 0;
1459 }
1460 #endif
1461
1462 #if FE_DEBUG >= 1
1463 /*
1464 * First, see if there are buffered packets and an idle
1465 * transmitter - should never happen at this point.
1466 */
1467 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1468 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
1469 sc->sc_dev.dv_xname, sc->txb_count);
1470 fe_xmit(sc);
1471 }
1472 #endif
1473
1474 /*
1475 * Stop accepting more transmission packets temporarily, when
1476 * a filter change request is delayed. Updating the MARs on
1477 * 86960 flushes the transmisstion buffer, so it is delayed
1478 * until all buffered transmission packets have been sent
1479 * out.
1480 */
1481 if (sc->filter_change) {
1482 /*
1483 * Filter change requst is delayed only when the DLC is
1484 * working. DLC soon raise an interrupt after finishing
1485 * the work.
1486 */
1487 goto indicate_active;
1488 }
1489
1490 for (;;) {
1491 /*
1492 * See if there is room to put another packet in the buffer.
1493 * We *could* do better job by peeking the send queue to
1494 * know the length of the next packet. Current version just
1495 * tests against the worst case (i.e., longest packet). FIXME.
1496 *
1497 * When adding the packet-peek feature, don't forget adding a
1498 * test on txb_count against QUEUEING_MAX.
1499 * There is a little chance the packet count exceeds
1500 * the limit. Assume transmission buffer is 8KB (2x8KB
1501 * configuration) and an application sends a bunch of small
1502 * (i.e., minimum packet sized) packets rapidly. An 8KB
1503 * buffer can hold 130 blocks of 62 bytes long...
1504 */
1505 if (sc->txb_free < ETHER_MAX_LEN + FE_DATA_LEN_LEN) {
1506 /* No room. */
1507 goto indicate_active;
1508 }
1509
1510 #if FE_SINGLE_TRANSMISSION
1511 if (sc->txb_count > 0) {
1512 /* Just one packet per a transmission buffer. */
1513 goto indicate_active;
1514 }
1515 #endif
1516
1517 /*
1518 * Get the next mbuf chain for a packet to send.
1519 */
1520 IF_DEQUEUE(&ifp->if_snd, m);
1521 if (m == 0) {
1522 /* No more packets to send. */
1523 goto indicate_inactive;
1524 }
1525
1526 #if NBPFILTER > 0
1527 /* Tap off here if there is a BPF listener. */
1528 if (ifp->if_bpf)
1529 bpf_mtap(ifp->if_bpf, m);
1530 #endif
1531
1532 /*
1533 * Copy the mbuf chain into the transmission buffer.
1534 * txb_* variables are updated as necessary.
1535 */
1536 fe_write_mbufs(sc, m);
1537
1538 m_freem(m);
1539
1540 /* Start transmitter if it's idle. */
1541 if (sc->txb_sched == 0)
1542 fe_xmit(sc);
1543 }
1544
1545 indicate_inactive:
1546 /*
1547 * We are using the !OACTIVE flag to indicate to
1548 * the outside world that we can accept an
1549 * additional packet rather than that the
1550 * transmitter is _actually_ active. Indeed, the
1551 * transmitter may be active, but if we haven't
1552 * filled all the buffers with data then we still
1553 * want to accept more.
1554 */
1555 ifp->if_flags &= ~IFF_OACTIVE;
1556 return;
1557
1558 indicate_active:
1559 /*
1560 * The transmitter is active, and there are no room for
1561 * more outgoing packets in the transmission buffer.
1562 */
1563 ifp->if_flags |= IFF_OACTIVE;
1564 return;
1565 }
1566
1567 /*
1568 * Transmission interrupt handler
1569 * The control flow of this function looks silly. FIXME.
1570 */
1571 void
1572 fe_tint(sc, tstat)
1573 struct fe_softc *sc;
1574 u_char tstat;
1575 {
1576 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1577 int left;
1578 int col;
1579
1580 /*
1581 * Handle "excessive collision" interrupt.
1582 */
1583 if (tstat & FE_D0_COLL16) {
1584 /*
1585 * Find how many packets (including this collided one)
1586 * are left unsent in transmission buffer.
1587 */
1588 left = inb(sc->sc_iobase + FE_BMPR10);
1589
1590 #if FE_DEBUG >= 2
1591 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
1592 sc->sc_dev.dv_xname, left, sc->txb_sched);
1593 #endif
1594 #if FE_DEBUG >= 3
1595 fe_dump(LOG_INFO, sc);
1596 #endif
1597
1598 /*
1599 * Update statistics.
1600 */
1601 ifp->if_collisions += 16;
1602 ifp->if_oerrors++;
1603 ifp->if_opackets += sc->txb_sched - left;
1604
1605 /*
1606 * Collision statistics has been updated.
1607 * Clear the collision flag on 86960 now to avoid confusion.
1608 */
1609 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1610
1611 /*
1612 * Restart transmitter, skipping the
1613 * collided packet.
1614 *
1615 * We *must* skip the packet to keep network running
1616 * properly. Excessive collision error is an
1617 * indication of the network overload. If we
1618 * tried sending the same packet after excessive
1619 * collision, the network would be filled with
1620 * out-of-time packets. Packets belonging
1621 * to reliable transport (such as TCP) are resent
1622 * by some upper layer.
1623 */
1624 outb(sc->sc_iobase + FE_BMPR11,
1625 FE_B11_CTRL_SKIP | FE_B11_MODE1);
1626 sc->txb_sched = left - 1;
1627 }
1628
1629 /*
1630 * Handle "transmission complete" interrupt.
1631 */
1632 if (tstat & FE_D0_TXDONE) {
1633 /*
1634 * Add in total number of collisions on last
1635 * transmission. We also clear "collision occurred" flag
1636 * here.
1637 *
1638 * 86960 has a design flow on collision count on multiple
1639 * packet transmission. When we send two or more packets
1640 * with one start command (that's what we do when the
1641 * transmission queue is clauded), 86960 informs us number
1642 * of collisions occured on the last packet on the
1643 * transmission only. Number of collisions on previous
1644 * packets are lost. I have told that the fact is clearly
1645 * stated in the Fujitsu document.
1646 *
1647 * I considered not to mind it seriously. Collision
1648 * count is not so important, anyway. Any comments? FIXME.
1649 */
1650
1651 if (inb(sc->sc_iobase + FE_DLCR0) & FE_D0_COLLID) {
1652 /* Clear collision flag. */
1653 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1654
1655 /* Extract collision count from 86960. */
1656 col = inb(sc->sc_iobase + FE_DLCR4) & FE_D4_COL;
1657 if (col == 0) {
1658 /*
1659 * Status register indicates collisions,
1660 * while the collision count is zero.
1661 * This can happen after multiple packet
1662 * transmission, indicating that one or more
1663 * previous packet(s) had been collided.
1664 *
1665 * Since the accurate number of collisions
1666 * has been lost, we just guess it as 1;
1667 * Am I too optimistic? FIXME.
1668 */
1669 col = 1;
1670 } else
1671 col >>= FE_D4_COL_SHIFT;
1672 ifp->if_collisions += col;
1673 #if FE_DEBUG >= 4
1674 log(LOG_WARNING, "%s: %d collision%s (%d)\n",
1675 sc->sc_dev.dv_xname, col, col == 1 ? "" : "s",
1676 sc->txb_sched);
1677 #endif
1678 }
1679
1680 /*
1681 * Update total number of successfully
1682 * transmitted packets.
1683 */
1684 ifp->if_opackets += sc->txb_sched;
1685 sc->txb_sched = 0;
1686 }
1687
1688 if (sc->txb_sched == 0) {
1689 /*
1690 * The transmitter is no more active.
1691 * Reset output active flag and watchdog timer.
1692 */
1693 ifp->if_flags &= ~IFF_OACTIVE;
1694 ifp->if_timer = 0;
1695
1696 /*
1697 * If more data is ready to transmit in the buffer, start
1698 * transmitting them. Otherwise keep transmitter idle,
1699 * even if more data is queued. This gives receive
1700 * process a slight priority.
1701 */
1702 if (sc->txb_count > 0)
1703 fe_xmit(sc);
1704 }
1705 }
1706
1707 /*
1708 * Ethernet interface receiver interrupt.
1709 */
1710 void
1711 fe_rint(sc, rstat)
1712 struct fe_softc *sc;
1713 u_char rstat;
1714 {
1715 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1716 int len;
1717 u_char status;
1718 int i;
1719
1720 /*
1721 * Update statistics if this interrupt is caused by an error.
1722 */
1723 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR |
1724 FE_D1_ALGERR | FE_D1_SRTPKT)) {
1725 #if FE_DEBUG >= 3
1726 log(LOG_WARNING, "%s: receive error: %b\n",
1727 sc->sc_dev.dv_xname, rstat, FE_D1_ERRBITS);
1728 #endif
1729 ifp->if_ierrors++;
1730 }
1731
1732 /*
1733 * MB86960 has a flag indicating "receive queue empty."
1734 * We just loop cheking the flag to pull out all received
1735 * packets.
1736 *
1737 * We limit the number of iterrations to avoid infinite loop.
1738 * It can be caused by a very slow CPU (some broken
1739 * peripheral may insert incredible number of wait cycles)
1740 * or, worse, by a broken MB86960 chip.
1741 */
1742 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1743 /* Stop the iterration if 86960 indicates no packets. */
1744 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1745 break;
1746
1747 /*
1748 * Extract A receive status byte.
1749 * As our 86960 is in 16 bit bus access mode, we have to
1750 * use inw() to get the status byte. The significant
1751 * value is returned in lower 8 bits.
1752 */
1753 status = (u_char)inw(sc->sc_iobase + FE_BMPR8);
1754 #if FE_DEBUG >= 4
1755 log(LOG_INFO, "%s: receive status = %02x\n",
1756 sc->sc_dev.dv_xname, status);
1757 #endif
1758
1759 /*
1760 * If there was an error, update statistics and drop
1761 * the packet, unless the interface is in promiscuous
1762 * mode.
1763 */
1764 if ((status & 0xF0) != 0x20) { /* XXXX ? */
1765 if ((ifp->if_flags & IFF_PROMISC) == 0) {
1766 ifp->if_ierrors++;
1767 fe_droppacket(sc);
1768 continue;
1769 }
1770 }
1771
1772 /*
1773 * Extract the packet length.
1774 * It is a sum of a header (14 bytes) and a payload.
1775 * CRC has been stripped off by the 86960.
1776 */
1777 len = inw(sc->sc_iobase + FE_BMPR8);
1778
1779 /*
1780 * MB86965 checks the packet length and drop big packet
1781 * before passing it to us. There are no chance we can
1782 * get [crufty] packets. Hence, if the length exceeds
1783 * the specified limit, it means some serious failure,
1784 * such as out-of-sync on receive buffer management.
1785 *
1786 * Is this statement true? FIXME.
1787 */
1788 if (len > ETHER_MAX_LEN || len < ETHER_HDR_SIZE) {
1789 #if FE_DEBUG >= 2
1790 log(LOG_WARNING,
1791 "%s: received a %s packet? (%u bytes)\n",
1792 sc->sc_dev.dv_xname,
1793 len < ETHER_HDR_SIZE ? "partial" : "big", len);
1794 #endif
1795 ifp->if_ierrors++;
1796 fe_droppacket(sc);
1797 continue;
1798 }
1799
1800 /*
1801 * Check for a short (RUNT) packet. We *do* check
1802 * but do nothing other than print a message.
1803 * Short packets are illegal, but does nothing bad
1804 * if it carries data for upper layer.
1805 */
1806 #if FE_DEBUG >= 2
1807 if (len < ETHER_MIN_LEN) {
1808 log(LOG_WARNING,
1809 "%s: received a short packet? (%u bytes)\n",
1810 sc->sc_dev.dv_xname, len);
1811 }
1812 #endif
1813
1814 /*
1815 * Go get a packet.
1816 */
1817 if (!fe_get_packet(sc, len)) {
1818 /* Skip a packet, updating statistics. */
1819 #if FE_DEBUG >= 2
1820 log(LOG_WARNING,
1821 "%s: out of mbufs; dropping packet (%u bytes)\n",
1822 sc->sc_dev.dv_xname, len);
1823 #endif
1824 ifp->if_ierrors++;
1825 fe_droppacket(sc);
1826
1827 /*
1828 * We stop receiving packets, even if there are
1829 * more in the buffer. We hope we can get more
1830 * mbufs next time.
1831 */
1832 return;
1833 }
1834
1835 /* Successfully received a packet. Update stat. */
1836 ifp->if_ipackets++;
1837 }
1838 }
1839
1840 /*
1841 * Ethernet interface interrupt processor
1842 */
1843 int
1844 feintr(arg)
1845 void *arg;
1846 {
1847 struct fe_softc *sc = arg;
1848 u_char tstat, rstat;
1849
1850 #if FE_DEBUG >= 4
1851 log(LOG_INFO, "%s: feintr()\n", sc->sc_dev.dv_xname);
1852 fe_dump(LOG_INFO, sc);
1853 #endif
1854
1855 /*
1856 * Get interrupt conditions, masking unneeded flags.
1857 */
1858 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1859 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1860 if (tstat == 0 && rstat == 0)
1861 return (0);
1862
1863 /*
1864 * Loop until there are no more new interrupt conditions.
1865 */
1866 for (;;) {
1867 /*
1868 * Reset the conditions we are acknowledging.
1869 */
1870 outb(sc->sc_iobase + FE_DLCR0, tstat);
1871 outb(sc->sc_iobase + FE_DLCR1, rstat);
1872
1873 /*
1874 * Handle transmitter interrupts. Handle these first because
1875 * the receiver will reset the board under some conditions.
1876 */
1877 if (tstat != 0)
1878 fe_tint(sc, tstat);
1879
1880 /*
1881 * Handle receiver interrupts.
1882 */
1883 if (rstat != 0)
1884 fe_rint(sc, rstat);
1885
1886 /*
1887 * Update the multicast address filter if it is
1888 * needed and possible. We do it now, because
1889 * we can make sure the transmission buffer is empty,
1890 * and there is a good chance that the receive queue
1891 * is empty. It will minimize the possibility of
1892 * packet lossage.
1893 */
1894 if (sc->filter_change &&
1895 sc->txb_count == 0 && sc->txb_sched == 0) {
1896 fe_loadmar(sc);
1897 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
1898 }
1899
1900 /*
1901 * If it looks like the transmitter can take more data,
1902 * attempt to start output on the interface. This is done
1903 * after handling the receiver interrupt to give the
1904 * receive operation priority.
1905 */
1906 if ((sc->sc_arpcom.ac_if.if_flags & IFF_OACTIVE) == 0)
1907 fe_start(&sc->sc_arpcom.ac_if);
1908
1909 /*
1910 * Get interrupt conditions, masking unneeded flags.
1911 */
1912 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1913 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1914 if (tstat == 0 && rstat == 0)
1915 return (1);
1916 }
1917 }
1918
1919 /*
1920 * Process an ioctl request. This code needs some work - it looks pretty ugly.
1921 */
1922 int
1923 fe_ioctl(ifp, command, data)
1924 register struct ifnet *ifp;
1925 u_long command;
1926 caddr_t data;
1927 {
1928 struct fe_softc *sc = ifp->if_softc;
1929 register struct ifaddr *ifa = (struct ifaddr *)data;
1930 struct ifreq *ifr = (struct ifreq *)data;
1931 int s, error = 0;
1932
1933 #if FE_DEBUG >= 3
1934 log(LOG_INFO, "%s: ioctl(%x)\n", sc->sc_dev.dv_xname, command);
1935 #endif
1936
1937 s = splnet();
1938
1939 switch (command) {
1940
1941 case SIOCSIFADDR:
1942 ifp->if_flags |= IFF_UP;
1943
1944 switch (ifa->ifa_addr->sa_family) {
1945 #ifdef INET
1946 case AF_INET:
1947 fe_init(sc);
1948 arp_ifinit(&sc->sc_arpcom, ifa);
1949 break;
1950 #endif
1951 #ifdef NS
1952 case AF_NS:
1953 {
1954 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1955
1956 if (ns_nullhost(*ina))
1957 ina->x_host =
1958 *(union ns_host *)(sc->sc_arpcom.ac_enaddr);
1959 else
1960 bcopy(ina->x_host.c_host,
1961 sc->sc_arpcom.ac_enaddr,
1962 sizeof(sc->sc_arpcom.ac_enaddr));
1963 /* Set new address. */
1964 fe_init(sc);
1965 break;
1966 }
1967 #endif
1968 default:
1969 fe_init(sc);
1970 break;
1971 }
1972 break;
1973
1974 case SIOCSIFFLAGS:
1975 if ((ifp->if_flags & IFF_UP) == 0 &&
1976 (ifp->if_flags & IFF_RUNNING) != 0) {
1977 /*
1978 * If interface is marked down and it is running, then
1979 * stop it.
1980 */
1981 fe_stop(sc);
1982 ifp->if_flags &= ~IFF_RUNNING;
1983 } else if ((ifp->if_flags & IFF_UP) != 0 &&
1984 (ifp->if_flags & IFF_RUNNING) == 0) {
1985 /*
1986 * If interface is marked up and it is stopped, then
1987 * start it.
1988 */
1989 fe_init(sc);
1990 } else {
1991 /*
1992 * Reset the interface to pick up changes in any other
1993 * flags that affect hardware registers.
1994 */
1995 fe_setmode(sc);
1996 }
1997 #if DEBUG >= 1
1998 /* "ifconfig fe0 debug" to print register dump. */
1999 if (ifp->if_flags & IFF_DEBUG) {
2000 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", sc->sc_dev.dv_xname);
2001 fe_dump(LOG_DEBUG, sc);
2002 }
2003 #endif
2004 break;
2005
2006 case SIOCADDMULTI:
2007 case SIOCDELMULTI:
2008 /* Update our multicast list. */
2009 error = (command == SIOCADDMULTI) ?
2010 ether_addmulti(ifr, &sc->sc_arpcom) :
2011 ether_delmulti(ifr, &sc->sc_arpcom);
2012
2013 if (error == ENETRESET) {
2014 /*
2015 * Multicast list has changed; set the hardware filter
2016 * accordingly.
2017 */
2018 fe_setmode(sc);
2019 error = 0;
2020 }
2021 break;
2022
2023 default:
2024 error = EINVAL;
2025 }
2026
2027 splx(s);
2028 return (error);
2029 }
2030
2031 /*
2032 * Retreive packet from receive buffer and send to the next level up via
2033 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
2034 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
2035 */
2036 int
2037 fe_get_packet(sc, len)
2038 struct fe_softc *sc;
2039 int len;
2040 {
2041 struct ether_header *eh;
2042 struct mbuf *m;
2043 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
2044
2045 /* Allocate a header mbuf. */
2046 MGETHDR(m, M_DONTWAIT, MT_DATA);
2047 if (m == 0)
2048 return (0);
2049 m->m_pkthdr.rcvif = ifp;
2050 m->m_pkthdr.len = len;
2051
2052 /* The following silliness is to make NFS happy. */
2053 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
2054 #define EOFF (EROUND - sizeof(struct ether_header))
2055
2056 /*
2057 * Our strategy has one more problem. There is a policy on
2058 * mbuf cluster allocation. It says that we must have at
2059 * least MINCLSIZE (208 bytes) to allocate a cluster. For a
2060 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
2061 * our code violates the rule...
2062 * On the other hand, the current code is short, simle,
2063 * and fast, however. It does no harmful thing, just waists
2064 * some memory. Any comments? FIXME.
2065 */
2066
2067 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
2068 if (len > MHLEN - EOFF) {
2069 MCLGET(m, M_DONTWAIT);
2070 if ((m->m_flags & M_EXT) == 0) {
2071 m_freem(m);
2072 return (0);
2073 }
2074 }
2075
2076 /*
2077 * The following assumes there is room for the ether header in the
2078 * header mbuf.
2079 */
2080 m->m_data += EOFF;
2081 eh = mtod(m, struct ether_header *);
2082
2083 /* Set the length of this packet. */
2084 m->m_len = len;
2085
2086 /* Get a packet. */
2087 insw(sc->sc_iobase + FE_BMPR8, m->m_data, (len + 1) >> 1);
2088
2089 #if NBPFILTER > 0
2090 /*
2091 * Check if there's a BPF listener on this interface. If so, hand off
2092 * the raw packet to bpf.
2093 */
2094 if (ifp->if_bpf) {
2095 bpf_mtap(ifp->if_bpf, m);
2096
2097 /*
2098 * Note that the interface cannot be in promiscuous mode if
2099 * there are no BPF listeners. And if we are in promiscuous
2100 * mode, we have to check if this packet is really ours.
2101 */
2102 if ((ifp->if_flags & IFF_PROMISC) != 0 &&
2103 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
2104 bcmp(eh->ether_dhost, sc->sc_arpcom.ac_enaddr,
2105 sizeof(eh->ether_dhost)) != 0) {
2106 m_freem(m);
2107 return (1);
2108 }
2109 }
2110 #endif
2111
2112 /* Fix up data start offset in mbuf to point past ether header. */
2113 m_adj(m, sizeof(struct ether_header));
2114 ether_input(ifp, eh, m);
2115 return (1);
2116 }
2117
2118 /*
2119 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
2120 * Returns number of bytes actually written, including length word.
2121 *
2122 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
2123 * Packets shorter than Ethernet minimum are legal, and we pad them
2124 * before sending out. An exception is "partial" packets which are
2125 * shorter than mandatory Ethernet header.
2126 *
2127 * I wrote a code for an experimental "delayed padding" technique.
2128 * When employed, it postpones the padding process for short packets.
2129 * If xmit() occured at the moment, the padding process is omitted, and
2130 * garbages are sent as pad data. If next packet is stored in the
2131 * transmission buffer before xmit(), write_mbuf() pads the previous
2132 * packet before transmitting new packet. This *may* gain the
2133 * system performance (slightly).
2134 */
2135 void
2136 fe_write_mbufs(sc, m)
2137 struct fe_softc *sc;
2138 struct mbuf *m;
2139 {
2140 int bmpr8 = sc->sc_iobase + FE_BMPR8;
2141 struct mbuf *mp;
2142 u_char *data;
2143 u_short savebyte; /* WARNING: Architecture dependent! */
2144 int totlen, len, wantbyte;
2145
2146 #if FE_DELAYED_PADDING
2147 /* Do the "delayed padding." */
2148 len = sc->txb_padding >> 1;
2149 if (len > 0) {
2150 while (--len >= 0)
2151 outw(bmpr8, 0);
2152 sc->txb_padding = 0;
2153 }
2154 #endif
2155
2156 /* We need to use m->m_pkthdr.len, so require the header */
2157 if ((m->m_flags & M_PKTHDR) == 0)
2158 panic("fe_write_mbufs: no header mbuf");
2159
2160 #if FE_DEBUG >= 2
2161 /* First, count up the total number of bytes to copy. */
2162 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
2163 totlen += mp->m_len;
2164 /* Check if this matches the one in the packet header. */
2165 if (totlen != m->m_pkthdr.len)
2166 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
2167 sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len);
2168 #else
2169 /* Just use the length value in the packet header. */
2170 totlen = m->m_pkthdr.len;
2171 #endif
2172
2173 #if FE_DEBUG >= 1
2174 /*
2175 * Should never send big packets. If such a packet is passed,
2176 * it should be a bug of upper layer. We just ignore it.
2177 * ... Partial (too short) packets, neither.
2178 */
2179 if (totlen > ETHER_MAX_LEN || totlen < ETHER_HDR_SIZE) {
2180 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
2181 sc->sc_dev.dv_xname,
2182 totlen < ETHER_HDR_SIZE ? "partial" : "big", totlen);
2183 sc->sc_arpcom.ac_if.if_oerrors++;
2184 return;
2185 }
2186 #endif
2187
2188 /*
2189 * Put the length word for this frame.
2190 * Does 86960 accept odd length? -- Yes.
2191 * Do we need to pad the length to minimum size by ourselves?
2192 * -- Generally yes. But for (or will be) the last
2193 * packet in the transmission buffer, we can skip the
2194 * padding process. It may gain performance slightly. FIXME.
2195 */
2196 outw(bmpr8, max(totlen, ETHER_MIN_LEN));
2197
2198 /*
2199 * Update buffer status now.
2200 * Truncate the length up to an even number, since we use outw().
2201 */
2202 totlen = (totlen + 1) & ~1;
2203 sc->txb_free -= FE_DATA_LEN_LEN + max(totlen, ETHER_MIN_LEN);
2204 sc->txb_count++;
2205
2206 #if FE_DELAYED_PADDING
2207 /* Postpone the packet padding if necessary. */
2208 if (totlen < ETHER_MIN_LEN)
2209 sc->txb_padding = ETHER_MIN_LEN - totlen;
2210 #endif
2211
2212 /*
2213 * Transfer the data from mbuf chain to the transmission buffer.
2214 * MB86960 seems to require that data be transferred as words, and
2215 * only words. So that we require some extra code to patch
2216 * over odd-length mbufs.
2217 */
2218 wantbyte = 0;
2219 for (; m != 0; m = m->m_next) {
2220 /* Ignore empty mbuf. */
2221 len = m->m_len;
2222 if (len == 0)
2223 continue;
2224
2225 /* Find the actual data to send. */
2226 data = mtod(m, caddr_t);
2227
2228 /* Finish the last byte. */
2229 if (wantbyte) {
2230 outw(bmpr8, savebyte | (*data << 8));
2231 data++;
2232 len--;
2233 wantbyte = 0;
2234 }
2235
2236 /* Output contiguous words. */
2237 if (len > 1)
2238 outsw(bmpr8, data, len >> 1);
2239
2240 /* Save remaining byte, if there is one. */
2241 if (len & 1) {
2242 data += len & ~1;
2243 savebyte = *data;
2244 wantbyte = 1;
2245 }
2246 }
2247
2248 /* Spit the last byte, if the length is odd. */
2249 if (wantbyte)
2250 outw(bmpr8, savebyte);
2251
2252 #if ! FE_DELAYED_PADDING
2253 /*
2254 * Pad the packet to the minimum length if necessary.
2255 */
2256 len = (ETHER_MIN_LEN >> 1) - (totlen >> 1);
2257 while (--len >= 0)
2258 outw(bmpr8, 0);
2259 #endif
2260 }
2261
2262 /*
2263 * Compute the multicast address filter from the
2264 * list of multicast addresses we need to listen to.
2265 */
2266 void
2267 fe_getmcaf(ac, af)
2268 struct arpcom *ac;
2269 u_char *af;
2270 {
2271 struct ifnet *ifp = &ac->ac_if;
2272 struct ether_multi *enm;
2273 register u_char *cp, c;
2274 register u_long crc;
2275 register int i, len;
2276 struct ether_multistep step;
2277
2278 /*
2279 * Set up multicast address filter by passing all multicast addresses
2280 * through a crc generator, and then using the high order 6 bits as an
2281 * index into the 64 bit logical address filter. The high order bit
2282 * selects the word, while the rest of the bits select the bit within
2283 * the word.
2284 */
2285
2286 if ((ifp->if_flags & IFF_PROMISC) != 0)
2287 goto allmulti;
2288
2289 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0x00;
2290 ETHER_FIRST_MULTI(step, ac, enm);
2291 while (enm != NULL) {
2292 if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
2293 sizeof(enm->enm_addrlo)) != 0) {
2294 /*
2295 * We must listen to a range of multicast addresses.
2296 * For now, just accept all multicasts, rather than
2297 * trying to set only those filter bits needed to match
2298 * the range. (At this time, the only use of address
2299 * ranges is for IP multicast routing, for which the
2300 * range is big enough to require all bits set.)
2301 */
2302 goto allmulti;
2303 }
2304
2305 cp = enm->enm_addrlo;
2306 crc = 0xffffffff;
2307 for (len = sizeof(enm->enm_addrlo); --len >= 0;) {
2308 c = *cp++;
2309 for (i = 8; --i >= 0;) {
2310 if ((crc & 0x01) ^ (c & 0x01)) {
2311 crc >>= 1;
2312 crc ^= 0xedb88320;
2313 } else
2314 crc >>= 1;
2315 c >>= 1;
2316 }
2317 }
2318 /* Just want the 6 most significant bits. */
2319 crc >>= 26;
2320
2321 /* Turn on the corresponding bit in the filter. */
2322 af[crc >> 3] |= 1 << (crc & 7);
2323
2324 ETHER_NEXT_MULTI(step, enm);
2325 }
2326 ifp->if_flags &= ~IFF_ALLMULTI;
2327 return;
2328
2329 allmulti:
2330 ifp->if_flags |= IFF_ALLMULTI;
2331 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0xff;
2332 }
2333
2334 /*
2335 * Calculate a new "multicast packet filter" and put the 86960
2336 * receiver in appropriate mode.
2337 */
2338 void
2339 fe_setmode(sc)
2340 struct fe_softc *sc;
2341 {
2342 int flags = sc->sc_arpcom.ac_if.if_flags;
2343
2344 /*
2345 * If the interface is not running, we postpone the update
2346 * process for receive modes and multicast address filter
2347 * until the interface is restarted. It reduces some
2348 * complicated job on maintaining chip states. (Earlier versions
2349 * of this driver had a bug on that point...)
2350 *
2351 * To complete the trick, fe_init() calls fe_setmode() after
2352 * restarting the interface.
2353 */
2354 if ((flags & IFF_RUNNING) == 0)
2355 return;
2356
2357 /*
2358 * Promiscuous mode is handled separately.
2359 */
2360 if ((flags & IFF_PROMISC) != 0) {
2361 /*
2362 * Program 86960 to receive all packets on the segment
2363 * including those directed to other stations.
2364 * Multicast filter stored in MARs are ignored
2365 * under this setting, so we don't need to update it.
2366 *
2367 * Promiscuous mode is used solely by BPF, and BPF only
2368 * listens to valid (no error) packets. So, we ignore
2369 * errornous ones even in this mode.
2370 */
2371 outb(sc->sc_iobase + FE_DLCR5,
2372 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2373 sc->filter_change = 0;
2374
2375 #if FE_DEBUG >= 3
2376 log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname);
2377 #endif
2378 return;
2379 }
2380
2381 /*
2382 * Turn the chip to the normal (non-promiscuous) mode.
2383 */
2384 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2385
2386 /*
2387 * Find the new multicast filter value.
2388 */
2389 fe_getmcaf(&sc->sc_arpcom, sc->filter);
2390 sc->filter_change = 1;
2391
2392 #if FE_DEBUG >= 3
2393 log(LOG_INFO,
2394 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
2395 sc->sc_dev.dv_xname,
2396 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
2397 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
2398 #endif
2399
2400 /*
2401 * We have to update the multicast filter in the 86960, A.S.A.P.
2402 *
2403 * Note that the DLC (Data Linc Control unit, i.e. transmitter
2404 * and receiver) must be stopped when feeding the filter, and
2405 * DLC trushes all packets in both transmission and receive
2406 * buffers when stopped.
2407 *
2408 * ... Are the above sentenses correct? I have to check the
2409 * manual of the MB86960A. FIXME.
2410 *
2411 * To reduce the packet lossage, we delay the filter update
2412 * process until buffers are empty.
2413 */
2414 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2415 (inb(sc->sc_iobase + FE_DLCR1) & FE_D1_PKTRDY) == 0) {
2416 /*
2417 * Buffers are (apparently) empty. Load
2418 * the new filter value into MARs now.
2419 */
2420 fe_loadmar(sc);
2421 } else {
2422 /*
2423 * Buffers are not empty. Mark that we have to update
2424 * the MARs. The new filter will be loaded by feintr()
2425 * later.
2426 */
2427 #if FE_DEBUG >= 4
2428 log(LOG_INFO, "%s: filter change delayed\n", sc->sc_dev.dv_xname);
2429 #endif
2430 }
2431 }
2432
2433 /*
2434 * Load a new multicast address filter into MARs.
2435 *
2436 * The caller must have splnet'ed befor fe_loadmar.
2437 * This function starts the DLC upon return. So it can be called only
2438 * when the chip is working, i.e., from the driver's point of view, when
2439 * a device is RUNNING. (I mistook the point in previous versions.)
2440 */
2441 void
2442 fe_loadmar(sc)
2443 struct fe_softc *sc;
2444 {
2445
2446 /* Stop the DLC (transmitter and receiver). */
2447 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2448
2449 /* Select register bank 1 for MARs. */
2450 outb(sc->sc_iobase + FE_DLCR7,
2451 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2452
2453 /* Copy filter value into the registers. */
2454 outblk(sc->sc_iobase + FE_MAR8, sc->filter, FE_FILTER_LEN);
2455
2456 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2457 outb(sc->sc_iobase + FE_DLCR7,
2458 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2459
2460 /* Restart the DLC. */
2461 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2462
2463 /* We have just updated the filter. */
2464 sc->filter_change = 0;
2465
2466 #if FE_DEBUG >= 3
2467 log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname);
2468 #endif
2469 }
2470
2471 #if FE_DEBUG >= 1
2472 void
2473 fe_dump(level, sc)
2474 int level;
2475 struct fe_softc *sc;
2476 {
2477 int iobase = sc->sc_iobase;
2478 u_char save_dlcr7;
2479
2480 save_dlcr7 = inb(iobase + FE_DLCR7);
2481
2482 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x",
2483 inb(iobase + FE_DLCR0), inb(iobase + FE_DLCR1),
2484 inb(iobase + FE_DLCR2), inb(iobase + FE_DLCR3),
2485 inb(iobase + FE_DLCR4), inb(iobase + FE_DLCR5),
2486 inb(iobase + FE_DLCR6), inb(iobase + FE_DLCR7));
2487
2488 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
2489 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x,",
2490 inb(iobase + FE_DLCR8), inb(iobase + FE_DLCR9),
2491 inb(iobase + FE_DLCR10), inb(iobase + FE_DLCR11),
2492 inb(iobase + FE_DLCR12), inb(iobase + FE_DLCR13),
2493 inb(iobase + FE_DLCR14), inb(iobase + FE_DLCR15));
2494
2495 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
2496 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x,",
2497 inb(iobase + FE_MAR8), inb(iobase + FE_MAR9),
2498 inb(iobase + FE_MAR10), inb(iobase + FE_MAR11),
2499 inb(iobase + FE_MAR12), inb(iobase + FE_MAR13),
2500 inb(iobase + FE_MAR14), inb(iobase + FE_MAR15));
2501
2502 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
2503 log(level, "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x.",
2504 inb(iobase + FE_BMPR10), inb(iobase + FE_BMPR11),
2505 inb(iobase + FE_BMPR12), inb(iobase + FE_BMPR13),
2506 inb(iobase + FE_BMPR14), inb(iobase + FE_BMPR15),
2507 inb(iobase + FE_BMPR16), inb(iobase + FE_BMPR17),
2508 inb(iobase + FE_BMPR19));
2509
2510 outb(iobase + FE_DLCR7, save_dlcr7);
2511 }
2512 #endif
2513