if_ate.c revision 1.16.4.1 1 /*
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
9 *
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
20 * SUCH DAMAGE.
21 */
22
23 /*
24 * Portions copyright (C) 1993, David Greenman. This software may be used,
25 * modified, copied, distributed, and sold, in both source and binary form
26 * provided that the above copyright and these terms are retained. Under no
27 * circumstances is the author responsible for the proper functioning of this
28 * software, nor does the author assume any responsibility for damages
29 * incurred with its use.
30 */
31
32 #define FE_VERSION "if_fe.c ver. 0.8"
33
34 /*
35 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
36 * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp>
37 *
38 * This version is intended to be a generic template for various
39 * MB86960A/MB86965A based Ethernet cards. It currently supports
40 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
41 * Telesis AT1700 series and RE2000 series. There are some
42 * unnecessary hooks embedded, which are primarily intended to support
43 * other types of Ethernet cards, but the author is not sure whether
44 * they are useful.
45 */
46
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/errno.h>
52 #include <sys/ioctl.h>
53 #include <sys/mbuf.h>
54 #include <sys/socket.h>
55 #include <sys/syslog.h>
56 #include <sys/device.h>
57
58 #include <net/if.h>
59 #include <net/if_dl.h>
60 #include <net/if_types.h>
61 #include <net/netisr.h>
62
63 #include <net/if_ether.h>
64
65 #ifdef INET
66 #include <netinet/in.h>
67 #include <netinet/in_systm.h>
68 #include <netinet/in_var.h>
69 #include <netinet/ip.h>
70 #include <netinet/if_ether.h>
71 #endif
72
73 #ifdef NS
74 #include <netns/ns.h>
75 #include <netns/ns_if.h>
76 #endif
77
78 #if NBPFILTER > 0
79 #include <net/bpf.h>
80 #include <net/bpfdesc.h>
81 #endif
82
83 #include <machine/cpu.h>
84 #include <machine/intr.h>
85 #include <machine/pio.h>
86
87 #include <dev/isa/isareg.h>
88 #include <dev/isa/isavar.h>
89 #include <dev/ic/mb86960reg.h>
90 #include <dev/isa/if_fereg.h>
91
92 /*
93 * Default settings for fe driver specific options.
94 * They can be set in config file by "options" statements.
95 */
96
97 /*
98 * Debug control.
99 * 0: No debug at all. All debug specific codes are stripped off.
100 * 1: Silent. No debug messages are logged except emergent ones.
101 * 2: Brief. Lair events and/or important information are logged.
102 * 3: Detailed. Logs all information which *may* be useful for debugging.
103 * 4: Trace. All actions in the driver is logged. Super verbose.
104 */
105 #ifndef FE_DEBUG
106 #define FE_DEBUG 1
107 #endif
108
109 /*
110 * Delay padding of short transmission packets to minimum Ethernet size.
111 * This may or may not gain performance. An EXPERIMENTAL option.
112 */
113 #ifndef FE_DELAYED_PADDING
114 #define FE_DELAYED_PADDING 0
115 #endif
116
117 /*
118 * Transmit just one packet per a "send" command to 86960.
119 * This option is intended for performance test. An EXPERIMENTAL option.
120 */
121 #ifndef FE_SINGLE_TRANSMISSION
122 #define FE_SINGLE_TRANSMISSION 0
123 #endif
124
125 /*
126 * Device configuration flags.
127 */
128
129 /* DLCR6 settings. */
130 #define FE_FLAGS_DLCR6_VALUE 0x007F
131
132 /* Force DLCR6 override. */
133 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
134
135 /* A cludge for PCMCIA support. */
136 #define FE_FLAGS_PCMCIA 0x8000
137
138 /* Identification of the driver version. */
139 static char const fe_version[] = FE_VERSION " / " FE_REG_VERSION;
140
141 /*
142 * Supported hardware (Ethernet card) types
143 * This information is currently used only for debugging
144 */
145 enum fe_type {
146 /* For cards which are successfully probed but not identified. */
147 FE_TYPE_UNKNOWN,
148
149 /* Fujitsu FMV-180 series. */
150 FE_TYPE_FMV181,
151 FE_TYPE_FMV182,
152
153 /* Allied-Telesis AT1700 series and RE2000 series. */
154 FE_TYPE_AT1700T,
155 FE_TYPE_AT1700BT,
156 FE_TYPE_AT1700FT,
157 FE_TYPE_AT1700AT,
158 FE_TYPE_RE2000,
159
160 /* PCMCIA by Fujitsu. */
161 FE_TYPE_MBH10302,
162 FE_TYPE_MBH10304,
163 };
164
165 /*
166 * fe_softc: per line info and status
167 */
168 struct fe_softc {
169 struct device sc_dev;
170 void *sc_ih;
171
172 struct ethercom sc_ethercom; /* ethernet common */
173
174 /* Set by probe() and not modified in later phases. */
175 enum fe_type type; /* interface type code */
176 char *typestr; /* printable name of the interface. */
177 int sc_iobase; /* MB86960A I/O base address */
178
179 u_char proto_dlcr4; /* DLCR4 prototype. */
180 u_char proto_dlcr5; /* DLCR5 prototype. */
181 u_char proto_dlcr6; /* DLCR6 prototype. */
182 u_char proto_dlcr7; /* DLCR7 prototype. */
183 u_char proto_bmpr13; /* BMPR13 prototype. */
184
185 /* Vendor specific hooks. */
186 void (*init) __P((struct fe_softc *)); /* Just before fe_init(). */
187 void (*stop) __P((struct fe_softc *)); /* Just after fe_stop(). */
188
189 /* Transmission buffer management. */
190 u_short txb_size; /* total bytes in TX buffer */
191 u_short txb_free; /* free bytes in TX buffer */
192 u_char txb_count; /* number of packets in TX buffer */
193 u_char txb_sched; /* number of scheduled packets */
194 u_char txb_padding; /* number of delayed padding bytes */
195
196 /* Multicast address filter management. */
197 u_char filter_change; /* MARs must be changed ASAP. */
198 u_char filter[FE_FILTER_LEN]; /* new filter value. */
199
200 u_int8_t sc_enaddr[ETHER_ADDR_LEN];
201 };
202
203 /* Standard driver entry points. These can be static. */
204 int feprobe __P((struct device *, void *, void *));
205 void feattach __P((struct device *, struct device *, void *));
206 int feintr __P((void *));
207 void fe_init __P((struct fe_softc *));
208 int fe_ioctl __P((struct ifnet *, u_long, caddr_t));
209 void fe_start __P((struct ifnet *));
210 void fe_reset __P((struct fe_softc *));
211 void fe_watchdog __P((struct ifnet *));
212
213 /* Local functions. Order of declaration is confused. FIXME. */
214 int fe_probe_fmv __P((struct fe_softc *, struct isa_attach_args *));
215 int fe_probe_ati __P((struct fe_softc *, struct isa_attach_args *));
216 int fe_probe_mbh __P((struct fe_softc *, struct isa_attach_args *));
217 void fe_read_eeprom __P((struct fe_softc *, u_char *));
218 void fe_init_mbh __P((struct fe_softc *));
219 int fe_get_packet __P((struct fe_softc *, int));
220 void fe_stop __P((struct fe_softc *));
221 void fe_tint __P((struct fe_softc *, u_char));
222 void fe_rint __P((struct fe_softc *, u_char));
223 static inline
224 void fe_xmit __P((struct fe_softc *));
225 void fe_write_mbufs __P((struct fe_softc *, struct mbuf *));
226 static inline
227 void fe_droppacket __P((struct fe_softc *));
228 void fe_getmcaf __P((struct ethercom *, u_char *));
229 void fe_setmode __P((struct fe_softc *));
230 void fe_loadmar __P((struct fe_softc *));
231 #if FE_DEBUG >= 1
232 void fe_dump __P((int, struct fe_softc *));
233 #endif
234
235 struct cfattach fe_ca = {
236 sizeof(struct fe_softc), feprobe, feattach
237 };
238
239 struct cfdriver fe_cd = {
240 NULL, "fe", DV_IFNET
241 };
242
243 /* Ethernet constants. To be defined in if_ehter.h? FIXME. */
244 #define ETHER_MIN_LEN 60 /* with header, without CRC. */
245 #define ETHER_MAX_LEN 1514 /* with header, without CRC. */
246 #define ETHER_ADDR_LEN 6 /* number of bytes in an address. */
247 #define ETHER_HDR_SIZE 14 /* src addr, dst addr, and data type. */
248
249 /*
250 * Fe driver specific constants which relate to 86960/86965.
251 */
252
253 /* Interrupt masks. */
254 #define FE_TMASK (FE_D2_COLL16 | FE_D2_TXDONE)
255 #define FE_RMASK (FE_D3_OVRFLO | FE_D3_CRCERR | \
256 FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY)
257
258 /* Maximum number of iterrations for a receive interrupt. */
259 #define FE_MAX_RECV_COUNT ((65536 - 2048 * 2) / 64)
260 /* Maximum size of SRAM is 65536,
261 * minimum size of transmission buffer in fe is 2x2KB,
262 * and minimum amount of received packet including headers
263 * added by the chip is 64 bytes.
264 * Hence FE_MAX_RECV_COUNT is the upper limit for number
265 * of packets in the receive buffer. */
266
267 /*
268 * Convenient routines to access contiguous I/O ports.
269 */
270
271 static inline void
272 inblk (int addr, u_char * mem, int len)
273 {
274 while (--len >= 0) {
275 *mem++ = inb(addr++);
276 }
277 }
278
279 static inline void
280 outblk (int addr, u_char const * mem, int len)
281 {
282 while (--len >= 0) {
283 outb(addr++, *mem++);
284 }
285 }
286
287 /*
288 * Hardware probe routines.
289 */
290
291 /*
292 * Determine if the device is present.
293 */
294 int
295 feprobe(parent, match, aux)
296 struct device *parent;
297 void *match, *aux;
298 {
299 struct fe_softc *sc = match;
300 struct isa_attach_args *ia = aux;
301
302 #if FE_DEBUG >= 2
303 log(LOG_INFO, "%s: %s\n", sc->sc_dev.dv_xname, fe_version);
304 #endif
305
306 /* Probe an address. */
307 sc->sc_iobase = ia->ia_iobase;
308
309 if (fe_probe_fmv(sc, ia))
310 return (1);
311 if (fe_probe_ati(sc, ia))
312 return (1);
313 if (fe_probe_mbh(sc, ia))
314 return (1);
315 return (0);
316 }
317
318 /*
319 * Check for specific bits in specific registers have specific values.
320 */
321 struct fe_simple_probe_struct {
322 u_char port; /* Offset from the base I/O address. */
323 u_char mask; /* Bits to be checked. */
324 u_char bits; /* Values to be compared against. */
325 };
326
327 static inline int
328 fe_simple_probe (int addr, struct fe_simple_probe_struct const * sp)
329 {
330 struct fe_simple_probe_struct const * p;
331
332 for (p = sp; p->mask != 0; p++) {
333 if ((inb(addr + p->port) & p->mask) != p->bits) {
334 return (0);
335 }
336 }
337 return (1);
338 }
339
340 /*
341 * Routines to read all bytes from the config EEPROM through MB86965A.
342 * I'm not sure what exactly I'm doing here... I was told just to follow
343 * the steps, and it worked. Could someone tell me why the following
344 * code works? (Or, why all similar codes I tried previously doesn't
345 * work.) FIXME.
346 */
347
348 static inline void
349 strobe (int bmpr16)
350 {
351 /*
352 * Output same value twice. To speed-down execution?
353 */
354 outb(bmpr16, FE_B16_SELECT);
355 outb(bmpr16, FE_B16_SELECT);
356 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
357 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
358 outb(bmpr16, FE_B16_SELECT);
359 outb(bmpr16, FE_B16_SELECT);
360 }
361
362 void
363 fe_read_eeprom(sc, data)
364 struct fe_softc *sc;
365 u_char *data;
366 {
367 int iobase = sc->sc_iobase;
368 int bmpr16 = iobase + FE_BMPR16;
369 int bmpr17 = iobase + FE_BMPR17;
370 u_char n, val, bit;
371
372 /* Read bytes from EEPROM; two bytes per an iterration. */
373 for (n = 0; n < FE_EEPROM_SIZE / 2; n++) {
374 /* Reset the EEPROM interface. */
375 outb(bmpr16, 0x00);
376 outb(bmpr17, 0x00);
377 outb(bmpr16, FE_B16_SELECT);
378
379 /* Start EEPROM access. */
380 outb(bmpr17, FE_B17_DATA);
381 strobe(bmpr16);
382
383 /* Pass the iterration count to the chip. */
384 val = 0x80 | n;
385 for (bit = 0x80; bit != 0x00; bit >>= 1) {
386 outb(bmpr17, (val & bit) ? FE_B17_DATA : 0);
387 strobe(bmpr16);
388 }
389 outb(bmpr17, 0x00);
390
391 /* Read a byte. */
392 val = 0;
393 for (bit = 0x80; bit != 0x00; bit >>= 1) {
394 strobe(bmpr16);
395 if (inb(bmpr17) & FE_B17_DATA)
396 val |= bit;
397 }
398 *data++ = val;
399
400 /* Read one more byte. */
401 val = 0;
402 for (bit = 0x80; bit != 0x00; bit >>= 1) {
403 strobe(bmpr16);
404 if (inb(bmpr17) & FE_B17_DATA)
405 val |= bit;
406 }
407 *data++ = val;
408 }
409
410 #if FE_DEBUG >= 3
411 /* Report what we got. */
412 data -= FE_EEPROM_SIZE;
413 log(LOG_INFO, "%s: EEPROM at %04x:"
414 " %02x%02x%02x%02x %02x%02x%02x%02x -"
415 " %02x%02x%02x%02x %02x%02x%02x%02x -"
416 " %02x%02x%02x%02x %02x%02x%02x%02x -"
417 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
418 sc->sc_dev.dv_xname, iobase,
419 data[ 0], data[ 1], data[ 2], data[ 3],
420 data[ 4], data[ 5], data[ 6], data[ 7],
421 data[ 8], data[ 9], data[10], data[11],
422 data[12], data[13], data[14], data[15],
423 data[16], data[17], data[18], data[19],
424 data[20], data[21], data[22], data[23],
425 data[24], data[25], data[26], data[27],
426 data[28], data[29], data[30], data[31]);
427 #endif
428 }
429
430 /*
431 * Hardware (vendor) specific probe routines.
432 */
433
434 /*
435 * Probe and initialization for Fujitsu FMV-180 series boards
436 */
437 int
438 fe_probe_fmv(sc, ia)
439 struct fe_softc *sc;
440 struct isa_attach_args *ia;
441 {
442 int i, n;
443 int iobase = sc->sc_iobase;
444 int irq;
445
446 static int const iomap[8] =
447 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 };
448 static int const irqmap[4] =
449 { 3, 7, 10, 15 };
450
451 static struct fe_simple_probe_struct const probe_table[] = {
452 { FE_DLCR2, 0x70, 0x00 },
453 { FE_DLCR4, 0x08, 0x00 },
454 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
455
456 { FE_FMV0, FE_FMV0_MAGIC_MASK, FE_FMV0_MAGIC_VALUE },
457 { FE_FMV1, FE_FMV1_CARDID_MASK, FE_FMV1_CARDID_ID },
458 { FE_FMV3, FE_FMV3_EXTRA_MASK, FE_FMV3_EXTRA_VALUE },
459 #if 1
460 /*
461 * Test *vendor* part of the station address for Fujitsu.
462 * The test will gain reliability of probe process, but
463 * it rejects FMV-180 clone boards manufactured by other vendors.
464 * We have to turn the test off when such cards are made available.
465 */
466 { FE_FMV4, 0xFF, 0x00 },
467 { FE_FMV5, 0xFF, 0x00 },
468 { FE_FMV6, 0xFF, 0x0E },
469 #else
470 /*
471 * We can always verify the *first* 2 bits (in Ehternet
472 * bit order) are "no multicast" and "no local" even for
473 * unknown vendors.
474 */
475 { FE_FMV4, 0x03, 0x00 },
476 #endif
477 { 0 }
478 };
479
480 #if 0
481 /*
482 * Dont probe at all if the config says we are PCMCIA...
483 */
484 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
485 return (0);
486 #endif
487
488 /*
489 * See if the sepcified address is possible for FMV-180 series.
490 */
491 for (i = 0; i < 8; i++) {
492 if (iomap[i] == iobase)
493 break;
494 }
495 if (i == 8)
496 return (0);
497
498 /* Simple probe. */
499 if (!fe_simple_probe(iobase, probe_table))
500 return (0);
501
502 /* Check if our I/O address matches config info on EEPROM. */
503 n = (inb(iobase + FE_FMV2) & FE_FMV2_ADDR) >> FE_FMV2_ADDR_SHIFT;
504 if (iomap[n] != iobase)
505 return (0);
506
507 /* Determine the card type. */
508 switch (inb(iobase + FE_FMV0) & FE_FMV0_MODEL) {
509 case FE_FMV0_MODEL_FMV181:
510 sc->type = FE_TYPE_FMV181;
511 sc->typestr = "FMV-181";
512 break;
513 case FE_FMV0_MODEL_FMV182:
514 sc->type = FE_TYPE_FMV182;
515 sc->typestr = "FMV-182";
516 break;
517 default:
518 /* Unknown card type: maybe a new model, but... */
519 return (0);
520 }
521
522 /*
523 * An FMV-180 has successfully been proved.
524 * Determine which IRQ to be used.
525 *
526 * In this version, we always get an IRQ assignment from the
527 * FMV-180's configuration EEPROM, ignoring that specified in
528 * config file.
529 */
530 n = (inb(iobase + FE_FMV2) & FE_FMV2_IRQ) >> FE_FMV2_IRQ_SHIFT;
531 irq = irqmap[n];
532
533 if (ia->ia_irq != IRQUNK) {
534 if (ia->ia_irq != irq) {
535 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
536 sc->sc_dev.dv_xname, ia->ia_irq, irq);
537 return (0);
538 }
539 } else
540 ia->ia_irq = irq;
541
542 /*
543 * Initialize constants in the per-line structure.
544 */
545
546 /* Get our station address from EEPROM. */
547 inblk(iobase + FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
548
549 /* Make sure we got a valid station address. */
550 if ((sc->sc_enaddr[0] & 0x03) != 0x00
551 || (sc->sc_enaddr[0] == 0x00
552 && sc->sc_enaddr[1] == 0x00
553 && sc->sc_enaddr[2] == 0x00))
554 return (0);
555
556 /* Register values which depend on board design. */
557 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
558 sc->proto_dlcr5 = 0;
559 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
560 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
561
562 /*
563 * Program the 86960 as follows:
564 * SRAM: 32KB, 100ns, byte-wide access.
565 * Transmission buffer: 4KB x 2.
566 * System bus interface: 16 bits.
567 * We cannot change these values but TXBSIZE, because they
568 * are hard-wired on the board. Modifying TXBSIZE will affect
569 * the driver performance.
570 */
571 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
572 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
573
574 /*
575 * Minimum initialization of the hardware.
576 * We write into registers; hope I/O ports have no
577 * overlap with other boards.
578 */
579
580 /* Initialize ASIC. */
581 outb(iobase + FE_FMV3, 0);
582 outb(iobase + FE_FMV10, 0);
583
584 /* Wait for a while. I'm not sure this is necessary. FIXME. */
585 delay(200);
586
587 /* Initialize 86960. */
588 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
589 delay(200);
590
591 /* Disable all interrupts. */
592 outb(iobase + FE_DLCR2, 0);
593 outb(iobase + FE_DLCR3, 0);
594
595 /* Turn the "master interrupt control" flag of ASIC on. */
596 outb(iobase + FE_FMV3, FE_FMV3_ENABLE_FLAG);
597
598 /*
599 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
600 */
601 ia->ia_iosize = 32;
602 ia->ia_msize = 0;
603 return (1);
604 }
605
606 /*
607 * Probe and initialization for Allied-Telesis AT1700/RE2000 series.
608 */
609 int
610 fe_probe_ati(sc, ia)
611 struct fe_softc *sc;
612 struct isa_attach_args *ia;
613 {
614 int i, n;
615 int iobase = sc->sc_iobase;
616 u_char eeprom[FE_EEPROM_SIZE];
617 u_char save16, save17;
618 int irq;
619
620 static int const iomap[8] =
621 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
622 static int const irqmap[4][4] = {
623 { 3, 4, 5, 9 },
624 { 10, 11, 12, 15 },
625 { 3, 11, 5, 15 },
626 { 10, 11, 14, 15 },
627 };
628 static struct fe_simple_probe_struct const probe_table[] = {
629 { FE_DLCR2, 0x70, 0x00 },
630 { FE_DLCR4, 0x08, 0x00 },
631 { FE_DLCR5, 0x80, 0x00 },
632 #if 0
633 { FE_BMPR16, 0x1B, 0x00 },
634 { FE_BMPR17, 0x7F, 0x00 },
635 #endif
636 { 0 }
637 };
638
639 #if 0
640 /*
641 * Don't probe at all if the config says we are PCMCIA...
642 */
643 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
644 return (0);
645 #endif
646
647 #if FE_DEBUG >= 4
648 log(LOG_INFO, "%s: probe (0x%x) for ATI\n", sc->sc_dev.dv_xname, iobase);
649 fe_dump(LOG_INFO, sc);
650 #endif
651
652 /*
653 * See if the sepcified address is possible for MB86965A JLI mode.
654 */
655 for (i = 0; i < 8; i++) {
656 if (iomap[i] == iobase)
657 break;
658 }
659 if (i == 8)
660 return (0);
661
662 /*
663 * We should test if MB86965A is on the base address now.
664 * Unfortunately, it is very hard to probe it reliably, since
665 * we have no way to reset the chip under software control.
666 * On cold boot, we could check the "signature" bit patterns
667 * described in the Fujitsu document. On warm boot, however,
668 * we can predict almost nothing about register values.
669 */
670 if (!fe_simple_probe(iobase, probe_table))
671 return (0);
672
673 /* Save old values of the registers. */
674 save16 = inb(iobase + FE_BMPR16);
675 save17 = inb(iobase + FE_BMPR17);
676
677 /* Check if our I/O address matches config info on 86965. */
678 n = (inb(iobase + FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
679 if (iomap[n] != iobase)
680 goto fail;
681
682 /*
683 * We are now almost sure we have an AT1700 at the given
684 * address. So, read EEPROM through 86965. We have to write
685 * into LSI registers to read from EEPROM. I want to avoid it
686 * at this stage, but I cannot test the presense of the chip
687 * any further without reading EEPROM. FIXME.
688 */
689 fe_read_eeprom(sc, eeprom);
690
691 /* Make sure the EEPROM is turned off. */
692 outb(iobase + FE_BMPR16, 0);
693 outb(iobase + FE_BMPR17, 0);
694
695 /* Make sure that config info in EEPROM and 86965 agree. */
696 if (eeprom[FE_EEPROM_CONF] != inb(iobase + FE_BMPR19))
697 goto fail;
698
699 /*
700 * Determine the card type.
701 */
702 switch (eeprom[FE_ATI_EEP_MODEL]) {
703 case FE_ATI_MODEL_AT1700T:
704 sc->type = FE_TYPE_AT1700T;
705 sc->typestr = "AT-1700T";
706 break;
707 case FE_ATI_MODEL_AT1700BT:
708 sc->type = FE_TYPE_AT1700BT;
709 sc->typestr = "AT-1700BT";
710 break;
711 case FE_ATI_MODEL_AT1700FT:
712 sc->type = FE_TYPE_AT1700FT;
713 sc->typestr = "AT-1700FT";
714 break;
715 case FE_ATI_MODEL_AT1700AT:
716 sc->type = FE_TYPE_AT1700AT;
717 sc->typestr = "AT-1700AT";
718 break;
719 default:
720 sc->type = FE_TYPE_RE2000;
721 sc->typestr = "unknown (RE-2000?)";
722 break;
723 }
724
725 /*
726 * Try to determine IRQ settings.
727 * Different models use different ranges of IRQs.
728 */
729 n = (inb(iobase + FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
730 switch (eeprom[FE_ATI_EEP_REVISION] & 0xf0) {
731 case 0x30:
732 irq = irqmap[3][n];
733 break;
734 case 0x10:
735 case 0x50:
736 irq = irqmap[2][n];
737 break;
738 case 0x40:
739 case 0x60:
740 if (eeprom[FE_ATI_EEP_MAGIC] & 0x04) {
741 irq = irqmap[1][n];
742 break;
743 }
744 default:
745 irq = irqmap[0][n];
746 break;
747 }
748
749 if (ia->ia_irq != IRQUNK) {
750 if (ia->ia_irq != irq) {
751 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
752 sc->sc_dev.dv_xname, ia->ia_irq, irq);
753 return (0);
754 }
755 } else
756 ia->ia_irq = irq;
757
758 /*
759 * Initialize constants in the per-line structure.
760 */
761
762 /* Get our station address from EEPROM. */
763 bcopy(eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
764
765 /* Make sure we got a valid station address. */
766 if ((sc->sc_enaddr[0] & 0x03) != 0x00
767 || (sc->sc_enaddr[0] == 0x00
768 && sc->sc_enaddr[1] == 0x00
769 && sc->sc_enaddr[2] == 0x00))
770 goto fail;
771
772 /* Should find all register prototypes here. FIXME. */
773 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */
774 sc->proto_dlcr5 = 0;
775 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
776 #if 0 /* XXXX Should we use this? */
777 sc->proto_bmpr13 = eeprom[FE_ATI_EEP_MEDIA];
778 #else
779 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
780 #endif
781
782 /*
783 * Program the 86965 as follows:
784 * SRAM: 32KB, 100ns, byte-wide access.
785 * Transmission buffer: 4KB x 2.
786 * System bus interface: 16 bits.
787 * We cannot change these values but TXBSIZE, because they
788 * are hard-wired on the board. Modifying TXBSIZE will affect
789 * the driver performance.
790 */
791 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
792 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
793
794 #if FE_DEBUG >= 3
795 log(LOG_INFO, "%s: ATI found\n", sc->sc_dev.dv_xname);
796 fe_dump(LOG_INFO, sc);
797 #endif
798
799 /* Initialize 86965. */
800 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
801 delay(200);
802
803 /* Disable all interrupts. */
804 outb(iobase + FE_DLCR2, 0);
805 outb(iobase + FE_DLCR3, 0);
806
807 #if FE_DEBUG >= 3
808 log(LOG_INFO, "%s: end of fe_probe_ati()\n", sc->sc_dev.dv_xname);
809 fe_dump(LOG_INFO, sc);
810 #endif
811
812 /*
813 * That's all. AT1700 occupies 32 I/O addresses, by the way.
814 */
815 ia->ia_iosize = 32;
816 ia->ia_msize = 0;
817 return (1);
818
819 fail:
820 /* Restore register values, in the case we had no 86965. */
821 outb(iobase + FE_BMPR16, save16);
822 outb(iobase + FE_BMPR17, save17);
823 return (0);
824 }
825
826 /*
827 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
828 */
829 int
830 fe_probe_mbh(sc, ia)
831 struct fe_softc *sc;
832 struct isa_attach_args *ia;
833 {
834 int iobase = sc->sc_iobase;
835
836 static struct fe_simple_probe_struct probe_table[] = {
837 { FE_DLCR2, 0x70, 0x00 },
838 { FE_DLCR4, 0x08, 0x00 },
839 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
840 #if 0
841 /*
842 * Test *vendor* part of the address for Fujitsu.
843 * The test will gain reliability of probe process, but
844 * it rejects clones by other vendors, or OEM product
845 * supplied by resalers other than Fujitsu.
846 */
847 { FE_MBH10, 0xFF, 0x00 },
848 { FE_MBH11, 0xFF, 0x00 },
849 { FE_MBH12, 0xFF, 0x0E },
850 #else
851 /*
852 * We can always verify the *first* 2 bits (in Ehternet
853 * bit order) are "global" and "unicast" even for
854 * unknown vendors.
855 */
856 { FE_MBH10, 0x03, 0x00 },
857 #endif
858 /* Just a gap? Seems reliable, anyway. */
859 { 0x12, 0xFF, 0x00 },
860 { 0x13, 0xFF, 0x00 },
861 { 0x14, 0xFF, 0x00 },
862 { 0x15, 0xFF, 0x00 },
863 { 0x16, 0xFF, 0x00 },
864 { 0x17, 0xFF, 0x00 },
865 { 0x18, 0xFF, 0xFF },
866 { 0x19, 0xFF, 0xFF },
867
868 { 0 }
869 };
870
871 #if 0
872 /*
873 * We need a PCMCIA flag.
874 */
875 if ((cf->cf_flags & FE_FLAGS_PCMCIA) == 0)
876 return (0);
877 #endif
878
879 /*
880 * We need explicit IRQ and supported address.
881 */
882 if (ia->ia_irq == IRQUNK || (iobase & ~0x3E0) != 0)
883 return (0);
884
885 #if FE_DEBUG >= 3
886 log(LOG_INFO, "%s: top of fe_probe_mbh()\n", sc->sc_dev.dv_xname);
887 fe_dump(LOG_INFO, sc);
888 #endif
889
890 /*
891 * See if MBH10302 is on its address.
892 * I'm not sure the following probe code works. FIXME.
893 */
894 if (!fe_simple_probe(iobase, probe_table))
895 return (0);
896
897 /* Determine the card type. */
898 sc->type = FE_TYPE_MBH10302;
899 sc->typestr = "MBH10302 (PCMCIA)";
900
901 /*
902 * Initialize constants in the per-line structure.
903 */
904
905 /* Get our station address from EEPROM. */
906 inblk(iobase + FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN);
907
908 /* Make sure we got a valid station address. */
909 if ((sc->sc_enaddr[0] & 0x03) != 0x00
910 || (sc->sc_enaddr[0] == 0x00
911 && sc->sc_enaddr[1] == 0x00
912 && sc->sc_enaddr[2] == 0x00))
913 return (0);
914
915 /* Should find all register prototypes here. FIXME. */
916 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
917 sc->proto_dlcr5 = 0;
918 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
919 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
920
921 /*
922 * Program the 86960 as follows:
923 * SRAM: 32KB, 100ns, byte-wide access.
924 * Transmission buffer: 4KB x 2.
925 * System bus interface: 16 bits.
926 * We cannot change these values but TXBSIZE, because they
927 * are hard-wired on the board. Modifying TXBSIZE will affect
928 * the driver performance.
929 */
930 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
931 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
932
933 /* Setup hooks. We need a special initialization procedure. */
934 sc->init = fe_init_mbh;
935
936 /*
937 * Minimum initialization.
938 */
939
940 /* Wait for a while. I'm not sure this is necessary. FIXME. */
941 delay(200);
942
943 /* Minimul initialization of 86960. */
944 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
945 delay(200);
946
947 /* Disable all interrupts. */
948 outb(iobase + FE_DLCR2, 0);
949 outb(iobase + FE_DLCR3, 0);
950
951 #if 1 /* FIXME. */
952 /* Initialize system bus interface and encoder/decoder operation. */
953 outb(iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE);
954 #endif
955
956 /*
957 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
958 */
959 ia->ia_iosize = 32;
960 ia->ia_msize = 0;
961 return (1);
962 }
963
964 /* MBH specific initialization routine. */
965 void
966 fe_init_mbh(sc)
967 struct fe_softc *sc;
968 {
969
970 /* Probably required after hot-insertion... */
971
972 /* Wait for a while. I'm not sure this is necessary. FIXME. */
973 delay(200);
974
975 /* Minimul initialization of 86960. */
976 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
977 delay(200);
978
979 /* Disable all interrupts. */
980 outb(sc->sc_iobase + FE_DLCR2, 0);
981 outb(sc->sc_iobase + FE_DLCR3, 0);
982
983 /* Enable master interrupt flag. */
984 outb(sc->sc_iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE);
985 }
986
987 /*
988 * Install interface into kernel networking data structures
989 */
990 void
991 feattach(parent, self, aux)
992 struct device *parent, *self;
993 void *aux;
994 {
995 struct fe_softc *sc = (void *)self;
996 struct isa_attach_args *ia = aux;
997 struct cfdata *cf = sc->sc_dev.dv_cfdata;
998 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
999
1000 /* Stop the 86960. */
1001 fe_stop(sc);
1002
1003 /* Initialize ifnet structure. */
1004 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
1005 ifp->if_softc = sc;
1006 ifp->if_start = fe_start;
1007 ifp->if_ioctl = fe_ioctl;
1008 ifp->if_watchdog = fe_watchdog;
1009 ifp->if_flags =
1010 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
1011
1012 /*
1013 * Set maximum size of output queue, if it has not been set.
1014 * It is done here as this driver may be started after the
1015 * system intialization (i.e., the interface is PCMCIA.)
1016 *
1017 * I'm not sure this is really necessary, but, even if it is,
1018 * it should be done somewhere else, e.g., in if_attach(),
1019 * since it must be a common workaround for all network drivers.
1020 * FIXME.
1021 */
1022 if (ifp->if_snd.ifq_maxlen == 0) {
1023 extern int ifqmaxlen; /* Don't be so shocked... */
1024 ifp->if_snd.ifq_maxlen = ifqmaxlen;
1025 }
1026
1027 #if FE_DEBUG >= 3
1028 log(LOG_INFO, "%s: feattach()\n", sc->sc_dev.dv_xname);
1029 fe_dump(LOG_INFO, sc);
1030 #endif
1031
1032 #if FE_SINGLE_TRANSMISSION
1033 /* Override txb config to allocate minimum. */
1034 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
1035 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1036 #endif
1037
1038 /* Modify hardware config if it is requested. */
1039 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
1040 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
1041
1042 /* Find TX buffer size, based on the hardware dependent proto. */
1043 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1044 case FE_D6_TXBSIZ_2x2KB:
1045 sc->txb_size = 2048;
1046 break;
1047 case FE_D6_TXBSIZ_2x4KB:
1048 sc->txb_size = 4096;
1049 break;
1050 case FE_D6_TXBSIZ_2x8KB:
1051 sc->txb_size = 8192;
1052 break;
1053 default:
1054 /* Oops, we can't work with single buffer configuration. */
1055 #if FE_DEBUG >= 2
1056 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
1057 sc->sc_dev.dv_xname);
1058 #endif
1059 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
1060 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1061 sc->txb_size = 2048;
1062 break;
1063 }
1064
1065 /* Attach the interface. */
1066 if_attach(ifp);
1067 ether_ifattach(ifp, sc->sc_enaddr);
1068
1069 /* Print additional info when attached. */
1070 printf(": address %s, type %s\n",
1071 ether_sprintf(sc->sc_enaddr), sc->typestr);
1072 #if FE_DEBUG >= 3
1073 {
1074 int buf, txb, bbw, sbw, ram;
1075
1076 buf = txb = bbw = sbw = ram = -1;
1077 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
1078 case FE_D6_BUFSIZ_8KB:
1079 buf = 8;
1080 break;
1081 case FE_D6_BUFSIZ_16KB:
1082 buf = 16;
1083 break;
1084 case FE_D6_BUFSIZ_32KB:
1085 buf = 32;
1086 break;
1087 case FE_D6_BUFSIZ_64KB:
1088 buf = 64;
1089 break;
1090 }
1091 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1092 case FE_D6_TXBSIZ_2x2KB:
1093 txb = 2;
1094 break;
1095 case FE_D6_TXBSIZ_2x4KB:
1096 txb = 4;
1097 break;
1098 case FE_D6_TXBSIZ_2x8KB:
1099 txb = 8;
1100 break;
1101 }
1102 switch (sc->proto_dlcr6 & FE_D6_BBW) {
1103 case FE_D6_BBW_BYTE:
1104 bbw = 8;
1105 break;
1106 case FE_D6_BBW_WORD:
1107 bbw = 16;
1108 break;
1109 }
1110 switch (sc->proto_dlcr6 & FE_D6_SBW) {
1111 case FE_D6_SBW_BYTE:
1112 sbw = 8;
1113 break;
1114 case FE_D6_SBW_WORD:
1115 sbw = 16;
1116 break;
1117 }
1118 switch (sc->proto_dlcr6 & FE_D6_SRAM) {
1119 case FE_D6_SRAM_100ns:
1120 ram = 100;
1121 break;
1122 case FE_D6_SRAM_150ns:
1123 ram = 150;
1124 break;
1125 }
1126 printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
1127 sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw);
1128 }
1129 #endif
1130
1131 #if NBPFILTER > 0
1132 /* If BPF is in the kernel, call the attach for it. */
1133 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
1134 #endif
1135
1136 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
1137 IPL_NET, feintr, sc);
1138 }
1139
1140 /*
1141 * Reset interface.
1142 */
1143 void
1144 fe_reset(sc)
1145 struct fe_softc *sc;
1146 {
1147 int s;
1148
1149 s = splnet();
1150 fe_stop(sc);
1151 fe_init(sc);
1152 splx(s);
1153 }
1154
1155 /*
1156 * Stop everything on the interface.
1157 *
1158 * All buffered packets, both transmitting and receiving,
1159 * if any, will be lost by stopping the interface.
1160 */
1161 void
1162 fe_stop(sc)
1163 struct fe_softc *sc;
1164 {
1165
1166 #if FE_DEBUG >= 3
1167 log(LOG_INFO, "%s: top of fe_stop()\n", sc->sc_dev.dv_xname);
1168 fe_dump(LOG_INFO, sc);
1169 #endif
1170
1171 /* Disable interrupts. */
1172 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1173 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1174
1175 /* Stop interface hardware. */
1176 delay(200);
1177 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1178 delay(200);
1179
1180 /* Clear all interrupt status. */
1181 outb(sc->sc_iobase + FE_DLCR0, 0xFF);
1182 outb(sc->sc_iobase + FE_DLCR1, 0xFF);
1183
1184 /* Put the chip in stand-by mode. */
1185 delay(200);
1186 outb(sc->sc_iobase + FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
1187 delay(200);
1188
1189 /* MAR loading can be delayed. */
1190 sc->filter_change = 0;
1191
1192 /* Call a hook. */
1193 if (sc->stop)
1194 sc->stop(sc);
1195
1196 #if DEBUG >= 3
1197 log(LOG_INFO, "%s: end of fe_stop()\n", sc->sc_dev.dv_xname);
1198 fe_dump(LOG_INFO, sc);
1199 #endif
1200 }
1201
1202 /*
1203 * Device timeout/watchdog routine. Entered if the device neglects to
1204 * generate an interrupt after a transmit has been started on it.
1205 */
1206 void
1207 fe_watchdog(ifp)
1208 struct ifnet *ifp;
1209 {
1210 struct fe_softc *sc = ifp->if_softc;
1211
1212 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1213 #if FE_DEBUG >= 3
1214 fe_dump(LOG_INFO, sc);
1215 #endif
1216
1217 /* Record how many packets are lost by this accident. */
1218 sc->sc_ethercom.ec_if.if_oerrors += sc->txb_sched + sc->txb_count;
1219
1220 fe_reset(sc);
1221 }
1222
1223 /*
1224 * Drop (skip) a packet from receive buffer in 86960 memory.
1225 */
1226 static inline void
1227 fe_droppacket(sc)
1228 struct fe_softc *sc;
1229 {
1230
1231 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
1232 }
1233
1234 /*
1235 * Initialize device.
1236 */
1237 void
1238 fe_init(sc)
1239 struct fe_softc *sc;
1240 {
1241 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1242 int i;
1243
1244 #if FE_DEBUG >= 3
1245 log(LOG_INFO, "%s: top of fe_init()\n", sc->sc_dev.dv_xname);
1246 fe_dump(LOG_INFO, sc);
1247 #endif
1248
1249 /* Reset transmitter flags. */
1250 ifp->if_flags &= ~IFF_OACTIVE;
1251 ifp->if_timer = 0;
1252
1253 sc->txb_free = sc->txb_size;
1254 sc->txb_count = 0;
1255 sc->txb_sched = 0;
1256
1257 /* Call a hook. */
1258 if (sc->init)
1259 sc->init(sc);
1260
1261 #if FE_DEBUG >= 3
1262 log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname);
1263 fe_dump(LOG_INFO, sc);
1264 #endif
1265
1266 /*
1267 * Make sure to disable the chip, also.
1268 * This may also help re-programming the chip after
1269 * hot insertion of PCMCIAs.
1270 */
1271 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1272
1273 /* Power up the chip and select register bank for DLCRs. */
1274 delay(200);
1275 outb(sc->sc_iobase + FE_DLCR7,
1276 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1277 delay(200);
1278
1279 /* Feed the station address. */
1280 outblk(sc->sc_iobase + FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1281
1282 /* Select the BMPR bank for runtime register access. */
1283 outb(sc->sc_iobase + FE_DLCR7,
1284 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1285
1286 /* Initialize registers. */
1287 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1288 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1289 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1290 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1291 outb(sc->sc_iobase + FE_DLCR4, sc->proto_dlcr4);
1292 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5);
1293 outb(sc->sc_iobase + FE_BMPR10, 0x00);
1294 outb(sc->sc_iobase + FE_BMPR11, FE_B11_CTRL_SKIP);
1295 outb(sc->sc_iobase + FE_BMPR12, 0x00);
1296 outb(sc->sc_iobase + FE_BMPR13, sc->proto_bmpr13);
1297 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER);
1298 outb(sc->sc_iobase + FE_BMPR15, 0x00);
1299
1300 #if FE_DEBUG >= 3
1301 log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname);
1302 fe_dump(LOG_INFO, sc);
1303 #endif
1304
1305 /* Enable interrupts. */
1306 outb(sc->sc_iobase + FE_DLCR2, FE_TMASK);
1307 outb(sc->sc_iobase + FE_DLCR3, FE_RMASK);
1308
1309 /* Enable transmitter and receiver. */
1310 delay(200);
1311 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1312 delay(200);
1313
1314 #if FE_DEBUG >= 3
1315 log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname);
1316 fe_dump(LOG_INFO, sc);
1317 #endif
1318
1319 /*
1320 * Make sure to empty the receive buffer.
1321 *
1322 * This may be redundant, but *if* the receive buffer were full
1323 * at this point, the driver would hang. I have experienced
1324 * some strange hangups just after UP. I hope the following
1325 * code solve the problem.
1326 *
1327 * I have changed the order of hardware initialization.
1328 * I think the receive buffer cannot have any packets at this
1329 * point in this version. The following code *must* be
1330 * redundant now. FIXME.
1331 */
1332 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1333 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1334 break;
1335 fe_droppacket(sc);
1336 }
1337 #if FE_DEBUG >= 1
1338 if (i >= FE_MAX_RECV_COUNT) {
1339 log(LOG_ERR, "%s: cannot empty receive buffer\n",
1340 sc->sc_dev.dv_xname);
1341 }
1342 #endif
1343 #if FE_DEBUG >= 3
1344 if (i < FE_MAX_RECV_COUNT) {
1345 log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
1346 sc->sc_dev.dv_xname, i);
1347 }
1348 #endif
1349
1350 #if FE_DEBUG >= 3
1351 log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname);
1352 fe_dump(LOG_INFO, sc);
1353 #endif
1354
1355 /* Do we need this here? */
1356 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1357 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1358
1359 #if FE_DEBUG >= 3
1360 log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname);
1361 fe_dump(LOG_INFO, sc);
1362 #endif
1363
1364 /* Set 'running' flag. */
1365 ifp->if_flags |= IFF_RUNNING;
1366
1367 /*
1368 * At this point, the interface is runnung properly,
1369 * except that it receives *no* packets. we then call
1370 * fe_setmode() to tell the chip what packets to be
1371 * received, based on the if_flags and multicast group
1372 * list. It completes the initialization process.
1373 */
1374 fe_setmode(sc);
1375
1376 #if FE_DEBUG >= 3
1377 log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname);
1378 fe_dump(LOG_INFO, sc);
1379 #endif
1380
1381 /* ...and attempt to start output. */
1382 fe_start(ifp);
1383
1384 #if FE_DEBUG >= 3
1385 log(LOG_INFO, "%s: end of fe_init()\n", sc->sc_dev.dv_xname);
1386 fe_dump(LOG_INFO, sc);
1387 #endif
1388 }
1389
1390 /*
1391 * This routine actually starts the transmission on the interface
1392 */
1393 static inline void
1394 fe_xmit(sc)
1395 struct fe_softc *sc;
1396 {
1397
1398 /*
1399 * Set a timer just in case we never hear from the board again.
1400 * We use longer timeout for multiple packet transmission.
1401 * I'm not sure this timer value is appropriate. FIXME.
1402 */
1403 sc->sc_ethercom.ec_if.if_timer = 1 + sc->txb_count;
1404
1405 /* Update txb variables. */
1406 sc->txb_sched = sc->txb_count;
1407 sc->txb_count = 0;
1408 sc->txb_free = sc->txb_size;
1409
1410 #if FE_DELAYED_PADDING
1411 /* Omit the postponed padding process. */
1412 sc->txb_padding = 0;
1413 #endif
1414
1415 /* Start transmitter, passing packets in TX buffer. */
1416 outb(sc->sc_iobase + FE_BMPR10, sc->txb_sched | FE_B10_START);
1417 }
1418
1419 /*
1420 * Start output on interface.
1421 * We make two assumptions here:
1422 * 1) that the current priority is set to splnet _before_ this code
1423 * is called *and* is returned to the appropriate priority after
1424 * return
1425 * 2) that the IFF_OACTIVE flag is checked before this code is called
1426 * (i.e. that the output part of the interface is idle)
1427 */
1428 void
1429 fe_start(ifp)
1430 struct ifnet *ifp;
1431 {
1432 struct fe_softc *sc = ifp->if_softc;
1433 struct mbuf *m;
1434
1435 #if FE_DEBUG >= 1
1436 /* Just a sanity check. */
1437 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1438 /*
1439 * Txb_count and txb_free co-works to manage the
1440 * transmission buffer. Txb_count keeps track of the
1441 * used potion of the buffer, while txb_free does unused
1442 * potion. So, as long as the driver runs properly,
1443 * txb_count is zero if and only if txb_free is same
1444 * as txb_size (which represents whole buffer.)
1445 */
1446 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
1447 sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free);
1448 /*
1449 * So, what should I do, then?
1450 *
1451 * We now know txb_count and txb_free contradicts. We
1452 * cannot, however, tell which is wrong. More
1453 * over, we cannot peek 86960 transmission buffer or
1454 * reset the transmission buffer. (In fact, we can
1455 * reset the entire interface. I don't want to do it.)
1456 *
1457 * If txb_count is incorrect, leaving it as is will cause
1458 * sending of gabages after next interrupt. We have to
1459 * avoid it. Hence, we reset the txb_count here. If
1460 * txb_free was incorrect, resetting txb_count just loose
1461 * some packets. We can live with it.
1462 */
1463 sc->txb_count = 0;
1464 }
1465 #endif
1466
1467 #if FE_DEBUG >= 1
1468 /*
1469 * First, see if there are buffered packets and an idle
1470 * transmitter - should never happen at this point.
1471 */
1472 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1473 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
1474 sc->sc_dev.dv_xname, sc->txb_count);
1475 fe_xmit(sc);
1476 }
1477 #endif
1478
1479 /*
1480 * Stop accepting more transmission packets temporarily, when
1481 * a filter change request is delayed. Updating the MARs on
1482 * 86960 flushes the transmisstion buffer, so it is delayed
1483 * until all buffered transmission packets have been sent
1484 * out.
1485 */
1486 if (sc->filter_change) {
1487 /*
1488 * Filter change requst is delayed only when the DLC is
1489 * working. DLC soon raise an interrupt after finishing
1490 * the work.
1491 */
1492 goto indicate_active;
1493 }
1494
1495 for (;;) {
1496 /*
1497 * See if there is room to put another packet in the buffer.
1498 * We *could* do better job by peeking the send queue to
1499 * know the length of the next packet. Current version just
1500 * tests against the worst case (i.e., longest packet). FIXME.
1501 *
1502 * When adding the packet-peek feature, don't forget adding a
1503 * test on txb_count against QUEUEING_MAX.
1504 * There is a little chance the packet count exceeds
1505 * the limit. Assume transmission buffer is 8KB (2x8KB
1506 * configuration) and an application sends a bunch of small
1507 * (i.e., minimum packet sized) packets rapidly. An 8KB
1508 * buffer can hold 130 blocks of 62 bytes long...
1509 */
1510 if (sc->txb_free < ETHER_MAX_LEN + FE_DATA_LEN_LEN) {
1511 /* No room. */
1512 goto indicate_active;
1513 }
1514
1515 #if FE_SINGLE_TRANSMISSION
1516 if (sc->txb_count > 0) {
1517 /* Just one packet per a transmission buffer. */
1518 goto indicate_active;
1519 }
1520 #endif
1521
1522 /*
1523 * Get the next mbuf chain for a packet to send.
1524 */
1525 IF_DEQUEUE(&ifp->if_snd, m);
1526 if (m == 0) {
1527 /* No more packets to send. */
1528 goto indicate_inactive;
1529 }
1530
1531 #if NBPFILTER > 0
1532 /* Tap off here if there is a BPF listener. */
1533 if (ifp->if_bpf)
1534 bpf_mtap(ifp->if_bpf, m);
1535 #endif
1536
1537 /*
1538 * Copy the mbuf chain into the transmission buffer.
1539 * txb_* variables are updated as necessary.
1540 */
1541 fe_write_mbufs(sc, m);
1542
1543 m_freem(m);
1544
1545 /* Start transmitter if it's idle. */
1546 if (sc->txb_sched == 0)
1547 fe_xmit(sc);
1548 }
1549
1550 indicate_inactive:
1551 /*
1552 * We are using the !OACTIVE flag to indicate to
1553 * the outside world that we can accept an
1554 * additional packet rather than that the
1555 * transmitter is _actually_ active. Indeed, the
1556 * transmitter may be active, but if we haven't
1557 * filled all the buffers with data then we still
1558 * want to accept more.
1559 */
1560 ifp->if_flags &= ~IFF_OACTIVE;
1561 return;
1562
1563 indicate_active:
1564 /*
1565 * The transmitter is active, and there are no room for
1566 * more outgoing packets in the transmission buffer.
1567 */
1568 ifp->if_flags |= IFF_OACTIVE;
1569 return;
1570 }
1571
1572 /*
1573 * Transmission interrupt handler
1574 * The control flow of this function looks silly. FIXME.
1575 */
1576 void
1577 fe_tint(sc, tstat)
1578 struct fe_softc *sc;
1579 u_char tstat;
1580 {
1581 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1582 int left;
1583 int col;
1584
1585 /*
1586 * Handle "excessive collision" interrupt.
1587 */
1588 if (tstat & FE_D0_COLL16) {
1589 /*
1590 * Find how many packets (including this collided one)
1591 * are left unsent in transmission buffer.
1592 */
1593 left = inb(sc->sc_iobase + FE_BMPR10);
1594
1595 #if FE_DEBUG >= 2
1596 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
1597 sc->sc_dev.dv_xname, left, sc->txb_sched);
1598 #endif
1599 #if FE_DEBUG >= 3
1600 fe_dump(LOG_INFO, sc);
1601 #endif
1602
1603 /*
1604 * Update statistics.
1605 */
1606 ifp->if_collisions += 16;
1607 ifp->if_oerrors++;
1608 ifp->if_opackets += sc->txb_sched - left;
1609
1610 /*
1611 * Collision statistics has been updated.
1612 * Clear the collision flag on 86960 now to avoid confusion.
1613 */
1614 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1615
1616 /*
1617 * Restart transmitter, skipping the
1618 * collided packet.
1619 *
1620 * We *must* skip the packet to keep network running
1621 * properly. Excessive collision error is an
1622 * indication of the network overload. If we
1623 * tried sending the same packet after excessive
1624 * collision, the network would be filled with
1625 * out-of-time packets. Packets belonging
1626 * to reliable transport (such as TCP) are resent
1627 * by some upper layer.
1628 */
1629 outb(sc->sc_iobase + FE_BMPR11,
1630 FE_B11_CTRL_SKIP | FE_B11_MODE1);
1631 sc->txb_sched = left - 1;
1632 }
1633
1634 /*
1635 * Handle "transmission complete" interrupt.
1636 */
1637 if (tstat & FE_D0_TXDONE) {
1638 /*
1639 * Add in total number of collisions on last
1640 * transmission. We also clear "collision occurred" flag
1641 * here.
1642 *
1643 * 86960 has a design flow on collision count on multiple
1644 * packet transmission. When we send two or more packets
1645 * with one start command (that's what we do when the
1646 * transmission queue is clauded), 86960 informs us number
1647 * of collisions occured on the last packet on the
1648 * transmission only. Number of collisions on previous
1649 * packets are lost. I have told that the fact is clearly
1650 * stated in the Fujitsu document.
1651 *
1652 * I considered not to mind it seriously. Collision
1653 * count is not so important, anyway. Any comments? FIXME.
1654 */
1655
1656 if (inb(sc->sc_iobase + FE_DLCR0) & FE_D0_COLLID) {
1657 /* Clear collision flag. */
1658 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1659
1660 /* Extract collision count from 86960. */
1661 col = inb(sc->sc_iobase + FE_DLCR4) & FE_D4_COL;
1662 if (col == 0) {
1663 /*
1664 * Status register indicates collisions,
1665 * while the collision count is zero.
1666 * This can happen after multiple packet
1667 * transmission, indicating that one or more
1668 * previous packet(s) had been collided.
1669 *
1670 * Since the accurate number of collisions
1671 * has been lost, we just guess it as 1;
1672 * Am I too optimistic? FIXME.
1673 */
1674 col = 1;
1675 } else
1676 col >>= FE_D4_COL_SHIFT;
1677 ifp->if_collisions += col;
1678 #if FE_DEBUG >= 4
1679 log(LOG_WARNING, "%s: %d collision%s (%d)\n",
1680 sc->sc_dev.dv_xname, col, col == 1 ? "" : "s",
1681 sc->txb_sched);
1682 #endif
1683 }
1684
1685 /*
1686 * Update total number of successfully
1687 * transmitted packets.
1688 */
1689 ifp->if_opackets += sc->txb_sched;
1690 sc->txb_sched = 0;
1691 }
1692
1693 if (sc->txb_sched == 0) {
1694 /*
1695 * The transmitter is no more active.
1696 * Reset output active flag and watchdog timer.
1697 */
1698 ifp->if_flags &= ~IFF_OACTIVE;
1699 ifp->if_timer = 0;
1700
1701 /*
1702 * If more data is ready to transmit in the buffer, start
1703 * transmitting them. Otherwise keep transmitter idle,
1704 * even if more data is queued. This gives receive
1705 * process a slight priority.
1706 */
1707 if (sc->txb_count > 0)
1708 fe_xmit(sc);
1709 }
1710 }
1711
1712 /*
1713 * Ethernet interface receiver interrupt.
1714 */
1715 void
1716 fe_rint(sc, rstat)
1717 struct fe_softc *sc;
1718 u_char rstat;
1719 {
1720 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1721 int len;
1722 u_char status;
1723 int i;
1724
1725 /*
1726 * Update statistics if this interrupt is caused by an error.
1727 */
1728 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR |
1729 FE_D1_ALGERR | FE_D1_SRTPKT)) {
1730 #if FE_DEBUG >= 3
1731 log(LOG_WARNING, "%s: receive error: %b\n",
1732 sc->sc_dev.dv_xname, rstat, FE_D1_ERRBITS);
1733 #endif
1734 ifp->if_ierrors++;
1735 }
1736
1737 /*
1738 * MB86960 has a flag indicating "receive queue empty."
1739 * We just loop cheking the flag to pull out all received
1740 * packets.
1741 *
1742 * We limit the number of iterrations to avoid infinite loop.
1743 * It can be caused by a very slow CPU (some broken
1744 * peripheral may insert incredible number of wait cycles)
1745 * or, worse, by a broken MB86960 chip.
1746 */
1747 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1748 /* Stop the iterration if 86960 indicates no packets. */
1749 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1750 break;
1751
1752 /*
1753 * Extract A receive status byte.
1754 * As our 86960 is in 16 bit bus access mode, we have to
1755 * use inw() to get the status byte. The significant
1756 * value is returned in lower 8 bits.
1757 */
1758 status = (u_char)inw(sc->sc_iobase + FE_BMPR8);
1759 #if FE_DEBUG >= 4
1760 log(LOG_INFO, "%s: receive status = %02x\n",
1761 sc->sc_dev.dv_xname, status);
1762 #endif
1763
1764 /*
1765 * If there was an error, update statistics and drop
1766 * the packet, unless the interface is in promiscuous
1767 * mode.
1768 */
1769 if ((status & 0xF0) != 0x20) { /* XXXX ? */
1770 if ((ifp->if_flags & IFF_PROMISC) == 0) {
1771 ifp->if_ierrors++;
1772 fe_droppacket(sc);
1773 continue;
1774 }
1775 }
1776
1777 /*
1778 * Extract the packet length.
1779 * It is a sum of a header (14 bytes) and a payload.
1780 * CRC has been stripped off by the 86960.
1781 */
1782 len = inw(sc->sc_iobase + FE_BMPR8);
1783
1784 /*
1785 * MB86965 checks the packet length and drop big packet
1786 * before passing it to us. There are no chance we can
1787 * get [crufty] packets. Hence, if the length exceeds
1788 * the specified limit, it means some serious failure,
1789 * such as out-of-sync on receive buffer management.
1790 *
1791 * Is this statement true? FIXME.
1792 */
1793 if (len > ETHER_MAX_LEN || len < ETHER_HDR_SIZE) {
1794 #if FE_DEBUG >= 2
1795 log(LOG_WARNING,
1796 "%s: received a %s packet? (%u bytes)\n",
1797 sc->sc_dev.dv_xname,
1798 len < ETHER_HDR_SIZE ? "partial" : "big", len);
1799 #endif
1800 ifp->if_ierrors++;
1801 fe_droppacket(sc);
1802 continue;
1803 }
1804
1805 /*
1806 * Check for a short (RUNT) packet. We *do* check
1807 * but do nothing other than print a message.
1808 * Short packets are illegal, but does nothing bad
1809 * if it carries data for upper layer.
1810 */
1811 #if FE_DEBUG >= 2
1812 if (len < ETHER_MIN_LEN) {
1813 log(LOG_WARNING,
1814 "%s: received a short packet? (%u bytes)\n",
1815 sc->sc_dev.dv_xname, len);
1816 }
1817 #endif
1818
1819 /*
1820 * Go get a packet.
1821 */
1822 if (!fe_get_packet(sc, len)) {
1823 /* Skip a packet, updating statistics. */
1824 #if FE_DEBUG >= 2
1825 log(LOG_WARNING,
1826 "%s: out of mbufs; dropping packet (%u bytes)\n",
1827 sc->sc_dev.dv_xname, len);
1828 #endif
1829 ifp->if_ierrors++;
1830 fe_droppacket(sc);
1831
1832 /*
1833 * We stop receiving packets, even if there are
1834 * more in the buffer. We hope we can get more
1835 * mbufs next time.
1836 */
1837 return;
1838 }
1839
1840 /* Successfully received a packet. Update stat. */
1841 ifp->if_ipackets++;
1842 }
1843 }
1844
1845 /*
1846 * Ethernet interface interrupt processor
1847 */
1848 int
1849 feintr(arg)
1850 void *arg;
1851 {
1852 struct fe_softc *sc = arg;
1853 u_char tstat, rstat;
1854
1855 #if FE_DEBUG >= 4
1856 log(LOG_INFO, "%s: feintr()\n", sc->sc_dev.dv_xname);
1857 fe_dump(LOG_INFO, sc);
1858 #endif
1859
1860 /*
1861 * Get interrupt conditions, masking unneeded flags.
1862 */
1863 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1864 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1865 if (tstat == 0 && rstat == 0)
1866 return (0);
1867
1868 /*
1869 * Loop until there are no more new interrupt conditions.
1870 */
1871 for (;;) {
1872 /*
1873 * Reset the conditions we are acknowledging.
1874 */
1875 outb(sc->sc_iobase + FE_DLCR0, tstat);
1876 outb(sc->sc_iobase + FE_DLCR1, rstat);
1877
1878 /*
1879 * Handle transmitter interrupts. Handle these first because
1880 * the receiver will reset the board under some conditions.
1881 */
1882 if (tstat != 0)
1883 fe_tint(sc, tstat);
1884
1885 /*
1886 * Handle receiver interrupts.
1887 */
1888 if (rstat != 0)
1889 fe_rint(sc, rstat);
1890
1891 /*
1892 * Update the multicast address filter if it is
1893 * needed and possible. We do it now, because
1894 * we can make sure the transmission buffer is empty,
1895 * and there is a good chance that the receive queue
1896 * is empty. It will minimize the possibility of
1897 * packet lossage.
1898 */
1899 if (sc->filter_change &&
1900 sc->txb_count == 0 && sc->txb_sched == 0) {
1901 fe_loadmar(sc);
1902 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
1903 }
1904
1905 /*
1906 * If it looks like the transmitter can take more data,
1907 * attempt to start output on the interface. This is done
1908 * after handling the receiver interrupt to give the
1909 * receive operation priority.
1910 */
1911 if ((sc->sc_ethercom.ec_if.if_flags & IFF_OACTIVE) == 0)
1912 fe_start(&sc->sc_ethercom.ec_if);
1913
1914 /*
1915 * Get interrupt conditions, masking unneeded flags.
1916 */
1917 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1918 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1919 if (tstat == 0 && rstat == 0)
1920 return (1);
1921 }
1922 }
1923
1924 /*
1925 * Process an ioctl request. This code needs some work - it looks pretty ugly.
1926 */
1927 int
1928 fe_ioctl(ifp, command, data)
1929 register struct ifnet *ifp;
1930 u_long command;
1931 caddr_t data;
1932 {
1933 struct fe_softc *sc = ifp->if_softc;
1934 register struct ifaddr *ifa = (struct ifaddr *)data;
1935 struct ifreq *ifr = (struct ifreq *)data;
1936 int s, error = 0;
1937
1938 #if FE_DEBUG >= 3
1939 log(LOG_INFO, "%s: ioctl(%x)\n", sc->sc_dev.dv_xname, command);
1940 #endif
1941
1942 s = splnet();
1943
1944 switch (command) {
1945
1946 case SIOCSIFADDR:
1947 ifp->if_flags |= IFF_UP;
1948
1949 switch (ifa->ifa_addr->sa_family) {
1950 #ifdef INET
1951 case AF_INET:
1952 fe_init(sc);
1953 arp_ifinit(ifp, ifa);
1954 break;
1955 #endif
1956 #ifdef NS
1957 case AF_NS:
1958 {
1959 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1960
1961 if (ns_nullhost(*ina))
1962 ina->x_host =
1963 *(union ns_host *)(sc->sc_enaddr);
1964 else {
1965 bcopy(ina->x_host.c_host, sc->sc_enaddr,
1966 ETHER_ADDR_LEN);
1967 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1968 ETHER_ADDR_LEN);
1969 }
1970 /* Set new address. */
1971 fe_init(sc);
1972 break;
1973 }
1974 #endif
1975 default:
1976 fe_init(sc);
1977 break;
1978 }
1979 break;
1980
1981 case SIOCSIFFLAGS:
1982 if ((ifp->if_flags & IFF_UP) == 0 &&
1983 (ifp->if_flags & IFF_RUNNING) != 0) {
1984 /*
1985 * If interface is marked down and it is running, then
1986 * stop it.
1987 */
1988 fe_stop(sc);
1989 ifp->if_flags &= ~IFF_RUNNING;
1990 } else if ((ifp->if_flags & IFF_UP) != 0 &&
1991 (ifp->if_flags & IFF_RUNNING) == 0) {
1992 /*
1993 * If interface is marked up and it is stopped, then
1994 * start it.
1995 */
1996 fe_init(sc);
1997 } else {
1998 /*
1999 * Reset the interface to pick up changes in any other
2000 * flags that affect hardware registers.
2001 */
2002 fe_setmode(sc);
2003 }
2004 #if DEBUG >= 1
2005 /* "ifconfig fe0 debug" to print register dump. */
2006 if (ifp->if_flags & IFF_DEBUG) {
2007 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", sc->sc_dev.dv_xname);
2008 fe_dump(LOG_DEBUG, sc);
2009 }
2010 #endif
2011 break;
2012
2013 case SIOCADDMULTI:
2014 case SIOCDELMULTI:
2015 /* Update our multicast list. */
2016 error = (command == SIOCADDMULTI) ?
2017 ether_addmulti(ifr, &sc->sc_ethercom) :
2018 ether_delmulti(ifr, &sc->sc_ethercom);
2019
2020 if (error == ENETRESET) {
2021 /*
2022 * Multicast list has changed; set the hardware filter
2023 * accordingly.
2024 */
2025 fe_setmode(sc);
2026 error = 0;
2027 }
2028 break;
2029
2030 default:
2031 error = EINVAL;
2032 }
2033
2034 splx(s);
2035 return (error);
2036 }
2037
2038 /*
2039 * Retreive packet from receive buffer and send to the next level up via
2040 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
2041 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
2042 */
2043 int
2044 fe_get_packet(sc, len)
2045 struct fe_softc *sc;
2046 int len;
2047 {
2048 struct ether_header *eh;
2049 struct mbuf *m;
2050 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2051
2052 /* Allocate a header mbuf. */
2053 MGETHDR(m, M_DONTWAIT, MT_DATA);
2054 if (m == 0)
2055 return (0);
2056 m->m_pkthdr.rcvif = ifp;
2057 m->m_pkthdr.len = len;
2058
2059 /* The following silliness is to make NFS happy. */
2060 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
2061 #define EOFF (EROUND - sizeof(struct ether_header))
2062
2063 /*
2064 * Our strategy has one more problem. There is a policy on
2065 * mbuf cluster allocation. It says that we must have at
2066 * least MINCLSIZE (208 bytes) to allocate a cluster. For a
2067 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
2068 * our code violates the rule...
2069 * On the other hand, the current code is short, simle,
2070 * and fast, however. It does no harmful thing, just waists
2071 * some memory. Any comments? FIXME.
2072 */
2073
2074 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
2075 if (len > MHLEN - EOFF) {
2076 MCLGET(m, M_DONTWAIT);
2077 if ((m->m_flags & M_EXT) == 0) {
2078 m_freem(m);
2079 return (0);
2080 }
2081 }
2082
2083 /*
2084 * The following assumes there is room for the ether header in the
2085 * header mbuf.
2086 */
2087 m->m_data += EOFF;
2088 eh = mtod(m, struct ether_header *);
2089
2090 /* Set the length of this packet. */
2091 m->m_len = len;
2092
2093 /* Get a packet. */
2094 insw(sc->sc_iobase + FE_BMPR8, m->m_data, (len + 1) >> 1);
2095
2096 #if NBPFILTER > 0
2097 /*
2098 * Check if there's a BPF listener on this interface. If so, hand off
2099 * the raw packet to bpf.
2100 */
2101 if (ifp->if_bpf) {
2102 bpf_mtap(ifp->if_bpf, m);
2103
2104 /*
2105 * Note that the interface cannot be in promiscuous mode if
2106 * there are no BPF listeners. And if we are in promiscuous
2107 * mode, we have to check if this packet is really ours.
2108 */
2109 if ((ifp->if_flags & IFF_PROMISC) != 0 &&
2110 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
2111 bcmp(eh->ether_dhost, sc->sc_enaddr,
2112 sizeof(eh->ether_dhost)) != 0) {
2113 m_freem(m);
2114 return (1);
2115 }
2116 }
2117 #endif
2118
2119 /* Fix up data start offset in mbuf to point past ether header. */
2120 m_adj(m, sizeof(struct ether_header));
2121 ether_input(ifp, eh, m);
2122 return (1);
2123 }
2124
2125 /*
2126 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
2127 * Returns number of bytes actually written, including length word.
2128 *
2129 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
2130 * Packets shorter than Ethernet minimum are legal, and we pad them
2131 * before sending out. An exception is "partial" packets which are
2132 * shorter than mandatory Ethernet header.
2133 *
2134 * I wrote a code for an experimental "delayed padding" technique.
2135 * When employed, it postpones the padding process for short packets.
2136 * If xmit() occured at the moment, the padding process is omitted, and
2137 * garbages are sent as pad data. If next packet is stored in the
2138 * transmission buffer before xmit(), write_mbuf() pads the previous
2139 * packet before transmitting new packet. This *may* gain the
2140 * system performance (slightly).
2141 */
2142 void
2143 fe_write_mbufs(sc, m)
2144 struct fe_softc *sc;
2145 struct mbuf *m;
2146 {
2147 int bmpr8 = sc->sc_iobase + FE_BMPR8;
2148 u_char *data;
2149 u_short savebyte; /* WARNING: Architecture dependent! */
2150 int totlen, len, wantbyte;
2151
2152 /* XXX thorpej 960116 - quiet bogus compiler warning. */
2153 savebyte = 0;
2154
2155 #if FE_DELAYED_PADDING
2156 /* Do the "delayed padding." */
2157 len = sc->txb_padding >> 1;
2158 if (len > 0) {
2159 while (--len >= 0)
2160 outw(bmpr8, 0);
2161 sc->txb_padding = 0;
2162 }
2163 #endif
2164
2165 /* We need to use m->m_pkthdr.len, so require the header */
2166 if ((m->m_flags & M_PKTHDR) == 0)
2167 panic("fe_write_mbufs: no header mbuf");
2168
2169 #if FE_DEBUG >= 2
2170 /* First, count up the total number of bytes to copy. */
2171 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
2172 totlen += mp->m_len;
2173 /* Check if this matches the one in the packet header. */
2174 if (totlen != m->m_pkthdr.len)
2175 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
2176 sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len);
2177 #else
2178 /* Just use the length value in the packet header. */
2179 totlen = m->m_pkthdr.len;
2180 #endif
2181
2182 #if FE_DEBUG >= 1
2183 /*
2184 * Should never send big packets. If such a packet is passed,
2185 * it should be a bug of upper layer. We just ignore it.
2186 * ... Partial (too short) packets, neither.
2187 */
2188 if (totlen > ETHER_MAX_LEN || totlen < ETHER_HDR_SIZE) {
2189 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
2190 sc->sc_dev.dv_xname,
2191 totlen < ETHER_HDR_SIZE ? "partial" : "big", totlen);
2192 sc->sc_ethercom.ec_if.if_oerrors++;
2193 return;
2194 }
2195 #endif
2196
2197 /*
2198 * Put the length word for this frame.
2199 * Does 86960 accept odd length? -- Yes.
2200 * Do we need to pad the length to minimum size by ourselves?
2201 * -- Generally yes. But for (or will be) the last
2202 * packet in the transmission buffer, we can skip the
2203 * padding process. It may gain performance slightly. FIXME.
2204 */
2205 outw(bmpr8, max(totlen, ETHER_MIN_LEN));
2206
2207 /*
2208 * Update buffer status now.
2209 * Truncate the length up to an even number, since we use outw().
2210 */
2211 totlen = (totlen + 1) & ~1;
2212 sc->txb_free -= FE_DATA_LEN_LEN + max(totlen, ETHER_MIN_LEN);
2213 sc->txb_count++;
2214
2215 #if FE_DELAYED_PADDING
2216 /* Postpone the packet padding if necessary. */
2217 if (totlen < ETHER_MIN_LEN)
2218 sc->txb_padding = ETHER_MIN_LEN - totlen;
2219 #endif
2220
2221 /*
2222 * Transfer the data from mbuf chain to the transmission buffer.
2223 * MB86960 seems to require that data be transferred as words, and
2224 * only words. So that we require some extra code to patch
2225 * over odd-length mbufs.
2226 */
2227 wantbyte = 0;
2228 for (; m != 0; m = m->m_next) {
2229 /* Ignore empty mbuf. */
2230 len = m->m_len;
2231 if (len == 0)
2232 continue;
2233
2234 /* Find the actual data to send. */
2235 data = mtod(m, caddr_t);
2236
2237 /* Finish the last byte. */
2238 if (wantbyte) {
2239 outw(bmpr8, savebyte | (*data << 8));
2240 data++;
2241 len--;
2242 wantbyte = 0;
2243 }
2244
2245 /* Output contiguous words. */
2246 if (len > 1)
2247 outsw(bmpr8, data, len >> 1);
2248
2249 /* Save remaining byte, if there is one. */
2250 if (len & 1) {
2251 data += len & ~1;
2252 savebyte = *data;
2253 wantbyte = 1;
2254 }
2255 }
2256
2257 /* Spit the last byte, if the length is odd. */
2258 if (wantbyte)
2259 outw(bmpr8, savebyte);
2260
2261 #if ! FE_DELAYED_PADDING
2262 /*
2263 * Pad the packet to the minimum length if necessary.
2264 */
2265 len = (ETHER_MIN_LEN >> 1) - (totlen >> 1);
2266 while (--len >= 0)
2267 outw(bmpr8, 0);
2268 #endif
2269 }
2270
2271 /*
2272 * Compute the multicast address filter from the
2273 * list of multicast addresses we need to listen to.
2274 */
2275 void
2276 fe_getmcaf(ec, af)
2277 struct ethercom *ec;
2278 u_char *af;
2279 {
2280 struct ifnet *ifp = &ec->ec_if;
2281 struct ether_multi *enm;
2282 register u_char *cp, c;
2283 register u_long crc;
2284 register int i, len;
2285 struct ether_multistep step;
2286
2287 /*
2288 * Set up multicast address filter by passing all multicast addresses
2289 * through a crc generator, and then using the high order 6 bits as an
2290 * index into the 64 bit logical address filter. The high order bit
2291 * selects the word, while the rest of the bits select the bit within
2292 * the word.
2293 */
2294
2295 if ((ifp->if_flags & IFF_PROMISC) != 0)
2296 goto allmulti;
2297
2298 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0x00;
2299 ETHER_FIRST_MULTI(step, ec, enm);
2300 while (enm != NULL) {
2301 if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
2302 sizeof(enm->enm_addrlo)) != 0) {
2303 /*
2304 * We must listen to a range of multicast addresses.
2305 * For now, just accept all multicasts, rather than
2306 * trying to set only those filter bits needed to match
2307 * the range. (At this time, the only use of address
2308 * ranges is for IP multicast routing, for which the
2309 * range is big enough to require all bits set.)
2310 */
2311 goto allmulti;
2312 }
2313
2314 cp = enm->enm_addrlo;
2315 crc = 0xffffffff;
2316 for (len = sizeof(enm->enm_addrlo); --len >= 0;) {
2317 c = *cp++;
2318 for (i = 8; --i >= 0;) {
2319 if ((crc & 0x01) ^ (c & 0x01)) {
2320 crc >>= 1;
2321 crc ^= 0xedb88320;
2322 } else
2323 crc >>= 1;
2324 c >>= 1;
2325 }
2326 }
2327 /* Just want the 6 most significant bits. */
2328 crc >>= 26;
2329
2330 /* Turn on the corresponding bit in the filter. */
2331 af[crc >> 3] |= 1 << (crc & 7);
2332
2333 ETHER_NEXT_MULTI(step, enm);
2334 }
2335 ifp->if_flags &= ~IFF_ALLMULTI;
2336 return;
2337
2338 allmulti:
2339 ifp->if_flags |= IFF_ALLMULTI;
2340 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0xff;
2341 }
2342
2343 /*
2344 * Calculate a new "multicast packet filter" and put the 86960
2345 * receiver in appropriate mode.
2346 */
2347 void
2348 fe_setmode(sc)
2349 struct fe_softc *sc;
2350 {
2351 int flags = sc->sc_ethercom.ec_if.if_flags;
2352
2353 /*
2354 * If the interface is not running, we postpone the update
2355 * process for receive modes and multicast address filter
2356 * until the interface is restarted. It reduces some
2357 * complicated job on maintaining chip states. (Earlier versions
2358 * of this driver had a bug on that point...)
2359 *
2360 * To complete the trick, fe_init() calls fe_setmode() after
2361 * restarting the interface.
2362 */
2363 if ((flags & IFF_RUNNING) == 0)
2364 return;
2365
2366 /*
2367 * Promiscuous mode is handled separately.
2368 */
2369 if ((flags & IFF_PROMISC) != 0) {
2370 /*
2371 * Program 86960 to receive all packets on the segment
2372 * including those directed to other stations.
2373 * Multicast filter stored in MARs are ignored
2374 * under this setting, so we don't need to update it.
2375 *
2376 * Promiscuous mode is used solely by BPF, and BPF only
2377 * listens to valid (no error) packets. So, we ignore
2378 * errornous ones even in this mode.
2379 */
2380 outb(sc->sc_iobase + FE_DLCR5,
2381 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2382 sc->filter_change = 0;
2383
2384 #if FE_DEBUG >= 3
2385 log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname);
2386 #endif
2387 return;
2388 }
2389
2390 /*
2391 * Turn the chip to the normal (non-promiscuous) mode.
2392 */
2393 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2394
2395 /*
2396 * Find the new multicast filter value.
2397 */
2398 fe_getmcaf(&sc->sc_ethercom, sc->filter);
2399 sc->filter_change = 1;
2400
2401 #if FE_DEBUG >= 3
2402 log(LOG_INFO,
2403 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
2404 sc->sc_dev.dv_xname,
2405 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
2406 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
2407 #endif
2408
2409 /*
2410 * We have to update the multicast filter in the 86960, A.S.A.P.
2411 *
2412 * Note that the DLC (Data Linc Control unit, i.e. transmitter
2413 * and receiver) must be stopped when feeding the filter, and
2414 * DLC trushes all packets in both transmission and receive
2415 * buffers when stopped.
2416 *
2417 * ... Are the above sentenses correct? I have to check the
2418 * manual of the MB86960A. FIXME.
2419 *
2420 * To reduce the packet lossage, we delay the filter update
2421 * process until buffers are empty.
2422 */
2423 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2424 (inb(sc->sc_iobase + FE_DLCR1) & FE_D1_PKTRDY) == 0) {
2425 /*
2426 * Buffers are (apparently) empty. Load
2427 * the new filter value into MARs now.
2428 */
2429 fe_loadmar(sc);
2430 } else {
2431 /*
2432 * Buffers are not empty. Mark that we have to update
2433 * the MARs. The new filter will be loaded by feintr()
2434 * later.
2435 */
2436 #if FE_DEBUG >= 4
2437 log(LOG_INFO, "%s: filter change delayed\n", sc->sc_dev.dv_xname);
2438 #endif
2439 }
2440 }
2441
2442 /*
2443 * Load a new multicast address filter into MARs.
2444 *
2445 * The caller must have splnet'ed befor fe_loadmar.
2446 * This function starts the DLC upon return. So it can be called only
2447 * when the chip is working, i.e., from the driver's point of view, when
2448 * a device is RUNNING. (I mistook the point in previous versions.)
2449 */
2450 void
2451 fe_loadmar(sc)
2452 struct fe_softc *sc;
2453 {
2454
2455 /* Stop the DLC (transmitter and receiver). */
2456 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2457
2458 /* Select register bank 1 for MARs. */
2459 outb(sc->sc_iobase + FE_DLCR7,
2460 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2461
2462 /* Copy filter value into the registers. */
2463 outblk(sc->sc_iobase + FE_MAR8, sc->filter, FE_FILTER_LEN);
2464
2465 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2466 outb(sc->sc_iobase + FE_DLCR7,
2467 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2468
2469 /* Restart the DLC. */
2470 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2471
2472 /* We have just updated the filter. */
2473 sc->filter_change = 0;
2474
2475 #if FE_DEBUG >= 3
2476 log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname);
2477 #endif
2478 }
2479
2480 #if FE_DEBUG >= 1
2481 void
2482 fe_dump(level, sc)
2483 int level;
2484 struct fe_softc *sc;
2485 {
2486 int iobase = sc->sc_iobase;
2487 u_char save_dlcr7;
2488
2489 save_dlcr7 = inb(iobase + FE_DLCR7);
2490
2491 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x",
2492 inb(iobase + FE_DLCR0), inb(iobase + FE_DLCR1),
2493 inb(iobase + FE_DLCR2), inb(iobase + FE_DLCR3),
2494 inb(iobase + FE_DLCR4), inb(iobase + FE_DLCR5),
2495 inb(iobase + FE_DLCR6), inb(iobase + FE_DLCR7));
2496
2497 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
2498 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x,",
2499 inb(iobase + FE_DLCR8), inb(iobase + FE_DLCR9),
2500 inb(iobase + FE_DLCR10), inb(iobase + FE_DLCR11),
2501 inb(iobase + FE_DLCR12), inb(iobase + FE_DLCR13),
2502 inb(iobase + FE_DLCR14), inb(iobase + FE_DLCR15));
2503
2504 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
2505 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x,",
2506 inb(iobase + FE_MAR8), inb(iobase + FE_MAR9),
2507 inb(iobase + FE_MAR10), inb(iobase + FE_MAR11),
2508 inb(iobase + FE_MAR12), inb(iobase + FE_MAR13),
2509 inb(iobase + FE_MAR14), inb(iobase + FE_MAR15));
2510
2511 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
2512 log(level, "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x.",
2513 inb(iobase + FE_BMPR10), inb(iobase + FE_BMPR11),
2514 inb(iobase + FE_BMPR12), inb(iobase + FE_BMPR13),
2515 inb(iobase + FE_BMPR14), inb(iobase + FE_BMPR15),
2516 inb(iobase + FE_BMPR16), inb(iobase + FE_BMPR17),
2517 inb(iobase + FE_BMPR19));
2518
2519 outb(iobase + FE_DLCR7, save_dlcr7);
2520 }
2521 #endif
2522