if_ate.c revision 1.20 1 /* $NetBSD: if_ate.c,v 1.20 1998/01/12 09:43:37 thorpej Exp $ */
2
3 /*
4 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
5 *
6 * This software may be used, modified, copied, distributed, and sold, in
7 * both source and binary form provided that the above copyright, these
8 * terms and the following disclaimer are retained. The name of the author
9 * and/or the contributor may not be used to endorse or promote products
10 * derived from this software without specific prior written permission.
11 *
12 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
13 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
14 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
15 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
16 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
17 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
18 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
19 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
20 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
21 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
22 * SUCH DAMAGE.
23 */
24
25 /*
26 * Portions copyright (C) 1993, David Greenman. This software may be used,
27 * modified, copied, distributed, and sold, in both source and binary form
28 * provided that the above copyright and these terms are retained. Under no
29 * circumstances is the author responsible for the proper functioning of this
30 * software, nor does the author assume any responsibility for damages
31 * incurred with its use.
32 */
33
34 #define FE_VERSION "if_fe.c ver. 0.8"
35
36 /*
37 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
38 * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp>
39 *
40 * This version is intended to be a generic template for various
41 * MB86960A/MB86965A based Ethernet cards. It currently supports
42 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
43 * Telesis AT1700 series and RE2000 series. There are some
44 * unnecessary hooks embedded, which are primarily intended to support
45 * other types of Ethernet cards, but the author is not sure whether
46 * they are useful.
47 */
48
49 #include "bpfilter.h"
50 #include "rnd.h"
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/errno.h>
55 #include <sys/ioctl.h>
56 #include <sys/mbuf.h>
57 #include <sys/socket.h>
58 #include <sys/syslog.h>
59 #include <sys/device.h>
60 #if NRND > 0
61 #include <sys/rnd.h>
62 #endif
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_types.h>
67
68 #include <net/if_ether.h>
69
70 #ifdef INET
71 #include <netinet/in.h>
72 #include <netinet/in_systm.h>
73 #include <netinet/in_var.h>
74 #include <netinet/ip.h>
75 #include <netinet/if_inarp.h>
76 #endif
77
78 #ifdef NS
79 #include <netns/ns.h>
80 #include <netns/ns_if.h>
81 #endif
82
83 #if NBPFILTER > 0
84 #include <net/bpf.h>
85 #include <net/bpfdesc.h>
86 #endif
87
88 #include <machine/cpu.h>
89 #include <machine/intr.h>
90 #include <machine/pio.h>
91
92 #include <dev/isa/isareg.h>
93 #include <dev/isa/isavar.h>
94 #include <dev/ic/mb86960reg.h>
95 #include <dev/isa/if_fereg.h>
96
97 /*
98 * Default settings for fe driver specific options.
99 * They can be set in config file by "options" statements.
100 */
101
102 /*
103 * Debug control.
104 * 0: No debug at all. All debug specific codes are stripped off.
105 * 1: Silent. No debug messages are logged except emergent ones.
106 * 2: Brief. Lair events and/or important information are logged.
107 * 3: Detailed. Logs all information which *may* be useful for debugging.
108 * 4: Trace. All actions in the driver is logged. Super verbose.
109 */
110 #ifndef FE_DEBUG
111 #define FE_DEBUG 1
112 #endif
113
114 /*
115 * Delay padding of short transmission packets to minimum Ethernet size.
116 * This may or may not gain performance. An EXPERIMENTAL option.
117 */
118 #ifndef FE_DELAYED_PADDING
119 #define FE_DELAYED_PADDING 0
120 #endif
121
122 /*
123 * Transmit just one packet per a "send" command to 86960.
124 * This option is intended for performance test. An EXPERIMENTAL option.
125 */
126 #ifndef FE_SINGLE_TRANSMISSION
127 #define FE_SINGLE_TRANSMISSION 0
128 #endif
129
130 /*
131 * Device configuration flags.
132 */
133
134 /* DLCR6 settings. */
135 #define FE_FLAGS_DLCR6_VALUE 0x007F
136
137 /* Force DLCR6 override. */
138 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
139
140 /* A cludge for PCMCIA support. */
141 #define FE_FLAGS_PCMCIA 0x8000
142
143 /* Identification of the driver version. */
144 static char const fe_version[] = FE_VERSION " / " FE_REG_VERSION;
145
146 /*
147 * Supported hardware (Ethernet card) types
148 * This information is currently used only for debugging
149 */
150 enum fe_type {
151 /* For cards which are successfully probed but not identified. */
152 FE_TYPE_UNKNOWN,
153
154 /* Fujitsu FMV-180 series. */
155 FE_TYPE_FMV181,
156 FE_TYPE_FMV182,
157
158 /* Allied-Telesis AT1700 series and RE2000 series. */
159 FE_TYPE_AT1700T,
160 FE_TYPE_AT1700BT,
161 FE_TYPE_AT1700FT,
162 FE_TYPE_AT1700AT,
163 FE_TYPE_RE2000,
164
165 /* PCMCIA by Fujitsu. */
166 FE_TYPE_MBH10302,
167 FE_TYPE_MBH10304,
168 };
169
170 /*
171 * fe_softc: per line info and status
172 */
173 struct fe_softc {
174 struct device sc_dev;
175 void *sc_ih;
176
177 struct ethercom sc_ethercom; /* ethernet common */
178
179 /* Set by probe() and not modified in later phases. */
180 enum fe_type type; /* interface type code */
181 char *typestr; /* printable name of the interface. */
182 int sc_iobase; /* MB86960A I/O base address */
183
184 u_char proto_dlcr4; /* DLCR4 prototype. */
185 u_char proto_dlcr5; /* DLCR5 prototype. */
186 u_char proto_dlcr6; /* DLCR6 prototype. */
187 u_char proto_dlcr7; /* DLCR7 prototype. */
188 u_char proto_bmpr13; /* BMPR13 prototype. */
189
190 /* Vendor specific hooks. */
191 void (*init) __P((struct fe_softc *)); /* Just before fe_init(). */
192 void (*stop) __P((struct fe_softc *)); /* Just after fe_stop(). */
193
194 /* Transmission buffer management. */
195 u_short txb_size; /* total bytes in TX buffer */
196 u_short txb_free; /* free bytes in TX buffer */
197 u_char txb_count; /* number of packets in TX buffer */
198 u_char txb_sched; /* number of scheduled packets */
199 u_char txb_padding; /* number of delayed padding bytes */
200
201 /* Multicast address filter management. */
202 u_char filter_change; /* MARs must be changed ASAP. */
203 u_char filter[FE_FILTER_LEN]; /* new filter value. */
204
205 u_int8_t sc_enaddr[ETHER_ADDR_LEN];
206
207 #if NRND > 0
208 rndsource_element_t rnd_source;
209 #endif
210 };
211
212 /* Standard driver entry points. These can be static. */
213 int feprobe __P((struct device *, void *, void *));
214 void feattach __P((struct device *, struct device *, void *));
215 int feintr __P((void *));
216 void fe_init __P((struct fe_softc *));
217 int fe_ioctl __P((struct ifnet *, u_long, caddr_t));
218 void fe_start __P((struct ifnet *));
219 void fe_reset __P((struct fe_softc *));
220 void fe_watchdog __P((struct ifnet *));
221
222 /* Local functions. Order of declaration is confused. FIXME. */
223 int fe_probe_fmv __P((struct fe_softc *, struct isa_attach_args *));
224 int fe_probe_ati __P((struct fe_softc *, struct isa_attach_args *));
225 int fe_probe_mbh __P((struct fe_softc *, struct isa_attach_args *));
226 void fe_read_eeprom __P((struct fe_softc *, u_char *));
227 void fe_init_mbh __P((struct fe_softc *));
228 int fe_get_packet __P((struct fe_softc *, int));
229 void fe_stop __P((struct fe_softc *));
230 void fe_tint __P((struct fe_softc *, u_char));
231 void fe_rint __P((struct fe_softc *, u_char));
232 static inline
233 void fe_xmit __P((struct fe_softc *));
234 void fe_write_mbufs __P((struct fe_softc *, struct mbuf *));
235 static inline
236 void fe_droppacket __P((struct fe_softc *));
237 void fe_getmcaf __P((struct ethercom *, u_char *));
238 void fe_setmode __P((struct fe_softc *));
239 void fe_loadmar __P((struct fe_softc *));
240 #if FE_DEBUG >= 1
241 void fe_dump __P((int, struct fe_softc *));
242 #endif
243
244 struct cfattach fe_ca = {
245 sizeof(struct fe_softc), feprobe, feattach
246 };
247
248 /* Ethernet constants. To be defined in if_ehter.h? FIXME. */
249 #define ETHER_MIN_LEN 60 /* with header, without CRC. */
250 #define ETHER_MAX_LEN 1514 /* with header, without CRC. */
251 #define ETHER_ADDR_LEN 6 /* number of bytes in an address. */
252 #define ETHER_HDR_SIZE 14 /* src addr, dst addr, and data type. */
253
254 /*
255 * Fe driver specific constants which relate to 86960/86965.
256 */
257
258 /* Interrupt masks. */
259 #define FE_TMASK (FE_D2_COLL16 | FE_D2_TXDONE)
260 #define FE_RMASK (FE_D3_OVRFLO | FE_D3_CRCERR | \
261 FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY)
262
263 /* Maximum number of iterrations for a receive interrupt. */
264 #define FE_MAX_RECV_COUNT ((65536 - 2048 * 2) / 64)
265 /* Maximum size of SRAM is 65536,
266 * minimum size of transmission buffer in fe is 2x2KB,
267 * and minimum amount of received packet including headers
268 * added by the chip is 64 bytes.
269 * Hence FE_MAX_RECV_COUNT is the upper limit for number
270 * of packets in the receive buffer. */
271
272 /*
273 * Convenient routines to access contiguous I/O ports.
274 */
275
276 static inline void
277 inblk (int addr, u_char * mem, int len)
278 {
279 while (--len >= 0) {
280 *mem++ = inb(addr++);
281 }
282 }
283
284 static inline void
285 outblk (int addr, u_char const * mem, int len)
286 {
287 while (--len >= 0) {
288 outb(addr++, *mem++);
289 }
290 }
291
292 /*
293 * Hardware probe routines.
294 */
295
296 /*
297 * Determine if the device is present.
298 */
299 int
300 feprobe(parent, match, aux)
301 struct device *parent;
302 void *match, *aux;
303 {
304 struct fe_softc *sc = match;
305 struct isa_attach_args *ia = aux;
306
307 #if FE_DEBUG >= 2
308 log(LOG_INFO, "%s: %s\n", sc->sc_dev.dv_xname, fe_version);
309 #endif
310
311 /* Probe an address. */
312 sc->sc_iobase = ia->ia_iobase;
313
314 if (fe_probe_fmv(sc, ia))
315 return (1);
316 if (fe_probe_ati(sc, ia))
317 return (1);
318 if (fe_probe_mbh(sc, ia))
319 return (1);
320 return (0);
321 }
322
323 /*
324 * Check for specific bits in specific registers have specific values.
325 */
326 struct fe_simple_probe_struct {
327 u_char port; /* Offset from the base I/O address. */
328 u_char mask; /* Bits to be checked. */
329 u_char bits; /* Values to be compared against. */
330 };
331
332 static inline int
333 fe_simple_probe (int addr, struct fe_simple_probe_struct const * sp)
334 {
335 struct fe_simple_probe_struct const * p;
336
337 for (p = sp; p->mask != 0; p++) {
338 if ((inb(addr + p->port) & p->mask) != p->bits) {
339 return (0);
340 }
341 }
342 return (1);
343 }
344
345 /*
346 * Routines to read all bytes from the config EEPROM through MB86965A.
347 * I'm not sure what exactly I'm doing here... I was told just to follow
348 * the steps, and it worked. Could someone tell me why the following
349 * code works? (Or, why all similar codes I tried previously doesn't
350 * work.) FIXME.
351 */
352
353 static inline void
354 strobe (int bmpr16)
355 {
356 /*
357 * Output same value twice. To speed-down execution?
358 */
359 outb(bmpr16, FE_B16_SELECT);
360 outb(bmpr16, FE_B16_SELECT);
361 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
362 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
363 outb(bmpr16, FE_B16_SELECT);
364 outb(bmpr16, FE_B16_SELECT);
365 }
366
367 void
368 fe_read_eeprom(sc, data)
369 struct fe_softc *sc;
370 u_char *data;
371 {
372 int iobase = sc->sc_iobase;
373 int bmpr16 = iobase + FE_BMPR16;
374 int bmpr17 = iobase + FE_BMPR17;
375 u_char n, val, bit;
376
377 /* Read bytes from EEPROM; two bytes per an iterration. */
378 for (n = 0; n < FE_EEPROM_SIZE / 2; n++) {
379 /* Reset the EEPROM interface. */
380 outb(bmpr16, 0x00);
381 outb(bmpr17, 0x00);
382 outb(bmpr16, FE_B16_SELECT);
383
384 /* Start EEPROM access. */
385 outb(bmpr17, FE_B17_DATA);
386 strobe(bmpr16);
387
388 /* Pass the iterration count to the chip. */
389 val = 0x80 | n;
390 for (bit = 0x80; bit != 0x00; bit >>= 1) {
391 outb(bmpr17, (val & bit) ? FE_B17_DATA : 0);
392 strobe(bmpr16);
393 }
394 outb(bmpr17, 0x00);
395
396 /* Read a byte. */
397 val = 0;
398 for (bit = 0x80; bit != 0x00; bit >>= 1) {
399 strobe(bmpr16);
400 if (inb(bmpr17) & FE_B17_DATA)
401 val |= bit;
402 }
403 *data++ = val;
404
405 /* Read one more byte. */
406 val = 0;
407 for (bit = 0x80; bit != 0x00; bit >>= 1) {
408 strobe(bmpr16);
409 if (inb(bmpr17) & FE_B17_DATA)
410 val |= bit;
411 }
412 *data++ = val;
413 }
414
415 #if FE_DEBUG >= 3
416 /* Report what we got. */
417 data -= FE_EEPROM_SIZE;
418 log(LOG_INFO, "%s: EEPROM at %04x:"
419 " %02x%02x%02x%02x %02x%02x%02x%02x -"
420 " %02x%02x%02x%02x %02x%02x%02x%02x -"
421 " %02x%02x%02x%02x %02x%02x%02x%02x -"
422 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
423 sc->sc_dev.dv_xname, iobase,
424 data[ 0], data[ 1], data[ 2], data[ 3],
425 data[ 4], data[ 5], data[ 6], data[ 7],
426 data[ 8], data[ 9], data[10], data[11],
427 data[12], data[13], data[14], data[15],
428 data[16], data[17], data[18], data[19],
429 data[20], data[21], data[22], data[23],
430 data[24], data[25], data[26], data[27],
431 data[28], data[29], data[30], data[31]);
432 #endif
433 }
434
435 /*
436 * Hardware (vendor) specific probe routines.
437 */
438
439 /*
440 * Probe and initialization for Fujitsu FMV-180 series boards
441 */
442 int
443 fe_probe_fmv(sc, ia)
444 struct fe_softc *sc;
445 struct isa_attach_args *ia;
446 {
447 int i, n;
448 int iobase = sc->sc_iobase;
449 int irq;
450
451 static int const iomap[8] =
452 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 };
453 static int const irqmap[4] =
454 { 3, 7, 10, 15 };
455
456 static struct fe_simple_probe_struct const probe_table[] = {
457 { FE_DLCR2, 0x70, 0x00 },
458 { FE_DLCR4, 0x08, 0x00 },
459 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
460
461 { FE_FMV0, FE_FMV0_MAGIC_MASK, FE_FMV0_MAGIC_VALUE },
462 { FE_FMV1, FE_FMV1_CARDID_MASK, FE_FMV1_CARDID_ID },
463 { FE_FMV3, FE_FMV3_EXTRA_MASK, FE_FMV3_EXTRA_VALUE },
464 #if 1
465 /*
466 * Test *vendor* part of the station address for Fujitsu.
467 * The test will gain reliability of probe process, but
468 * it rejects FMV-180 clone boards manufactured by other vendors.
469 * We have to turn the test off when such cards are made available.
470 */
471 { FE_FMV4, 0xFF, 0x00 },
472 { FE_FMV5, 0xFF, 0x00 },
473 { FE_FMV6, 0xFF, 0x0E },
474 #else
475 /*
476 * We can always verify the *first* 2 bits (in Ehternet
477 * bit order) are "no multicast" and "no local" even for
478 * unknown vendors.
479 */
480 { FE_FMV4, 0x03, 0x00 },
481 #endif
482 { 0 }
483 };
484
485 #if 0
486 /*
487 * Dont probe at all if the config says we are PCMCIA...
488 */
489 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
490 return (0);
491 #endif
492
493 /*
494 * See if the sepcified address is possible for FMV-180 series.
495 */
496 for (i = 0; i < 8; i++) {
497 if (iomap[i] == iobase)
498 break;
499 }
500 if (i == 8)
501 return (0);
502
503 /* Simple probe. */
504 if (!fe_simple_probe(iobase, probe_table))
505 return (0);
506
507 /* Check if our I/O address matches config info on EEPROM. */
508 n = (inb(iobase + FE_FMV2) & FE_FMV2_ADDR) >> FE_FMV2_ADDR_SHIFT;
509 if (iomap[n] != iobase)
510 return (0);
511
512 /* Determine the card type. */
513 switch (inb(iobase + FE_FMV0) & FE_FMV0_MODEL) {
514 case FE_FMV0_MODEL_FMV181:
515 sc->type = FE_TYPE_FMV181;
516 sc->typestr = "FMV-181";
517 break;
518 case FE_FMV0_MODEL_FMV182:
519 sc->type = FE_TYPE_FMV182;
520 sc->typestr = "FMV-182";
521 break;
522 default:
523 /* Unknown card type: maybe a new model, but... */
524 return (0);
525 }
526
527 /*
528 * An FMV-180 has successfully been proved.
529 * Determine which IRQ to be used.
530 *
531 * In this version, we always get an IRQ assignment from the
532 * FMV-180's configuration EEPROM, ignoring that specified in
533 * config file.
534 */
535 n = (inb(iobase + FE_FMV2) & FE_FMV2_IRQ) >> FE_FMV2_IRQ_SHIFT;
536 irq = irqmap[n];
537
538 if (ia->ia_irq != IRQUNK) {
539 if (ia->ia_irq != irq) {
540 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
541 sc->sc_dev.dv_xname, ia->ia_irq, irq);
542 return (0);
543 }
544 } else
545 ia->ia_irq = irq;
546
547 /*
548 * Initialize constants in the per-line structure.
549 */
550
551 /* Get our station address from EEPROM. */
552 inblk(iobase + FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
553
554 /* Make sure we got a valid station address. */
555 if ((sc->sc_enaddr[0] & 0x03) != 0x00
556 || (sc->sc_enaddr[0] == 0x00
557 && sc->sc_enaddr[1] == 0x00
558 && sc->sc_enaddr[2] == 0x00))
559 return (0);
560
561 /* Register values which depend on board design. */
562 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
563 sc->proto_dlcr5 = 0;
564 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
565 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
566
567 /*
568 * Program the 86960 as follows:
569 * SRAM: 32KB, 100ns, byte-wide access.
570 * Transmission buffer: 4KB x 2.
571 * System bus interface: 16 bits.
572 * We cannot change these values but TXBSIZE, because they
573 * are hard-wired on the board. Modifying TXBSIZE will affect
574 * the driver performance.
575 */
576 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
577 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
578
579 /*
580 * Minimum initialization of the hardware.
581 * We write into registers; hope I/O ports have no
582 * overlap with other boards.
583 */
584
585 /* Initialize ASIC. */
586 outb(iobase + FE_FMV3, 0);
587 outb(iobase + FE_FMV10, 0);
588
589 /* Wait for a while. I'm not sure this is necessary. FIXME. */
590 delay(200);
591
592 /* Initialize 86960. */
593 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
594 delay(200);
595
596 /* Disable all interrupts. */
597 outb(iobase + FE_DLCR2, 0);
598 outb(iobase + FE_DLCR3, 0);
599
600 /* Turn the "master interrupt control" flag of ASIC on. */
601 outb(iobase + FE_FMV3, FE_FMV3_ENABLE_FLAG);
602
603 /*
604 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
605 */
606 ia->ia_iosize = 32;
607 ia->ia_msize = 0;
608 return (1);
609 }
610
611 /*
612 * Probe and initialization for Allied-Telesis AT1700/RE2000 series.
613 */
614 int
615 fe_probe_ati(sc, ia)
616 struct fe_softc *sc;
617 struct isa_attach_args *ia;
618 {
619 int i, n;
620 int iobase = sc->sc_iobase;
621 u_char eeprom[FE_EEPROM_SIZE];
622 u_char save16, save17;
623 int irq;
624
625 static int const iomap[8] =
626 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
627 static int const irqmap[4][4] = {
628 { 3, 4, 5, 9 },
629 { 10, 11, 12, 15 },
630 { 3, 11, 5, 15 },
631 { 10, 11, 14, 15 },
632 };
633 static struct fe_simple_probe_struct const probe_table[] = {
634 { FE_DLCR2, 0x70, 0x00 },
635 { FE_DLCR4, 0x08, 0x00 },
636 { FE_DLCR5, 0x80, 0x00 },
637 #if 0
638 { FE_BMPR16, 0x1B, 0x00 },
639 { FE_BMPR17, 0x7F, 0x00 },
640 #endif
641 { 0 }
642 };
643
644 #if 0
645 /*
646 * Don't probe at all if the config says we are PCMCIA...
647 */
648 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
649 return (0);
650 #endif
651
652 #if FE_DEBUG >= 4
653 log(LOG_INFO, "%s: probe (0x%x) for ATI\n", sc->sc_dev.dv_xname, iobase);
654 fe_dump(LOG_INFO, sc);
655 #endif
656
657 /*
658 * See if the sepcified address is possible for MB86965A JLI mode.
659 */
660 for (i = 0; i < 8; i++) {
661 if (iomap[i] == iobase)
662 break;
663 }
664 if (i == 8)
665 return (0);
666
667 /*
668 * We should test if MB86965A is on the base address now.
669 * Unfortunately, it is very hard to probe it reliably, since
670 * we have no way to reset the chip under software control.
671 * On cold boot, we could check the "signature" bit patterns
672 * described in the Fujitsu document. On warm boot, however,
673 * we can predict almost nothing about register values.
674 */
675 if (!fe_simple_probe(iobase, probe_table))
676 return (0);
677
678 /* Save old values of the registers. */
679 save16 = inb(iobase + FE_BMPR16);
680 save17 = inb(iobase + FE_BMPR17);
681
682 /* Check if our I/O address matches config info on 86965. */
683 n = (inb(iobase + FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
684 if (iomap[n] != iobase)
685 goto fail;
686
687 /*
688 * We are now almost sure we have an AT1700 at the given
689 * address. So, read EEPROM through 86965. We have to write
690 * into LSI registers to read from EEPROM. I want to avoid it
691 * at this stage, but I cannot test the presense of the chip
692 * any further without reading EEPROM. FIXME.
693 */
694 fe_read_eeprom(sc, eeprom);
695
696 /* Make sure the EEPROM is turned off. */
697 outb(iobase + FE_BMPR16, 0);
698 outb(iobase + FE_BMPR17, 0);
699
700 /* Make sure that config info in EEPROM and 86965 agree. */
701 if (eeprom[FE_EEPROM_CONF] != inb(iobase + FE_BMPR19))
702 goto fail;
703
704 /*
705 * Determine the card type.
706 */
707 switch (eeprom[FE_ATI_EEP_MODEL]) {
708 case FE_ATI_MODEL_AT1700T:
709 sc->type = FE_TYPE_AT1700T;
710 sc->typestr = "AT-1700T";
711 break;
712 case FE_ATI_MODEL_AT1700BT:
713 sc->type = FE_TYPE_AT1700BT;
714 sc->typestr = "AT-1700BT";
715 break;
716 case FE_ATI_MODEL_AT1700FT:
717 sc->type = FE_TYPE_AT1700FT;
718 sc->typestr = "AT-1700FT";
719 break;
720 case FE_ATI_MODEL_AT1700AT:
721 sc->type = FE_TYPE_AT1700AT;
722 sc->typestr = "AT-1700AT";
723 break;
724 default:
725 sc->type = FE_TYPE_RE2000;
726 sc->typestr = "unknown (RE-2000?)";
727 break;
728 }
729
730 /*
731 * Try to determine IRQ settings.
732 * Different models use different ranges of IRQs.
733 */
734 n = (inb(iobase + FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
735 switch (eeprom[FE_ATI_EEP_REVISION] & 0xf0) {
736 case 0x30:
737 irq = irqmap[3][n];
738 break;
739 case 0x10:
740 case 0x50:
741 irq = irqmap[2][n];
742 break;
743 case 0x40:
744 case 0x60:
745 if (eeprom[FE_ATI_EEP_MAGIC] & 0x04) {
746 irq = irqmap[1][n];
747 break;
748 }
749 default:
750 irq = irqmap[0][n];
751 break;
752 }
753
754 if (ia->ia_irq != IRQUNK) {
755 if (ia->ia_irq != irq) {
756 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
757 sc->sc_dev.dv_xname, ia->ia_irq, irq);
758 return (0);
759 }
760 } else
761 ia->ia_irq = irq;
762
763 /*
764 * Initialize constants in the per-line structure.
765 */
766
767 /* Get our station address from EEPROM. */
768 bcopy(eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
769
770 /* Make sure we got a valid station address. */
771 if ((sc->sc_enaddr[0] & 0x03) != 0x00
772 || (sc->sc_enaddr[0] == 0x00
773 && sc->sc_enaddr[1] == 0x00
774 && sc->sc_enaddr[2] == 0x00))
775 goto fail;
776
777 /* Should find all register prototypes here. FIXME. */
778 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */
779 sc->proto_dlcr5 = 0;
780 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
781 #if 0 /* XXXX Should we use this? */
782 sc->proto_bmpr13 = eeprom[FE_ATI_EEP_MEDIA];
783 #else
784 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
785 #endif
786
787 /*
788 * Program the 86965 as follows:
789 * SRAM: 32KB, 100ns, byte-wide access.
790 * Transmission buffer: 4KB x 2.
791 * System bus interface: 16 bits.
792 * We cannot change these values but TXBSIZE, because they
793 * are hard-wired on the board. Modifying TXBSIZE will affect
794 * the driver performance.
795 */
796 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
797 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
798
799 #if FE_DEBUG >= 3
800 log(LOG_INFO, "%s: ATI found\n", sc->sc_dev.dv_xname);
801 fe_dump(LOG_INFO, sc);
802 #endif
803
804 /* Initialize 86965. */
805 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
806 delay(200);
807
808 /* Disable all interrupts. */
809 outb(iobase + FE_DLCR2, 0);
810 outb(iobase + FE_DLCR3, 0);
811
812 #if FE_DEBUG >= 3
813 log(LOG_INFO, "%s: end of fe_probe_ati()\n", sc->sc_dev.dv_xname);
814 fe_dump(LOG_INFO, sc);
815 #endif
816
817 /*
818 * That's all. AT1700 occupies 32 I/O addresses, by the way.
819 */
820 ia->ia_iosize = 32;
821 ia->ia_msize = 0;
822 return (1);
823
824 fail:
825 /* Restore register values, in the case we had no 86965. */
826 outb(iobase + FE_BMPR16, save16);
827 outb(iobase + FE_BMPR17, save17);
828 return (0);
829 }
830
831 /*
832 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
833 */
834 int
835 fe_probe_mbh(sc, ia)
836 struct fe_softc *sc;
837 struct isa_attach_args *ia;
838 {
839 int iobase = sc->sc_iobase;
840
841 static struct fe_simple_probe_struct probe_table[] = {
842 { FE_DLCR2, 0x70, 0x00 },
843 { FE_DLCR4, 0x08, 0x00 },
844 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
845 #if 0
846 /*
847 * Test *vendor* part of the address for Fujitsu.
848 * The test will gain reliability of probe process, but
849 * it rejects clones by other vendors, or OEM product
850 * supplied by resalers other than Fujitsu.
851 */
852 { FE_MBH10, 0xFF, 0x00 },
853 { FE_MBH11, 0xFF, 0x00 },
854 { FE_MBH12, 0xFF, 0x0E },
855 #else
856 /*
857 * We can always verify the *first* 2 bits (in Ehternet
858 * bit order) are "global" and "unicast" even for
859 * unknown vendors.
860 */
861 { FE_MBH10, 0x03, 0x00 },
862 #endif
863 /* Just a gap? Seems reliable, anyway. */
864 { 0x12, 0xFF, 0x00 },
865 { 0x13, 0xFF, 0x00 },
866 { 0x14, 0xFF, 0x00 },
867 { 0x15, 0xFF, 0x00 },
868 { 0x16, 0xFF, 0x00 },
869 { 0x17, 0xFF, 0x00 },
870 { 0x18, 0xFF, 0xFF },
871 { 0x19, 0xFF, 0xFF },
872
873 { 0 }
874 };
875
876 #if 0
877 /*
878 * We need a PCMCIA flag.
879 */
880 if ((cf->cf_flags & FE_FLAGS_PCMCIA) == 0)
881 return (0);
882 #endif
883
884 /*
885 * We need explicit IRQ and supported address.
886 */
887 if (ia->ia_irq == IRQUNK || (iobase & ~0x3E0) != 0)
888 return (0);
889
890 #if FE_DEBUG >= 3
891 log(LOG_INFO, "%s: top of fe_probe_mbh()\n", sc->sc_dev.dv_xname);
892 fe_dump(LOG_INFO, sc);
893 #endif
894
895 /*
896 * See if MBH10302 is on its address.
897 * I'm not sure the following probe code works. FIXME.
898 */
899 if (!fe_simple_probe(iobase, probe_table))
900 return (0);
901
902 /* Determine the card type. */
903 sc->type = FE_TYPE_MBH10302;
904 sc->typestr = "MBH10302 (PCMCIA)";
905
906 /*
907 * Initialize constants in the per-line structure.
908 */
909
910 /* Get our station address from EEPROM. */
911 inblk(iobase + FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN);
912
913 /* Make sure we got a valid station address. */
914 if ((sc->sc_enaddr[0] & 0x03) != 0x00
915 || (sc->sc_enaddr[0] == 0x00
916 && sc->sc_enaddr[1] == 0x00
917 && sc->sc_enaddr[2] == 0x00))
918 return (0);
919
920 /* Should find all register prototypes here. FIXME. */
921 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
922 sc->proto_dlcr5 = 0;
923 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
924 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
925
926 /*
927 * Program the 86960 as follows:
928 * SRAM: 32KB, 100ns, byte-wide access.
929 * Transmission buffer: 4KB x 2.
930 * System bus interface: 16 bits.
931 * We cannot change these values but TXBSIZE, because they
932 * are hard-wired on the board. Modifying TXBSIZE will affect
933 * the driver performance.
934 */
935 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
936 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
937
938 /* Setup hooks. We need a special initialization procedure. */
939 sc->init = fe_init_mbh;
940
941 /*
942 * Minimum initialization.
943 */
944
945 /* Wait for a while. I'm not sure this is necessary. FIXME. */
946 delay(200);
947
948 /* Minimul initialization of 86960. */
949 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
950 delay(200);
951
952 /* Disable all interrupts. */
953 outb(iobase + FE_DLCR2, 0);
954 outb(iobase + FE_DLCR3, 0);
955
956 #if 1 /* FIXME. */
957 /* Initialize system bus interface and encoder/decoder operation. */
958 outb(iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE);
959 #endif
960
961 /*
962 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
963 */
964 ia->ia_iosize = 32;
965 ia->ia_msize = 0;
966 return (1);
967 }
968
969 /* MBH specific initialization routine. */
970 void
971 fe_init_mbh(sc)
972 struct fe_softc *sc;
973 {
974
975 /* Probably required after hot-insertion... */
976
977 /* Wait for a while. I'm not sure this is necessary. FIXME. */
978 delay(200);
979
980 /* Minimul initialization of 86960. */
981 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
982 delay(200);
983
984 /* Disable all interrupts. */
985 outb(sc->sc_iobase + FE_DLCR2, 0);
986 outb(sc->sc_iobase + FE_DLCR3, 0);
987
988 /* Enable master interrupt flag. */
989 outb(sc->sc_iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE);
990 }
991
992 /*
993 * Install interface into kernel networking data structures
994 */
995 void
996 feattach(parent, self, aux)
997 struct device *parent, *self;
998 void *aux;
999 {
1000 struct fe_softc *sc = (void *)self;
1001 struct isa_attach_args *ia = aux;
1002 struct cfdata *cf = sc->sc_dev.dv_cfdata;
1003 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1004
1005 /* Stop the 86960. */
1006 fe_stop(sc);
1007
1008 /* Initialize ifnet structure. */
1009 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
1010 ifp->if_softc = sc;
1011 ifp->if_start = fe_start;
1012 ifp->if_ioctl = fe_ioctl;
1013 ifp->if_watchdog = fe_watchdog;
1014 ifp->if_flags =
1015 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
1016
1017 /*
1018 * Set maximum size of output queue, if it has not been set.
1019 * It is done here as this driver may be started after the
1020 * system intialization (i.e., the interface is PCMCIA.)
1021 *
1022 * I'm not sure this is really necessary, but, even if it is,
1023 * it should be done somewhere else, e.g., in if_attach(),
1024 * since it must be a common workaround for all network drivers.
1025 * FIXME.
1026 */
1027 if (ifp->if_snd.ifq_maxlen == 0) {
1028 extern int ifqmaxlen; /* Don't be so shocked... */
1029 ifp->if_snd.ifq_maxlen = ifqmaxlen;
1030 }
1031
1032 #if FE_DEBUG >= 3
1033 log(LOG_INFO, "%s: feattach()\n", sc->sc_dev.dv_xname);
1034 fe_dump(LOG_INFO, sc);
1035 #endif
1036
1037 #if FE_SINGLE_TRANSMISSION
1038 /* Override txb config to allocate minimum. */
1039 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
1040 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1041 #endif
1042
1043 /* Modify hardware config if it is requested. */
1044 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
1045 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
1046
1047 /* Find TX buffer size, based on the hardware dependent proto. */
1048 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1049 case FE_D6_TXBSIZ_2x2KB:
1050 sc->txb_size = 2048;
1051 break;
1052 case FE_D6_TXBSIZ_2x4KB:
1053 sc->txb_size = 4096;
1054 break;
1055 case FE_D6_TXBSIZ_2x8KB:
1056 sc->txb_size = 8192;
1057 break;
1058 default:
1059 /* Oops, we can't work with single buffer configuration. */
1060 #if FE_DEBUG >= 2
1061 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
1062 sc->sc_dev.dv_xname);
1063 #endif
1064 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
1065 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1066 sc->txb_size = 2048;
1067 break;
1068 }
1069
1070 /* Attach the interface. */
1071 if_attach(ifp);
1072 ether_ifattach(ifp, sc->sc_enaddr);
1073
1074 /* Print additional info when attached. */
1075 printf(": address %s, type %s\n",
1076 ether_sprintf(sc->sc_enaddr), sc->typestr);
1077 #if FE_DEBUG >= 3
1078 {
1079 int buf, txb, bbw, sbw, ram;
1080
1081 buf = txb = bbw = sbw = ram = -1;
1082 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
1083 case FE_D6_BUFSIZ_8KB:
1084 buf = 8;
1085 break;
1086 case FE_D6_BUFSIZ_16KB:
1087 buf = 16;
1088 break;
1089 case FE_D6_BUFSIZ_32KB:
1090 buf = 32;
1091 break;
1092 case FE_D6_BUFSIZ_64KB:
1093 buf = 64;
1094 break;
1095 }
1096 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1097 case FE_D6_TXBSIZ_2x2KB:
1098 txb = 2;
1099 break;
1100 case FE_D6_TXBSIZ_2x4KB:
1101 txb = 4;
1102 break;
1103 case FE_D6_TXBSIZ_2x8KB:
1104 txb = 8;
1105 break;
1106 }
1107 switch (sc->proto_dlcr6 & FE_D6_BBW) {
1108 case FE_D6_BBW_BYTE:
1109 bbw = 8;
1110 break;
1111 case FE_D6_BBW_WORD:
1112 bbw = 16;
1113 break;
1114 }
1115 switch (sc->proto_dlcr6 & FE_D6_SBW) {
1116 case FE_D6_SBW_BYTE:
1117 sbw = 8;
1118 break;
1119 case FE_D6_SBW_WORD:
1120 sbw = 16;
1121 break;
1122 }
1123 switch (sc->proto_dlcr6 & FE_D6_SRAM) {
1124 case FE_D6_SRAM_100ns:
1125 ram = 100;
1126 break;
1127 case FE_D6_SRAM_150ns:
1128 ram = 150;
1129 break;
1130 }
1131 printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
1132 sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw);
1133 }
1134 #endif
1135
1136 #if NBPFILTER > 0
1137 /* If BPF is in the kernel, call the attach for it. */
1138 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
1139 #endif
1140
1141 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
1142 IPL_NET, feintr, sc);
1143
1144 #if NRND > 0
1145 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
1146 RND_TYPE_NET);
1147 #endif
1148 }
1149
1150 /*
1151 * Reset interface.
1152 */
1153 void
1154 fe_reset(sc)
1155 struct fe_softc *sc;
1156 {
1157 int s;
1158
1159 s = splnet();
1160 fe_stop(sc);
1161 fe_init(sc);
1162 splx(s);
1163 }
1164
1165 /*
1166 * Stop everything on the interface.
1167 *
1168 * All buffered packets, both transmitting and receiving,
1169 * if any, will be lost by stopping the interface.
1170 */
1171 void
1172 fe_stop(sc)
1173 struct fe_softc *sc;
1174 {
1175
1176 #if FE_DEBUG >= 3
1177 log(LOG_INFO, "%s: top of fe_stop()\n", sc->sc_dev.dv_xname);
1178 fe_dump(LOG_INFO, sc);
1179 #endif
1180
1181 /* Disable interrupts. */
1182 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1183 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1184
1185 /* Stop interface hardware. */
1186 delay(200);
1187 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1188 delay(200);
1189
1190 /* Clear all interrupt status. */
1191 outb(sc->sc_iobase + FE_DLCR0, 0xFF);
1192 outb(sc->sc_iobase + FE_DLCR1, 0xFF);
1193
1194 /* Put the chip in stand-by mode. */
1195 delay(200);
1196 outb(sc->sc_iobase + FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
1197 delay(200);
1198
1199 /* MAR loading can be delayed. */
1200 sc->filter_change = 0;
1201
1202 /* Call a hook. */
1203 if (sc->stop)
1204 sc->stop(sc);
1205
1206 #if DEBUG >= 3
1207 log(LOG_INFO, "%s: end of fe_stop()\n", sc->sc_dev.dv_xname);
1208 fe_dump(LOG_INFO, sc);
1209 #endif
1210 }
1211
1212 /*
1213 * Device timeout/watchdog routine. Entered if the device neglects to
1214 * generate an interrupt after a transmit has been started on it.
1215 */
1216 void
1217 fe_watchdog(ifp)
1218 struct ifnet *ifp;
1219 {
1220 struct fe_softc *sc = ifp->if_softc;
1221
1222 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1223 #if FE_DEBUG >= 3
1224 fe_dump(LOG_INFO, sc);
1225 #endif
1226
1227 /* Record how many packets are lost by this accident. */
1228 sc->sc_ethercom.ec_if.if_oerrors += sc->txb_sched + sc->txb_count;
1229
1230 fe_reset(sc);
1231 }
1232
1233 /*
1234 * Drop (skip) a packet from receive buffer in 86960 memory.
1235 */
1236 static inline void
1237 fe_droppacket(sc)
1238 struct fe_softc *sc;
1239 {
1240
1241 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
1242 }
1243
1244 /*
1245 * Initialize device.
1246 */
1247 void
1248 fe_init(sc)
1249 struct fe_softc *sc;
1250 {
1251 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1252 int i;
1253
1254 #if FE_DEBUG >= 3
1255 log(LOG_INFO, "%s: top of fe_init()\n", sc->sc_dev.dv_xname);
1256 fe_dump(LOG_INFO, sc);
1257 #endif
1258
1259 /* Reset transmitter flags. */
1260 ifp->if_flags &= ~IFF_OACTIVE;
1261 ifp->if_timer = 0;
1262
1263 sc->txb_free = sc->txb_size;
1264 sc->txb_count = 0;
1265 sc->txb_sched = 0;
1266
1267 /* Call a hook. */
1268 if (sc->init)
1269 sc->init(sc);
1270
1271 #if FE_DEBUG >= 3
1272 log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname);
1273 fe_dump(LOG_INFO, sc);
1274 #endif
1275
1276 /*
1277 * Make sure to disable the chip, also.
1278 * This may also help re-programming the chip after
1279 * hot insertion of PCMCIAs.
1280 */
1281 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1282
1283 /* Power up the chip and select register bank for DLCRs. */
1284 delay(200);
1285 outb(sc->sc_iobase + FE_DLCR7,
1286 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1287 delay(200);
1288
1289 /* Feed the station address. */
1290 outblk(sc->sc_iobase + FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1291
1292 /* Select the BMPR bank for runtime register access. */
1293 outb(sc->sc_iobase + FE_DLCR7,
1294 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1295
1296 /* Initialize registers. */
1297 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1298 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1299 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1300 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1301 outb(sc->sc_iobase + FE_DLCR4, sc->proto_dlcr4);
1302 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5);
1303 outb(sc->sc_iobase + FE_BMPR10, 0x00);
1304 outb(sc->sc_iobase + FE_BMPR11, FE_B11_CTRL_SKIP);
1305 outb(sc->sc_iobase + FE_BMPR12, 0x00);
1306 outb(sc->sc_iobase + FE_BMPR13, sc->proto_bmpr13);
1307 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER);
1308 outb(sc->sc_iobase + FE_BMPR15, 0x00);
1309
1310 #if FE_DEBUG >= 3
1311 log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname);
1312 fe_dump(LOG_INFO, sc);
1313 #endif
1314
1315 /* Enable interrupts. */
1316 outb(sc->sc_iobase + FE_DLCR2, FE_TMASK);
1317 outb(sc->sc_iobase + FE_DLCR3, FE_RMASK);
1318
1319 /* Enable transmitter and receiver. */
1320 delay(200);
1321 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1322 delay(200);
1323
1324 #if FE_DEBUG >= 3
1325 log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname);
1326 fe_dump(LOG_INFO, sc);
1327 #endif
1328
1329 /*
1330 * Make sure to empty the receive buffer.
1331 *
1332 * This may be redundant, but *if* the receive buffer were full
1333 * at this point, the driver would hang. I have experienced
1334 * some strange hangups just after UP. I hope the following
1335 * code solve the problem.
1336 *
1337 * I have changed the order of hardware initialization.
1338 * I think the receive buffer cannot have any packets at this
1339 * point in this version. The following code *must* be
1340 * redundant now. FIXME.
1341 */
1342 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1343 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1344 break;
1345 fe_droppacket(sc);
1346 }
1347 #if FE_DEBUG >= 1
1348 if (i >= FE_MAX_RECV_COUNT) {
1349 log(LOG_ERR, "%s: cannot empty receive buffer\n",
1350 sc->sc_dev.dv_xname);
1351 }
1352 #endif
1353 #if FE_DEBUG >= 3
1354 if (i < FE_MAX_RECV_COUNT) {
1355 log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
1356 sc->sc_dev.dv_xname, i);
1357 }
1358 #endif
1359
1360 #if FE_DEBUG >= 3
1361 log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname);
1362 fe_dump(LOG_INFO, sc);
1363 #endif
1364
1365 /* Do we need this here? */
1366 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1367 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1368
1369 #if FE_DEBUG >= 3
1370 log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname);
1371 fe_dump(LOG_INFO, sc);
1372 #endif
1373
1374 /* Set 'running' flag. */
1375 ifp->if_flags |= IFF_RUNNING;
1376
1377 /*
1378 * At this point, the interface is runnung properly,
1379 * except that it receives *no* packets. we then call
1380 * fe_setmode() to tell the chip what packets to be
1381 * received, based on the if_flags and multicast group
1382 * list. It completes the initialization process.
1383 */
1384 fe_setmode(sc);
1385
1386 #if FE_DEBUG >= 3
1387 log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname);
1388 fe_dump(LOG_INFO, sc);
1389 #endif
1390
1391 /* ...and attempt to start output. */
1392 fe_start(ifp);
1393
1394 #if FE_DEBUG >= 3
1395 log(LOG_INFO, "%s: end of fe_init()\n", sc->sc_dev.dv_xname);
1396 fe_dump(LOG_INFO, sc);
1397 #endif
1398 }
1399
1400 /*
1401 * This routine actually starts the transmission on the interface
1402 */
1403 static inline void
1404 fe_xmit(sc)
1405 struct fe_softc *sc;
1406 {
1407
1408 /*
1409 * Set a timer just in case we never hear from the board again.
1410 * We use longer timeout for multiple packet transmission.
1411 * I'm not sure this timer value is appropriate. FIXME.
1412 */
1413 sc->sc_ethercom.ec_if.if_timer = 1 + sc->txb_count;
1414
1415 /* Update txb variables. */
1416 sc->txb_sched = sc->txb_count;
1417 sc->txb_count = 0;
1418 sc->txb_free = sc->txb_size;
1419
1420 #if FE_DELAYED_PADDING
1421 /* Omit the postponed padding process. */
1422 sc->txb_padding = 0;
1423 #endif
1424
1425 /* Start transmitter, passing packets in TX buffer. */
1426 outb(sc->sc_iobase + FE_BMPR10, sc->txb_sched | FE_B10_START);
1427 }
1428
1429 /*
1430 * Start output on interface.
1431 * We make two assumptions here:
1432 * 1) that the current priority is set to splnet _before_ this code
1433 * is called *and* is returned to the appropriate priority after
1434 * return
1435 * 2) that the IFF_OACTIVE flag is checked before this code is called
1436 * (i.e. that the output part of the interface is idle)
1437 */
1438 void
1439 fe_start(ifp)
1440 struct ifnet *ifp;
1441 {
1442 struct fe_softc *sc = ifp->if_softc;
1443 struct mbuf *m;
1444
1445 #if FE_DEBUG >= 1
1446 /* Just a sanity check. */
1447 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1448 /*
1449 * Txb_count and txb_free co-works to manage the
1450 * transmission buffer. Txb_count keeps track of the
1451 * used potion of the buffer, while txb_free does unused
1452 * potion. So, as long as the driver runs properly,
1453 * txb_count is zero if and only if txb_free is same
1454 * as txb_size (which represents whole buffer.)
1455 */
1456 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
1457 sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free);
1458 /*
1459 * So, what should I do, then?
1460 *
1461 * We now know txb_count and txb_free contradicts. We
1462 * cannot, however, tell which is wrong. More
1463 * over, we cannot peek 86960 transmission buffer or
1464 * reset the transmission buffer. (In fact, we can
1465 * reset the entire interface. I don't want to do it.)
1466 *
1467 * If txb_count is incorrect, leaving it as is will cause
1468 * sending of gabages after next interrupt. We have to
1469 * avoid it. Hence, we reset the txb_count here. If
1470 * txb_free was incorrect, resetting txb_count just loose
1471 * some packets. We can live with it.
1472 */
1473 sc->txb_count = 0;
1474 }
1475 #endif
1476
1477 #if FE_DEBUG >= 1
1478 /*
1479 * First, see if there are buffered packets and an idle
1480 * transmitter - should never happen at this point.
1481 */
1482 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1483 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
1484 sc->sc_dev.dv_xname, sc->txb_count);
1485 fe_xmit(sc);
1486 }
1487 #endif
1488
1489 /*
1490 * Stop accepting more transmission packets temporarily, when
1491 * a filter change request is delayed. Updating the MARs on
1492 * 86960 flushes the transmisstion buffer, so it is delayed
1493 * until all buffered transmission packets have been sent
1494 * out.
1495 */
1496 if (sc->filter_change) {
1497 /*
1498 * Filter change requst is delayed only when the DLC is
1499 * working. DLC soon raise an interrupt after finishing
1500 * the work.
1501 */
1502 goto indicate_active;
1503 }
1504
1505 for (;;) {
1506 /*
1507 * See if there is room to put another packet in the buffer.
1508 * We *could* do better job by peeking the send queue to
1509 * know the length of the next packet. Current version just
1510 * tests against the worst case (i.e., longest packet). FIXME.
1511 *
1512 * When adding the packet-peek feature, don't forget adding a
1513 * test on txb_count against QUEUEING_MAX.
1514 * There is a little chance the packet count exceeds
1515 * the limit. Assume transmission buffer is 8KB (2x8KB
1516 * configuration) and an application sends a bunch of small
1517 * (i.e., minimum packet sized) packets rapidly. An 8KB
1518 * buffer can hold 130 blocks of 62 bytes long...
1519 */
1520 if (sc->txb_free < ETHER_MAX_LEN + FE_DATA_LEN_LEN) {
1521 /* No room. */
1522 goto indicate_active;
1523 }
1524
1525 #if FE_SINGLE_TRANSMISSION
1526 if (sc->txb_count > 0) {
1527 /* Just one packet per a transmission buffer. */
1528 goto indicate_active;
1529 }
1530 #endif
1531
1532 /*
1533 * Get the next mbuf chain for a packet to send.
1534 */
1535 IF_DEQUEUE(&ifp->if_snd, m);
1536 if (m == 0) {
1537 /* No more packets to send. */
1538 goto indicate_inactive;
1539 }
1540
1541 #if NBPFILTER > 0
1542 /* Tap off here if there is a BPF listener. */
1543 if (ifp->if_bpf)
1544 bpf_mtap(ifp->if_bpf, m);
1545 #endif
1546
1547 /*
1548 * Copy the mbuf chain into the transmission buffer.
1549 * txb_* variables are updated as necessary.
1550 */
1551 fe_write_mbufs(sc, m);
1552
1553 m_freem(m);
1554
1555 /* Start transmitter if it's idle. */
1556 if (sc->txb_sched == 0)
1557 fe_xmit(sc);
1558 }
1559
1560 indicate_inactive:
1561 /*
1562 * We are using the !OACTIVE flag to indicate to
1563 * the outside world that we can accept an
1564 * additional packet rather than that the
1565 * transmitter is _actually_ active. Indeed, the
1566 * transmitter may be active, but if we haven't
1567 * filled all the buffers with data then we still
1568 * want to accept more.
1569 */
1570 ifp->if_flags &= ~IFF_OACTIVE;
1571 return;
1572
1573 indicate_active:
1574 /*
1575 * The transmitter is active, and there are no room for
1576 * more outgoing packets in the transmission buffer.
1577 */
1578 ifp->if_flags |= IFF_OACTIVE;
1579 return;
1580 }
1581
1582 /*
1583 * Transmission interrupt handler
1584 * The control flow of this function looks silly. FIXME.
1585 */
1586 void
1587 fe_tint(sc, tstat)
1588 struct fe_softc *sc;
1589 u_char tstat;
1590 {
1591 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1592 int left;
1593 int col;
1594
1595 /*
1596 * Handle "excessive collision" interrupt.
1597 */
1598 if (tstat & FE_D0_COLL16) {
1599 /*
1600 * Find how many packets (including this collided one)
1601 * are left unsent in transmission buffer.
1602 */
1603 left = inb(sc->sc_iobase + FE_BMPR10);
1604
1605 #if FE_DEBUG >= 2
1606 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
1607 sc->sc_dev.dv_xname, left, sc->txb_sched);
1608 #endif
1609 #if FE_DEBUG >= 3
1610 fe_dump(LOG_INFO, sc);
1611 #endif
1612
1613 /*
1614 * Update statistics.
1615 */
1616 ifp->if_collisions += 16;
1617 ifp->if_oerrors++;
1618 ifp->if_opackets += sc->txb_sched - left;
1619
1620 /*
1621 * Collision statistics has been updated.
1622 * Clear the collision flag on 86960 now to avoid confusion.
1623 */
1624 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1625
1626 /*
1627 * Restart transmitter, skipping the
1628 * collided packet.
1629 *
1630 * We *must* skip the packet to keep network running
1631 * properly. Excessive collision error is an
1632 * indication of the network overload. If we
1633 * tried sending the same packet after excessive
1634 * collision, the network would be filled with
1635 * out-of-time packets. Packets belonging
1636 * to reliable transport (such as TCP) are resent
1637 * by some upper layer.
1638 */
1639 outb(sc->sc_iobase + FE_BMPR11,
1640 FE_B11_CTRL_SKIP | FE_B11_MODE1);
1641 sc->txb_sched = left - 1;
1642 }
1643
1644 /*
1645 * Handle "transmission complete" interrupt.
1646 */
1647 if (tstat & FE_D0_TXDONE) {
1648 /*
1649 * Add in total number of collisions on last
1650 * transmission. We also clear "collision occurred" flag
1651 * here.
1652 *
1653 * 86960 has a design flow on collision count on multiple
1654 * packet transmission. When we send two or more packets
1655 * with one start command (that's what we do when the
1656 * transmission queue is clauded), 86960 informs us number
1657 * of collisions occured on the last packet on the
1658 * transmission only. Number of collisions on previous
1659 * packets are lost. I have told that the fact is clearly
1660 * stated in the Fujitsu document.
1661 *
1662 * I considered not to mind it seriously. Collision
1663 * count is not so important, anyway. Any comments? FIXME.
1664 */
1665
1666 if (inb(sc->sc_iobase + FE_DLCR0) & FE_D0_COLLID) {
1667 /* Clear collision flag. */
1668 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1669
1670 /* Extract collision count from 86960. */
1671 col = inb(sc->sc_iobase + FE_DLCR4) & FE_D4_COL;
1672 if (col == 0) {
1673 /*
1674 * Status register indicates collisions,
1675 * while the collision count is zero.
1676 * This can happen after multiple packet
1677 * transmission, indicating that one or more
1678 * previous packet(s) had been collided.
1679 *
1680 * Since the accurate number of collisions
1681 * has been lost, we just guess it as 1;
1682 * Am I too optimistic? FIXME.
1683 */
1684 col = 1;
1685 } else
1686 col >>= FE_D4_COL_SHIFT;
1687 ifp->if_collisions += col;
1688 #if FE_DEBUG >= 4
1689 log(LOG_WARNING, "%s: %d collision%s (%d)\n",
1690 sc->sc_dev.dv_xname, col, col == 1 ? "" : "s",
1691 sc->txb_sched);
1692 #endif
1693 }
1694
1695 /*
1696 * Update total number of successfully
1697 * transmitted packets.
1698 */
1699 ifp->if_opackets += sc->txb_sched;
1700 sc->txb_sched = 0;
1701 }
1702
1703 if (sc->txb_sched == 0) {
1704 /*
1705 * The transmitter is no more active.
1706 * Reset output active flag and watchdog timer.
1707 */
1708 ifp->if_flags &= ~IFF_OACTIVE;
1709 ifp->if_timer = 0;
1710
1711 /*
1712 * If more data is ready to transmit in the buffer, start
1713 * transmitting them. Otherwise keep transmitter idle,
1714 * even if more data is queued. This gives receive
1715 * process a slight priority.
1716 */
1717 if (sc->txb_count > 0)
1718 fe_xmit(sc);
1719 }
1720 }
1721
1722 /*
1723 * Ethernet interface receiver interrupt.
1724 */
1725 void
1726 fe_rint(sc, rstat)
1727 struct fe_softc *sc;
1728 u_char rstat;
1729 {
1730 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1731 int len;
1732 u_char status;
1733 int i;
1734
1735 /*
1736 * Update statistics if this interrupt is caused by an error.
1737 */
1738 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR |
1739 FE_D1_ALGERR | FE_D1_SRTPKT)) {
1740 #if FE_DEBUG >= 3
1741 log(LOG_WARNING, "%s: receive error: %b\n",
1742 sc->sc_dev.dv_xname, rstat, FE_D1_ERRBITS);
1743 #endif
1744 ifp->if_ierrors++;
1745 }
1746
1747 /*
1748 * MB86960 has a flag indicating "receive queue empty."
1749 * We just loop cheking the flag to pull out all received
1750 * packets.
1751 *
1752 * We limit the number of iterrations to avoid infinite loop.
1753 * It can be caused by a very slow CPU (some broken
1754 * peripheral may insert incredible number of wait cycles)
1755 * or, worse, by a broken MB86960 chip.
1756 */
1757 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1758 /* Stop the iterration if 86960 indicates no packets. */
1759 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1760 break;
1761
1762 /*
1763 * Extract A receive status byte.
1764 * As our 86960 is in 16 bit bus access mode, we have to
1765 * use inw() to get the status byte. The significant
1766 * value is returned in lower 8 bits.
1767 */
1768 status = (u_char)inw(sc->sc_iobase + FE_BMPR8);
1769 #if FE_DEBUG >= 4
1770 log(LOG_INFO, "%s: receive status = %02x\n",
1771 sc->sc_dev.dv_xname, status);
1772 #endif
1773
1774 /*
1775 * If there was an error, update statistics and drop
1776 * the packet, unless the interface is in promiscuous
1777 * mode.
1778 */
1779 if ((status & 0xF0) != 0x20) { /* XXXX ? */
1780 if ((ifp->if_flags & IFF_PROMISC) == 0) {
1781 ifp->if_ierrors++;
1782 fe_droppacket(sc);
1783 continue;
1784 }
1785 }
1786
1787 /*
1788 * Extract the packet length.
1789 * It is a sum of a header (14 bytes) and a payload.
1790 * CRC has been stripped off by the 86960.
1791 */
1792 len = inw(sc->sc_iobase + FE_BMPR8);
1793
1794 /*
1795 * MB86965 checks the packet length and drop big packet
1796 * before passing it to us. There are no chance we can
1797 * get [crufty] packets. Hence, if the length exceeds
1798 * the specified limit, it means some serious failure,
1799 * such as out-of-sync on receive buffer management.
1800 *
1801 * Is this statement true? FIXME.
1802 */
1803 if (len > ETHER_MAX_LEN || len < ETHER_HDR_SIZE) {
1804 #if FE_DEBUG >= 2
1805 log(LOG_WARNING,
1806 "%s: received a %s packet? (%u bytes)\n",
1807 sc->sc_dev.dv_xname,
1808 len < ETHER_HDR_SIZE ? "partial" : "big", len);
1809 #endif
1810 ifp->if_ierrors++;
1811 fe_droppacket(sc);
1812 continue;
1813 }
1814
1815 /*
1816 * Check for a short (RUNT) packet. We *do* check
1817 * but do nothing other than print a message.
1818 * Short packets are illegal, but does nothing bad
1819 * if it carries data for upper layer.
1820 */
1821 #if FE_DEBUG >= 2
1822 if (len < ETHER_MIN_LEN) {
1823 log(LOG_WARNING,
1824 "%s: received a short packet? (%u bytes)\n",
1825 sc->sc_dev.dv_xname, len);
1826 }
1827 #endif
1828
1829 /*
1830 * Go get a packet.
1831 */
1832 if (!fe_get_packet(sc, len)) {
1833 /* Skip a packet, updating statistics. */
1834 #if FE_DEBUG >= 2
1835 log(LOG_WARNING,
1836 "%s: out of mbufs; dropping packet (%u bytes)\n",
1837 sc->sc_dev.dv_xname, len);
1838 #endif
1839 ifp->if_ierrors++;
1840 fe_droppacket(sc);
1841
1842 /*
1843 * We stop receiving packets, even if there are
1844 * more in the buffer. We hope we can get more
1845 * mbufs next time.
1846 */
1847 return;
1848 }
1849
1850 /* Successfully received a packet. Update stat. */
1851 ifp->if_ipackets++;
1852 }
1853 }
1854
1855 /*
1856 * Ethernet interface interrupt processor
1857 */
1858 int
1859 feintr(arg)
1860 void *arg;
1861 {
1862 struct fe_softc *sc = arg;
1863 u_char tstat, rstat;
1864
1865 #if FE_DEBUG >= 4
1866 log(LOG_INFO, "%s: feintr()\n", sc->sc_dev.dv_xname);
1867 fe_dump(LOG_INFO, sc);
1868 #endif
1869
1870 /*
1871 * Get interrupt conditions, masking unneeded flags.
1872 */
1873 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1874 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1875 if (tstat == 0 && rstat == 0)
1876 return (0);
1877
1878 /*
1879 * Loop until there are no more new interrupt conditions.
1880 */
1881 for (;;) {
1882 /*
1883 * Reset the conditions we are acknowledging.
1884 */
1885 outb(sc->sc_iobase + FE_DLCR0, tstat);
1886 outb(sc->sc_iobase + FE_DLCR1, rstat);
1887
1888 /*
1889 * Handle transmitter interrupts. Handle these first because
1890 * the receiver will reset the board under some conditions.
1891 */
1892 if (tstat != 0)
1893 fe_tint(sc, tstat);
1894
1895 /*
1896 * Handle receiver interrupts.
1897 */
1898 if (rstat != 0)
1899 fe_rint(sc, rstat);
1900
1901 /*
1902 * Update the multicast address filter if it is
1903 * needed and possible. We do it now, because
1904 * we can make sure the transmission buffer is empty,
1905 * and there is a good chance that the receive queue
1906 * is empty. It will minimize the possibility of
1907 * packet lossage.
1908 */
1909 if (sc->filter_change &&
1910 sc->txb_count == 0 && sc->txb_sched == 0) {
1911 fe_loadmar(sc);
1912 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
1913 }
1914
1915 /*
1916 * If it looks like the transmitter can take more data,
1917 * attempt to start output on the interface. This is done
1918 * after handling the receiver interrupt to give the
1919 * receive operation priority.
1920 */
1921 if ((sc->sc_ethercom.ec_if.if_flags & IFF_OACTIVE) == 0)
1922 fe_start(&sc->sc_ethercom.ec_if);
1923
1924 #if NRND > 0
1925 if (rstat != 0 || tstat != 0)
1926 rnd_add_uint32(&sc->rnd_source, rstat + tstat);
1927 #endif
1928
1929 /*
1930 * Get interrupt conditions, masking unneeded flags.
1931 */
1932 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1933 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1934 if (tstat == 0 && rstat == 0)
1935 return (1);
1936 }
1937 }
1938
1939 /*
1940 * Process an ioctl request. This code needs some work - it looks pretty ugly.
1941 */
1942 int
1943 fe_ioctl(ifp, command, data)
1944 register struct ifnet *ifp;
1945 u_long command;
1946 caddr_t data;
1947 {
1948 struct fe_softc *sc = ifp->if_softc;
1949 register struct ifaddr *ifa = (struct ifaddr *)data;
1950 struct ifreq *ifr = (struct ifreq *)data;
1951 int s, error = 0;
1952
1953 #if FE_DEBUG >= 3
1954 log(LOG_INFO, "%s: ioctl(%x)\n", sc->sc_dev.dv_xname, command);
1955 #endif
1956
1957 s = splnet();
1958
1959 switch (command) {
1960
1961 case SIOCSIFADDR:
1962 ifp->if_flags |= IFF_UP;
1963
1964 switch (ifa->ifa_addr->sa_family) {
1965 #ifdef INET
1966 case AF_INET:
1967 fe_init(sc);
1968 arp_ifinit(ifp, ifa);
1969 break;
1970 #endif
1971 #ifdef NS
1972 case AF_NS:
1973 {
1974 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1975
1976 if (ns_nullhost(*ina))
1977 ina->x_host =
1978 *(union ns_host *)(sc->sc_enaddr);
1979 else {
1980 bcopy(ina->x_host.c_host, sc->sc_enaddr,
1981 ETHER_ADDR_LEN);
1982 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1983 ETHER_ADDR_LEN);
1984 }
1985 /* Set new address. */
1986 fe_init(sc);
1987 break;
1988 }
1989 #endif
1990 default:
1991 fe_init(sc);
1992 break;
1993 }
1994 break;
1995
1996 case SIOCSIFFLAGS:
1997 if ((ifp->if_flags & IFF_UP) == 0 &&
1998 (ifp->if_flags & IFF_RUNNING) != 0) {
1999 /*
2000 * If interface is marked down and it is running, then
2001 * stop it.
2002 */
2003 fe_stop(sc);
2004 ifp->if_flags &= ~IFF_RUNNING;
2005 } else if ((ifp->if_flags & IFF_UP) != 0 &&
2006 (ifp->if_flags & IFF_RUNNING) == 0) {
2007 /*
2008 * If interface is marked up and it is stopped, then
2009 * start it.
2010 */
2011 fe_init(sc);
2012 } else {
2013 /*
2014 * Reset the interface to pick up changes in any other
2015 * flags that affect hardware registers.
2016 */
2017 fe_setmode(sc);
2018 }
2019 #if DEBUG >= 1
2020 /* "ifconfig fe0 debug" to print register dump. */
2021 if (ifp->if_flags & IFF_DEBUG) {
2022 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", sc->sc_dev.dv_xname);
2023 fe_dump(LOG_DEBUG, sc);
2024 }
2025 #endif
2026 break;
2027
2028 case SIOCADDMULTI:
2029 case SIOCDELMULTI:
2030 /* Update our multicast list. */
2031 error = (command == SIOCADDMULTI) ?
2032 ether_addmulti(ifr, &sc->sc_ethercom) :
2033 ether_delmulti(ifr, &sc->sc_ethercom);
2034
2035 if (error == ENETRESET) {
2036 /*
2037 * Multicast list has changed; set the hardware filter
2038 * accordingly.
2039 */
2040 fe_setmode(sc);
2041 error = 0;
2042 }
2043 break;
2044
2045 default:
2046 error = EINVAL;
2047 }
2048
2049 splx(s);
2050 return (error);
2051 }
2052
2053 /*
2054 * Retreive packet from receive buffer and send to the next level up via
2055 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
2056 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
2057 */
2058 int
2059 fe_get_packet(sc, len)
2060 struct fe_softc *sc;
2061 int len;
2062 {
2063 struct ether_header *eh;
2064 struct mbuf *m;
2065 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2066
2067 /* Allocate a header mbuf. */
2068 MGETHDR(m, M_DONTWAIT, MT_DATA);
2069 if (m == 0)
2070 return (0);
2071 m->m_pkthdr.rcvif = ifp;
2072 m->m_pkthdr.len = len;
2073
2074 /* The following silliness is to make NFS happy. */
2075 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
2076 #define EOFF (EROUND - sizeof(struct ether_header))
2077
2078 /*
2079 * Our strategy has one more problem. There is a policy on
2080 * mbuf cluster allocation. It says that we must have at
2081 * least MINCLSIZE (208 bytes) to allocate a cluster. For a
2082 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
2083 * our code violates the rule...
2084 * On the other hand, the current code is short, simle,
2085 * and fast, however. It does no harmful thing, just waists
2086 * some memory. Any comments? FIXME.
2087 */
2088
2089 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
2090 if (len > MHLEN - EOFF) {
2091 MCLGET(m, M_DONTWAIT);
2092 if ((m->m_flags & M_EXT) == 0) {
2093 m_freem(m);
2094 return (0);
2095 }
2096 }
2097
2098 /*
2099 * The following assumes there is room for the ether header in the
2100 * header mbuf.
2101 */
2102 m->m_data += EOFF;
2103 eh = mtod(m, struct ether_header *);
2104
2105 /* Set the length of this packet. */
2106 m->m_len = len;
2107
2108 /* Get a packet. */
2109 insw(sc->sc_iobase + FE_BMPR8, m->m_data, (len + 1) >> 1);
2110
2111 #if NBPFILTER > 0
2112 /*
2113 * Check if there's a BPF listener on this interface. If so, hand off
2114 * the raw packet to bpf.
2115 */
2116 if (ifp->if_bpf) {
2117 bpf_mtap(ifp->if_bpf, m);
2118
2119 /*
2120 * Note that the interface cannot be in promiscuous mode if
2121 * there are no BPF listeners. And if we are in promiscuous
2122 * mode, we have to check if this packet is really ours.
2123 */
2124 if ((ifp->if_flags & IFF_PROMISC) != 0 &&
2125 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
2126 bcmp(eh->ether_dhost, sc->sc_enaddr,
2127 sizeof(eh->ether_dhost)) != 0) {
2128 m_freem(m);
2129 return (1);
2130 }
2131 }
2132 #endif
2133
2134 /* Fix up data start offset in mbuf to point past ether header. */
2135 m_adj(m, sizeof(struct ether_header));
2136 ether_input(ifp, eh, m);
2137 return (1);
2138 }
2139
2140 /*
2141 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
2142 * Returns number of bytes actually written, including length word.
2143 *
2144 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
2145 * Packets shorter than Ethernet minimum are legal, and we pad them
2146 * before sending out. An exception is "partial" packets which are
2147 * shorter than mandatory Ethernet header.
2148 *
2149 * I wrote a code for an experimental "delayed padding" technique.
2150 * When employed, it postpones the padding process for short packets.
2151 * If xmit() occured at the moment, the padding process is omitted, and
2152 * garbages are sent as pad data. If next packet is stored in the
2153 * transmission buffer before xmit(), write_mbuf() pads the previous
2154 * packet before transmitting new packet. This *may* gain the
2155 * system performance (slightly).
2156 */
2157 void
2158 fe_write_mbufs(sc, m)
2159 struct fe_softc *sc;
2160 struct mbuf *m;
2161 {
2162 int bmpr8 = sc->sc_iobase + FE_BMPR8;
2163 u_char *data;
2164 u_short savebyte; /* WARNING: Architecture dependent! */
2165 int totlen, len, wantbyte;
2166
2167 /* XXX thorpej 960116 - quiet bogus compiler warning. */
2168 savebyte = 0;
2169
2170 #if FE_DELAYED_PADDING
2171 /* Do the "delayed padding." */
2172 len = sc->txb_padding >> 1;
2173 if (len > 0) {
2174 while (--len >= 0)
2175 outw(bmpr8, 0);
2176 sc->txb_padding = 0;
2177 }
2178 #endif
2179
2180 /* We need to use m->m_pkthdr.len, so require the header */
2181 if ((m->m_flags & M_PKTHDR) == 0)
2182 panic("fe_write_mbufs: no header mbuf");
2183
2184 #if FE_DEBUG >= 2
2185 /* First, count up the total number of bytes to copy. */
2186 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
2187 totlen += mp->m_len;
2188 /* Check if this matches the one in the packet header. */
2189 if (totlen != m->m_pkthdr.len)
2190 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
2191 sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len);
2192 #else
2193 /* Just use the length value in the packet header. */
2194 totlen = m->m_pkthdr.len;
2195 #endif
2196
2197 #if FE_DEBUG >= 1
2198 /*
2199 * Should never send big packets. If such a packet is passed,
2200 * it should be a bug of upper layer. We just ignore it.
2201 * ... Partial (too short) packets, neither.
2202 */
2203 if (totlen > ETHER_MAX_LEN || totlen < ETHER_HDR_SIZE) {
2204 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
2205 sc->sc_dev.dv_xname,
2206 totlen < ETHER_HDR_SIZE ? "partial" : "big", totlen);
2207 sc->sc_ethercom.ec_if.if_oerrors++;
2208 return;
2209 }
2210 #endif
2211
2212 /*
2213 * Put the length word for this frame.
2214 * Does 86960 accept odd length? -- Yes.
2215 * Do we need to pad the length to minimum size by ourselves?
2216 * -- Generally yes. But for (or will be) the last
2217 * packet in the transmission buffer, we can skip the
2218 * padding process. It may gain performance slightly. FIXME.
2219 */
2220 outw(bmpr8, max(totlen, ETHER_MIN_LEN));
2221
2222 /*
2223 * Update buffer status now.
2224 * Truncate the length up to an even number, since we use outw().
2225 */
2226 totlen = (totlen + 1) & ~1;
2227 sc->txb_free -= FE_DATA_LEN_LEN + max(totlen, ETHER_MIN_LEN);
2228 sc->txb_count++;
2229
2230 #if FE_DELAYED_PADDING
2231 /* Postpone the packet padding if necessary. */
2232 if (totlen < ETHER_MIN_LEN)
2233 sc->txb_padding = ETHER_MIN_LEN - totlen;
2234 #endif
2235
2236 /*
2237 * Transfer the data from mbuf chain to the transmission buffer.
2238 * MB86960 seems to require that data be transferred as words, and
2239 * only words. So that we require some extra code to patch
2240 * over odd-length mbufs.
2241 */
2242 wantbyte = 0;
2243 for (; m != 0; m = m->m_next) {
2244 /* Ignore empty mbuf. */
2245 len = m->m_len;
2246 if (len == 0)
2247 continue;
2248
2249 /* Find the actual data to send. */
2250 data = mtod(m, caddr_t);
2251
2252 /* Finish the last byte. */
2253 if (wantbyte) {
2254 outw(bmpr8, savebyte | (*data << 8));
2255 data++;
2256 len--;
2257 wantbyte = 0;
2258 }
2259
2260 /* Output contiguous words. */
2261 if (len > 1)
2262 outsw(bmpr8, data, len >> 1);
2263
2264 /* Save remaining byte, if there is one. */
2265 if (len & 1) {
2266 data += len & ~1;
2267 savebyte = *data;
2268 wantbyte = 1;
2269 }
2270 }
2271
2272 /* Spit the last byte, if the length is odd. */
2273 if (wantbyte)
2274 outw(bmpr8, savebyte);
2275
2276 #if ! FE_DELAYED_PADDING
2277 /*
2278 * Pad the packet to the minimum length if necessary.
2279 */
2280 len = (ETHER_MIN_LEN >> 1) - (totlen >> 1);
2281 while (--len >= 0)
2282 outw(bmpr8, 0);
2283 #endif
2284 }
2285
2286 /*
2287 * Compute the multicast address filter from the
2288 * list of multicast addresses we need to listen to.
2289 */
2290 void
2291 fe_getmcaf(ec, af)
2292 struct ethercom *ec;
2293 u_char *af;
2294 {
2295 struct ifnet *ifp = &ec->ec_if;
2296 struct ether_multi *enm;
2297 register u_char *cp, c;
2298 register u_long crc;
2299 register int i, len;
2300 struct ether_multistep step;
2301
2302 /*
2303 * Set up multicast address filter by passing all multicast addresses
2304 * through a crc generator, and then using the high order 6 bits as an
2305 * index into the 64 bit logical address filter. The high order bit
2306 * selects the word, while the rest of the bits select the bit within
2307 * the word.
2308 */
2309
2310 if ((ifp->if_flags & IFF_PROMISC) != 0)
2311 goto allmulti;
2312
2313 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0x00;
2314 ETHER_FIRST_MULTI(step, ec, enm);
2315 while (enm != NULL) {
2316 if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
2317 sizeof(enm->enm_addrlo)) != 0) {
2318 /*
2319 * We must listen to a range of multicast addresses.
2320 * For now, just accept all multicasts, rather than
2321 * trying to set only those filter bits needed to match
2322 * the range. (At this time, the only use of address
2323 * ranges is for IP multicast routing, for which the
2324 * range is big enough to require all bits set.)
2325 */
2326 goto allmulti;
2327 }
2328
2329 cp = enm->enm_addrlo;
2330 crc = 0xffffffff;
2331 for (len = sizeof(enm->enm_addrlo); --len >= 0;) {
2332 c = *cp++;
2333 for (i = 8; --i >= 0;) {
2334 if ((crc & 0x01) ^ (c & 0x01)) {
2335 crc >>= 1;
2336 crc ^= 0xedb88320;
2337 } else
2338 crc >>= 1;
2339 c >>= 1;
2340 }
2341 }
2342 /* Just want the 6 most significant bits. */
2343 crc >>= 26;
2344
2345 /* Turn on the corresponding bit in the filter. */
2346 af[crc >> 3] |= 1 << (crc & 7);
2347
2348 ETHER_NEXT_MULTI(step, enm);
2349 }
2350 ifp->if_flags &= ~IFF_ALLMULTI;
2351 return;
2352
2353 allmulti:
2354 ifp->if_flags |= IFF_ALLMULTI;
2355 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0xff;
2356 }
2357
2358 /*
2359 * Calculate a new "multicast packet filter" and put the 86960
2360 * receiver in appropriate mode.
2361 */
2362 void
2363 fe_setmode(sc)
2364 struct fe_softc *sc;
2365 {
2366 int flags = sc->sc_ethercom.ec_if.if_flags;
2367
2368 /*
2369 * If the interface is not running, we postpone the update
2370 * process for receive modes and multicast address filter
2371 * until the interface is restarted. It reduces some
2372 * complicated job on maintaining chip states. (Earlier versions
2373 * of this driver had a bug on that point...)
2374 *
2375 * To complete the trick, fe_init() calls fe_setmode() after
2376 * restarting the interface.
2377 */
2378 if ((flags & IFF_RUNNING) == 0)
2379 return;
2380
2381 /*
2382 * Promiscuous mode is handled separately.
2383 */
2384 if ((flags & IFF_PROMISC) != 0) {
2385 /*
2386 * Program 86960 to receive all packets on the segment
2387 * including those directed to other stations.
2388 * Multicast filter stored in MARs are ignored
2389 * under this setting, so we don't need to update it.
2390 *
2391 * Promiscuous mode is used solely by BPF, and BPF only
2392 * listens to valid (no error) packets. So, we ignore
2393 * errornous ones even in this mode.
2394 */
2395 outb(sc->sc_iobase + FE_DLCR5,
2396 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2397 sc->filter_change = 0;
2398
2399 #if FE_DEBUG >= 3
2400 log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname);
2401 #endif
2402 return;
2403 }
2404
2405 /*
2406 * Turn the chip to the normal (non-promiscuous) mode.
2407 */
2408 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2409
2410 /*
2411 * Find the new multicast filter value.
2412 */
2413 fe_getmcaf(&sc->sc_ethercom, sc->filter);
2414 sc->filter_change = 1;
2415
2416 #if FE_DEBUG >= 3
2417 log(LOG_INFO,
2418 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
2419 sc->sc_dev.dv_xname,
2420 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
2421 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
2422 #endif
2423
2424 /*
2425 * We have to update the multicast filter in the 86960, A.S.A.P.
2426 *
2427 * Note that the DLC (Data Linc Control unit, i.e. transmitter
2428 * and receiver) must be stopped when feeding the filter, and
2429 * DLC trushes all packets in both transmission and receive
2430 * buffers when stopped.
2431 *
2432 * ... Are the above sentenses correct? I have to check the
2433 * manual of the MB86960A. FIXME.
2434 *
2435 * To reduce the packet lossage, we delay the filter update
2436 * process until buffers are empty.
2437 */
2438 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2439 (inb(sc->sc_iobase + FE_DLCR1) & FE_D1_PKTRDY) == 0) {
2440 /*
2441 * Buffers are (apparently) empty. Load
2442 * the new filter value into MARs now.
2443 */
2444 fe_loadmar(sc);
2445 } else {
2446 /*
2447 * Buffers are not empty. Mark that we have to update
2448 * the MARs. The new filter will be loaded by feintr()
2449 * later.
2450 */
2451 #if FE_DEBUG >= 4
2452 log(LOG_INFO, "%s: filter change delayed\n", sc->sc_dev.dv_xname);
2453 #endif
2454 }
2455 }
2456
2457 /*
2458 * Load a new multicast address filter into MARs.
2459 *
2460 * The caller must have splnet'ed befor fe_loadmar.
2461 * This function starts the DLC upon return. So it can be called only
2462 * when the chip is working, i.e., from the driver's point of view, when
2463 * a device is RUNNING. (I mistook the point in previous versions.)
2464 */
2465 void
2466 fe_loadmar(sc)
2467 struct fe_softc *sc;
2468 {
2469
2470 /* Stop the DLC (transmitter and receiver). */
2471 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2472
2473 /* Select register bank 1 for MARs. */
2474 outb(sc->sc_iobase + FE_DLCR7,
2475 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2476
2477 /* Copy filter value into the registers. */
2478 outblk(sc->sc_iobase + FE_MAR8, sc->filter, FE_FILTER_LEN);
2479
2480 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2481 outb(sc->sc_iobase + FE_DLCR7,
2482 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2483
2484 /* Restart the DLC. */
2485 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2486
2487 /* We have just updated the filter. */
2488 sc->filter_change = 0;
2489
2490 #if FE_DEBUG >= 3
2491 log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname);
2492 #endif
2493 }
2494
2495 #if FE_DEBUG >= 1
2496 void
2497 fe_dump(level, sc)
2498 int level;
2499 struct fe_softc *sc;
2500 {
2501 int iobase = sc->sc_iobase;
2502 u_char save_dlcr7;
2503
2504 save_dlcr7 = inb(iobase + FE_DLCR7);
2505
2506 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x",
2507 inb(iobase + FE_DLCR0), inb(iobase + FE_DLCR1),
2508 inb(iobase + FE_DLCR2), inb(iobase + FE_DLCR3),
2509 inb(iobase + FE_DLCR4), inb(iobase + FE_DLCR5),
2510 inb(iobase + FE_DLCR6), inb(iobase + FE_DLCR7));
2511
2512 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
2513 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x,",
2514 inb(iobase + FE_DLCR8), inb(iobase + FE_DLCR9),
2515 inb(iobase + FE_DLCR10), inb(iobase + FE_DLCR11),
2516 inb(iobase + FE_DLCR12), inb(iobase + FE_DLCR13),
2517 inb(iobase + FE_DLCR14), inb(iobase + FE_DLCR15));
2518
2519 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
2520 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x,",
2521 inb(iobase + FE_MAR8), inb(iobase + FE_MAR9),
2522 inb(iobase + FE_MAR10), inb(iobase + FE_MAR11),
2523 inb(iobase + FE_MAR12), inb(iobase + FE_MAR13),
2524 inb(iobase + FE_MAR14), inb(iobase + FE_MAR15));
2525
2526 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
2527 log(level, "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x.",
2528 inb(iobase + FE_BMPR10), inb(iobase + FE_BMPR11),
2529 inb(iobase + FE_BMPR12), inb(iobase + FE_BMPR13),
2530 inb(iobase + FE_BMPR14), inb(iobase + FE_BMPR15),
2531 inb(iobase + FE_BMPR16), inb(iobase + FE_BMPR17),
2532 inb(iobase + FE_BMPR19));
2533
2534 outb(iobase + FE_DLCR7, save_dlcr7);
2535 }
2536 #endif
2537