if_ate.c revision 1.6 1 /*
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
9 *
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
20 * SUCH DAMAGE.
21 */
22
23 /*
24 * Portions copyright (C) 1993, David Greenman. This software may be used,
25 * modified, copied, distributed, and sold, in both source and binary form
26 * provided that the above copyright and these terms are retained. Under no
27 * circumstances is the author responsible for the proper functioning of this
28 * software, nor does the author assume any responsibility for damages
29 * incurred with its use.
30 */
31
32 #define FE_VERSION "if_fe.c ver. 0.8"
33
34 /*
35 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
36 * Contributed by M.S. <seki (at) sysrap.cs.fujitsu.co.jp>
37 *
38 * This version is intended to be a generic template for various
39 * MB86960A/MB86965A based Ethernet cards. It currently supports
40 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
41 * Telesis AT1700 series and RE2000 series. There are some
42 * unnecessary hooks embedded, which are primarily intended to support
43 * other types of Ethernet cards, but the author is not sure whether
44 * they are useful.
45 */
46
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/errno.h>
52 #include <sys/ioctl.h>
53 #include <sys/mbuf.h>
54 #include <sys/socket.h>
55 #include <sys/syslog.h>
56 #include <sys/device.h>
57
58 #include <net/if.h>
59 #include <net/if_dl.h>
60 #include <net/if_types.h>
61 #include <net/netisr.h>
62
63 #ifdef INET
64 #include <netinet/in.h>
65 #include <netinet/in_systm.h>
66 #include <netinet/in_var.h>
67 #include <netinet/ip.h>
68 #include <netinet/if_ether.h>
69 #endif
70
71 #ifdef NS
72 #include <netns/ns.h>
73 #include <netns/ns_if.h>
74 #endif
75
76 #if NBPFILTER > 0
77 #include <net/bpf.h>
78 #include <net/bpfdesc.h>
79 #endif
80
81 #include <machine/cpu.h>
82 #include <machine/pio.h>
83
84 #include <dev/isa/isareg.h>
85 #include <dev/isa/isavar.h>
86 #include <dev/ic/mb86960reg.h>
87 #include <dev/isa/if_fereg.h>
88
89 /*
90 * Default settings for fe driver specific options.
91 * They can be set in config file by "options" statements.
92 */
93
94 /*
95 * Debug control.
96 * 0: No debug at all. All debug specific codes are stripped off.
97 * 1: Silent. No debug messages are logged except emergent ones.
98 * 2: Brief. Lair events and/or important information are logged.
99 * 3: Detailed. Logs all information which *may* be useful for debugging.
100 * 4: Trace. All actions in the driver is logged. Super verbose.
101 */
102 #ifndef FE_DEBUG
103 #define FE_DEBUG 1
104 #endif
105
106 /*
107 * Delay padding of short transmission packets to minimum Ethernet size.
108 * This may or may not gain performance. An EXPERIMENTAL option.
109 */
110 #ifndef FE_DELAYED_PADDING
111 #define FE_DELAYED_PADDING 0
112 #endif
113
114 /*
115 * Transmit just one packet per a "send" command to 86960.
116 * This option is intended for performance test. An EXPERIMENTAL option.
117 */
118 #ifndef FE_SINGLE_TRANSMISSION
119 #define FE_SINGLE_TRANSMISSION 0
120 #endif
121
122 /*
123 * Device configuration flags.
124 */
125
126 /* DLCR6 settings. */
127 #define FE_FLAGS_DLCR6_VALUE 0x007F
128
129 /* Force DLCR6 override. */
130 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
131
132 /* A cludge for PCMCIA support. */
133 #define FE_FLAGS_PCMCIA 0x8000
134
135 /* Identification of the driver version. */
136 static char const fe_version[] = FE_VERSION " / " FE_REG_VERSION;
137
138 /*
139 * Supported hardware (Ethernet card) types
140 * This information is currently used only for debugging
141 */
142 enum fe_type {
143 /* For cards which are successfully probed but not identified. */
144 FE_TYPE_UNKNOWN,
145
146 /* Fujitsu FMV-180 series. */
147 FE_TYPE_FMV181,
148 FE_TYPE_FMV182,
149
150 /* Allied-Telesis AT1700 series and RE2000 series. */
151 FE_TYPE_AT1700T,
152 FE_TYPE_AT1700BT,
153 FE_TYPE_AT1700FT,
154 FE_TYPE_AT1700AT,
155 FE_TYPE_RE2000,
156
157 /* PCMCIA by Fujitsu. */
158 FE_TYPE_MBH10302,
159 FE_TYPE_MBH10304,
160 };
161
162 /*
163 * fe_softc: per line info and status
164 */
165 struct fe_softc {
166 struct device sc_dev;
167 void *sc_ih;
168
169 struct arpcom sc_arpcom; /* ethernet common */
170
171 /* Set by probe() and not modified in later phases. */
172 enum fe_type type; /* interface type code */
173 char *typestr; /* printable name of the interface. */
174 int sc_iobase; /* MB86960A I/O base address */
175
176 u_char proto_dlcr4; /* DLCR4 prototype. */
177 u_char proto_dlcr5; /* DLCR5 prototype. */
178 u_char proto_dlcr6; /* DLCR6 prototype. */
179 u_char proto_dlcr7; /* DLCR7 prototype. */
180 u_char proto_bmpr13; /* BMPR13 prototype. */
181
182 /* Vendor specific hooks. */
183 void (*init) __P((struct fe_softc *)); /* Just before fe_init(). */
184 void (*stop) __P((struct fe_softc *)); /* Just after fe_stop(). */
185
186 /* Transmission buffer management. */
187 u_short txb_size; /* total bytes in TX buffer */
188 u_short txb_free; /* free bytes in TX buffer */
189 u_char txb_count; /* number of packets in TX buffer */
190 u_char txb_sched; /* number of scheduled packets */
191 u_char txb_padding; /* number of delayed padding bytes */
192
193 /* Multicast address filter management. */
194 u_char filter_change; /* MARs must be changed ASAP. */
195 u_char filter[FE_FILTER_LEN]; /* new filter value. */
196 };
197
198 /* Frequently accessed members in arpcom. */
199 #define sc_enaddr sc_arpcom.ac_enaddr
200
201 /* Standard driver entry points. These can be static. */
202 int feprobe __P((struct device *, void *, void *));
203 void feattach __P((struct device *, struct device *, void *));
204 int feintr __P((void *));
205 void fe_init __P((struct fe_softc *));
206 int fe_ioctl __P((struct ifnet *, u_long, caddr_t));
207 void fe_start __P((struct ifnet *));
208 void fe_reset __P((struct fe_softc *));
209 void fe_watchdog __P((int));
210
211 /* Local functions. Order of declaration is confused. FIXME. */
212 int fe_probe_fmv __P((struct fe_softc *, struct isa_attach_args *));
213 int fe_probe_ati __P((struct fe_softc *, struct isa_attach_args *));
214 int fe_probe_mbh __P((struct fe_softc *, struct isa_attach_args *));
215 void fe_init_mbh __P((struct fe_softc *));
216 int fe_get_packet __P((struct fe_softc *, int));
217 void fe_stop __P((struct fe_softc *));
218 void fe_tint __P((/*struct fe_softc *, u_char*/));
219 void fe_rint __P((/*struct fe_softc *, u_char*/));
220 static inline
221 void fe_xmit __P((struct fe_softc *));
222 void fe_write_mbufs __P((struct fe_softc *, struct mbuf *));
223 void fe_getmcaf __P((struct arpcom *, u_char *));
224 void fe_setmode __P((struct fe_softc *));
225 void fe_loadmar __P((struct fe_softc *));
226 #if FE_DEBUG >= 1
227 void fe_dump __P((int, struct fe_softc *));
228 #endif
229
230 struct cfdriver fecd = {
231 NULL, "fe", feprobe, feattach, DV_IFNET, sizeof(struct fe_softc)
232 };
233
234 /* Ethernet constants. To be defined in if_ehter.h? FIXME. */
235 #define ETHER_MIN_LEN 60 /* with header, without CRC. */
236 #define ETHER_MAX_LEN 1514 /* with header, without CRC. */
237 #define ETHER_ADDR_LEN 6 /* number of bytes in an address. */
238 #define ETHER_HDR_SIZE 14 /* src addr, dst addr, and data type. */
239
240 /*
241 * Fe driver specific constants which relate to 86960/86965.
242 * They are here (not in if_fereg.h), since selection of those
243 * values depend on driver design. I want to keep definitions in
244 * if_fereg.h "clean", so that if someone wrote another driver
245 * for 86960/86965, if_fereg.h were usable unchanged.
246 *
247 * The above statement sounds somothing like it's better to name
248 * it "ic/mb86960.h" but "if_fereg.h"... Should I do so? FIXME.
249 */
250
251 /* Interrupt masks. */
252 #define FE_TMASK (FE_D2_COLL16 | FE_D2_TXDONE)
253 #define FE_RMASK (FE_D3_OVRFLO | FE_D3_CRCERR | \
254 FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY)
255
256 /* Maximum number of iterrations for a receive interrupt. */
257 #define FE_MAX_RECV_COUNT ((65536 - 2048 * 2) / 64)
258 /* Maximum size of SRAM is 65536,
259 * minimum size of transmission buffer in fe is 2x2KB,
260 * and minimum amount of received packet including headers
261 * added by the chip is 64 bytes.
262 * Hence FE_MAX_RECV_COUNT is the upper limit for number
263 * of packets in the receive buffer. */
264
265 /*
266 * Convenient routines to access contiguous I/O ports.
267 */
268
269 static inline void
270 inblk (int addr, u_char * mem, int len)
271 {
272 while (--len >= 0) {
273 *mem++ = inb(addr++);
274 }
275 }
276
277 static inline void
278 outblk (int addr, u_char const * mem, int len)
279 {
280 while (--len >= 0) {
281 outb(addr++, *mem++);
282 }
283 }
284
285 /*
286 * Hardware probe routines.
287 */
288
289 /*
290 * Determine if the device is present.
291 */
292 int
293 feprobe(parent, match, aux)
294 struct device *parent;
295 void *match, *aux;
296 {
297 struct fe_softc *sc = match;
298 struct isa_attach_args *ia = aux;
299
300 #if FE_DEBUG >= 2
301 log(LOG_INFO, "%s: %s\n", sc->sc_dev.dv_xname, fe_version);
302 #endif
303
304 /* Probe an address. */
305 sc->sc_iobase = ia->ia_iobase;
306
307 if (fe_probe_fmv(sc, ia))
308 return (1);
309 if (fe_probe_ati(sc, ia))
310 return (1);
311 if (fe_probe_mbh(sc, ia))
312 return (1);
313 return (0);
314 }
315
316 /*
317 * Check for specific bits in specific registers have specific values.
318 */
319 struct fe_simple_probe_struct {
320 u_char port; /* Offset from the base I/O address. */
321 u_char mask; /* Bits to be checked. */
322 u_char bits; /* Values to be compared against. */
323 };
324
325 static inline int
326 fe_simple_probe (int addr, struct fe_simple_probe_struct const * sp)
327 {
328 struct fe_simple_probe_struct const * p;
329
330 for (p = sp; p->mask != 0; p++) {
331 if ((inb(addr + p->port) & p->mask) != p->bits) {
332 return (0);
333 }
334 }
335 return (1);
336 }
337
338 /*
339 * Routines to read all bytes from the config EEPROM through MB86965A.
340 * I'm not sure what exactly I'm doing here... I was told just to follow
341 * the steps, and it worked. Could someone tell me why the following
342 * code works? (Or, why all similar codes I tried previously doesn't
343 * work.) FIXME.
344 */
345
346 static inline void
347 strobe (int bmpr16)
348 {
349 /*
350 * Output same value twice. To speed-down execution?
351 */
352 outb(bmpr16, FE_B16_SELECT);
353 outb(bmpr16, FE_B16_SELECT);
354 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
355 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
356 outb(bmpr16, FE_B16_SELECT);
357 outb(bmpr16, FE_B16_SELECT);
358 }
359
360 void
361 fe_read_eeprom(sc, data)
362 struct fe_softc *sc;
363 u_char *data;
364 {
365 int iobase = sc->sc_iobase;
366 int bmpr16 = iobase + FE_BMPR16;
367 int bmpr17 = iobase + FE_BMPR17;
368 u_char n, val, bit;
369
370 /* Read bytes from EEPROM; two bytes per an iterration. */
371 for (n = 0; n < FE_EEPROM_SIZE / 2; n++) {
372 /* Reset the EEPROM interface. */
373 outb(bmpr16, 0x00);
374 outb(bmpr17, 0x00);
375 outb(bmpr16, FE_B16_SELECT);
376
377 /* Start EEPROM access. */
378 outb(bmpr17, FE_B17_DATA);
379 strobe(bmpr16);
380
381 /* Pass the iterration count to the chip. */
382 val = 0x80 | n;
383 for (bit = 0x80; bit != 0x00; bit >>= 1) {
384 outb(bmpr17, (val & bit) ? FE_B17_DATA : 0);
385 strobe(bmpr16);
386 }
387 outb(bmpr17, 0x00);
388
389 /* Read a byte. */
390 val = 0;
391 for (bit = 0x80; bit != 0x00; bit >>= 1) {
392 strobe(bmpr16);
393 if (inb(bmpr17) & FE_B17_DATA)
394 val |= bit;
395 }
396 *data++ = val;
397
398 /* Read one more byte. */
399 val = 0;
400 for (bit = 0x80; bit != 0x00; bit >>= 1) {
401 strobe(bmpr16);
402 if (inb(bmpr17) & FE_B17_DATA)
403 val |= bit;
404 }
405 *data++ = val;
406 }
407
408 #if FE_DEBUG >= 3
409 /* Report what we got. */
410 data -= FE_EEPROM_SIZE;
411 log(LOG_INFO, "%s: EEPROM at %04x:"
412 " %02x%02x%02x%02x %02x%02x%02x%02x -"
413 " %02x%02x%02x%02x %02x%02x%02x%02x -"
414 " %02x%02x%02x%02x %02x%02x%02x%02x -"
415 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
416 sc->sc_dev.dv_xname, iobase,
417 data[ 0], data[ 1], data[ 2], data[ 3],
418 data[ 4], data[ 5], data[ 6], data[ 7],
419 data[ 8], data[ 9], data[10], data[11],
420 data[12], data[13], data[14], data[15],
421 data[16], data[17], data[18], data[19],
422 data[20], data[21], data[22], data[23],
423 data[24], data[25], data[26], data[27],
424 data[28], data[29], data[30], data[31]);
425 #endif
426 }
427
428 /*
429 * Hardware (vendor) specific probe routines.
430 */
431
432 /*
433 * Probe and initialization for Fujitsu FMV-180 series boards
434 */
435 int
436 fe_probe_fmv(sc, ia)
437 struct fe_softc *sc;
438 struct isa_attach_args *ia;
439 {
440 int i, n;
441 int iobase = sc->sc_iobase;
442 int irq;
443
444 static int const iomap[8] =
445 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 };
446 static int const irqmap[4] =
447 { 3, 7, 10, 15 };
448
449 static struct fe_simple_probe_struct const probe_table[] = {
450 { FE_DLCR2, 0x70, 0x00 },
451 { FE_DLCR4, 0x08, 0x00 },
452 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
453
454 { FE_FMV0, FE_FMV0_MAGIC_MASK, FE_FMV0_MAGIC_VALUE },
455 { FE_FMV1, FE_FMV1_CARDID_MASK, FE_FMV1_CARDID_ID },
456 { FE_FMV3, FE_FMV3_EXTRA_MASK, FE_FMV3_EXTRA_VALUE },
457 #if 1
458 /*
459 * Test *vendor* part of the station address for Fujitsu.
460 * The test will gain reliability of probe process, but
461 * it rejects FMV-180 clone boards manufactured by other vendors.
462 * We have to turn the test off when such cards are made available.
463 */
464 { FE_FMV4, 0xFF, 0x00 },
465 { FE_FMV5, 0xFF, 0x00 },
466 { FE_FMV6, 0xFF, 0x0E },
467 #else
468 /*
469 * We can always verify the *first* 2 bits (in Ehternet
470 * bit order) are "no multicast" and "no local" even for
471 * unknown vendors.
472 */
473 { FE_FMV4, 0x03, 0x00 },
474 #endif
475 { 0 }
476 };
477
478 #if 0
479 /*
480 * Dont probe at all if the config says we are PCMCIA...
481 */
482 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
483 return (0);
484 #endif
485
486 /*
487 * See if the sepcified address is possible for FMV-180 series.
488 */
489 for (i = 0; i < 8; i++) {
490 if (iomap[i] == iobase)
491 break;
492 }
493 if (i == 8)
494 return (0);
495
496 /* Simple probe. */
497 if (!fe_simple_probe(iobase, probe_table))
498 return (0);
499
500 /* Check if our I/O address matches config info on EEPROM. */
501 n = (inb(iobase + FE_FMV2) & FE_FMV2_ADDR) >> FE_FMV2_ADDR_SHIFT;
502 if (iomap[n] != iobase)
503 return (0);
504
505 /* Determine the card type. */
506 switch (inb(iobase + FE_FMV0) & FE_FMV0_MODEL) {
507 case FE_FMV0_MODEL_FMV181:
508 sc->type = FE_TYPE_FMV181;
509 sc->typestr = "FMV-181";
510 break;
511 case FE_FMV0_MODEL_FMV182:
512 sc->type = FE_TYPE_FMV182;
513 sc->typestr = "FMV-182";
514 break;
515 default:
516 /* Unknown card type: maybe a new model, but... */
517 return (0);
518 }
519
520 /*
521 * An FMV-180 has successfully been proved.
522 * Determine which IRQ to be used.
523 *
524 * In this version, we always get an IRQ assignment from the
525 * FMV-180's configuration EEPROM, ignoring that specified in
526 * config file.
527 */
528 n = (inb(iobase + FE_FMV2) & FE_FMV2_IRQ) >> FE_FMV2_IRQ_SHIFT;
529 irq = irqmap[n];
530
531 if (ia->ia_irq != IRQUNK) {
532 if (ia->ia_irq != irq) {
533 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
534 sc->sc_dev.dv_xname, ia->ia_irq, irq);
535 return (0);
536 }
537 } else
538 ia->ia_irq = irq;
539
540 /*
541 * Initialize constants in the per-line structure.
542 */
543
544 /* Get our station address from EEPROM. */
545 inblk(iobase + FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
546
547 /* Make sure we got a valid station address. */
548 if ((sc->sc_enaddr[0] & 0x03) != 0x00
549 || (sc->sc_enaddr[0] == 0x00
550 && sc->sc_enaddr[1] == 0x00
551 && sc->sc_enaddr[2] == 0x00))
552 return (0);
553
554 /* Register values which depend on board design. */
555 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
556 sc->proto_dlcr5 = 0;
557 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
558 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
559
560 /*
561 * Program the 86960 as follows:
562 * SRAM: 32KB, 100ns, byte-wide access.
563 * Transmission buffer: 4KB x 2.
564 * System bus interface: 16 bits.
565 * We cannot change these values but TXBSIZE, because they
566 * are hard-wired on the board. Modifying TXBSIZE will affect
567 * the driver performance.
568 */
569 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
570 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
571
572 /*
573 * Minimum initialization of the hardware.
574 * We write into registers; hope I/O ports have no
575 * overlap with other boards.
576 */
577
578 /* Initialize ASIC. */
579 outb(iobase + FE_FMV3, 0);
580 outb(iobase + FE_FMV10, 0);
581
582 /* Wait for a while. I'm not sure this is necessary. FIXME. */
583 delay(200);
584
585 /* Initialize 86960. */
586 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
587 delay(200);
588
589 /* Disable all interrupts. */
590 outb(iobase + FE_DLCR2, 0);
591 outb(iobase + FE_DLCR3, 0);
592
593 /* Turn the "master interrupt control" flag of ASIC on. */
594 outb(iobase + FE_FMV3, FE_FMV3_ENABLE_FLAG);
595
596 /*
597 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
598 */
599 ia->ia_iosize = 32;
600 ia->ia_msize = 0;
601 return (1);
602 }
603
604 /*
605 * Probe and initialization for Allied-Telesis AT1700/RE2000 series.
606 */
607 int
608 fe_probe_ati(sc, ia)
609 struct fe_softc *sc;
610 struct isa_attach_args *ia;
611 {
612 int i, n;
613 int iobase = sc->sc_iobase;
614 u_char eeprom[FE_EEPROM_SIZE];
615 u_char save16, save17;
616 int irq;
617
618 static int const iomap[8] =
619 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
620 static int const irqmap[4][4] = {
621 { 3, 4, 5, 9 },
622 { 10, 11, 12, 15 },
623 { 3, 11, 5, 15 },
624 { 10, 11, 14, 15 },
625 };
626 static struct fe_simple_probe_struct const probe_table[] = {
627 { FE_DLCR2, 0x70, 0x00 },
628 { FE_DLCR4, 0x08, 0x00 },
629 { FE_DLCR5, 0x80, 0x00 },
630 #if 0
631 { FE_BMPR16, 0x1B, 0x00 },
632 { FE_BMPR17, 0x7F, 0x00 },
633 #endif
634 { 0 }
635 };
636
637 #if 0
638 /*
639 * Don't probe at all if the config says we are PCMCIA...
640 */
641 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0)
642 return (0);
643 #endif
644
645 #if FE_DEBUG >= 4
646 log(LOG_INFO, "%s: probe (0x%x) for ATI\n", sc->sc_dev.dv_xname, iobase);
647 fe_dump(LOG_INFO, sc);
648 #endif
649
650 /*
651 * See if the sepcified address is possible for MB86965A JLI mode.
652 */
653 for (i = 0; i < 8; i++) {
654 if (iomap[i] == iobase)
655 break;
656 }
657 if (i == 8)
658 return (0);
659
660 /*
661 * We should test if MB86965A is on the base address now.
662 * Unfortunately, it is very hard to probe it reliably, since
663 * we have no way to reset the chip under software control.
664 * On cold boot, we could check the "signature" bit patterns
665 * described in the Fujitsu document. On warm boot, however,
666 * we can predict almost nothing about register values.
667 */
668 if (!fe_simple_probe(iobase, probe_table))
669 return (0);
670
671 /* Save old values of the registers. */
672 save16 = inb(iobase + FE_BMPR16);
673 save17 = inb(iobase + FE_BMPR17);
674
675 /* Check if our I/O address matches config info on 86965. */
676 n = (inb(iobase + FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
677 if (iomap[n] != iobase)
678 goto fail;
679
680 /*
681 * We are now almost sure we have an AT1700 at the given
682 * address. So, read EEPROM through 86965. We have to write
683 * into LSI registers to read from EEPROM. I want to avoid it
684 * at this stage, but I cannot test the presense of the chip
685 * any further without reading EEPROM. FIXME.
686 */
687 fe_read_eeprom(sc, eeprom);
688
689 /* Make sure the EEPROM is turned off. */
690 outb(iobase + FE_BMPR16, 0);
691 outb(iobase + FE_BMPR17, 0);
692
693 /* Make sure that config info in EEPROM and 86965 agree. */
694 if (eeprom[FE_EEPROM_CONF] != inb(iobase + FE_BMPR19))
695 goto fail;
696
697 /*
698 * Determine the card type.
699 */
700 switch (eeprom[FE_ATI_EEP_MODEL]) {
701 case FE_ATI_MODEL_AT1700T:
702 sc->type = FE_TYPE_AT1700T;
703 sc->typestr = "AT-1700T";
704 break;
705 case FE_ATI_MODEL_AT1700BT:
706 sc->type = FE_TYPE_AT1700BT;
707 sc->typestr = "AT-1700BT";
708 break;
709 case FE_ATI_MODEL_AT1700FT:
710 sc->type = FE_TYPE_AT1700FT;
711 sc->typestr = "AT-1700FT";
712 break;
713 case FE_ATI_MODEL_AT1700AT:
714 sc->type = FE_TYPE_AT1700AT;
715 sc->typestr = "AT-1700AT";
716 break;
717 default:
718 sc->type = FE_TYPE_RE2000;
719 sc->typestr = "unknown (RE-2000?)";
720 break;
721 }
722
723 /*
724 * Try to determine IRQ settings.
725 * Different models use different ranges of IRQs.
726 */
727 n = (inb(iobase + FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
728 switch (eeprom[FE_ATI_EEP_REVISION] & 0xf0) {
729 case 0x30:
730 irq = irqmap[3][n];
731 break;
732 case 0x10:
733 case 0x50:
734 irq = irqmap[2][n];
735 break;
736 case 0x40:
737 case 0x60:
738 if (eeprom[FE_ATI_EEP_MAGIC] & 0x04) {
739 irq = irqmap[1][n];
740 break;
741 }
742 default:
743 irq = irqmap[0][n];
744 break;
745 }
746
747 if (ia->ia_irq != IRQUNK) {
748 if (ia->ia_irq != irq) {
749 printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
750 sc->sc_dev.dv_xname, ia->ia_irq, irq);
751 return (0);
752 }
753 } else
754 ia->ia_irq = irq;
755
756 /*
757 * Initialize constants in the per-line structure.
758 */
759
760 /* Get our station address from EEPROM. */
761 bcopy(eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
762
763 /* Make sure we got a valid station address. */
764 if ((sc->sc_enaddr[0] & 0x03) != 0x00
765 || (sc->sc_enaddr[0] == 0x00
766 && sc->sc_enaddr[1] == 0x00
767 && sc->sc_enaddr[2] == 0x00))
768 goto fail;
769
770 /* Should find all register prototypes here. FIXME. */
771 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */
772 sc->proto_dlcr5 = 0;
773 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC;
774 #if 0 /* XXXX Should we use this? */
775 sc->proto_bmpr13 = eeprom[FE_ATI_EEP_MEDIA];
776 #else
777 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
778 #endif
779
780 /*
781 * Program the 86965 as follows:
782 * SRAM: 32KB, 100ns, byte-wide access.
783 * Transmission buffer: 4KB x 2.
784 * System bus interface: 16 bits.
785 * We cannot change these values but TXBSIZE, because they
786 * are hard-wired on the board. Modifying TXBSIZE will affect
787 * the driver performance.
788 */
789 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
790 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
791
792 #if FE_DEBUG >= 3
793 log(LOG_INFO, "%s: ATI found\n", sc->sc_dev.dv_xname);
794 fe_dump(LOG_INFO, sc);
795 #endif
796
797 /* Initialize 86965. */
798 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
799 delay(200);
800
801 /* Disable all interrupts. */
802 outb(iobase + FE_DLCR2, 0);
803 outb(iobase + FE_DLCR3, 0);
804
805 #if FE_DEBUG >= 3
806 log(LOG_INFO, "%s: end of fe_probe_ati()\n", sc->sc_dev.dv_xname);
807 fe_dump(LOG_INFO, sc);
808 #endif
809
810 /*
811 * That's all. AT1700 occupies 32 I/O addresses, by the way.
812 */
813 ia->ia_iosize = 32;
814 ia->ia_msize = 0;
815 return (1);
816
817 fail:
818 /* Restore register values, in the case we had no 86965. */
819 outb(iobase + FE_BMPR16, save16);
820 outb(iobase + FE_BMPR17, save17);
821 return (0);
822 }
823
824 /*
825 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
826 */
827 int
828 fe_probe_mbh(sc, ia)
829 struct fe_softc *sc;
830 struct isa_attach_args *ia;
831 {
832 int iobase = sc->sc_iobase;
833
834 static struct fe_simple_probe_struct probe_table[] = {
835 { FE_DLCR2, 0x70, 0x00 },
836 { FE_DLCR4, 0x08, 0x00 },
837 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
838 #if 0
839 /*
840 * Test *vendor* part of the address for Fujitsu.
841 * The test will gain reliability of probe process, but
842 * it rejects clones by other vendors, or OEM product
843 * supplied by resalers other than Fujitsu.
844 */
845 { FE_MBH10, 0xFF, 0x00 },
846 { FE_MBH11, 0xFF, 0x00 },
847 { FE_MBH12, 0xFF, 0x0E },
848 #else
849 /*
850 * We can always verify the *first* 2 bits (in Ehternet
851 * bit order) are "global" and "unicast" even for
852 * unknown vendors.
853 */
854 { FE_MBH10, 0x03, 0x00 },
855 #endif
856 /* Just a gap? Seems reliable, anyway. */
857 { 0x12, 0xFF, 0x00 },
858 { 0x13, 0xFF, 0x00 },
859 { 0x14, 0xFF, 0x00 },
860 { 0x15, 0xFF, 0x00 },
861 { 0x16, 0xFF, 0x00 },
862 { 0x17, 0xFF, 0x00 },
863 { 0x18, 0xFF, 0xFF },
864 { 0x19, 0xFF, 0xFF },
865
866 { 0 }
867 };
868
869 #if 0
870 /*
871 * We need a PCMCIA flag.
872 */
873 if ((cf->cf_flags & FE_FLAGS_PCMCIA) == 0)
874 return (0);
875 #endif
876
877 /*
878 * We need explicit IRQ and supported address.
879 */
880 if (ia->ia_irq == IRQUNK || (iobase & ~0x3E0) != 0)
881 return (0);
882
883 #if FE_DEBUG >= 3
884 log(LOG_INFO, "%s: top of fe_probe_mbh()\n", sc->sc_dev.dv_xname);
885 fe_dump(LOG_INFO, sc);
886 #endif
887
888 /*
889 * See if MBH10302 is on its address.
890 * I'm not sure the following probe code works. FIXME.
891 */
892 if (!fe_simple_probe(iobase, probe_table))
893 return (0);
894
895 /* Determine the card type. */
896 sc->type = FE_TYPE_MBH10302;
897 sc->typestr = "MBH10302 (PCMCIA)";
898
899 /*
900 * Initialize constants in the per-line structure.
901 */
902
903 /* Get our station address from EEPROM. */
904 inblk(iobase + FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN);
905
906 /* Make sure we got a valid station address. */
907 if ((sc->sc_enaddr[0] & 0x03) != 0x00
908 || (sc->sc_enaddr[0] == 0x00
909 && sc->sc_enaddr[1] == 0x00
910 && sc->sc_enaddr[2] == 0x00))
911 return (0);
912
913 /* Should find all register prototypes here. FIXME. */
914 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
915 sc->proto_dlcr5 = 0;
916 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
917 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
918
919 /*
920 * Program the 86960 as follows:
921 * SRAM: 32KB, 100ns, byte-wide access.
922 * Transmission buffer: 4KB x 2.
923 * System bus interface: 16 bits.
924 * We cannot change these values but TXBSIZE, because they
925 * are hard-wired on the board. Modifying TXBSIZE will affect
926 * the driver performance.
927 */
928 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
929 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
930
931 /* Setup hooks. We need a special initialization procedure. */
932 sc->init = fe_init_mbh;
933
934 /*
935 * Minimum initialization.
936 */
937
938 /* Wait for a while. I'm not sure this is necessary. FIXME. */
939 delay(200);
940
941 /* Minimul initialization of 86960. */
942 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
943 delay(200);
944
945 /* Disable all interrupts. */
946 outb(iobase + FE_DLCR2, 0);
947 outb(iobase + FE_DLCR3, 0);
948
949 #if 1 /* FIXME. */
950 /* Initialize system bus interface and encoder/decoder operation. */
951 outb(iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE);
952 #endif
953
954 /*
955 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
956 */
957 ia->ia_iosize = 32;
958 ia->ia_msize = 0;
959 return (1);
960 }
961
962 /* MBH specific initialization routine. */
963 void
964 fe_init_mbh(sc)
965 struct fe_softc *sc;
966 {
967
968 /* Probably required after hot-insertion... */
969
970 /* Wait for a while. I'm not sure this is necessary. FIXME. */
971 delay(200);
972
973 /* Minimul initialization of 86960. */
974 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
975 delay(200);
976
977 /* Disable all interrupts. */
978 outb(sc->sc_iobase + FE_DLCR2, 0);
979 outb(sc->sc_iobase + FE_DLCR3, 0);
980
981 /* Enable master interrupt flag. */
982 outb(sc->sc_iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE);
983 }
984
985 /*
986 * Install interface into kernel networking data structures
987 */
988 void
989 feattach(parent, self, aux)
990 struct device *parent, *self;
991 void *aux;
992 {
993 struct fe_softc *sc = (void *)self;
994 struct isa_attach_args *ia = aux;
995 struct cfdata *cf = sc->sc_dev.dv_cfdata;
996 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
997
998 /* Stop the 86960. */
999 fe_stop(sc);
1000
1001 /* Initialize ifnet structure. */
1002 ifp->if_unit = sc->sc_dev.dv_unit;
1003 ifp->if_name = fecd.cd_name;
1004 ifp->if_start = fe_start;
1005 ifp->if_ioctl = fe_ioctl;
1006 ifp->if_watchdog = fe_watchdog;
1007 ifp->if_flags =
1008 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
1009
1010 /*
1011 * Set maximum size of output queue, if it has not been set.
1012 * It is done here as this driver may be started after the
1013 * system intialization (i.e., the interface is PCMCIA.)
1014 *
1015 * I'm not sure this is really necessary, but, even if it is,
1016 * it should be done somewhere else, e.g., in if_attach(),
1017 * since it must be a common workaround for all network drivers.
1018 * FIXME.
1019 */
1020 if (ifp->if_snd.ifq_maxlen == 0) {
1021 extern int ifqmaxlen; /* Don't be so shocked... */
1022 ifp->if_snd.ifq_maxlen = ifqmaxlen;
1023 }
1024
1025 #if FE_DEBUG >= 3
1026 log(LOG_INFO, "%s: feattach()\n", sc->sc_dev.dv_xname);
1027 fe_dump(LOG_INFO, sc);
1028 #endif
1029
1030 #if FE_SINGLE_TRANSMISSION
1031 /* Override txb config to allocate minimum. */
1032 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
1033 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1034 #endif
1035
1036 /* Modify hardware config if it is requested. */
1037 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
1038 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
1039
1040 /* Find TX buffer size, based on the hardware dependent proto. */
1041 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1042 case FE_D6_TXBSIZ_2x2KB:
1043 sc->txb_size = 2048;
1044 break;
1045 case FE_D6_TXBSIZ_2x4KB:
1046 sc->txb_size = 4096;
1047 break;
1048 case FE_D6_TXBSIZ_2x8KB:
1049 sc->txb_size = 8192;
1050 break;
1051 default:
1052 /* Oops, we can't work with single buffer configuration. */
1053 #if FE_DEBUG >= 2
1054 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
1055 sc->sc_dev.dv_xname);
1056 #endif
1057 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
1058 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
1059 sc->txb_size = 2048;
1060 break;
1061 }
1062
1063 /* Attach the interface. */
1064 if_attach(ifp);
1065 ether_ifattach(ifp);
1066
1067 /* Print additional info when attached. */
1068 printf(": address %s, type %s\n",
1069 ether_sprintf(sc->sc_arpcom.ac_enaddr), sc->typestr);
1070 #if FE_DEBUG >= 3
1071 {
1072 int buf, txb, bbw, sbw, ram;
1073
1074 buf = txb = bbw = sbw = ram = -1;
1075 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
1076 case FE_D6_BUFSIZ_8KB:
1077 buf = 8;
1078 break;
1079 case FE_D6_BUFSIZ_16KB:
1080 buf = 16;
1081 break;
1082 case FE_D6_BUFSIZ_32KB:
1083 buf = 32;
1084 break;
1085 case FE_D6_BUFSIZ_64KB:
1086 buf = 64;
1087 break;
1088 }
1089 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
1090 case FE_D6_TXBSIZ_2x2KB:
1091 txb = 2;
1092 break;
1093 case FE_D6_TXBSIZ_2x4KB:
1094 txb = 4;
1095 break;
1096 case FE_D6_TXBSIZ_2x8KB:
1097 txb = 8;
1098 break;
1099 }
1100 switch (sc->proto_dlcr6 & FE_D6_BBW) {
1101 case FE_D6_BBW_BYTE:
1102 bbw = 8;
1103 break;
1104 case FE_D6_BBW_WORD:
1105 bbw = 16;
1106 break;
1107 }
1108 switch (sc->proto_dlcr6 & FE_D6_SBW) {
1109 case FE_D6_SBW_BYTE:
1110 sbw = 8;
1111 break;
1112 case FE_D6_SBW_WORD:
1113 sbw = 16;
1114 break;
1115 }
1116 switch (sc->proto_dlcr6 & FE_D6_SRAM) {
1117 case FE_D6_SRAM_100ns:
1118 ram = 100;
1119 break;
1120 case FE_D6_SRAM_150ns:
1121 ram = 150;
1122 break;
1123 }
1124 printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
1125 sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw);
1126 }
1127 #endif
1128
1129 #if NBPFILTER > 0
1130 /* If BPF is in the kernel, call the attach for it. */
1131 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
1132 #endif
1133
1134 sc->sc_ih = isa_intr_establish(ia->ia_irq, ISA_IST_EDGE, ISA_IPL_NET,
1135 feintr, sc);
1136 }
1137
1138 /*
1139 * Reset interface.
1140 */
1141 void
1142 fe_reset(sc)
1143 struct fe_softc *sc;
1144 {
1145 int s;
1146
1147 s = splimp();
1148 fe_stop(sc);
1149 fe_init(sc);
1150 splx(s);
1151 }
1152
1153 /*
1154 * Stop everything on the interface.
1155 *
1156 * All buffered packets, both transmitting and receiving,
1157 * if any, will be lost by stopping the interface.
1158 */
1159 void
1160 fe_stop(sc)
1161 struct fe_softc *sc;
1162 {
1163
1164 #if FE_DEBUG >= 3
1165 log(LOG_INFO, "%s: top of fe_stop()\n", sc->sc_dev.dv_xname);
1166 fe_dump(LOG_INFO, sc);
1167 #endif
1168
1169 /* Disable interrupts. */
1170 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1171 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1172
1173 /* Stop interface hardware. */
1174 delay(200);
1175 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1176 delay(200);
1177
1178 /* Clear all interrupt status. */
1179 outb(sc->sc_iobase + FE_DLCR0, 0xFF);
1180 outb(sc->sc_iobase + FE_DLCR1, 0xFF);
1181
1182 /* Put the chip in stand-by mode. */
1183 delay(200);
1184 outb(sc->sc_iobase + FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
1185 delay(200);
1186
1187 /* MAR loading can be delayed. */
1188 sc->filter_change = 0;
1189
1190 /* Call a hook. */
1191 if (sc->stop)
1192 sc->stop(sc);
1193
1194 #if DEBUG >= 3
1195 log(LOG_INFO, "%s: end of fe_stop()\n", sc->sc_dev.dv_xname);
1196 fe_dump(LOG_INFO, sc);
1197 #endif
1198 }
1199
1200 /*
1201 * Device timeout/watchdog routine. Entered if the device neglects to
1202 * generate an interrupt after a transmit has been started on it.
1203 */
1204 void
1205 fe_watchdog(unit)
1206 int unit;
1207 {
1208 struct fe_softc *sc = fecd.cd_devs[unit];
1209
1210 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1211 #if FE_DEBUG >= 3
1212 fe_dump(LOG_INFO, sc);
1213 #endif
1214
1215 /* Record how many packets are lost by this accident. */
1216 sc->sc_arpcom.ac_if.if_oerrors += sc->txb_sched + sc->txb_count;
1217
1218 fe_reset(sc);
1219 }
1220
1221 /*
1222 * Drop (skip) a packet from receive buffer in 86960 memory.
1223 */
1224 static inline void
1225 fe_droppacket(sc)
1226 struct fe_softc *sc;
1227 {
1228
1229 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
1230 }
1231
1232 /*
1233 * Initialize device.
1234 */
1235 void
1236 fe_init(sc)
1237 struct fe_softc *sc;
1238 {
1239 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1240 int i;
1241
1242 #if FE_DEBUG >= 3
1243 log(LOG_INFO, "%s: top of fe_init()\n", sc->sc_dev.dv_xname);
1244 fe_dump(LOG_INFO, sc);
1245 #endif
1246
1247 /* Reset transmitter flags. */
1248 ifp->if_flags &= ~IFF_OACTIVE;
1249 ifp->if_timer = 0;
1250
1251 sc->txb_free = sc->txb_size;
1252 sc->txb_count = 0;
1253 sc->txb_sched = 0;
1254
1255 /* Call a hook. */
1256 if (sc->init)
1257 sc->init(sc);
1258
1259 #if FE_DEBUG >= 3
1260 log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname);
1261 fe_dump(LOG_INFO, sc);
1262 #endif
1263
1264 /*
1265 * Make sure to disable the chip, also.
1266 * This may also help re-programming the chip after
1267 * hot insertion of PCMCIAs.
1268 */
1269 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1270
1271 /* Power up the chip and select register bank for DLCRs. */
1272 delay(200);
1273 outb(sc->sc_iobase + FE_DLCR7,
1274 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
1275 delay(200);
1276
1277 /* Feed the station address. */
1278 outblk(sc->sc_iobase + FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN);
1279
1280 /* Select the BMPR bank for runtime register access. */
1281 outb(sc->sc_iobase + FE_DLCR7,
1282 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1283
1284 /* Initialize registers. */
1285 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1286 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1287 outb(sc->sc_iobase + FE_DLCR2, 0x00);
1288 outb(sc->sc_iobase + FE_DLCR3, 0x00);
1289 outb(sc->sc_iobase + FE_DLCR4, sc->proto_dlcr4);
1290 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5);
1291 outb(sc->sc_iobase + FE_BMPR10, 0x00);
1292 outb(sc->sc_iobase + FE_BMPR11, FE_B11_CTRL_SKIP);
1293 outb(sc->sc_iobase + FE_BMPR12, 0x00);
1294 outb(sc->sc_iobase + FE_BMPR13, sc->proto_bmpr13);
1295 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER);
1296 outb(sc->sc_iobase + FE_BMPR15, 0x00);
1297
1298 #if FE_DEBUG >= 3
1299 log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname);
1300 fe_dump(LOG_INFO, sc);
1301 #endif
1302
1303 /* Enable interrupts. */
1304 outb(sc->sc_iobase + FE_DLCR2, FE_TMASK);
1305 outb(sc->sc_iobase + FE_DLCR3, FE_RMASK);
1306
1307 /* Enable transmitter and receiver. */
1308 delay(200);
1309 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1310 delay(200);
1311
1312 #if FE_DEBUG >= 3
1313 log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname);
1314 fe_dump(LOG_INFO, sc);
1315 #endif
1316
1317 /*
1318 * Make sure to empty the receive buffer.
1319 *
1320 * This may be redundant, but *if* the receive buffer were full
1321 * at this point, the driver would hang. I have experienced
1322 * some strange hangups just after UP. I hope the following
1323 * code solve the problem.
1324 *
1325 * I have changed the order of hardware initialization.
1326 * I think the receive buffer cannot have any packets at this
1327 * point in this version. The following code *must* be
1328 * redundant now. FIXME.
1329 */
1330 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1331 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1332 break;
1333 fe_droppacket(sc);
1334 }
1335 #if FE_DEBUG >= 1
1336 if (i >= FE_MAX_RECV_COUNT) {
1337 log(LOG_ERR, "%s: cannot empty receive buffer\n",
1338 sc->sc_dev.dv_xname);
1339 }
1340 #endif
1341 #if FE_DEBUG >= 3
1342 if (i < FE_MAX_RECV_COUNT) {
1343 log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
1344 sc->sc_dev.dv_xname, i);
1345 }
1346 #endif
1347
1348 #if FE_DEBUG >= 3
1349 log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname);
1350 fe_dump(LOG_INFO, sc);
1351 #endif
1352
1353 /* Do we need this here? */
1354 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */
1355 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */
1356
1357 #if FE_DEBUG >= 3
1358 log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname);
1359 fe_dump(LOG_INFO, sc);
1360 #endif
1361
1362 /* Set 'running' flag. */
1363 ifp->if_flags |= IFF_RUNNING;
1364
1365 /*
1366 * At this point, the interface is runnung properly,
1367 * except that it receives *no* packets. we then call
1368 * fe_setmode() to tell the chip what packets to be
1369 * received, based on the if_flags and multicast group
1370 * list. It completes the initialization process.
1371 */
1372 fe_setmode(sc);
1373
1374 #if FE_DEBUG >= 3
1375 log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname);
1376 fe_dump(LOG_INFO, sc);
1377 #endif
1378
1379 /* ...and attempt to start output. */
1380 fe_start(ifp);
1381
1382 #if FE_DEBUG >= 3
1383 log(LOG_INFO, "%s: end of fe_init()\n", sc->sc_dev.dv_xname);
1384 fe_dump(LOG_INFO, sc);
1385 #endif
1386 }
1387
1388 /*
1389 * This routine actually starts the transmission on the interface
1390 */
1391 static inline void
1392 fe_xmit(sc)
1393 struct fe_softc *sc;
1394 {
1395
1396 /*
1397 * Set a timer just in case we never hear from the board again.
1398 * We use longer timeout for multiple packet transmission.
1399 * I'm not sure this timer value is appropriate. FIXME.
1400 */
1401 sc->sc_arpcom.ac_if.if_timer = 1 + sc->txb_count;
1402
1403 /* Update txb variables. */
1404 sc->txb_sched = sc->txb_count;
1405 sc->txb_count = 0;
1406 sc->txb_free = sc->txb_size;
1407
1408 #if FE_DELAYED_PADDING
1409 /* Omit the postponed padding process. */
1410 sc->txb_padding = 0;
1411 #endif
1412
1413 /* Start transmitter, passing packets in TX buffer. */
1414 outb(sc->sc_iobase + FE_BMPR10, sc->txb_sched | FE_B10_START);
1415 }
1416
1417 /*
1418 * Start output on interface.
1419 * We make two assumptions here:
1420 * 1) that the current priority is set to splimp _before_ this code
1421 * is called *and* is returned to the appropriate priority after
1422 * return
1423 * 2) that the IFF_OACTIVE flag is checked before this code is called
1424 * (i.e. that the output part of the interface is idle)
1425 */
1426 void
1427 fe_start(ifp)
1428 struct ifnet *ifp;
1429 {
1430 struct fe_softc *sc = fecd.cd_devs[ifp->if_unit];
1431 struct mbuf *m;
1432
1433 #if FE_DEBUG >= 1
1434 /* Just a sanity check. */
1435 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
1436 /*
1437 * Txb_count and txb_free co-works to manage the
1438 * transmission buffer. Txb_count keeps track of the
1439 * used potion of the buffer, while txb_free does unused
1440 * potion. So, as long as the driver runs properly,
1441 * txb_count is zero if and only if txb_free is same
1442 * as txb_size (which represents whole buffer.)
1443 */
1444 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
1445 sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free);
1446 /*
1447 * So, what should I do, then?
1448 *
1449 * We now know txb_count and txb_free contradicts. We
1450 * cannot, however, tell which is wrong. More
1451 * over, we cannot peek 86960 transmission buffer or
1452 * reset the transmission buffer. (In fact, we can
1453 * reset the entire interface. I don't want to do it.)
1454 *
1455 * If txb_count is incorrect, leaving it as is will cause
1456 * sending of gabages after next interrupt. We have to
1457 * avoid it. Hence, we reset the txb_count here. If
1458 * txb_free was incorrect, resetting txb_count just loose
1459 * some packets. We can live with it.
1460 */
1461 sc->txb_count = 0;
1462 }
1463 #endif
1464
1465 #if FE_DEBUG >= 1
1466 /*
1467 * First, see if there are buffered packets and an idle
1468 * transmitter - should never happen at this point.
1469 */
1470 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
1471 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
1472 sc->sc_dev.dv_xname, sc->txb_count);
1473 fe_xmit(sc);
1474 }
1475 #endif
1476
1477 /*
1478 * Stop accepting more transmission packets temporarily, when
1479 * a filter change request is delayed. Updating the MARs on
1480 * 86960 flushes the transmisstion buffer, so it is delayed
1481 * until all buffered transmission packets have been sent
1482 * out.
1483 */
1484 if (sc->filter_change) {
1485 /*
1486 * Filter change requst is delayed only when the DLC is
1487 * working. DLC soon raise an interrupt after finishing
1488 * the work.
1489 */
1490 goto indicate_active;
1491 }
1492
1493 for (;;) {
1494 /*
1495 * See if there is room to put another packet in the buffer.
1496 * We *could* do better job by peeking the send queue to
1497 * know the length of the next packet. Current version just
1498 * tests against the worst case (i.e., longest packet). FIXME.
1499 *
1500 * When adding the packet-peek feature, don't forget adding a
1501 * test on txb_count against QUEUEING_MAX.
1502 * There is a little chance the packet count exceeds
1503 * the limit. Assume transmission buffer is 8KB (2x8KB
1504 * configuration) and an application sends a bunch of small
1505 * (i.e., minimum packet sized) packets rapidly. An 8KB
1506 * buffer can hold 130 blocks of 62 bytes long...
1507 */
1508 if (sc->txb_free < ETHER_MAX_LEN + FE_DATA_LEN_LEN) {
1509 /* No room. */
1510 goto indicate_active;
1511 }
1512
1513 #if FE_SINGLE_TRANSMISSION
1514 if (sc->txb_count > 0) {
1515 /* Just one packet per a transmission buffer. */
1516 goto indicate_active;
1517 }
1518 #endif
1519
1520 /*
1521 * Get the next mbuf chain for a packet to send.
1522 */
1523 IF_DEQUEUE(&ifp->if_snd, m);
1524 if (m == 0) {
1525 /* No more packets to send. */
1526 goto indicate_inactive;
1527 }
1528
1529 #if NBPFILTER > 0
1530 /* Tap off here if there is a BPF listener. */
1531 if (ifp->if_bpf)
1532 bpf_mtap(ifp->if_bpf, m);
1533 #endif
1534
1535 /*
1536 * Copy the mbuf chain into the transmission buffer.
1537 * txb_* variables are updated as necessary.
1538 */
1539 fe_write_mbufs(sc, m);
1540
1541 m_freem(m);
1542
1543 /* Start transmitter if it's idle. */
1544 if (sc->txb_sched == 0)
1545 fe_xmit(sc);
1546 }
1547
1548 indicate_inactive:
1549 /*
1550 * We are using the !OACTIVE flag to indicate to
1551 * the outside world that we can accept an
1552 * additional packet rather than that the
1553 * transmitter is _actually_ active. Indeed, the
1554 * transmitter may be active, but if we haven't
1555 * filled all the buffers with data then we still
1556 * want to accept more.
1557 */
1558 ifp->if_flags &= ~IFF_OACTIVE;
1559 return;
1560
1561 indicate_active:
1562 /*
1563 * The transmitter is active, and there are no room for
1564 * more outgoing packets in the transmission buffer.
1565 */
1566 ifp->if_flags |= IFF_OACTIVE;
1567 return;
1568 }
1569
1570 /*
1571 * Transmission interrupt handler
1572 * The control flow of this function looks silly. FIXME.
1573 */
1574 void
1575 fe_tint(sc, tstat)
1576 struct fe_softc *sc;
1577 u_char tstat;
1578 {
1579 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1580 int left;
1581 int col;
1582
1583 /*
1584 * Handle "excessive collision" interrupt.
1585 */
1586 if (tstat & FE_D0_COLL16) {
1587 /*
1588 * Find how many packets (including this collided one)
1589 * are left unsent in transmission buffer.
1590 */
1591 left = inb(sc->sc_iobase + FE_BMPR10);
1592
1593 #if FE_DEBUG >= 2
1594 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
1595 sc->sc_dev.dv_xname, left, sc->txb_sched);
1596 #endif
1597 #if FE_DEBUG >= 3
1598 fe_dump(LOG_INFO, sc);
1599 #endif
1600
1601 /*
1602 * Update statistics.
1603 */
1604 ifp->if_collisions += 16;
1605 ifp->if_oerrors++;
1606 ifp->if_opackets += sc->txb_sched - left;
1607
1608 /*
1609 * Collision statistics has been updated.
1610 * Clear the collision flag on 86960 now to avoid confusion.
1611 */
1612 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1613
1614 /*
1615 * Restart transmitter, skipping the
1616 * collided packet.
1617 *
1618 * We *must* skip the packet to keep network running
1619 * properly. Excessive collision error is an
1620 * indication of the network overload. If we
1621 * tried sending the same packet after excessive
1622 * collision, the network would be filled with
1623 * out-of-time packets. Packets belonging
1624 * to reliable transport (such as TCP) are resent
1625 * by some upper layer.
1626 */
1627 outb(sc->sc_iobase + FE_BMPR11,
1628 FE_B11_CTRL_SKIP | FE_B11_MODE1);
1629 sc->txb_sched = left - 1;
1630 }
1631
1632 /*
1633 * Handle "transmission complete" interrupt.
1634 */
1635 if (tstat & FE_D0_TXDONE) {
1636 /*
1637 * Add in total number of collisions on last
1638 * transmission. We also clear "collision occurred" flag
1639 * here.
1640 *
1641 * 86960 has a design flow on collision count on multiple
1642 * packet transmission. When we send two or more packets
1643 * with one start command (that's what we do when the
1644 * transmission queue is clauded), 86960 informs us number
1645 * of collisions occured on the last packet on the
1646 * transmission only. Number of collisions on previous
1647 * packets are lost. I have told that the fact is clearly
1648 * stated in the Fujitsu document.
1649 *
1650 * I considered not to mind it seriously. Collision
1651 * count is not so important, anyway. Any comments? FIXME.
1652 */
1653
1654 if (inb(sc->sc_iobase + FE_DLCR0) & FE_D0_COLLID) {
1655 /* Clear collision flag. */
1656 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID);
1657
1658 /* Extract collision count from 86960. */
1659 col = inb(sc->sc_iobase + FE_DLCR4) & FE_D4_COL;
1660 if (col == 0) {
1661 /*
1662 * Status register indicates collisions,
1663 * while the collision count is zero.
1664 * This can happen after multiple packet
1665 * transmission, indicating that one or more
1666 * previous packet(s) had been collided.
1667 *
1668 * Since the accurate number of collisions
1669 * has been lost, we just guess it as 1;
1670 * Am I too optimistic? FIXME.
1671 */
1672 col = 1;
1673 } else
1674 col >>= FE_D4_COL_SHIFT;
1675 ifp->if_collisions += col;
1676 #if FE_DEBUG >= 4
1677 log(LOG_WARNING, "%s: %d collision%s (%d)\n",
1678 sc->sc_dev.dv_xname, col, col == 1 ? "" : "s",
1679 sc->txb_sched);
1680 #endif
1681 }
1682
1683 /*
1684 * Update total number of successfully
1685 * transmitted packets.
1686 */
1687 ifp->if_opackets += sc->txb_sched;
1688 sc->txb_sched = 0;
1689
1690 /*
1691 * The transmitter is no more active.
1692 * Reset output active flag and watchdog timer.
1693 */
1694 ifp->if_flags &= ~IFF_OACTIVE;
1695 ifp->if_timer = 0;
1696
1697 /*
1698 * If more data is ready to transmit in the buffer, start
1699 * transmitting them. Otherwise keep transmitter idle,
1700 * even if more data is queued. This gives receive
1701 * process a slight priority.
1702 */
1703 if (sc->txb_count > 0)
1704 fe_xmit(sc);
1705 }
1706 }
1707
1708 /*
1709 * Ethernet interface receiver interrupt.
1710 */
1711 void
1712 fe_rint(sc, rstat)
1713 struct fe_softc *sc;
1714 u_char rstat;
1715 {
1716 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1717 int len;
1718 u_char status;
1719 int i;
1720
1721 /*
1722 * Update statistics if this interrupt is caused by an error.
1723 */
1724 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR |
1725 FE_D1_ALGERR | FE_D1_SRTPKT)) {
1726 #if FE_DEBUG >= 3
1727 log(LOG_WARNING, "%s: receive error: %b\n",
1728 sc->sc_dev.dv_xname, rstat, FE_D1_ERRBITS);
1729 #endif
1730 ifp->if_ierrors++;
1731 }
1732
1733 /*
1734 * MB86960 has a flag indicating "receive queue empty."
1735 * We just loop cheking the flag to pull out all received
1736 * packets.
1737 *
1738 * We limit the number of iterrations to avoid infinite loop.
1739 * It can be caused by a very slow CPU (some broken
1740 * peripheral may insert incredible number of wait cycles)
1741 * or, worse, by a broken MB86960 chip.
1742 */
1743 for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
1744 /* Stop the iterration if 86960 indicates no packets. */
1745 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP)
1746 break;
1747
1748 /*
1749 * Extract A receive status byte.
1750 * As our 86960 is in 16 bit bus access mode, we have to
1751 * use inw() to get the status byte. The significant
1752 * value is returned in lower 8 bits.
1753 */
1754 status = (u_char)inw(sc->sc_iobase + FE_BMPR8);
1755 #if FE_DEBUG >= 4
1756 log(LOG_INFO, "%s: receive status = %02x\n",
1757 sc->sc_dev.dv_xname, status);
1758 #endif
1759
1760 /*
1761 * If there was an error, update statistics and drop
1762 * the packet, unless the interface is in promiscuous
1763 * mode.
1764 */
1765 if ((status & 0xF0) != 0x20) { /* XXXX ? */
1766 if ((ifp->if_flags & IFF_PROMISC) == 0) {
1767 ifp->if_ierrors++;
1768 fe_droppacket(sc);
1769 continue;
1770 }
1771 }
1772
1773 /*
1774 * Extract the packet length.
1775 * It is a sum of a header (14 bytes) and a payload.
1776 * CRC has been stripped off by the 86960.
1777 */
1778 len = inw(sc->sc_iobase + FE_BMPR8);
1779
1780 /*
1781 * MB86965 checks the packet length and drop big packet
1782 * before passing it to us. There are no chance we can
1783 * get [crufty] packets. Hence, if the length exceeds
1784 * the specified limit, it means some serious failure,
1785 * such as out-of-sync on receive buffer management.
1786 *
1787 * Is this statement true? FIXME.
1788 */
1789 if (len > ETHER_MAX_LEN || len < ETHER_HDR_SIZE) {
1790 #if FE_DEBUG >= 2
1791 log(LOG_WARNING,
1792 "%s: received a %s packet? (%u bytes)\n",
1793 sc->sc_dev.dv_xname,
1794 len < ETHER_HDR_SIZE ? "partial" : "big", len);
1795 #endif
1796 ifp->if_ierrors++;
1797 fe_droppacket(sc);
1798 continue;
1799 }
1800
1801 /*
1802 * Check for a short (RUNT) packet. We *do* check
1803 * but do nothing other than print a message.
1804 * Short packets are illegal, but does nothing bad
1805 * if it carries data for upper layer.
1806 */
1807 #if FE_DEBUG >= 2
1808 if (len < ETHER_MIN_LEN) {
1809 log(LOG_WARNING,
1810 "%s: received a short packet? (%u bytes)\n",
1811 sc->sc_dev.dv_xname, len);
1812 }
1813 #endif
1814
1815 /*
1816 * Go get a packet.
1817 */
1818 if (!fe_get_packet(sc, len)) {
1819 /* Skip a packet, updating statistics. */
1820 #if FE_DEBUG >= 2
1821 log(LOG_WARNING,
1822 "%s: out of mbufs; dropping packet (%u bytes)\n",
1823 sc->sc_dev.dv_xname, len);
1824 #endif
1825 ifp->if_ierrors++;
1826 fe_droppacket(sc);
1827
1828 /*
1829 * We stop receiving packets, even if there are
1830 * more in the buffer. We hope we can get more
1831 * mbufs next time.
1832 */
1833 return;
1834 }
1835
1836 /* Successfully received a packet. Update stat. */
1837 ifp->if_ipackets++;
1838 }
1839 }
1840
1841 /*
1842 * Ethernet interface interrupt processor
1843 */
1844 int
1845 feintr(arg)
1846 void *arg;
1847 {
1848 struct fe_softc *sc = arg;
1849 u_char tstat, rstat;
1850
1851 #if FE_DEBUG >= 4
1852 log(LOG_INFO, "%s: feintr()\n", sc->sc_dev.dv_xname);
1853 fe_dump(LOG_INFO, sc);
1854 #endif
1855
1856 /*
1857 * Get interrupt conditions, masking unneeded flags.
1858 */
1859 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1860 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1861 if (tstat == 0 && rstat == 0)
1862 return (0);
1863
1864 /*
1865 * Loop until there are no more new interrupt conditions.
1866 */
1867 for (;;) {
1868 /*
1869 * Reset the conditions we are acknowledging.
1870 */
1871 outb(sc->sc_iobase + FE_DLCR0, tstat);
1872 outb(sc->sc_iobase + FE_DLCR1, rstat);
1873
1874 /*
1875 * Handle transmitter interrupts. Handle these first because
1876 * the receiver will reset the board under some conditions.
1877 */
1878 if (tstat != 0)
1879 fe_tint(sc, tstat);
1880
1881 /*
1882 * Handle receiver interrupts.
1883 */
1884 if (rstat != 0)
1885 fe_rint(sc, rstat);
1886
1887 /*
1888 * Update the multicast address filter if it is
1889 * needed and possible. We do it now, because
1890 * we can make sure the transmission buffer is empty,
1891 * and there is a good chance that the receive queue
1892 * is empty. It will minimize the possibility of
1893 * packet lossage.
1894 */
1895 if (sc->filter_change &&
1896 sc->txb_count == 0 && sc->txb_sched == 0) {
1897 fe_loadmar(sc);
1898 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
1899 }
1900
1901 /*
1902 * If it looks like the transmitter can take more data,
1903 * attempt to start output on the interface. This is done
1904 * after handling the receiver interrupt to give the
1905 * receive operation priority.
1906 */
1907 if ((sc->sc_arpcom.ac_if.if_flags & IFF_OACTIVE) == 0)
1908 fe_start(&sc->sc_arpcom.ac_if);
1909
1910 /*
1911 * Get interrupt conditions, masking unneeded flags.
1912 */
1913 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK;
1914 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK;
1915 if (tstat == 0 && rstat == 0)
1916 return (1);
1917 }
1918 }
1919
1920 /*
1921 * Process an ioctl request. This code needs some work - it looks pretty ugly.
1922 */
1923 int
1924 fe_ioctl(ifp, command, data)
1925 register struct ifnet *ifp;
1926 u_long command;
1927 caddr_t data;
1928 {
1929 struct fe_softc *sc = fecd.cd_devs[ifp->if_unit];
1930 register struct ifaddr *ifa = (struct ifaddr *)data;
1931 struct ifreq *ifr = (struct ifreq *)data;
1932 int s, error = 0;
1933
1934 #if FE_DEBUG >= 3
1935 log(LOG_INFO, "%s: ioctl(%x)\n", sc->sc_dev.dv_xname, command);
1936 #endif
1937
1938 s = splimp();
1939
1940 switch (command) {
1941
1942 case SIOCSIFADDR:
1943 ifp->if_flags |= IFF_UP;
1944
1945 switch (ifa->ifa_addr->sa_family) {
1946 #ifdef INET
1947 case AF_INET:
1948 fe_init(sc);
1949 arp_ifinit(&sc->sc_arpcom, ifa);
1950 break;
1951 #endif
1952 #ifdef NS
1953 case AF_NS:
1954 {
1955 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1956
1957 if (ns_nullhost(*ina))
1958 ina->x_host =
1959 *(union ns_host *)(sc->sc_arpcom.ac_enaddr);
1960 else
1961 bcopy(ina->x_host.c_host,
1962 sc->sc_arpcom.ac_enaddr,
1963 sizeof(sc->sc_arpcom.ac_enaddr));
1964 /* Set new address. */
1965 fe_init(sc);
1966 break;
1967 }
1968 #endif
1969 default:
1970 fe_init(sc);
1971 break;
1972 }
1973 break;
1974
1975 case SIOCSIFFLAGS:
1976 if ((ifp->if_flags & IFF_UP) == 0 &&
1977 (ifp->if_flags & IFF_RUNNING) != 0) {
1978 /*
1979 * If interface is marked down and it is running, then
1980 * stop it.
1981 */
1982 fe_stop(sc);
1983 ifp->if_flags &= ~IFF_RUNNING;
1984 } else if ((ifp->if_flags & IFF_UP) != 0 &&
1985 (ifp->if_flags & IFF_RUNNING) == 0) {
1986 /*
1987 * If interface is marked up and it is stopped, then
1988 * start it.
1989 */
1990 fe_init(sc);
1991 } else {
1992 /*
1993 * Reset the interface to pick up changes in any other
1994 * flags that affect hardware registers.
1995 */
1996 fe_setmode(sc);
1997 }
1998 #if DEBUG >= 1
1999 /* "ifconfig fe0 debug" to print register dump. */
2000 if (ifp->if_flags & IFF_DEBUG) {
2001 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", sc->sc_dev.dv_xname);
2002 fe_dump(LOG_DEBUG, sc);
2003 }
2004 #endif
2005 break;
2006
2007 case SIOCADDMULTI:
2008 case SIOCDELMULTI:
2009 /* Update our multicast list. */
2010 error = (command == SIOCADDMULTI) ?
2011 ether_addmulti(ifr, &sc->sc_arpcom) :
2012 ether_delmulti(ifr, &sc->sc_arpcom);
2013
2014 if (error == ENETRESET) {
2015 /*
2016 * Multicast list has changed; set the hardware filter
2017 * accordingly.
2018 */
2019 fe_setmode(sc);
2020 error = 0;
2021 }
2022 break;
2023
2024 default:
2025 error = EINVAL;
2026 }
2027
2028 splx(s);
2029 return (error);
2030 }
2031
2032 /*
2033 * Retreive packet from receive buffer and send to the next level up via
2034 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
2035 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
2036 */
2037 int
2038 fe_get_packet(sc, len)
2039 struct fe_softc *sc;
2040 int len;
2041 {
2042 struct ether_header *eh;
2043 struct mbuf *m;
2044 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
2045
2046 /* Allocate a header mbuf. */
2047 MGETHDR(m, M_DONTWAIT, MT_DATA);
2048 if (m == 0)
2049 return (0);
2050 m->m_pkthdr.rcvif = ifp;
2051 m->m_pkthdr.len = len;
2052
2053 /* The following silliness is to make NFS happy. */
2054 #define EROUND ((sizeof(struct ether_header) + 3) & ~3)
2055 #define EOFF (EROUND - sizeof(struct ether_header))
2056
2057 /*
2058 * Our strategy has one more problem. There is a policy on
2059 * mbuf cluster allocation. It says that we must have at
2060 * least MINCLSIZE (208 bytes) to allocate a cluster. For a
2061 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
2062 * our code violates the rule...
2063 * On the other hand, the current code is short, simle,
2064 * and fast, however. It does no harmful thing, just waists
2065 * some memory. Any comments? FIXME.
2066 */
2067
2068 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
2069 if (len > MHLEN - EOFF) {
2070 MCLGET(m, M_DONTWAIT);
2071 if ((m->m_flags & M_EXT) == 0) {
2072 m_freem(m);
2073 return (0);
2074 }
2075 }
2076
2077 /*
2078 * The following assumes there is room for the ether header in the
2079 * header mbuf.
2080 */
2081 m->m_data += EOFF;
2082 eh = mtod(m, struct ether_header *);
2083
2084 /* Set the length of this packet. */
2085 m->m_len = len;
2086
2087 /* Get a packet. */
2088 insw(sc->sc_iobase + FE_BMPR8, m->m_data, (len + 1) >> 1);
2089
2090 #if NBPFILTER > 0
2091 /*
2092 * Check if there's a BPF listener on this interface. If so, hand off
2093 * the raw packet to bpf.
2094 */
2095 if (ifp->if_bpf) {
2096 bpf_mtap(ifp->if_bpf, m);
2097
2098 /*
2099 * Note that the interface cannot be in promiscuous mode if
2100 * there are no BPF listeners. And if we are in promiscuous
2101 * mode, we have to check if this packet is really ours.
2102 */
2103 if ((ifp->if_flags & IFF_PROMISC) != 0 &&
2104 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
2105 bcmp(eh->ether_dhost, sc->sc_arpcom.ac_enaddr,
2106 sizeof(eh->ether_dhost)) != 0) {
2107 m_freem(m);
2108 return (1);
2109 }
2110 }
2111 #endif
2112
2113 /* Fix up data start offset in mbuf to point past ether header. */
2114 m_adj(m, sizeof(struct ether_header));
2115 ether_input(ifp, eh, m);
2116 return (1);
2117 }
2118
2119 /*
2120 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
2121 * Returns number of bytes actually written, including length word.
2122 *
2123 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
2124 * Packets shorter than Ethernet minimum are legal, and we pad them
2125 * before sending out. An exception is "partial" packets which are
2126 * shorter than mandatory Ethernet header.
2127 *
2128 * I wrote a code for an experimental "delayed padding" technique.
2129 * When employed, it postpones the padding process for short packets.
2130 * If xmit() occured at the moment, the padding process is omitted, and
2131 * garbages are sent as pad data. If next packet is stored in the
2132 * transmission buffer before xmit(), write_mbuf() pads the previous
2133 * packet before transmitting new packet. This *may* gain the
2134 * system performance (slightly).
2135 */
2136 void
2137 fe_write_mbufs(sc, m)
2138 struct fe_softc *sc;
2139 struct mbuf *m;
2140 {
2141 int bmpr8 = sc->sc_iobase + FE_BMPR8;
2142 struct mbuf *mp;
2143 u_char *data;
2144 u_short savebyte; /* WARNING: Architecture dependent! */
2145 int totlen, len, wantbyte;
2146
2147 #if FE_DELAYED_PADDING
2148 /* Do the "delayed padding." */
2149 len = sc->txb_padding >> 1;
2150 if (len > 0) {
2151 while (--len >= 0)
2152 outw(bmpr8, 0);
2153 sc->txb_padding = 0;
2154 }
2155 #endif
2156
2157 /* We need to use m->m_pkthdr.len, so require the header */
2158 if ((m->m_flags & M_PKTHDR) == 0)
2159 panic("fe_write_mbufs: no header mbuf");
2160
2161 #if FE_DEBUG >= 2
2162 /* First, count up the total number of bytes to copy. */
2163 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
2164 totlen += mp->m_len;
2165 /* Check if this matches the one in the packet header. */
2166 if (totlen != m->m_pkthdr.len)
2167 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
2168 sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len);
2169 #else
2170 /* Just use the length value in the packet header. */
2171 totlen = m->m_pkthdr.len;
2172 #endif
2173
2174 #if FE_DEBUG >= 1
2175 /*
2176 * Should never send big packets. If such a packet is passed,
2177 * it should be a bug of upper layer. We just ignore it.
2178 * ... Partial (too short) packets, neither.
2179 */
2180 if (totlen > ETHER_MAX_LEN || totlen < ETHER_HDR_SIZE) {
2181 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
2182 sc->sc_dev.dv_xname,
2183 totlen < ETHER_HDR_SIZE ? "partial" : "big", totlen);
2184 sc->sc_arpcom.ac_if.if_oerrors++;
2185 return;
2186 }
2187 #endif
2188
2189 /*
2190 * Put the length word for this frame.
2191 * Does 86960 accept odd length? -- Yes.
2192 * Do we need to pad the length to minimum size by ourselves?
2193 * -- Generally yes. But for (or will be) the last
2194 * packet in the transmission buffer, we can skip the
2195 * padding process. It may gain performance slightly. FIXME.
2196 */
2197 outw(bmpr8, max(totlen, ETHER_MIN_LEN));
2198
2199 /*
2200 * Update buffer status now.
2201 * Truncate the length up to an even number, since we use outw().
2202 */
2203 totlen = (totlen + 1) & ~1;
2204 sc->txb_free -= FE_DATA_LEN_LEN + max(totlen, ETHER_MIN_LEN);
2205 sc->txb_count++;
2206
2207 #if FE_DELAYED_PADDING
2208 /* Postpone the packet padding if necessary. */
2209 if (totlen < ETHER_MIN_LEN)
2210 sc->txb_padding = ETHER_MIN_LEN - totlen;
2211 #endif
2212
2213 /*
2214 * Transfer the data from mbuf chain to the transmission buffer.
2215 * MB86960 seems to require that data be transferred as words, and
2216 * only words. So that we require some extra code to patch
2217 * over odd-length mbufs.
2218 */
2219 wantbyte = 0;
2220 for (; m != 0; m = m->m_next) {
2221 /* Ignore empty mbuf. */
2222 len = m->m_len;
2223 if (len == 0)
2224 continue;
2225
2226 /* Find the actual data to send. */
2227 data = mtod(m, caddr_t);
2228
2229 /* Finish the last byte. */
2230 if (wantbyte) {
2231 outw(bmpr8, savebyte | (*data << 8));
2232 data++;
2233 len--;
2234 wantbyte = 0;
2235 }
2236
2237 /* Output contiguous words. */
2238 if (len > 1)
2239 outsw(bmpr8, data, len >> 1);
2240
2241 /* Save remaining byte, if there is one. */
2242 if (len & 1) {
2243 data += len & ~1;
2244 savebyte = *data;
2245 wantbyte = 1;
2246 }
2247 }
2248
2249 /* Spit the last byte, if the length is odd. */
2250 if (wantbyte)
2251 outw(bmpr8, savebyte);
2252
2253 #if ! FE_DELAYED_PADDING
2254 /*
2255 * Pad the packet to the minimum length if necessary.
2256 */
2257 len = (ETHER_MIN_LEN >> 1) - (totlen >> 1);
2258 while (--len >= 0)
2259 outw(bmpr8, 0);
2260 #endif
2261 }
2262
2263 /*
2264 * Compute the multicast address filter from the
2265 * list of multicast addresses we need to listen to.
2266 */
2267 void
2268 fe_getmcaf(ac, af)
2269 struct arpcom *ac;
2270 u_char *af;
2271 {
2272 struct ifnet *ifp = &ac->ac_if;
2273 struct ether_multi *enm;
2274 register u_char *cp, c;
2275 register u_long crc;
2276 register int i, len;
2277 struct ether_multistep step;
2278
2279 /*
2280 * Set up multicast address filter by passing all multicast addresses
2281 * through a crc generator, and then using the high order 6 bits as an
2282 * index into the 64 bit logical address filter. The high order bit
2283 * selects the word, while the rest of the bits select the bit within
2284 * the word.
2285 */
2286
2287 if ((ifp->if_flags & IFF_PROMISC) != 0)
2288 goto allmulti;
2289
2290 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0x00;
2291 ETHER_FIRST_MULTI(step, ac, enm);
2292 while (enm != NULL) {
2293 if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
2294 sizeof(enm->enm_addrlo)) != 0) {
2295 /*
2296 * We must listen to a range of multicast addresses.
2297 * For now, just accept all multicasts, rather than
2298 * trying to set only those filter bits needed to match
2299 * the range. (At this time, the only use of address
2300 * ranges is for IP multicast routing, for which the
2301 * range is big enough to require all bits set.)
2302 */
2303 goto allmulti;
2304 }
2305
2306 cp = enm->enm_addrlo;
2307 crc = 0xffffffff;
2308 for (len = sizeof(enm->enm_addrlo); --len >= 0;) {
2309 c = *cp++;
2310 for (i = 8; --i >= 0;) {
2311 if ((crc & 0x01) ^ (c & 0x01)) {
2312 crc >>= 1;
2313 crc ^= 0xedb88320;
2314 } else
2315 crc >>= 1;
2316 c >>= 1;
2317 }
2318 }
2319 /* Just want the 6 most significant bits. */
2320 crc >>= 26;
2321
2322 /* Turn on the corresponding bit in the filter. */
2323 af[crc >> 3] |= 1 << (crc & 7);
2324
2325 ETHER_NEXT_MULTI(step, enm);
2326 }
2327 ifp->if_flags &= ~IFF_ALLMULTI;
2328 return;
2329
2330 allmulti:
2331 ifp->if_flags |= IFF_ALLMULTI;
2332 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0xff;
2333 }
2334
2335 /*
2336 * Calculate a new "multicast packet filter" and put the 86960
2337 * receiver in appropriate mode.
2338 */
2339 void
2340 fe_setmode(sc)
2341 struct fe_softc *sc;
2342 {
2343 int flags = sc->sc_arpcom.ac_if.if_flags;
2344
2345 /*
2346 * If the interface is not running, we postpone the update
2347 * process for receive modes and multicast address filter
2348 * until the interface is restarted. It reduces some
2349 * complicated job on maintaining chip states. (Earlier versions
2350 * of this driver had a bug on that point...)
2351 *
2352 * To complete the trick, fe_init() calls fe_setmode() after
2353 * restarting the interface.
2354 */
2355 if ((flags & IFF_RUNNING) == 0)
2356 return;
2357
2358 /*
2359 * Promiscuous mode is handled separately.
2360 */
2361 if ((flags & IFF_PROMISC) != 0) {
2362 /*
2363 * Program 86960 to receive all packets on the segment
2364 * including those directed to other stations.
2365 * Multicast filter stored in MARs are ignored
2366 * under this setting, so we don't need to update it.
2367 *
2368 * Promiscuous mode is used solely by BPF, and BPF only
2369 * listens to valid (no error) packets. So, we ignore
2370 * errornous ones even in this mode.
2371 */
2372 outb(sc->sc_iobase + FE_DLCR5,
2373 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
2374 sc->filter_change = 0;
2375
2376 #if FE_DEBUG >= 3
2377 log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname);
2378 #endif
2379 return;
2380 }
2381
2382 /*
2383 * Turn the chip to the normal (non-promiscuous) mode.
2384 */
2385 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
2386
2387 /*
2388 * Find the new multicast filter value.
2389 */
2390 fe_getmcaf(&sc->sc_arpcom, sc->filter);
2391 sc->filter_change = 1;
2392
2393 #if FE_DEBUG >= 3
2394 log(LOG_INFO,
2395 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
2396 sc->sc_dev.dv_xname,
2397 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
2398 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
2399 #endif
2400
2401 /*
2402 * We have to update the multicast filter in the 86960, A.S.A.P.
2403 *
2404 * Note that the DLC (Data Linc Control unit, i.e. transmitter
2405 * and receiver) must be stopped when feeding the filter, and
2406 * DLC trushes all packets in both transmission and receive
2407 * buffers when stopped.
2408 *
2409 * ... Are the above sentenses correct? I have to check the
2410 * manual of the MB86960A. FIXME.
2411 *
2412 * To reduce the packet lossage, we delay the filter update
2413 * process until buffers are empty.
2414 */
2415 if (sc->txb_sched == 0 && sc->txb_count == 0 &&
2416 (inb(sc->sc_iobase + FE_DLCR1) & FE_D1_PKTRDY) == 0) {
2417 /*
2418 * Buffers are (apparently) empty. Load
2419 * the new filter value into MARs now.
2420 */
2421 fe_loadmar(sc);
2422 } else {
2423 /*
2424 * Buffers are not empty. Mark that we have to update
2425 * the MARs. The new filter will be loaded by feintr()
2426 * later.
2427 */
2428 #if FE_DEBUG >= 4
2429 log(LOG_INFO, "%s: filter change delayed\n", sc->sc_dev.dv_xname);
2430 #endif
2431 }
2432 }
2433
2434 /*
2435 * Load a new multicast address filter into MARs.
2436 *
2437 * The caller must have splimp'ed befor fe_loadmar.
2438 * This function starts the DLC upon return. So it can be called only
2439 * when the chip is working, i.e., from the driver's point of view, when
2440 * a device is RUNNING. (I mistook the point in previous versions.)
2441 */
2442 void
2443 fe_loadmar(sc)
2444 struct fe_softc *sc;
2445 {
2446
2447 /* Stop the DLC (transmitter and receiver). */
2448 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
2449
2450 /* Select register bank 1 for MARs. */
2451 outb(sc->sc_iobase + FE_DLCR7,
2452 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
2453
2454 /* Copy filter value into the registers. */
2455 outblk(sc->sc_iobase + FE_MAR8, sc->filter, FE_FILTER_LEN);
2456
2457 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
2458 outb(sc->sc_iobase + FE_DLCR7,
2459 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
2460
2461 /* Restart the DLC. */
2462 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
2463
2464 /* We have just updated the filter. */
2465 sc->filter_change = 0;
2466
2467 #if FE_DEBUG >= 3
2468 log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname);
2469 #endif
2470 }
2471
2472 #if FE_DEBUG >= 1
2473 void
2474 fe_dump(level, sc)
2475 int level;
2476 struct fe_softc *sc;
2477 {
2478 int iobase = sc->sc_iobase;
2479 u_char save_dlcr7;
2480
2481 save_dlcr7 = inb(iobase + FE_DLCR7);
2482
2483 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x",
2484 inb(iobase + FE_DLCR0), inb(iobase + FE_DLCR1),
2485 inb(iobase + FE_DLCR2), inb(iobase + FE_DLCR3),
2486 inb(iobase + FE_DLCR4), inb(iobase + FE_DLCR5),
2487 inb(iobase + FE_DLCR6), inb(iobase + FE_DLCR7));
2488
2489 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
2490 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x,",
2491 inb(iobase + FE_DLCR8), inb(iobase + FE_DLCR9),
2492 inb(iobase + FE_DLCR10), inb(iobase + FE_DLCR11),
2493 inb(iobase + FE_DLCR12), inb(iobase + FE_DLCR13),
2494 inb(iobase + FE_DLCR14), inb(iobase + FE_DLCR15));
2495
2496 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
2497 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x,",
2498 inb(iobase + FE_MAR8), inb(iobase + FE_MAR9),
2499 inb(iobase + FE_MAR10), inb(iobase + FE_MAR11),
2500 inb(iobase + FE_MAR12), inb(iobase + FE_MAR13),
2501 inb(iobase + FE_MAR14), inb(iobase + FE_MAR15));
2502
2503 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
2504 log(level, "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x.",
2505 inb(iobase + FE_BMPR10), inb(iobase + FE_BMPR11),
2506 inb(iobase + FE_BMPR12), inb(iobase + FE_BMPR13),
2507 inb(iobase + FE_BMPR14), inb(iobase + FE_BMPR15),
2508 inb(iobase + FE_BMPR16), inb(iobase + FE_BMPR17),
2509 inb(iobase + FE_BMPR19));
2510
2511 outb(iobase + FE_DLCR7, save_dlcr7);
2512 }
2513 #endif
2514