if_ix.c revision 1.1
1 /* $NetBSD: if_ix.c,v 1.1 1998/02/27 23:50:51 pk Exp $ */ 2 /* $Id: if_ix.c,v 1.1 1998/02/27 23:50:51 pk Exp $ */ 3 4 /*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Rafal K. Boni. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/errno.h> 44 #include <sys/device.h> 45 #include <sys/protosw.h> 46 #include <sys/socket.h> 47 48 #include <net/if.h> 49 #include <net/if_dl.h> 50 #include <net/if_types.h> 51 #include <net/if_media.h> 52 #include <net/if_ether.h> 53 54 #include <vm/vm.h> 55 56 #include <machine/cpu.h> 57 #include <machine/bus.h> 58 #include <machine/intr.h> 59 60 #include <dev/isa/isareg.h> 61 #include <dev/isa/isavar.h> 62 63 #define _NEW_I82586 64 #include <dev/ic/i82586reg.h> 65 #include <dev/ic/i82586var.h> 66 #include <dev/isa/if_ixreg.h> 67 68 #ifdef IX_DEBUG 69 #define DPRINTF(x) printf x 70 #else 71 #define DPRINTF(x) 72 #endif 73 74 int ix_media[] = { 75 IFM_ETHER | IFM_10_5, 76 IFM_ETHER | IFM_10_2, 77 IFM_ETHER | IFM_10_T, 78 }; 79 #define NIX_MEDIA (sizeof(ix_media) / sizeof(ix_media[0])) 80 81 struct ix_softc { 82 struct ie_softc sc_ie; 83 84 bus_space_tag_t sc_regt; /* space tag for registers */ 85 bus_space_handle_t sc_regh; /* space handle for registers */ 86 87 u_int16_t irq_encoded; /* encoded IRQ */ 88 void* sc_ih; /* interrupt handle */ 89 }; 90 91 static void ix_reset __P((struct ie_softc *, int)); 92 static void ix_atten __P((struct ie_softc *)); 93 static int ix_intrhook __P((struct ie_softc *, int)); 94 95 static void ix_copyin __P((struct ie_softc *, void *, int, size_t)); 96 static void ix_copyout __P((struct ie_softc *, const void *, int, size_t)); 97 98 static u_int16_t ix_read_16 __P((struct ie_softc *, int)); 99 static void ix_write_16 __P((struct ie_softc *, int, u_int16_t)); 100 static void ix_write_24 __P((struct ie_softc *, int, int)); 101 102 static void ix_mediastatus __P((struct ie_softc *, struct ifmediareq *)); 103 104 static u_int16_t ix_read_eeprom __P((struct ix_softc*, int)); 105 static void ix_eeprom_outbits __P((struct ix_softc *, int, int)); 106 static int ix_eeprom_inbits __P((struct ix_softc *)); 107 static void ix_eeprom_clock __P((struct ix_softc *, int)); 108 109 #ifdef __BROKEN_INDIRECT_CONFIG 110 int ix_match __P((struct device *, void*, void *)); 111 #else 112 int ix_match __P((struct device *, struct cfdata *, void *)); 113 #endif 114 void ix_attach __P((struct device *, struct device *, void *)); 115 116 /* 117 * EtherExpress/16 support routines 118 */ 119 static void 120 ix_reset(sc, why) 121 struct ie_softc *sc; 122 int why; 123 { 124 struct ix_softc* isc = (struct ix_softc *) sc; 125 126 switch (why) { 127 128 case CHIP_PROBE: 129 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL, IX_RESET_586); 130 delay(100); 131 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL, 0); 132 delay(100); 133 break; 134 135 case CARD_RESET: 136 break; 137 } 138 } 139 140 static void 141 ix_atten(sc) 142 struct ie_softc *sc; 143 { 144 struct ix_softc* isc = (struct ix_softc *) sc; 145 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ATTN, 0); 146 } 147 148 static u_int16_t 149 ix_read_eeprom(sc, location) 150 struct ix_softc *sc; 151 int location; 152 { 153 int ectrl, edata; 154 155 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 156 ectrl &= IX_ECTRL_MASK; 157 ectrl |= IX_ECTRL_EECS; 158 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 159 160 ix_eeprom_outbits(sc, IX_EEPROM_READ, IX_EEPROM_OPSIZE1); 161 ix_eeprom_outbits(sc, location, IX_EEPROM_ADDR_SIZE); 162 edata = ix_eeprom_inbits(sc); 163 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 164 ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EEDI | IX_ECTRL_EECS); 165 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 166 ix_eeprom_clock(sc, 1); 167 ix_eeprom_clock(sc, 0); 168 return edata; 169 } 170 171 static void 172 ix_eeprom_outbits(sc, edata, count) 173 struct ix_softc *sc; 174 int edata, count; 175 { 176 int ectrl, i; 177 178 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 179 ectrl &= ~IX_RESET_ASIC; 180 for (i = count - 1; i >= 0; i--) { 181 ectrl &= ~IX_ECTRL_EEDI; 182 if (edata & (1 << i)) { 183 ectrl |= IX_ECTRL_EEDI; 184 } 185 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 186 delay(1); /* eeprom data must be setup for 0.4 uSec */ 187 ix_eeprom_clock(sc, 1); 188 ix_eeprom_clock(sc, 0); 189 } 190 ectrl &= ~IX_ECTRL_EEDI; 191 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 192 delay(1); /* eeprom data must be held for 0.4 uSec */ 193 } 194 195 static int 196 ix_eeprom_inbits(sc) 197 struct ix_softc *sc; 198 { 199 int ectrl, edata, i; 200 201 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 202 ectrl &= ~IX_RESET_ASIC; 203 for (edata = 0, i = 0; i < 16; i++) { 204 edata = edata << 1; 205 ix_eeprom_clock(sc, 1); 206 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 207 if (ectrl & IX_ECTRL_EEDO) { 208 edata |= 1; 209 } 210 ix_eeprom_clock(sc, 0); 211 } 212 return (edata); 213 } 214 215 static void 216 ix_eeprom_clock(sc, state) 217 struct ix_softc *sc; 218 int state; 219 { 220 int ectrl; 221 222 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 223 ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EESK); 224 if (state) { 225 ectrl |= IX_ECTRL_EESK; 226 } 227 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 228 delay(9); /* EESK must be stable for 8.38 uSec */ 229 } 230 231 static int 232 ix_intrhook(sc, where) 233 struct ie_softc *sc; 234 int where; 235 { 236 struct ix_softc* isc = (struct ix_softc *) sc; 237 238 switch (where) { 239 240 case INTR_ENTER: /* entering ISR: disable card interrupts */ 241 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_IRQ, isc->irq_encoded); 242 break; 243 244 case INTR_EXIT: /* exiting ISR: re-enable card interrupts */ 245 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_IRQ, 246 isc->irq_encoded | IX_IRQ_ENABLE); 247 break; 248 } 249 250 return 1; 251 } 252 253 254 static void 255 ix_copyin (sc, dst, offset, size) 256 struct ie_softc *sc; 257 void *dst; 258 int offset; 259 size_t size; 260 { 261 int dribble; 262 u_int8_t* bptr = dst; 263 264 bus_space_barrier(sc->bt, sc->bh, offset, size, BUS_SPACE_BARRIER_READ); 265 266 if (offset % 2) { 267 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 268 offset++; bptr++; size--; 269 } 270 271 dribble = size % 2; 272 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr, 273 size >> 1); 274 275 if (dribble) { 276 bptr += size - 1; 277 offset += size - 1; 278 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 279 } 280 } 281 282 static void 283 ix_copyout (sc, src, offset, size) 284 struct ie_softc *sc; 285 const void *src; 286 int offset; 287 size_t size; 288 { 289 int dribble; 290 int osize = size; 291 int ooffset = offset; 292 const u_int8_t* bptr = src; 293 294 if (offset % 2) { 295 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 296 offset++; bptr++; size--; 297 } 298 299 dribble = size % 2; 300 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr, 301 size >> 1); 302 if (dribble) { 303 bptr += size - 1; 304 offset += size - 1; 305 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 306 } 307 308 bus_space_barrier(sc->bt, sc->bh, ooffset, osize, BUS_SPACE_BARRIER_WRITE); 309 } 310 311 static u_int16_t 312 ix_read_16 (sc, offset) 313 struct ie_softc *sc; 314 int offset; 315 { 316 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ); 317 return bus_space_read_2(sc->bt, sc->bh, offset); 318 } 319 320 static void 321 ix_write_16 (sc, offset, value) 322 struct ie_softc *sc; 323 int offset; 324 u_int16_t value; 325 { 326 bus_space_write_2(sc->bt, sc->bh, offset, value); 327 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE); 328 } 329 330 static void 331 ix_write_24 (sc, offset, addr) 332 struct ie_softc *sc; 333 int offset, addr; 334 { 335 bus_space_write_4(sc->bt, sc->bh, offset, addr + 336 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase); 337 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE); 338 } 339 340 static void 341 ix_mediastatus(sc, ifmr) 342 struct ie_softc *sc; 343 struct ifmediareq *ifmr; 344 { 345 struct ifmedia *ifm = &sc->sc_media; 346 347 /* 348 * The currently selected media is always the active media. 349 */ 350 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 351 } 352 353 int 354 ix_match(parent, cf, aux) 355 struct device *parent; 356 #ifdef __BROKEN_INDIRECT_CONFIG 357 void *cf; 358 #else 359 struct cfdata *cf; 360 #endif 361 void *aux; 362 { 363 int i; 364 int rv = 0; 365 bus_addr_t maddr; 366 bus_size_t msize; 367 u_short checksum = 0; 368 bus_space_handle_t ioh; 369 u_int8_t val, bart_config; 370 u_short pg, adjust, decode, edecode; 371 u_short board_id, id_var1, id_var2, irq; 372 struct isa_attach_args * const ia = aux; 373 struct ix_softc *sc = (struct ix_softc *) cf; 374 short irq_translate[] = {0, 0x09, 0x03, 0x04, 0x05, 0x0a, 0x0b, 0}; 375 376 if (bus_space_map(ia->ia_iot, ia->ia_iobase, IX_IOSIZE, 0, &ioh) != 0) { 377 DPRINTF(("Can't map io space at 0x%x\n", ia->ia_iobase)); 378 return 0; 379 } 380 381 /* XXX: reset any ee16 at the current iobase */ 382 bus_space_write_1(ia->ia_iot, ioh, IX_ECTRL, IX_RESET_ASIC); 383 bus_space_write_1(ia->ia_iot, ioh, IX_ECTRL, 0); 384 delay(240); 385 386 /* now look for ee16. */ 387 board_id = id_var1 = id_var2 = 0; 388 for (i = 0; i < 4 ; i++) { 389 id_var1 = bus_space_read_1(ia->ia_iot, ioh, IX_ID_PORT); 390 id_var2 = ((id_var1 & 0x03) << 2); 391 board_id |= (( id_var1 >> 4) << id_var2); 392 } 393 394 if (board_id != IX_ID) { 395 DPRINTF(("BART ID mismatch (got 0x%04x, expected 0x%04x)\n", board_id, IX_ID)); 396 goto out; 397 } 398 399 sc->sc_regt = ia->ia_iot; 400 sc->sc_regh = ioh; 401 402 /* 403 * The shared RAM size and location of the EE16 is encoded into EEPROM 404 * location 6. The location of the first set bit tells us the memory 405 * address (0xc0000 + (0x4000 * FSB)), where FSB is the number of the 406 * first set bit. The zeroes are then shifted out, and the results is 407 * the memory size (1 = 16k, 3 = 32k, 7 = 48k, 0x0f = 64k). 408 * 409 * Examples: 410 * 0x3c -> 64k @ 0xc8000, 0x70 -> 48k @ 0xd0000, 0xc0 -> 32k @ 0xd8000 411 * 0x80 -> 16k @ 0xdc000. 412 * 413 * Side note: this comes from reading the old driver rather than from a 414 * more definitive source, so it could be out-of-whack with what the card 415 * can do... 416 */ 417 418 val = ix_read_eeprom(sc, 6) & 0xff; 419 DPRINTF(("memory config: 0x%02x\n", val)); 420 421 for(i = 0; i < 8; i++) { 422 if (val & 1) 423 break; 424 425 val = val >> 1; 426 } 427 428 if (i == 8) { 429 DPRINTF(("Invalid or unsupported memory config\n")); 430 goto out; 431 } 432 433 maddr = 0xc0000 + (i * 0x4000); 434 435 switch (val) { 436 case 0x01: 437 msize = 16 * 1024; 438 break; 439 440 case 0x03: 441 msize = 32 * 1024; 442 break; 443 444 case 0x07: 445 msize = 48 * 1024; 446 break; 447 448 case 0x0f: 449 msize = 64 * 1024; 450 break; 451 452 default: 453 DPRINTF(("invalid memory size %02x\n", val)); 454 goto out; 455 } 456 457 if (ia->ia_maddr == ISACF_IOMEM_DEFAULT) 458 ia->ia_maddr = maddr; 459 else if (ia->ia_maddr != maddr) { 460 DPRINTF(("ix_match: memaddr of board @ 0x%x doesn't match config\n", 461 ia->ia_iobase)); 462 goto out; 463 } 464 465 if (ia->ia_msize == ISACF_IOSIZ_DEFAULT) 466 ia->ia_msize = msize; 467 else if (ia->ia_msize != msize) { 468 DPRINTF(("ix_match: memsize of board @ 0x%x doesn't match config\n", 469 ia->ia_iobase)); 470 goto out; 471 } 472 473 DPRINTF(("found %d byte memory region at %x\n", ia->ia_msize, ia->ia_maddr)); 474 475 /* need to put the 586 in RESET, and leave it */ 476 bus_space_write_1(ia->ia_iot, ioh, IX_ECTRL, IX_RESET_586); 477 478 /* read the eeprom and checksum it, should == IX_ID */ 479 for(i = 0; i < 0x40; i++) 480 checksum += ix_read_eeprom(sc, i); 481 482 if (checksum != IX_ID) { 483 DPRINTF(("checksum mismatch (got 0x%04x, expected 0x%04x\n", checksum, IX_ID)); 484 goto out; 485 } 486 487 /* 488 * Size and test the memory on the board. The size of the memory 489 * can be one of 16k, 32k, 48k or 64k. It can be located in the 490 * address range 0xC0000 to 0xEFFFF on 16k boundaries. 491 */ 492 pg = (ia->ia_maddr & 0x3C000) >> 14; 493 adjust = IX_MCTRL_FMCS16 | (pg & 0x3) << 2; 494 decode = ((1 << (ia->ia_msize / 16384)) - 1) << pg; 495 edecode = ((~decode >> 4) & 0xF0) | (decode >> 8); 496 497 /* ZZZ This should be checked against eeprom location 6, low byte */ 498 bus_space_write_1(ia->ia_iot, ioh, IX_MEMDEC, decode & 0xFF); 499 500 /* ZZZ This should be checked against eeprom location 1, low byte */ 501 bus_space_write_1(ia->ia_iot, ioh, IX_MCTRL, adjust); 502 503 /* ZZZ Now if I could find this one I would have it made */ 504 bus_space_write_1(ia->ia_iot, ioh, IX_MPCTRL, (~decode & 0xFF)); 505 506 /* ZZZ I think this is location 6, high byte */ 507 bus_space_write_1(ia->ia_iot, ioh,+ IX_MECTRL, edecode); /*XXX disable Exxx */ 508 509 /* 510 * Get the encoded interrupt number from the EEPROM, check it 511 * against the passed in IRQ. Issue a warning if they do not 512 * match, and fail the probe. If irq is 'IRQUNK' then we 513 * use the EEPROM irq, and continue. 514 */ 515 irq = ix_read_eeprom(sc, IX_EEPROM_CONFIG1); 516 irq = (irq & IX_EEPROM_IRQ) >> IX_EEPROM_IRQ_SHIFT; 517 sc->irq_encoded = irq; 518 irq = irq_translate[irq]; 519 if (ia->ia_irq == ISACF_IRQ_DEFAULT) 520 ia->ia_irq = irq; 521 else if (irq != ia->ia_irq) { 522 DPRINTF(("board IRQ %d does not match config\n", irq)); 523 goto out; 524 } 525 526 /* disable the board interrupts */ 527 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_IRQ, sc->irq_encoded); 528 529 bart_config = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_CONFIG); 530 bart_config |= IX_BART_LOOPBACK; 531 bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */ 532 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_CONFIG, bart_config); 533 bart_config = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_CONFIG); 534 535 bus_space_write_1(ia->ia_iot, ioh, IX_ECTRL, 0); 536 delay(100); 537 538 rv = 1; 539 ia->ia_iosize = IX_IOSIZE; 540 DPRINTF(("ix_match: found board @ 0x%x\n", ia->ia_iobase)); 541 542 out: 543 bus_space_unmap(ia->ia_iot, ioh, IX_IOSIZE); 544 return rv; 545 } 546 547 void 548 ix_attach(parent, self, aux) 549 struct device *parent; 550 struct device *self; 551 void *aux; 552 { 553 struct ix_softc *isc = (void *)self; 554 struct ie_softc *sc = &isc->sc_ie; 555 struct isa_attach_args *ia = aux; 556 557 int media; 558 u_short eaddrtemp; 559 u_int8_t bart_config; 560 bus_space_handle_t ioh, memh; 561 u_int8_t ethaddr[ETHER_ADDR_LEN]; 562 563 if (bus_space_map(ia->ia_iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh) != 0) { 564 DPRINTF(("\n%s: can't map i/o space 0x%x-0x%x\n", 565 sc->sc_dev.dv_xname, ia->ia_iobase, 566 ia->ia_iobase + ia->ia_iosize - 1)); 567 return; 568 } 569 570 if (bus_space_map(ia->ia_memt, ia->ia_maddr, ia->ia_msize, 0, &memh) != 0) { 571 DPRINTF(("\n%s: can't map iomem space 0x%x-0x%x\n", 572 sc->sc_dev.dv_xname, ia->ia_maddr, 573 ia->ia_maddr + ia->ia_msize - 1)); 574 bus_space_unmap(ia->ia_iot, ioh, ia->ia_iosize); 575 return; 576 } 577 578 isc->sc_regt = ia->ia_iot; 579 isc->sc_regh = ioh; 580 581 /* 582 * Get the hardware ethernet address from the EEPROM and 583 * save it in the softc for use by the 586 setup code. 584 */ 585 eaddrtemp = ix_read_eeprom(isc, IX_EEPROM_ENET_HIGH); 586 ethaddr[1] = eaddrtemp & 0xFF; 587 ethaddr[0] = eaddrtemp >> 8; 588 eaddrtemp = ix_read_eeprom(isc, IX_EEPROM_ENET_MID); 589 ethaddr[3] = eaddrtemp & 0xFF; 590 ethaddr[2] = eaddrtemp >> 8; 591 eaddrtemp = ix_read_eeprom(isc, IX_EEPROM_ENET_LOW); 592 ethaddr[5] = eaddrtemp & 0xFF; 593 ethaddr[4] = eaddrtemp >> 8; 594 595 sc->hwinit = NULL; 596 sc->hwreset = ix_reset; 597 sc->chan_attn = ix_atten; 598 sc->intrhook = ix_intrhook; 599 600 sc->memcopyin = ix_copyin; 601 sc->memcopyout = ix_copyout; 602 sc->ie_bus_read16 = ix_read_16; 603 sc->ie_bus_write16 = ix_write_16; 604 sc->ie_bus_write24 = ix_write_24; 605 606 sc->do_xmitnopchain = 0; 607 608 sc->sc_mediachange = NULL; 609 sc->sc_mediastatus = ix_mediastatus; 610 611 sc->bt = ia->ia_memt; 612 sc->bh = memh; 613 614 /* Map i/o space. */ 615 sc->sc_msize = ia->ia_msize; 616 sc->sc_maddr = (void* ) memh; 617 sc->sc_iobase = sc->sc_maddr + sc->sc_msize - (1 << 24); 618 619 /* set up pointers to important on-card control structures */ 620 sc->iscp = 0; 621 sc->scb = IE_ISCP_SZ; 622 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24); 623 624 sc->buf_area = sc->scb + IE_SCB_SZ; 625 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ; 626 627 /* zero card memory */ 628 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, 32); 629 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize); 630 631 /* set card to 16-bit bus mode */ 632 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long) sc->scp), 0); 633 634 /* set up pointers to key structures */ 635 ix_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp); 636 ix_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb); 637 ix_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp); 638 639 /* flush setup of pointers, check if chip answers */ 640 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize, BUS_SPACE_BARRIER_WRITE); 641 if (!i82586_proberam(sc)) { 642 DPRINTF(("\n%s: Can't talk to i82586!\n", sc->sc_dev.dv_xname)); 643 bus_space_unmap(ia->ia_iot, ioh, ia->ia_iosize); 644 bus_space_unmap(ia->ia_memt, memh, ia->ia_msize); 645 return; 646 } 647 648 /* Figure out which media is being used... */ 649 if (ix_read_eeprom(isc, IX_EEPROM_CONFIG1) & IX_EEPROM_MEDIA_EXT) { 650 if (ix_read_eeprom(isc, IX_EEPROM_MEDIA) & IX_EEPROM_MEDIA_TP) 651 media = IFM_ETHER | IFM_10_T; 652 else 653 media = IFM_ETHER | IFM_10_2; 654 } else 655 media = IFM_ETHER | IFM_10_5; 656 657 /* Take the card out of lookback */ 658 bart_config = bus_space_read_1(isc->sc_regt, isc->sc_regh, IX_CONFIG); 659 bart_config &= ~IX_BART_LOOPBACK; 660 bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */ 661 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_CONFIG, bart_config); 662 bart_config = bus_space_read_1(isc->sc_regt, isc->sc_regh, IX_CONFIG); 663 664 /* Enable interrupts */ 665 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_IRQ, 666 isc->irq_encoded | IX_IRQ_ENABLE); 667 668 i82586_attach(sc, "EtherExpress/16", ethaddr, ix_media, NIX_MEDIA, media); 669 670 isc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 671 IPL_NET, i82586_intr, sc); 672 if (isc->sc_ih == NULL) 673 DPRINTF(("\n%s: can't establish interrupt\n", sc->sc_dev.dv_xname)); 674 } 675 676 struct cfattach ix_ca = { 677 sizeof(struct ix_softc), ix_match, ix_attach 678 }; 679
Indexes created Mon Sep 29 21:09:56 GMT 2025