if_ix.c revision 1.2
1 /* $NetBSD: if_ix.c,v 1.2 1998/02/28 01:14:15 pk Exp $ */ 2 /* $Id: if_ix.c,v 1.2 1998/02/28 01:14:15 pk Exp $ */ 3 4 /*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Rafal K. Boni. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/errno.h> 44 #include <sys/device.h> 45 #include <sys/protosw.h> 46 #include <sys/socket.h> 47 48 #include <net/if.h> 49 #include <net/if_dl.h> 50 #include <net/if_types.h> 51 #include <net/if_media.h> 52 #include <net/if_ether.h> 53 54 #include <vm/vm.h> 55 56 #include <machine/cpu.h> 57 #include <machine/bus.h> 58 #include <machine/intr.h> 59 60 #include <dev/isa/isareg.h> 61 #include <dev/isa/isavar.h> 62 63 #include <dev/ic/i82586reg.h> 64 #include <dev/ic/i82586var.h> 65 #include <dev/isa/if_ixreg.h> 66 67 #ifdef IX_DEBUG 68 #define DPRINTF(x) printf x 69 #else 70 #define DPRINTF(x) 71 #endif 72 73 int ix_media[] = { 74 IFM_ETHER | IFM_10_5, 75 IFM_ETHER | IFM_10_2, 76 IFM_ETHER | IFM_10_T, 77 }; 78 #define NIX_MEDIA (sizeof(ix_media) / sizeof(ix_media[0])) 79 80 struct ix_softc { 81 struct ie_softc sc_ie; 82 83 bus_space_tag_t sc_regt; /* space tag for registers */ 84 bus_space_handle_t sc_regh; /* space handle for registers */ 85 86 u_int16_t irq_encoded; /* encoded IRQ */ 87 void *sc_ih; /* interrupt handle */ 88 }; 89 90 static void ix_reset __P((struct ie_softc *, int)); 91 static void ix_atten __P((struct ie_softc *)); 92 static int ix_intrhook __P((struct ie_softc *, int)); 93 94 static void ix_copyin __P((struct ie_softc *, void *, int, size_t)); 95 static void ix_copyout __P((struct ie_softc *, const void *, int, size_t)); 96 97 static u_int16_t ix_read_16 __P((struct ie_softc *, int)); 98 static void ix_write_16 __P((struct ie_softc *, int, u_int16_t)); 99 static void ix_write_24 __P((struct ie_softc *, int, int)); 100 101 static void ix_mediastatus __P((struct ie_softc *, struct ifmediareq *)); 102 103 static u_int16_t ix_read_eeprom __P((struct ix_softc*, int)); 104 static void ix_eeprom_outbits __P((struct ix_softc *, int, int)); 105 static int ix_eeprom_inbits __P((struct ix_softc *)); 106 static void ix_eeprom_clock __P((struct ix_softc *, int)); 107 108 #ifdef __BROKEN_INDIRECT_CONFIG 109 int ix_match __P((struct device *, void*, void *)); 110 #else 111 int ix_match __P((struct device *, struct cfdata *, void *)); 112 #endif 113 void ix_attach __P((struct device *, struct device *, void *)); 114 115 /* 116 * EtherExpress/16 support routines 117 */ 118 static void 119 ix_reset(sc, why) 120 struct ie_softc *sc; 121 int why; 122 { 123 struct ix_softc* isc = (struct ix_softc *) sc; 124 125 switch (why) { 126 case CHIP_PROBE: 127 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL, 128 IX_RESET_586); 129 delay(100); 130 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL, 0); 131 delay(100); 132 break; 133 134 case CARD_RESET: 135 break; 136 } 137 } 138 139 static void 140 ix_atten(sc) 141 struct ie_softc *sc; 142 { 143 struct ix_softc* isc = (struct ix_softc *) sc; 144 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ATTN, 0); 145 } 146 147 static u_int16_t 148 ix_read_eeprom(sc, location) 149 struct ix_softc *sc; 150 int location; 151 { 152 int ectrl, edata; 153 154 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 155 ectrl &= IX_ECTRL_MASK; 156 ectrl |= IX_ECTRL_EECS; 157 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 158 159 ix_eeprom_outbits(sc, IX_EEPROM_READ, IX_EEPROM_OPSIZE1); 160 ix_eeprom_outbits(sc, location, IX_EEPROM_ADDR_SIZE); 161 edata = ix_eeprom_inbits(sc); 162 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 163 ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EEDI | IX_ECTRL_EECS); 164 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 165 ix_eeprom_clock(sc, 1); 166 ix_eeprom_clock(sc, 0); 167 return (edata); 168 } 169 170 static void 171 ix_eeprom_outbits(sc, edata, count) 172 struct ix_softc *sc; 173 int edata, count; 174 { 175 int ectrl, i; 176 177 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 178 ectrl &= ~IX_RESET_ASIC; 179 for (i = count - 1; i >= 0; i--) { 180 ectrl &= ~IX_ECTRL_EEDI; 181 if (edata & (1 << i)) { 182 ectrl |= IX_ECTRL_EEDI; 183 } 184 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 185 delay(1); /* eeprom data must be setup for 0.4 uSec */ 186 ix_eeprom_clock(sc, 1); 187 ix_eeprom_clock(sc, 0); 188 } 189 ectrl &= ~IX_ECTRL_EEDI; 190 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 191 delay(1); /* eeprom data must be held for 0.4 uSec */ 192 } 193 194 static int 195 ix_eeprom_inbits(sc) 196 struct ix_softc *sc; 197 { 198 int ectrl, edata, i; 199 200 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 201 ectrl &= ~IX_RESET_ASIC; 202 for (edata = 0, i = 0; i < 16; i++) { 203 edata = edata << 1; 204 ix_eeprom_clock(sc, 1); 205 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 206 if (ectrl & IX_ECTRL_EEDO) { 207 edata |= 1; 208 } 209 ix_eeprom_clock(sc, 0); 210 } 211 return (edata); 212 } 213 214 static void 215 ix_eeprom_clock(sc, state) 216 struct ix_softc *sc; 217 int state; 218 { 219 int ectrl; 220 221 ectrl = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_ECTRL); 222 ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EESK); 223 if (state) { 224 ectrl |= IX_ECTRL_EESK; 225 } 226 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_ECTRL, ectrl); 227 delay(9); /* EESK must be stable for 8.38 uSec */ 228 } 229 230 static int 231 ix_intrhook(sc, where) 232 struct ie_softc *sc; 233 int where; 234 { 235 struct ix_softc* isc = (struct ix_softc *) sc; 236 237 switch (where) { 238 case INTR_ENTER: 239 /* entering ISR: disable card interrupts */ 240 bus_space_write_1(isc->sc_regt, isc->sc_regh, 241 IX_IRQ, isc->irq_encoded); 242 break; 243 244 case INTR_EXIT: 245 /* exiting ISR: re-enable card interrupts */ 246 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_IRQ, 247 isc->irq_encoded | IX_IRQ_ENABLE); 248 break; 249 } 250 251 return 1; 252 } 253 254 255 static void 256 ix_copyin (sc, dst, offset, size) 257 struct ie_softc *sc; 258 void *dst; 259 int offset; 260 size_t size; 261 { 262 int dribble; 263 u_int8_t* bptr = dst; 264 265 bus_space_barrier(sc->bt, sc->bh, offset, size, 266 BUS_SPACE_BARRIER_READ); 267 268 if (offset % 2) { 269 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 270 offset++; bptr++; size--; 271 } 272 273 dribble = size % 2; 274 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr, 275 size >> 1); 276 277 if (dribble) { 278 bptr += size - 1; 279 offset += size - 1; 280 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 281 } 282 } 283 284 static void 285 ix_copyout (sc, src, offset, size) 286 struct ie_softc *sc; 287 const void *src; 288 int offset; 289 size_t size; 290 { 291 int dribble; 292 int osize = size; 293 int ooffset = offset; 294 const u_int8_t* bptr = src; 295 296 if (offset % 2) { 297 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 298 offset++; bptr++; size--; 299 } 300 301 dribble = size % 2; 302 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr, 303 size >> 1); 304 if (dribble) { 305 bptr += size - 1; 306 offset += size - 1; 307 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 308 } 309 310 bus_space_barrier(sc->bt, sc->bh, ooffset, osize, 311 BUS_SPACE_BARRIER_WRITE); 312 } 313 314 static u_int16_t 315 ix_read_16 (sc, offset) 316 struct ie_softc *sc; 317 int offset; 318 { 319 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ); 320 return bus_space_read_2(sc->bt, sc->bh, offset); 321 } 322 323 static void 324 ix_write_16 (sc, offset, value) 325 struct ie_softc *sc; 326 int offset; 327 u_int16_t value; 328 { 329 bus_space_write_2(sc->bt, sc->bh, offset, value); 330 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE); 331 } 332 333 static void 334 ix_write_24 (sc, offset, addr) 335 struct ie_softc *sc; 336 int offset, addr; 337 { 338 bus_space_write_4(sc->bt, sc->bh, offset, addr + 339 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase); 340 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE); 341 } 342 343 static void 344 ix_mediastatus(sc, ifmr) 345 struct ie_softc *sc; 346 struct ifmediareq *ifmr; 347 { 348 struct ifmedia *ifm = &sc->sc_media; 349 350 /* 351 * The currently selected media is always the active media. 352 */ 353 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 354 } 355 356 int 357 ix_match(parent, cf, aux) 358 struct device *parent; 359 #ifdef __BROKEN_INDIRECT_CONFIG 360 void *cf; 361 #else 362 struct cfdata *cf; 363 #endif 364 void *aux; 365 { 366 int i; 367 int rv = 0; 368 bus_addr_t maddr; 369 bus_size_t msize; 370 u_short checksum = 0; 371 bus_space_handle_t ioh; 372 u_int8_t val, bart_config; 373 u_short pg, adjust, decode, edecode; 374 u_short board_id, id_var1, id_var2, irq; 375 struct isa_attach_args * const ia = aux; 376 struct ix_softc *sc = (struct ix_softc *) cf; 377 short irq_translate[] = {0, 0x09, 0x03, 0x04, 0x05, 0x0a, 0x0b, 0}; 378 379 if (bus_space_map(ia->ia_iot, ia->ia_iobase, 380 IX_IOSIZE, 0, &ioh) != 0) { 381 DPRINTF(("Can't map io space at 0x%x\n", ia->ia_iobase)); 382 return (0); 383 } 384 385 /* XXX: reset any ee16 at the current iobase */ 386 bus_space_write_1(ia->ia_iot, ioh, IX_ECTRL, IX_RESET_ASIC); 387 bus_space_write_1(ia->ia_iot, ioh, IX_ECTRL, 0); 388 delay(240); 389 390 /* now look for ee16. */ 391 board_id = id_var1 = id_var2 = 0; 392 for (i = 0; i < 4 ; i++) { 393 id_var1 = bus_space_read_1(ia->ia_iot, ioh, IX_ID_PORT); 394 id_var2 = ((id_var1 & 0x03) << 2); 395 board_id |= (( id_var1 >> 4) << id_var2); 396 } 397 398 if (board_id != IX_ID) { 399 DPRINTF(("BART ID mismatch (got 0x%04x, expected 0x%04x)\n", 400 board_id, IX_ID)); 401 goto out; 402 } 403 404 sc->sc_regt = ia->ia_iot; 405 sc->sc_regh = ioh; 406 407 /* 408 * The shared RAM size and location of the EE16 is encoded into 409 * EEPROM location 6. The location of the first set bit tells us 410 * the memory address (0xc0000 + (0x4000 * FSB)), where FSB is the 411 * number of the first set bit. The zeroes are then shifted out, 412 * and the results is the memory size (1 = 16k, 3 = 32k, 7 = 48k, 413 * 0x0f = 64k). 414 * 415 * Examples: 416 * 0x3c -> 64k@0xc8000, 0x70 -> 48k@0xd0000, 0xc0 -> 32k@0xd8000 417 * 0x80 -> 16k@0xdc000. 418 * 419 * Side note: this comes from reading the old driver rather than 420 * from a more definitive source, so it could be out-of-whack 421 * with what the card can do... 422 */ 423 424 val = ix_read_eeprom(sc, 6) & 0xff; 425 DPRINTF(("memory config: 0x%02x\n", val)); 426 427 for(i = 0; i < 8; i++) { 428 if (val & 1) 429 break; 430 val = val >> 1; 431 } 432 433 if (i == 8) { 434 DPRINTF(("Invalid or unsupported memory config\n")); 435 goto out; 436 } 437 438 maddr = 0xc0000 + (i * 0x4000); 439 440 switch (val) { 441 case 0x01: 442 msize = 16 * 1024; 443 break; 444 445 case 0x03: 446 msize = 32 * 1024; 447 break; 448 449 case 0x07: 450 msize = 48 * 1024; 451 break; 452 453 case 0x0f: 454 msize = 64 * 1024; 455 break; 456 457 default: 458 DPRINTF(("invalid memory size %02x\n", val)); 459 goto out; 460 } 461 462 if (ia->ia_maddr == ISACF_IOMEM_DEFAULT) 463 ia->ia_maddr = maddr; 464 else if (ia->ia_maddr != maddr) { 465 DPRINTF(( 466 "ix_match: memaddr of board @ 0x%x doesn't match config\n", 467 ia->ia_iobase)); 468 goto out; 469 } 470 471 if (ia->ia_msize == ISACF_IOSIZ_DEFAULT) 472 ia->ia_msize = msize; 473 else if (ia->ia_msize != msize) { 474 DPRINTF(( 475 "ix_match: memsize of board @ 0x%x doesn't match config\n", 476 ia->ia_iobase)); 477 goto out; 478 } 479 480 DPRINTF(("found %d byte memory region at %x\n", 481 ia->ia_msize, ia->ia_maddr)); 482 483 /* need to put the 586 in RESET, and leave it */ 484 bus_space_write_1(ia->ia_iot, ioh, IX_ECTRL, IX_RESET_586); 485 486 /* read the eeprom and checksum it, should == IX_ID */ 487 for(i = 0; i < 0x40; i++) 488 checksum += ix_read_eeprom(sc, i); 489 490 if (checksum != IX_ID) { 491 DPRINTF(("checksum mismatch (got 0x%04x, expected 0x%04x\n", 492 checksum, IX_ID)); 493 goto out; 494 } 495 496 /* 497 * Size and test the memory on the board. The size of the memory 498 * can be one of 16k, 32k, 48k or 64k. It can be located in the 499 * address range 0xC0000 to 0xEFFFF on 16k boundaries. 500 */ 501 pg = (ia->ia_maddr & 0x3C000) >> 14; 502 adjust = IX_MCTRL_FMCS16 | (pg & 0x3) << 2; 503 decode = ((1 << (ia->ia_msize / 16384)) - 1) << pg; 504 edecode = ((~decode >> 4) & 0xF0) | (decode >> 8); 505 506 /* ZZZ This should be checked against eeprom location 6, low byte */ 507 bus_space_write_1(ia->ia_iot, ioh, IX_MEMDEC, decode & 0xFF); 508 509 /* ZZZ This should be checked against eeprom location 1, low byte */ 510 bus_space_write_1(ia->ia_iot, ioh, IX_MCTRL, adjust); 511 512 /* ZZZ Now if I could find this one I would have it made */ 513 bus_space_write_1(ia->ia_iot, ioh, IX_MPCTRL, (~decode & 0xFF)); 514 515 /* ZZZ I think this is location 6, high byte */ 516 bus_space_write_1(ia->ia_iot, ioh,+ IX_MECTRL, edecode); /*XXX disable Exxx */ 517 518 /* 519 * Get the encoded interrupt number from the EEPROM, check it 520 * against the passed in IRQ. Issue a warning if they do not 521 * match, and fail the probe. If irq is 'IRQUNK' then we 522 * use the EEPROM irq, and continue. 523 */ 524 irq = ix_read_eeprom(sc, IX_EEPROM_CONFIG1); 525 irq = (irq & IX_EEPROM_IRQ) >> IX_EEPROM_IRQ_SHIFT; 526 sc->irq_encoded = irq; 527 irq = irq_translate[irq]; 528 if (ia->ia_irq == ISACF_IRQ_DEFAULT) 529 ia->ia_irq = irq; 530 else if (irq != ia->ia_irq) { 531 DPRINTF(("board IRQ %d does not match config\n", irq)); 532 goto out; 533 } 534 535 /* disable the board interrupts */ 536 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_IRQ, sc->irq_encoded); 537 538 bart_config = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_CONFIG); 539 bart_config |= IX_BART_LOOPBACK; 540 bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */ 541 bus_space_write_1(sc->sc_regt, sc->sc_regh, IX_CONFIG, bart_config); 542 bart_config = bus_space_read_1(sc->sc_regt, sc->sc_regh, IX_CONFIG); 543 544 bus_space_write_1(ia->ia_iot, ioh, IX_ECTRL, 0); 545 delay(100); 546 547 rv = 1; 548 ia->ia_iosize = IX_IOSIZE; 549 DPRINTF(("ix_match: found board @ 0x%x\n", ia->ia_iobase)); 550 551 out: 552 bus_space_unmap(ia->ia_iot, ioh, IX_IOSIZE); 553 return (rv); 554 } 555 556 void 557 ix_attach(parent, self, aux) 558 struct device *parent; 559 struct device *self; 560 void *aux; 561 { 562 struct ix_softc *isc = (void *)self; 563 struct ie_softc *sc = &isc->sc_ie; 564 struct isa_attach_args *ia = aux; 565 566 int media; 567 u_short eaddrtemp; 568 u_int8_t bart_config; 569 bus_space_handle_t ioh, memh; 570 u_int8_t ethaddr[ETHER_ADDR_LEN]; 571 572 if (bus_space_map(ia->ia_iot, ia->ia_iobase, 573 ia->ia_iosize, 0, &ioh) != 0) { 574 575 DPRINTF(("\n%s: can't map i/o space 0x%x-0x%x\n", 576 sc->sc_dev.dv_xname, ia->ia_iobase, 577 ia->ia_iobase + ia->ia_iosize - 1)); 578 return; 579 } 580 581 if (bus_space_map(ia->ia_memt, ia->ia_maddr, 582 ia->ia_msize, 0, &memh) != 0) { 583 584 DPRINTF(("\n%s: can't map iomem space 0x%x-0x%x\n", 585 sc->sc_dev.dv_xname, ia->ia_maddr, 586 ia->ia_maddr + ia->ia_msize - 1)); 587 bus_space_unmap(ia->ia_iot, ioh, ia->ia_iosize); 588 return; 589 } 590 591 isc->sc_regt = ia->ia_iot; 592 isc->sc_regh = ioh; 593 594 /* 595 * Get the hardware ethernet address from the EEPROM and 596 * save it in the softc for use by the 586 setup code. 597 */ 598 eaddrtemp = ix_read_eeprom(isc, IX_EEPROM_ENET_HIGH); 599 ethaddr[1] = eaddrtemp & 0xFF; 600 ethaddr[0] = eaddrtemp >> 8; 601 eaddrtemp = ix_read_eeprom(isc, IX_EEPROM_ENET_MID); 602 ethaddr[3] = eaddrtemp & 0xFF; 603 ethaddr[2] = eaddrtemp >> 8; 604 eaddrtemp = ix_read_eeprom(isc, IX_EEPROM_ENET_LOW); 605 ethaddr[5] = eaddrtemp & 0xFF; 606 ethaddr[4] = eaddrtemp >> 8; 607 608 sc->hwinit = NULL; 609 sc->hwreset = ix_reset; 610 sc->chan_attn = ix_atten; 611 sc->intrhook = ix_intrhook; 612 613 sc->memcopyin = ix_copyin; 614 sc->memcopyout = ix_copyout; 615 sc->ie_bus_read16 = ix_read_16; 616 sc->ie_bus_write16 = ix_write_16; 617 sc->ie_bus_write24 = ix_write_24; 618 619 sc->do_xmitnopchain = 0; 620 621 sc->sc_mediachange = NULL; 622 sc->sc_mediastatus = ix_mediastatus; 623 624 sc->bt = ia->ia_memt; 625 sc->bh = memh; 626 627 /* Map i/o space. */ 628 sc->sc_msize = ia->ia_msize; 629 sc->sc_maddr = (void* ) memh; 630 sc->sc_iobase = sc->sc_maddr + sc->sc_msize - (1 << 24); 631 632 /* set up pointers to important on-card control structures */ 633 sc->iscp = 0; 634 sc->scb = IE_ISCP_SZ; 635 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24); 636 637 sc->buf_area = sc->scb + IE_SCB_SZ; 638 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ; 639 640 /* zero card memory */ 641 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, 32); 642 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize); 643 644 /* set card to 16-bit bus mode */ 645 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0); 646 647 /* set up pointers to key structures */ 648 ix_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp); 649 ix_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb); 650 ix_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp); 651 652 /* flush setup of pointers, check if chip answers */ 653 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize, 654 BUS_SPACE_BARRIER_WRITE); 655 if (!i82586_proberam(sc)) { 656 DPRINTF(("\n%s: Can't talk to i82586!\n", 657 sc->sc_dev.dv_xname)); 658 bus_space_unmap(ia->ia_iot, ioh, ia->ia_iosize); 659 bus_space_unmap(ia->ia_memt, memh, ia->ia_msize); 660 return; 661 } 662 663 /* Figure out which media is being used... */ 664 if (ix_read_eeprom(isc, IX_EEPROM_CONFIG1) & IX_EEPROM_MEDIA_EXT) { 665 if (ix_read_eeprom(isc, IX_EEPROM_MEDIA) & IX_EEPROM_MEDIA_TP) 666 media = IFM_ETHER | IFM_10_T; 667 else 668 media = IFM_ETHER | IFM_10_2; 669 } else 670 media = IFM_ETHER | IFM_10_5; 671 672 /* Take the card out of lookback */ 673 bart_config = bus_space_read_1(isc->sc_regt, isc->sc_regh, IX_CONFIG); 674 bart_config &= ~IX_BART_LOOPBACK; 675 bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */ 676 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_CONFIG, bart_config); 677 bart_config = bus_space_read_1(isc->sc_regt, isc->sc_regh, IX_CONFIG); 678 679 /* Enable interrupts */ 680 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_IRQ, 681 isc->irq_encoded | IX_IRQ_ENABLE); 682 683 i82586_attach(sc, "EtherExpress/16", ethaddr, 684 ix_media, NIX_MEDIA, media); 685 686 isc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 687 IPL_NET, i82586_intr, sc); 688 if (isc->sc_ih == NULL) 689 DPRINTF(("\n%s: can't establish interrupt\n", 690 sc->sc_dev.dv_xname)); 691 } 692 693 struct cfattach ix_ca = { 694 sizeof(struct ix_softc), ix_match, ix_attach 695 }; 696
Indexes created Mon Sep 29 21:09:56 GMT 2025