if_ix.c revision 1.4
1 /* $NetBSD: if_ix.c,v 1.4 1998/04/15 01:45:44 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Rafal K. Boni. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/errno.h> 43 #include <sys/device.h> 44 #include <sys/protosw.h> 45 #include <sys/socket.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_types.h> 50 #include <net/if_media.h> 51 #include <net/if_ether.h> 52 53 #include <vm/vm.h> 54 55 #include <machine/cpu.h> 56 #include <machine/bus.h> 57 #include <machine/intr.h> 58 59 #include <dev/isa/isareg.h> 60 #include <dev/isa/isavar.h> 61 62 #include <dev/ic/i82586reg.h> 63 #include <dev/ic/i82586var.h> 64 #include <dev/isa/if_ixreg.h> 65 66 #ifdef IX_DEBUG 67 #define DPRINTF(x) printf x 68 #else 69 #define DPRINTF(x) 70 #endif 71 72 int ix_media[] = { 73 IFM_ETHER | IFM_10_5, 74 IFM_ETHER | IFM_10_2, 75 IFM_ETHER | IFM_10_T, 76 }; 77 #define NIX_MEDIA (sizeof(ix_media) / sizeof(ix_media[0])) 78 79 struct ix_softc { 80 struct ie_softc sc_ie; 81 82 bus_space_tag_t sc_regt; /* space tag for registers */ 83 bus_space_handle_t sc_regh; /* space handle for registers */ 84 85 u_int16_t irq_encoded; /* encoded IRQ */ 86 void *sc_ih; /* interrupt handle */ 87 }; 88 89 static void ix_reset __P((struct ie_softc *, int)); 90 static void ix_atten __P((struct ie_softc *)); 91 static int ix_intrhook __P((struct ie_softc *, int)); 92 93 static void ix_copyin __P((struct ie_softc *, void *, int, size_t)); 94 static void ix_copyout __P((struct ie_softc *, const void *, int, size_t)); 95 96 static u_int16_t ix_read_16 __P((struct ie_softc *, int)); 97 static void ix_write_16 __P((struct ie_softc *, int, u_int16_t)); 98 static void ix_write_24 __P((struct ie_softc *, int, int)); 99 100 static void ix_mediastatus __P((struct ie_softc *, struct ifmediareq *)); 101 102 static u_int16_t ix_read_eeprom __P((bus_space_tag_t, bus_space_handle_t, int)); 103 static void ix_eeprom_outbits __P((bus_space_tag_t, bus_space_handle_t, int, int)); 104 static int ix_eeprom_inbits __P((bus_space_tag_t, bus_space_handle_t)); 105 static void ix_eeprom_clock __P((bus_space_tag_t, bus_space_handle_t, int)); 106 107 #ifdef __BROKEN_INDIRECT_CONFIG 108 int ix_match __P((struct device *, void*, void *)); 109 #else 110 int ix_match __P((struct device *, struct cfdata *, void *)); 111 #endif 112 void ix_attach __P((struct device *, struct device *, void *)); 113 114 /* 115 * EtherExpress/16 support routines 116 */ 117 static void 118 ix_reset(sc, why) 119 struct ie_softc *sc; 120 int why; 121 { 122 struct ix_softc* isc = (struct ix_softc *) sc; 123 124 switch (why) { 125 case CHIP_PROBE: 126 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL, 127 IX_RESET_586); 128 delay(100); 129 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL, 0); 130 delay(100); 131 break; 132 133 case CARD_RESET: 134 break; 135 } 136 } 137 138 static void 139 ix_atten(sc) 140 struct ie_softc *sc; 141 { 142 struct ix_softc* isc = (struct ix_softc *) sc; 143 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ATTN, 0); 144 } 145 146 static u_int16_t 147 ix_read_eeprom(iot, ioh, location) 148 bus_space_tag_t iot; 149 bus_space_handle_t ioh; 150 int location; 151 { 152 int ectrl, edata; 153 154 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL); 155 ectrl &= IX_ECTRL_MASK; 156 ectrl |= IX_ECTRL_EECS; 157 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl); 158 159 ix_eeprom_outbits(iot, ioh, IX_EEPROM_READ, IX_EEPROM_OPSIZE1); 160 ix_eeprom_outbits(iot, ioh, location, IX_EEPROM_ADDR_SIZE); 161 edata = ix_eeprom_inbits(iot, ioh); 162 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL); 163 ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EEDI | IX_ECTRL_EECS); 164 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl); 165 ix_eeprom_clock(iot, ioh, 1); 166 ix_eeprom_clock(iot, ioh, 0); 167 return (edata); 168 } 169 170 static void 171 ix_eeprom_outbits(iot, ioh, edata, count) 172 bus_space_tag_t iot; 173 bus_space_handle_t ioh; 174 int edata, count; 175 { 176 int ectrl, i; 177 178 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL); 179 ectrl &= ~IX_RESET_ASIC; 180 for (i = count - 1; i >= 0; i--) { 181 ectrl &= ~IX_ECTRL_EEDI; 182 if (edata & (1 << i)) { 183 ectrl |= IX_ECTRL_EEDI; 184 } 185 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl); 186 delay(1); /* eeprom data must be setup for 0.4 uSec */ 187 ix_eeprom_clock(iot, ioh, 1); 188 ix_eeprom_clock(iot, ioh, 0); 189 } 190 ectrl &= ~IX_ECTRL_EEDI; 191 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl); 192 delay(1); /* eeprom data must be held for 0.4 uSec */ 193 } 194 195 static int 196 ix_eeprom_inbits(iot, ioh) 197 bus_space_tag_t iot; 198 bus_space_handle_t ioh; 199 { 200 int ectrl, edata, i; 201 202 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL); 203 ectrl &= ~IX_RESET_ASIC; 204 for (edata = 0, i = 0; i < 16; i++) { 205 edata = edata << 1; 206 ix_eeprom_clock(iot, ioh, 1); 207 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL); 208 if (ectrl & IX_ECTRL_EEDO) { 209 edata |= 1; 210 } 211 ix_eeprom_clock(iot, ioh, 0); 212 } 213 return (edata); 214 } 215 216 static void 217 ix_eeprom_clock(iot, ioh, state) 218 bus_space_tag_t iot; 219 bus_space_handle_t ioh; 220 int state; 221 { 222 int ectrl; 223 224 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL); 225 ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EESK); 226 if (state) { 227 ectrl |= IX_ECTRL_EESK; 228 } 229 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl); 230 delay(9); /* EESK must be stable for 8.38 uSec */ 231 } 232 233 static int 234 ix_intrhook(sc, where) 235 struct ie_softc *sc; 236 int where; 237 { 238 struct ix_softc* isc = (struct ix_softc *) sc; 239 240 switch (where) { 241 case INTR_ENTER: 242 /* entering ISR: disable card interrupts */ 243 bus_space_write_1(isc->sc_regt, isc->sc_regh, 244 IX_IRQ, isc->irq_encoded); 245 break; 246 247 case INTR_EXIT: 248 /* exiting ISR: re-enable card interrupts */ 249 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_IRQ, 250 isc->irq_encoded | IX_IRQ_ENABLE); 251 break; 252 } 253 254 return 1; 255 } 256 257 258 static void 259 ix_copyin (sc, dst, offset, size) 260 struct ie_softc *sc; 261 void *dst; 262 int offset; 263 size_t size; 264 { 265 int dribble; 266 u_int8_t* bptr = dst; 267 268 bus_space_barrier(sc->bt, sc->bh, offset, size, 269 BUS_SPACE_BARRIER_READ); 270 271 if (offset % 2) { 272 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 273 offset++; bptr++; size--; 274 } 275 276 dribble = size % 2; 277 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr, 278 size >> 1); 279 280 if (dribble) { 281 bptr += size - 1; 282 offset += size - 1; 283 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 284 } 285 } 286 287 static void 288 ix_copyout (sc, src, offset, size) 289 struct ie_softc *sc; 290 const void *src; 291 int offset; 292 size_t size; 293 { 294 int dribble; 295 int osize = size; 296 int ooffset = offset; 297 const u_int8_t* bptr = src; 298 299 if (offset % 2) { 300 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 301 offset++; bptr++; size--; 302 } 303 304 dribble = size % 2; 305 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr, 306 size >> 1); 307 if (dribble) { 308 bptr += size - 1; 309 offset += size - 1; 310 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 311 } 312 313 bus_space_barrier(sc->bt, sc->bh, ooffset, osize, 314 BUS_SPACE_BARRIER_WRITE); 315 } 316 317 static u_int16_t 318 ix_read_16 (sc, offset) 319 struct ie_softc *sc; 320 int offset; 321 { 322 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ); 323 return bus_space_read_2(sc->bt, sc->bh, offset); 324 } 325 326 static void 327 ix_write_16 (sc, offset, value) 328 struct ie_softc *sc; 329 int offset; 330 u_int16_t value; 331 { 332 bus_space_write_2(sc->bt, sc->bh, offset, value); 333 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE); 334 } 335 336 static void 337 ix_write_24 (sc, offset, addr) 338 struct ie_softc *sc; 339 int offset, addr; 340 { 341 bus_space_write_4(sc->bt, sc->bh, offset, addr + 342 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase); 343 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE); 344 } 345 346 static void 347 ix_mediastatus(sc, ifmr) 348 struct ie_softc *sc; 349 struct ifmediareq *ifmr; 350 { 351 struct ifmedia *ifm = &sc->sc_media; 352 353 /* 354 * The currently selected media is always the active media. 355 */ 356 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 357 } 358 359 int 360 ix_match(parent, cf, aux) 361 struct device *parent; 362 #ifdef __BROKEN_INDIRECT_CONFIG 363 void *cf; 364 #else 365 struct cfdata *cf; 366 #endif 367 void *aux; 368 { 369 int i; 370 int rv = 0; 371 bus_addr_t maddr; 372 bus_size_t msize; 373 u_short checksum = 0; 374 bus_space_handle_t ioh; 375 bus_space_tag_t iot; 376 u_int8_t val, bart_config; 377 u_short pg, adjust, decode, edecode; 378 u_short board_id, id_var1, id_var2, irq, irq_encoded; 379 struct isa_attach_args * const ia = aux; 380 short irq_translate[] = {0, 0x09, 0x03, 0x04, 0x05, 0x0a, 0x0b, 0}; 381 382 iot = ia->ia_iot; 383 384 if (bus_space_map(iot, ia->ia_iobase, 385 IX_IOSIZE, 0, &ioh) != 0) { 386 DPRINTF(("Can't map io space at 0x%x\n", ia->ia_iobase)); 387 return (0); 388 } 389 390 /* XXX: reset any ee16 at the current iobase */ 391 bus_space_write_1(iot, ioh, IX_ECTRL, IX_RESET_ASIC); 392 bus_space_write_1(iot, ioh, IX_ECTRL, 0); 393 delay(240); 394 395 /* now look for ee16. */ 396 board_id = id_var1 = id_var2 = 0; 397 for (i = 0; i < 4 ; i++) { 398 id_var1 = bus_space_read_1(iot, ioh, IX_ID_PORT); 399 id_var2 = ((id_var1 & 0x03) << 2); 400 board_id |= (( id_var1 >> 4) << id_var2); 401 } 402 403 if (board_id != IX_ID) { 404 DPRINTF(("BART ID mismatch (got 0x%04x, expected 0x%04x)\n", 405 board_id, IX_ID)); 406 goto out; 407 } 408 409 /* 410 * The shared RAM size and location of the EE16 is encoded into 411 * EEPROM location 6. The location of the first set bit tells us 412 * the memory address (0xc0000 + (0x4000 * FSB)), where FSB is the 413 * number of the first set bit. The zeroes are then shifted out, 414 * and the results is the memory size (1 = 16k, 3 = 32k, 7 = 48k, 415 * 0x0f = 64k). 416 * 417 * Examples: 418 * 0x3c -> 64k@0xc8000, 0x70 -> 48k@0xd0000, 0xc0 -> 32k@0xd8000 419 * 0x80 -> 16k@0xdc000. 420 * 421 * Side note: this comes from reading the old driver rather than 422 * from a more definitive source, so it could be out-of-whack 423 * with what the card can do... 424 */ 425 426 val = ix_read_eeprom(iot, ioh, 6) & 0xff; 427 DPRINTF(("memory config: 0x%02x\n", val)); 428 429 for(i = 0; i < 8; i++) { 430 if (val & 1) 431 break; 432 val = val >> 1; 433 } 434 435 if (i == 8) { 436 DPRINTF(("Invalid or unsupported memory config\n")); 437 goto out; 438 } 439 440 maddr = 0xc0000 + (i * 0x4000); 441 442 switch (val) { 443 case 0x01: 444 msize = 16 * 1024; 445 break; 446 447 case 0x03: 448 msize = 32 * 1024; 449 break; 450 451 case 0x07: 452 msize = 48 * 1024; 453 break; 454 455 case 0x0f: 456 msize = 64 * 1024; 457 break; 458 459 default: 460 DPRINTF(("invalid memory size %02x\n", val)); 461 goto out; 462 } 463 464 if (ia->ia_maddr == ISACF_IOMEM_DEFAULT) 465 ia->ia_maddr = maddr; 466 else if (ia->ia_maddr != maddr) { 467 DPRINTF(( 468 "ix_match: memaddr of board @ 0x%x doesn't match config\n", 469 ia->ia_iobase)); 470 goto out; 471 } 472 473 if (ia->ia_msize == ISACF_IOSIZ_DEFAULT) 474 ia->ia_msize = msize; 475 else if (ia->ia_msize != msize) { 476 DPRINTF(( 477 "ix_match: memsize of board @ 0x%x doesn't match config\n", 478 ia->ia_iobase)); 479 goto out; 480 } 481 482 DPRINTF(("found %d byte memory region at %x\n", 483 ia->ia_msize, ia->ia_maddr)); 484 485 /* need to put the 586 in RESET, and leave it */ 486 bus_space_write_1(iot, ioh, IX_ECTRL, IX_RESET_586); 487 488 /* read the eeprom and checksum it, should == IX_ID */ 489 for(i = 0; i < 0x40; i++) 490 checksum += ix_read_eeprom(iot, ioh, i); 491 492 if (checksum != IX_ID) { 493 DPRINTF(("checksum mismatch (got 0x%04x, expected 0x%04x\n", 494 checksum, IX_ID)); 495 goto out; 496 } 497 498 /* 499 * Size and test the memory on the board. The size of the memory 500 * can be one of 16k, 32k, 48k or 64k. It can be located in the 501 * address range 0xC0000 to 0xEFFFF on 16k boundaries. 502 */ 503 pg = (ia->ia_maddr & 0x3C000) >> 14; 504 adjust = IX_MCTRL_FMCS16 | (pg & 0x3) << 2; 505 decode = ((1 << (ia->ia_msize / 16384)) - 1) << pg; 506 edecode = ((~decode >> 4) & 0xF0) | (decode >> 8); 507 508 /* ZZZ This should be checked against eeprom location 6, low byte */ 509 bus_space_write_1(iot, ioh, IX_MEMDEC, decode & 0xFF); 510 511 /* ZZZ This should be checked against eeprom location 1, low byte */ 512 bus_space_write_1(iot, ioh, IX_MCTRL, adjust); 513 514 /* ZZZ Now if I could find this one I would have it made */ 515 bus_space_write_1(iot, ioh, IX_MPCTRL, (~decode & 0xFF)); 516 517 /* ZZZ I think this is location 6, high byte */ 518 bus_space_write_1(iot, ioh, IX_MECTRL, edecode); /*XXX disable Exxx */ 519 520 /* 521 * Get the encoded interrupt number from the EEPROM, check it 522 * against the passed in IRQ. Issue a warning if they do not 523 * match, and fail the probe. If irq is 'IRQUNK' then we 524 * use the EEPROM irq, and continue. 525 */ 526 irq_encoded = ix_read_eeprom(iot, ioh, IX_EEPROM_CONFIG1); 527 irq_encoded = (irq_encoded & IX_EEPROM_IRQ) >> IX_EEPROM_IRQ_SHIFT; 528 irq = irq_translate[irq_encoded]; 529 if (ia->ia_irq == ISACF_IRQ_DEFAULT) 530 ia->ia_irq = irq; 531 else if (irq != ia->ia_irq) { 532 DPRINTF(("board IRQ %d does not match config\n", irq)); 533 goto out; 534 } 535 536 /* disable the board interrupts */ 537 bus_space_write_1(iot, ioh, IX_IRQ, irq_encoded); 538 539 bart_config = bus_space_read_1(iot, ioh, IX_CONFIG); 540 bart_config |= IX_BART_LOOPBACK; 541 bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */ 542 bus_space_write_1(iot, ioh, IX_CONFIG, bart_config); 543 bart_config = bus_space_read_1(iot, ioh, IX_CONFIG); 544 545 bus_space_write_1(iot, ioh, IX_ECTRL, 0); 546 delay(100); 547 548 rv = 1; 549 ia->ia_iosize = IX_IOSIZE; 550 DPRINTF(("ix_match: found board @ 0x%x\n", ia->ia_iobase)); 551 552 out: 553 bus_space_unmap(iot, ioh, IX_IOSIZE); 554 return (rv); 555 } 556 557 void 558 ix_attach(parent, self, aux) 559 struct device *parent; 560 struct device *self; 561 void *aux; 562 { 563 struct ix_softc *isc = (void *)self; 564 struct ie_softc *sc = &isc->sc_ie; 565 struct isa_attach_args *ia = aux; 566 567 int media; 568 u_short eaddrtemp; 569 u_int8_t bart_config; 570 bus_space_tag_t iot; 571 bus_space_handle_t ioh, memh; 572 u_short irq_encoded; 573 u_int8_t ethaddr[ETHER_ADDR_LEN]; 574 575 iot = ia->ia_iot; 576 577 if (bus_space_map(iot, ia->ia_iobase, 578 ia->ia_iosize, 0, &ioh) != 0) { 579 580 DPRINTF(("\n%s: can't map i/o space 0x%x-0x%x\n", 581 sc->sc_dev.dv_xname, ia->ia_iobase, 582 ia->ia_iobase + ia->ia_iosize - 1)); 583 return; 584 } 585 586 if (bus_space_map(ia->ia_memt, ia->ia_maddr, 587 ia->ia_msize, 0, &memh) != 0) { 588 589 DPRINTF(("\n%s: can't map iomem space 0x%x-0x%x\n", 590 sc->sc_dev.dv_xname, ia->ia_maddr, 591 ia->ia_maddr + ia->ia_msize - 1)); 592 bus_space_unmap(iot, ioh, ia->ia_iosize); 593 return; 594 } 595 596 isc->sc_regt = iot; 597 isc->sc_regh = ioh; 598 599 /* 600 * Get the hardware ethernet address from the EEPROM and 601 * save it in the softc for use by the 586 setup code. 602 */ 603 eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_HIGH); 604 ethaddr[1] = eaddrtemp & 0xFF; 605 ethaddr[0] = eaddrtemp >> 8; 606 eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_MID); 607 ethaddr[3] = eaddrtemp & 0xFF; 608 ethaddr[2] = eaddrtemp >> 8; 609 eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_LOW); 610 ethaddr[5] = eaddrtemp & 0xFF; 611 ethaddr[4] = eaddrtemp >> 8; 612 613 sc->hwinit = NULL; 614 sc->hwreset = ix_reset; 615 sc->chan_attn = ix_atten; 616 sc->intrhook = ix_intrhook; 617 618 sc->memcopyin = ix_copyin; 619 sc->memcopyout = ix_copyout; 620 sc->ie_bus_read16 = ix_read_16; 621 sc->ie_bus_write16 = ix_write_16; 622 sc->ie_bus_write24 = ix_write_24; 623 624 sc->do_xmitnopchain = 0; 625 626 sc->sc_mediachange = NULL; 627 sc->sc_mediastatus = ix_mediastatus; 628 629 sc->bt = ia->ia_memt; 630 sc->bh = memh; 631 632 /* Map i/o space. */ 633 sc->sc_msize = ia->ia_msize; 634 sc->sc_maddr = (void* ) memh; 635 sc->sc_iobase = sc->sc_maddr + sc->sc_msize - (1 << 24); 636 637 /* set up pointers to important on-card control structures */ 638 sc->iscp = 0; 639 sc->scb = IE_ISCP_SZ; 640 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24); 641 642 sc->buf_area = sc->scb + IE_SCB_SZ; 643 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ; 644 645 /* zero card memory */ 646 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, 32); 647 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize); 648 649 /* set card to 16-bit bus mode */ 650 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0); 651 652 /* set up pointers to key structures */ 653 ix_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp); 654 ix_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb); 655 ix_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp); 656 657 /* flush setup of pointers, check if chip answers */ 658 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize, 659 BUS_SPACE_BARRIER_WRITE); 660 if (!i82586_proberam(sc)) { 661 DPRINTF(("\n%s: Can't talk to i82586!\n", 662 sc->sc_dev.dv_xname)); 663 bus_space_unmap(iot, ioh, ia->ia_iosize); 664 bus_space_unmap(ia->ia_memt, memh, ia->ia_msize); 665 return; 666 } 667 668 /* Figure out which media is being used... */ 669 if (ix_read_eeprom(iot, ioh, IX_EEPROM_CONFIG1) & 670 IX_EEPROM_MEDIA_EXT) { 671 if (ix_read_eeprom(iot, ioh, IX_EEPROM_MEDIA) & 672 IX_EEPROM_MEDIA_TP) 673 media = IFM_ETHER | IFM_10_T; 674 else 675 media = IFM_ETHER | IFM_10_2; 676 } else 677 media = IFM_ETHER | IFM_10_5; 678 679 /* Take the card out of lookback */ 680 bart_config = bus_space_read_1(iot, ioh, IX_CONFIG); 681 bart_config &= ~IX_BART_LOOPBACK; 682 bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */ 683 bus_space_write_1(iot, ioh, IX_CONFIG, bart_config); 684 bart_config = bus_space_read_1(iot, ioh, IX_CONFIG); 685 686 irq_encoded = ix_read_eeprom(iot, ioh, 687 IX_EEPROM_CONFIG1); 688 irq_encoded = (irq_encoded & IX_EEPROM_IRQ) >> IX_EEPROM_IRQ_SHIFT; 689 690 /* Enable interrupts */ 691 bus_space_write_1(iot, ioh, IX_IRQ, 692 irq_encoded | IX_IRQ_ENABLE); 693 694 isc->irq_encoded = irq_encoded; 695 696 i82586_attach(sc, "EtherExpress/16", ethaddr, 697 ix_media, NIX_MEDIA, media); 698 699 isc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 700 IPL_NET, i82586_intr, sc); 701 if (isc->sc_ih == NULL) 702 DPRINTF(("\n%s: can't establish interrupt\n", 703 sc->sc_dev.dv_xname)); 704 } 705 706 struct cfattach ix_ca = { 707 sizeof(struct ix_softc), ix_match, ix_attach 708 }; 709
Indexes created Thu Oct 02 01:09:59 GMT 2025