if_ix.c revision 1.7 1 /* $NetBSD: if_ix.c,v 1.7 2000/06/28 16:27:54 mrg Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Rafal K. Boni.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/mbuf.h>
42 #include <sys/errno.h>
43 #include <sys/device.h>
44 #include <sys/protosw.h>
45 #include <sys/socket.h>
46
47 #include <net/if.h>
48 #include <net/if_dl.h>
49 #include <net/if_types.h>
50 #include <net/if_media.h>
51 #include <net/if_ether.h>
52
53 #include <machine/cpu.h>
54 #include <machine/bus.h>
55 #include <machine/intr.h>
56
57 #include <dev/isa/isareg.h>
58 #include <dev/isa/isavar.h>
59
60 #include <dev/ic/i82586reg.h>
61 #include <dev/ic/i82586var.h>
62 #include <dev/isa/if_ixreg.h>
63
64 #ifdef IX_DEBUG
65 #define DPRINTF(x) printf x
66 #else
67 #define DPRINTF(x)
68 #endif
69
70 int ix_media[] = {
71 IFM_ETHER | IFM_10_5,
72 IFM_ETHER | IFM_10_2,
73 IFM_ETHER | IFM_10_T,
74 };
75 #define NIX_MEDIA (sizeof(ix_media) / sizeof(ix_media[0]))
76
77 struct ix_softc {
78 struct ie_softc sc_ie;
79
80 bus_space_tag_t sc_regt; /* space tag for registers */
81 bus_space_handle_t sc_regh; /* space handle for registers */
82
83 u_int16_t irq_encoded; /* encoded IRQ */
84 void *sc_ih; /* interrupt handle */
85 };
86
87 static void ix_reset __P((struct ie_softc *, int));
88 static void ix_atten __P((struct ie_softc *));
89 static int ix_intrhook __P((struct ie_softc *, int));
90
91 static void ix_copyin __P((struct ie_softc *, void *, int, size_t));
92 static void ix_copyout __P((struct ie_softc *, const void *, int, size_t));
93
94 static u_int16_t ix_read_16 __P((struct ie_softc *, int));
95 static void ix_write_16 __P((struct ie_softc *, int, u_int16_t));
96 static void ix_write_24 __P((struct ie_softc *, int, int));
97
98 static void ix_mediastatus __P((struct ie_softc *, struct ifmediareq *));
99
100 static u_int16_t ix_read_eeprom __P((bus_space_tag_t, bus_space_handle_t, int));
101 static void ix_eeprom_outbits __P((bus_space_tag_t, bus_space_handle_t, int, int));
102 static int ix_eeprom_inbits __P((bus_space_tag_t, bus_space_handle_t));
103 static void ix_eeprom_clock __P((bus_space_tag_t, bus_space_handle_t, int));
104
105 int ix_match __P((struct device *, struct cfdata *, void *));
106 void ix_attach __P((struct device *, struct device *, void *));
107
108 /*
109 * EtherExpress/16 support routines
110 */
111 static void
112 ix_reset(sc, why)
113 struct ie_softc *sc;
114 int why;
115 {
116 struct ix_softc* isc = (struct ix_softc *) sc;
117
118 switch (why) {
119 case CHIP_PROBE:
120 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL,
121 IX_RESET_586);
122 delay(100);
123 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL, 0);
124 delay(100);
125 break;
126
127 case CARD_RESET:
128 break;
129 }
130 }
131
132 static void
133 ix_atten(sc)
134 struct ie_softc *sc;
135 {
136 struct ix_softc* isc = (struct ix_softc *) sc;
137 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ATTN, 0);
138 }
139
140 static u_int16_t
141 ix_read_eeprom(iot, ioh, location)
142 bus_space_tag_t iot;
143 bus_space_handle_t ioh;
144 int location;
145 {
146 int ectrl, edata;
147
148 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
149 ectrl &= IX_ECTRL_MASK;
150 ectrl |= IX_ECTRL_EECS;
151 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
152
153 ix_eeprom_outbits(iot, ioh, IX_EEPROM_READ, IX_EEPROM_OPSIZE1);
154 ix_eeprom_outbits(iot, ioh, location, IX_EEPROM_ADDR_SIZE);
155 edata = ix_eeprom_inbits(iot, ioh);
156 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
157 ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EEDI | IX_ECTRL_EECS);
158 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
159 ix_eeprom_clock(iot, ioh, 1);
160 ix_eeprom_clock(iot, ioh, 0);
161 return (edata);
162 }
163
164 static void
165 ix_eeprom_outbits(iot, ioh, edata, count)
166 bus_space_tag_t iot;
167 bus_space_handle_t ioh;
168 int edata, count;
169 {
170 int ectrl, i;
171
172 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
173 ectrl &= ~IX_RESET_ASIC;
174 for (i = count - 1; i >= 0; i--) {
175 ectrl &= ~IX_ECTRL_EEDI;
176 if (edata & (1 << i)) {
177 ectrl |= IX_ECTRL_EEDI;
178 }
179 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
180 delay(1); /* eeprom data must be setup for 0.4 uSec */
181 ix_eeprom_clock(iot, ioh, 1);
182 ix_eeprom_clock(iot, ioh, 0);
183 }
184 ectrl &= ~IX_ECTRL_EEDI;
185 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
186 delay(1); /* eeprom data must be held for 0.4 uSec */
187 }
188
189 static int
190 ix_eeprom_inbits(iot, ioh)
191 bus_space_tag_t iot;
192 bus_space_handle_t ioh;
193 {
194 int ectrl, edata, i;
195
196 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
197 ectrl &= ~IX_RESET_ASIC;
198 for (edata = 0, i = 0; i < 16; i++) {
199 edata = edata << 1;
200 ix_eeprom_clock(iot, ioh, 1);
201 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
202 if (ectrl & IX_ECTRL_EEDO) {
203 edata |= 1;
204 }
205 ix_eeprom_clock(iot, ioh, 0);
206 }
207 return (edata);
208 }
209
210 static void
211 ix_eeprom_clock(iot, ioh, state)
212 bus_space_tag_t iot;
213 bus_space_handle_t ioh;
214 int state;
215 {
216 int ectrl;
217
218 ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
219 ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EESK);
220 if (state) {
221 ectrl |= IX_ECTRL_EESK;
222 }
223 bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
224 delay(9); /* EESK must be stable for 8.38 uSec */
225 }
226
227 static int
228 ix_intrhook(sc, where)
229 struct ie_softc *sc;
230 int where;
231 {
232 struct ix_softc* isc = (struct ix_softc *) sc;
233
234 switch (where) {
235 case INTR_ENTER:
236 /* entering ISR: disable card interrupts */
237 bus_space_write_1(isc->sc_regt, isc->sc_regh,
238 IX_IRQ, isc->irq_encoded);
239 break;
240
241 case INTR_EXIT:
242 /* exiting ISR: re-enable card interrupts */
243 bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_IRQ,
244 isc->irq_encoded | IX_IRQ_ENABLE);
245 break;
246 }
247
248 return 1;
249 }
250
251
252 static void
253 ix_copyin (sc, dst, offset, size)
254 struct ie_softc *sc;
255 void *dst;
256 int offset;
257 size_t size;
258 {
259 int dribble;
260 u_int8_t* bptr = dst;
261
262 bus_space_barrier(sc->bt, sc->bh, offset, size,
263 BUS_SPACE_BARRIER_READ);
264
265 if (offset % 2) {
266 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
267 offset++; bptr++; size--;
268 }
269
270 dribble = size % 2;
271 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
272 size >> 1);
273
274 if (dribble) {
275 bptr += size - 1;
276 offset += size - 1;
277 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
278 }
279 }
280
281 static void
282 ix_copyout (sc, src, offset, size)
283 struct ie_softc *sc;
284 const void *src;
285 int offset;
286 size_t size;
287 {
288 int dribble;
289 int osize = size;
290 int ooffset = offset;
291 const u_int8_t* bptr = src;
292
293 if (offset % 2) {
294 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
295 offset++; bptr++; size--;
296 }
297
298 dribble = size % 2;
299 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr,
300 size >> 1);
301 if (dribble) {
302 bptr += size - 1;
303 offset += size - 1;
304 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
305 }
306
307 bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
308 BUS_SPACE_BARRIER_WRITE);
309 }
310
311 static u_int16_t
312 ix_read_16 (sc, offset)
313 struct ie_softc *sc;
314 int offset;
315 {
316 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
317 return bus_space_read_2(sc->bt, sc->bh, offset);
318 }
319
320 static void
321 ix_write_16 (sc, offset, value)
322 struct ie_softc *sc;
323 int offset;
324 u_int16_t value;
325 {
326 bus_space_write_2(sc->bt, sc->bh, offset, value);
327 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
328 }
329
330 static void
331 ix_write_24 (sc, offset, addr)
332 struct ie_softc *sc;
333 int offset, addr;
334 {
335 bus_space_write_4(sc->bt, sc->bh, offset, addr +
336 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
337 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
338 }
339
340 static void
341 ix_mediastatus(sc, ifmr)
342 struct ie_softc *sc;
343 struct ifmediareq *ifmr;
344 {
345 struct ifmedia *ifm = &sc->sc_media;
346
347 /*
348 * The currently selected media is always the active media.
349 */
350 ifmr->ifm_active = ifm->ifm_cur->ifm_media;
351 }
352
353 int
354 ix_match(parent, cf, aux)
355 struct device *parent;
356 struct cfdata *cf;
357 void *aux;
358 {
359 int i;
360 int rv = 0;
361 bus_addr_t maddr;
362 bus_size_t msize;
363 u_short checksum = 0;
364 bus_space_handle_t ioh;
365 bus_space_tag_t iot;
366 u_int8_t val, bart_config;
367 u_short pg, adjust, decode, edecode;
368 u_short board_id, id_var1, id_var2, irq, irq_encoded;
369 struct isa_attach_args * const ia = aux;
370 short irq_translate[] = {0, 0x09, 0x03, 0x04, 0x05, 0x0a, 0x0b, 0};
371
372 iot = ia->ia_iot;
373
374 if (bus_space_map(iot, ia->ia_iobase,
375 IX_IOSIZE, 0, &ioh) != 0) {
376 DPRINTF(("Can't map io space at 0x%x\n", ia->ia_iobase));
377 return (0);
378 }
379
380 /* XXX: reset any ee16 at the current iobase */
381 bus_space_write_1(iot, ioh, IX_ECTRL, IX_RESET_ASIC);
382 bus_space_write_1(iot, ioh, IX_ECTRL, 0);
383 delay(240);
384
385 /* now look for ee16. */
386 board_id = id_var1 = id_var2 = 0;
387 for (i = 0; i < 4 ; i++) {
388 id_var1 = bus_space_read_1(iot, ioh, IX_ID_PORT);
389 id_var2 = ((id_var1 & 0x03) << 2);
390 board_id |= (( id_var1 >> 4) << id_var2);
391 }
392
393 if (board_id != IX_ID) {
394 DPRINTF(("BART ID mismatch (got 0x%04x, expected 0x%04x)\n",
395 board_id, IX_ID));
396 goto out;
397 }
398
399 /*
400 * The shared RAM size and location of the EE16 is encoded into
401 * EEPROM location 6. The location of the first set bit tells us
402 * the memory address (0xc0000 + (0x4000 * FSB)), where FSB is the
403 * number of the first set bit. The zeroes are then shifted out,
404 * and the results is the memory size (1 = 16k, 3 = 32k, 7 = 48k,
405 * 0x0f = 64k).
406 *
407 * Examples:
408 * 0x3c -> 64k@0xc8000, 0x70 -> 48k@0xd0000, 0xc0 -> 32k@0xd8000
409 * 0x80 -> 16k@0xdc000.
410 *
411 * Side note: this comes from reading the old driver rather than
412 * from a more definitive source, so it could be out-of-whack
413 * with what the card can do...
414 */
415
416 val = ix_read_eeprom(iot, ioh, 6) & 0xff;
417 DPRINTF(("memory config: 0x%02x\n", val));
418
419 for(i = 0; i < 8; i++) {
420 if (val & 1)
421 break;
422 val = val >> 1;
423 }
424
425 if (i == 8) {
426 DPRINTF(("Invalid or unsupported memory config\n"));
427 goto out;
428 }
429
430 maddr = 0xc0000 + (i * 0x4000);
431
432 switch (val) {
433 case 0x01:
434 msize = 16 * 1024;
435 break;
436
437 case 0x03:
438 msize = 32 * 1024;
439 break;
440
441 case 0x07:
442 msize = 48 * 1024;
443 break;
444
445 case 0x0f:
446 msize = 64 * 1024;
447 break;
448
449 default:
450 DPRINTF(("invalid memory size %02x\n", val));
451 goto out;
452 }
453
454 if (ia->ia_maddr == ISACF_IOMEM_DEFAULT)
455 ia->ia_maddr = maddr;
456 else if (ia->ia_maddr != maddr) {
457 DPRINTF((
458 "ix_match: memaddr of board @ 0x%x doesn't match config\n",
459 ia->ia_iobase));
460 goto out;
461 }
462
463 if (ia->ia_msize == ISACF_IOSIZ_DEFAULT)
464 ia->ia_msize = msize;
465 else if (ia->ia_msize != msize) {
466 DPRINTF((
467 "ix_match: memsize of board @ 0x%x doesn't match config\n",
468 ia->ia_iobase));
469 goto out;
470 }
471
472 DPRINTF(("found %d byte memory region at %x\n",
473 ia->ia_msize, ia->ia_maddr));
474
475 /* need to put the 586 in RESET, and leave it */
476 bus_space_write_1(iot, ioh, IX_ECTRL, IX_RESET_586);
477
478 /* read the eeprom and checksum it, should == IX_ID */
479 for(i = 0; i < 0x40; i++)
480 checksum += ix_read_eeprom(iot, ioh, i);
481
482 if (checksum != IX_ID) {
483 DPRINTF(("checksum mismatch (got 0x%04x, expected 0x%04x\n",
484 checksum, IX_ID));
485 goto out;
486 }
487
488 /*
489 * Size and test the memory on the board. The size of the memory
490 * can be one of 16k, 32k, 48k or 64k. It can be located in the
491 * address range 0xC0000 to 0xEFFFF on 16k boundaries.
492 */
493 pg = (ia->ia_maddr & 0x3C000) >> 14;
494 adjust = IX_MCTRL_FMCS16 | (pg & 0x3) << 2;
495 decode = ((1 << (ia->ia_msize / 16384)) - 1) << pg;
496 edecode = ((~decode >> 4) & 0xF0) | (decode >> 8);
497
498 /* ZZZ This should be checked against eeprom location 6, low byte */
499 bus_space_write_1(iot, ioh, IX_MEMDEC, decode & 0xFF);
500
501 /* ZZZ This should be checked against eeprom location 1, low byte */
502 bus_space_write_1(iot, ioh, IX_MCTRL, adjust);
503
504 /* ZZZ Now if I could find this one I would have it made */
505 bus_space_write_1(iot, ioh, IX_MPCTRL, (~decode & 0xFF));
506
507 /* ZZZ I think this is location 6, high byte */
508 bus_space_write_1(iot, ioh, IX_MECTRL, edecode); /*XXX disable Exxx */
509
510 /*
511 * Get the encoded interrupt number from the EEPROM, check it
512 * against the passed in IRQ. Issue a warning if they do not
513 * match, and fail the probe. If irq is 'IRQUNK' then we
514 * use the EEPROM irq, and continue.
515 */
516 irq_encoded = ix_read_eeprom(iot, ioh, IX_EEPROM_CONFIG1);
517 irq_encoded = (irq_encoded & IX_EEPROM_IRQ) >> IX_EEPROM_IRQ_SHIFT;
518 irq = irq_translate[irq_encoded];
519 if (ia->ia_irq == ISACF_IRQ_DEFAULT)
520 ia->ia_irq = irq;
521 else if (irq != ia->ia_irq) {
522 DPRINTF(("board IRQ %d does not match config\n", irq));
523 goto out;
524 }
525
526 /* disable the board interrupts */
527 bus_space_write_1(iot, ioh, IX_IRQ, irq_encoded);
528
529 bart_config = bus_space_read_1(iot, ioh, IX_CONFIG);
530 bart_config |= IX_BART_LOOPBACK;
531 bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */
532 bus_space_write_1(iot, ioh, IX_CONFIG, bart_config);
533 bart_config = bus_space_read_1(iot, ioh, IX_CONFIG);
534
535 bus_space_write_1(iot, ioh, IX_ECTRL, 0);
536 delay(100);
537
538 rv = 1;
539 ia->ia_iosize = IX_IOSIZE;
540 DPRINTF(("ix_match: found board @ 0x%x\n", ia->ia_iobase));
541
542 out:
543 bus_space_unmap(iot, ioh, IX_IOSIZE);
544 return (rv);
545 }
546
547 void
548 ix_attach(parent, self, aux)
549 struct device *parent;
550 struct device *self;
551 void *aux;
552 {
553 struct ix_softc *isc = (void *)self;
554 struct ie_softc *sc = &isc->sc_ie;
555 struct isa_attach_args *ia = aux;
556
557 int media;
558 u_short eaddrtemp;
559 u_int8_t bart_config;
560 bus_space_tag_t iot;
561 bus_space_handle_t ioh, memh;
562 u_short irq_encoded;
563 u_int8_t ethaddr[ETHER_ADDR_LEN];
564
565 iot = ia->ia_iot;
566
567 if (bus_space_map(iot, ia->ia_iobase,
568 ia->ia_iosize, 0, &ioh) != 0) {
569
570 DPRINTF(("\n%s: can't map i/o space 0x%x-0x%x\n",
571 sc->sc_dev.dv_xname, ia->ia_iobase,
572 ia->ia_iobase + ia->ia_iosize - 1));
573 return;
574 }
575
576 if (bus_space_map(ia->ia_memt, ia->ia_maddr,
577 ia->ia_msize, 0, &memh) != 0) {
578
579 DPRINTF(("\n%s: can't map iomem space 0x%x-0x%x\n",
580 sc->sc_dev.dv_xname, ia->ia_maddr,
581 ia->ia_maddr + ia->ia_msize - 1));
582 bus_space_unmap(iot, ioh, ia->ia_iosize);
583 return;
584 }
585
586 isc->sc_regt = iot;
587 isc->sc_regh = ioh;
588
589 /*
590 * Get the hardware ethernet address from the EEPROM and
591 * save it in the softc for use by the 586 setup code.
592 */
593 eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_HIGH);
594 ethaddr[1] = eaddrtemp & 0xFF;
595 ethaddr[0] = eaddrtemp >> 8;
596 eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_MID);
597 ethaddr[3] = eaddrtemp & 0xFF;
598 ethaddr[2] = eaddrtemp >> 8;
599 eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_LOW);
600 ethaddr[5] = eaddrtemp & 0xFF;
601 ethaddr[4] = eaddrtemp >> 8;
602
603 sc->hwinit = NULL;
604 sc->hwreset = ix_reset;
605 sc->chan_attn = ix_atten;
606 sc->intrhook = ix_intrhook;
607
608 sc->memcopyin = ix_copyin;
609 sc->memcopyout = ix_copyout;
610 sc->ie_bus_read16 = ix_read_16;
611 sc->ie_bus_write16 = ix_write_16;
612 sc->ie_bus_write24 = ix_write_24;
613
614 sc->do_xmitnopchain = 0;
615
616 sc->sc_mediachange = NULL;
617 sc->sc_mediastatus = ix_mediastatus;
618
619 sc->bt = ia->ia_memt;
620 sc->bh = memh;
621
622 /* Map i/o space. */
623 sc->sc_msize = ia->ia_msize;
624 sc->sc_maddr = (void *)memh;
625 sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
626
627 /* set up pointers to important on-card control structures */
628 sc->iscp = 0;
629 sc->scb = IE_ISCP_SZ;
630 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
631
632 sc->buf_area = sc->scb + IE_SCB_SZ;
633 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
634
635 /* zero card memory */
636 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, 32);
637 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
638
639 /* set card to 16-bit bus mode */
640 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0);
641
642 /* set up pointers to key structures */
643 ix_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
644 ix_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
645 ix_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
646
647 /* flush setup of pointers, check if chip answers */
648 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
649 BUS_SPACE_BARRIER_WRITE);
650 if (!i82586_proberam(sc)) {
651 DPRINTF(("\n%s: Can't talk to i82586!\n",
652 sc->sc_dev.dv_xname));
653 bus_space_unmap(iot, ioh, ia->ia_iosize);
654 bus_space_unmap(ia->ia_memt, memh, ia->ia_msize);
655 return;
656 }
657
658 /* Figure out which media is being used... */
659 if (ix_read_eeprom(iot, ioh, IX_EEPROM_CONFIG1) &
660 IX_EEPROM_MEDIA_EXT) {
661 if (ix_read_eeprom(iot, ioh, IX_EEPROM_MEDIA) &
662 IX_EEPROM_MEDIA_TP)
663 media = IFM_ETHER | IFM_10_T;
664 else
665 media = IFM_ETHER | IFM_10_2;
666 } else
667 media = IFM_ETHER | IFM_10_5;
668
669 /* Take the card out of lookback */
670 bart_config = bus_space_read_1(iot, ioh, IX_CONFIG);
671 bart_config &= ~IX_BART_LOOPBACK;
672 bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */
673 bus_space_write_1(iot, ioh, IX_CONFIG, bart_config);
674 bart_config = bus_space_read_1(iot, ioh, IX_CONFIG);
675
676 irq_encoded = ix_read_eeprom(iot, ioh,
677 IX_EEPROM_CONFIG1);
678 irq_encoded = (irq_encoded & IX_EEPROM_IRQ) >> IX_EEPROM_IRQ_SHIFT;
679
680 /* Enable interrupts */
681 bus_space_write_1(iot, ioh, IX_IRQ,
682 irq_encoded | IX_IRQ_ENABLE);
683
684 isc->irq_encoded = irq_encoded;
685
686 i82586_attach(sc, "EtherExpress/16", ethaddr,
687 ix_media, NIX_MEDIA, media);
688
689 isc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
690 IPL_NET, i82586_intr, sc);
691 if (isc->sc_ih == NULL)
692 DPRINTF(("\n%s: can't establish interrupt\n",
693 sc->sc_dev.dv_xname));
694 }
695
696 struct cfattach ix_ca = {
697 sizeof(struct ix_softc), ix_match, ix_attach
698 };
699