if_ixreg.h revision 1.1 1 1.1 pk /* $NetBSD: if_ixreg.h,v 1.1 1998/02/27 23:50:51 pk Exp $ */
2 1.1 pk /* $Id: if_ixreg.h,v 1.1 1998/02/27 23:50:51 pk Exp $ */
3 1.1 pk
4 1.1 pk /*
5 1.1 pk * Copyright (c) 1993, 1994, 1995
6 1.1 pk * Rodney W. Grimes, Milwaukie, Oregon 97222. All rights reserved.
7 1.1 pk *
8 1.1 pk * Redistribution and use in source and binary forms, with or without
9 1.1 pk * modification, are permitted provided that the following conditions
10 1.1 pk * are met:
11 1.1 pk * 1. Redistributions of source code must retain the above copyright
12 1.1 pk * notice, this list of conditions and the following disclaimer as
13 1.1 pk * the first lines of this file unmodified.
14 1.1 pk * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 pk * notice, this list of conditions and the following disclaimer in the
16 1.1 pk * documentation and/or other materials provided with the distribution.
17 1.1 pk * 3. All advertising materials mentioning features or use of this software
18 1.1 pk * must display the following acknowledgement:
19 1.1 pk * This product includes software developed by Rodney W. Grimes.
20 1.1 pk * 4. The name of the author may not be used to endorse or promote products
21 1.1 pk * derived from this software without specific prior written permission.
22 1.1 pk *
23 1.1 pk * THIS SOFTWARE IS PROVIDED BY RODNEY W. GRIMES ``AS IS'' AND ANY EXPRESS OR
24 1.1 pk * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.1 pk * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.1 pk * IN NO EVENT SHALL RODNEY W. GRIMES BE LIABLE FOR ANY DIRECT, INDIRECT,
27 1.1 pk * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 1.1 pk * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 1.1 pk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 1.1 pk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 1.1 pk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 1.1 pk * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 pk *
34 1.1 pk */
35 1.1 pk
36 1.1 pk /*
37 1.1 pk * Definitions for EtherExpress 16
38 1.1 pk */
39 1.1 pk
40 1.1 pk #define IX_IOSIZE 16 /* card has 16 registers in IO space */
41 1.1 pk
42 1.1 pk #define IX_ATTN 0x06 /* channel attention control */
43 1.1 pk #define IX_IRQ 0x07 /* IRQ configuration */
44 1.1 pk #define IX_IRQ_ENABLE 0x08 /* enable board interrupts */
45 1.1 pk
46 1.1 pk #define IX_MEMDEC 0x0a /* memory decode */
47 1.1 pk #define IX_MCTRL 0x0b /* memory control */
48 1.1 pk #define IX_MCTRL_FMCS16 0x10 /* MEMCS16- for F000 */
49 1.1 pk
50 1.1 pk #define IX_MPCTRL 0x0c /* memory page control */
51 1.1 pk #define IX_CONFIG 0x0d /* config register */
52 1.1 pk #define IX_BART_LOOPBACK 0x02 /* loopback, 0=none, 1=loopback */
53 1.1 pk #define IX_BART_IOCHRDY_LATE 0x10 /* iochrdy late control bit */
54 1.1 pk #define IX_BART_IO_TEST_EN 0x20 /* enable iochrdy timing test */
55 1.1 pk #define IX_BART_IO_RESULT 0x40 /* result of the iochrdy test */
56 1.1 pk #define IX_BART_MCS16_TEST 0x80 /* enable memcs16 select test */
57 1.1 pk
58 1.1 pk #define IX_ECTRL 0x0e /* eeprom control */
59 1.1 pk #define IX_ECTRL_EESK 0x01 /* EEPROM clock bit */
60 1.1 pk #define IX_ECTRL_EECS 0x02 /* EEPROM chip select */
61 1.1 pk #define IX_ECTRL_EEDI 0x04 /* EEPROM data in bit */
62 1.1 pk #define IX_ECTRL_EEDO 0x08 /* EEPROM data out bit */
63 1.1 pk #define IX_RESET_ASIC 0x40 /* reset ASIC (bart) pin */
64 1.1 pk #define IX_RESET_586 0x80 /* reset 82586 pin */
65 1.1 pk #define IX_ECTRL_MASK 0xb2 /* and'ed with ECTRL to enable read */
66 1.1 pk
67 1.1 pk #define IX_MECTRL 0x0f /* memory control, 0xe000 seg 'W' */
68 1.1 pk #define IX_ID_PORT 0x0f /* auto-id port 'R' */
69 1.1 pk
70 1.1 pk #define IX_ID 0xbaba /* known id of EE16 */
71 1.1 pk
72 1.1 pk #define IX_EEPROM_READ 0x06 /* EEPROM read opcode */
73 1.1 pk #define IX_EEPROM_OPSIZE1 0x03 /* size of EEPROM opcodes */
74 1.1 pk #define IX_EEPROM_ADDR_SIZE 0x06 /* size of EEPROM address */
75 1.1 pk
76 1.1 pk /* Locations in the EEPROM */
77 1.1 pk #define IX_EEPROM_CONFIG1 0x00 /* Configuration register 1 */
78 1.1 pk #define IX_EEPROM_MEDIA_EXT 0x1000 /* Using external transceiver */
79 1.1 pk
80 1.1 pk #define IX_EEPROM_IRQ 0xE000 /* Encoded IRQ */
81 1.1 pk #define IX_EEPROM_IRQ_SHIFT 13 /* To shift IRQ to lower bits */
82 1.1 pk #define IX_EEPROM_LOCK_ADDR 0x01 /* contains the lock bit */
83 1.1 pk #define IX_EEPROM_LOCKED 0x01 /* means that it is locked */
84 1.1 pk
85 1.1 pk #define IX_EEPROM_ENET_LOW 0x02 /* Ethernet address, low word */
86 1.1 pk #define IX_EEPROM_ENET_MID 0x03 /* Ethernet address, middle word */
87 1.1 pk #define IX_EEPROM_ENET_HIGH 0x04 /* Ethernet address, high word */
88 1.1 pk
89 1.1 pk #define IX_EEPROM_MEDIA 0x05 /* Selects between TP/BNC */
90 1.1 pk #define IX_EEPROM_MEDIA_TP 0x01 /* if ON, using TP, else BNC */
91 1.1 pk
92