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if_ixreg.h revision 1.1
      1 /*	$NetBSD: if_ixreg.h,v 1.1 1998/02/27 23:50:51 pk Exp $	*/
      2 /*	$Id: if_ixreg.h,v 1.1 1998/02/27 23:50:51 pk Exp $	*/
      3 
      4 /*
      5  * Copyright (c) 1993, 1994, 1995
      6  *	Rodney W. Grimes, Milwaukie, Oregon  97222.  All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer as
     13  *    the first lines of this file unmodified.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed by Rodney W. Grimes.
     20  * 4. The name of the author may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY RODNEY W. GRIMES ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL RODNEY W. GRIMES BE LIABLE FOR ANY DIRECT, INDIRECT,
     27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  *
     34  */
     35 
     36 /*
     37  * Definitions for EtherExpress 16
     38  */
     39 
     40 #define IX_IOSIZE	16	/* card has 16 registers in IO space */
     41 
     42 #define IX_ATTN			0x06	/* channel attention control */
     43 #define IX_IRQ			0x07	/* IRQ configuration */
     44 #define IX_IRQ_ENABLE		0x08	/* enable board interrupts */
     45 
     46 #define IX_MEMDEC		0x0a	/* memory decode */
     47 #define IX_MCTRL		0x0b	/* memory control */
     48 #define IX_MCTRL_FMCS16		0x10	/* MEMCS16- for F000 */
     49 
     50 #define IX_MPCTRL		0x0c	/* memory page control */
     51 #define IX_CONFIG		0x0d	/* config register */
     52 #define IX_BART_LOOPBACK	0x02	/* loopback, 0=none, 1=loopback */
     53 #define IX_BART_IOCHRDY_LATE	0x10	/* iochrdy late control bit */
     54 #define IX_BART_IO_TEST_EN	0x20	/* enable iochrdy timing test */
     55 #define IX_BART_IO_RESULT	0x40	/* result of the iochrdy test */
     56 #define IX_BART_MCS16_TEST	0x80	/* enable memcs16 select test */
     57 
     58 #define IX_ECTRL		0x0e	/* eeprom control */
     59 #define IX_ECTRL_EESK		0x01	/* EEPROM clock bit */
     60 #define IX_ECTRL_EECS		0x02	/* EEPROM chip select */
     61 #define IX_ECTRL_EEDI		0x04	/* EEPROM data in bit */
     62 #define IX_ECTRL_EEDO		0x08	/* EEPROM data out bit */
     63 #define IX_RESET_ASIC		0x40	/* reset ASIC (bart) pin */
     64 #define IX_RESET_586		0x80	/* reset 82586 pin */
     65 #define IX_ECTRL_MASK		0xb2	/* and'ed with ECTRL to enable read  */
     66 
     67 #define IX_MECTRL		0x0f	/* memory control, 0xe000 seg 'W' */
     68 #define IX_ID_PORT		0x0f	/* auto-id port 'R' */
     69 
     70 #define IX_ID			0xbaba	/* known id of EE16 */
     71 
     72 #define IX_EEPROM_READ	0x06	/* EEPROM read opcode */
     73 #define IX_EEPROM_OPSIZE1	0x03	/* size of EEPROM opcodes */
     74 #define IX_EEPROM_ADDR_SIZE	0x06	/* size of EEPROM address */
     75 
     76 /* Locations in the EEPROM */
     77 #define IX_EEPROM_CONFIG1	0x00	/* Configuration register 1 */
     78 #define IX_EEPROM_MEDIA_EXT	0x1000	/* Using external transceiver */
     79 
     80 #define IX_EEPROM_IRQ		0xE000	/* Encoded IRQ */
     81 #define IX_EEPROM_IRQ_SHIFT	13	/* To shift IRQ to lower bits */
     82 #define IX_EEPROM_LOCK_ADDR	0x01	/* contains the lock bit */
     83 #define IX_EEPROM_LOCKED	0x01	/* means that it is locked */
     84 
     85 #define IX_EEPROM_ENET_LOW	0x02	/* Ethernet address, low word */
     86 #define IX_EEPROM_ENET_MID	0x03	/* Ethernet address, middle word */
     87 #define IX_EEPROM_ENET_HIGH	0x04	/* Ethernet address, high word */
     88 
     89 #define IX_EEPROM_MEDIA		0x05	/* Selects between TP/BNC */
     90 #define IX_EEPROM_MEDIA_TP	0x01	/* if ON, using TP, else BNC */
     91 
     92