if_iy.c revision 1.105
1 /* $NetBSD: if_iy.c,v 1.105 2019/04/24 09:35:54 msaitoh Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Supported hardware: 36 * 37 * - Intel EtherExpress Pro/10. 38 * - possibly other boards using the i82595 chip and no special tweaks. 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.105 2019/04/24 09:35:54 msaitoh Exp $"); 43 44 #include "opt_inet.h" 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/mbuf.h> 49 #include <sys/buf.h> 50 #include <sys/protosw.h> 51 #include <sys/socket.h> 52 #include <sys/ioctl.h> 53 #include <sys/errno.h> 54 #include <sys/syslog.h> 55 #include <sys/device.h> 56 #include <sys/endian.h> 57 #include <sys/rndsource.h> 58 59 #include <net/if.h> 60 #include <net/if_types.h> 61 #include <net/if_dl.h> 62 #include <net/bpf.h> 63 #include <net/if_ether.h> 64 #include <net/if_media.h> 65 66 #ifdef INET 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/ip.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 75 #include <sys/cpu.h> 76 #include <sys/bus.h> 77 #include <sys/intr.h> 78 79 #include <dev/isa/isareg.h> 80 #include <dev/isa/isavar.h> 81 #include <dev/ic/i82595reg.h> 82 83 /* XXX why isn't this centralized? */ 84 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 85 #define bus_space_write_stream_2 bus_space_write_2 86 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 87 #define bus_space_read_stream_2 bus_space_read_2 88 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 89 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 90 91 /* 92 * Ethernet status, per interface. 93 */ 94 struct iy_softc { 95 device_t sc_dev; 96 void *sc_ih; 97 98 bus_space_tag_t sc_iot; 99 bus_space_handle_t sc_ioh; 100 101 struct ethercom sc_ethercom; 102 103 struct ifmedia iy_ifmedia; 104 int iy_media; 105 106 int mappedirq; 107 108 int hard_vers; 109 110 int promisc; 111 112 int sram, tx_size, rx_size; 113 114 int tx_start, tx_end, tx_last; 115 int rx_start; 116 117 int doing_mc_setup; 118 #ifdef IYDEBUG 119 int sc_debug; 120 #endif 121 122 krndsource_t rnd_source; 123 }; 124 125 void iywatchdog(struct ifnet *); 126 int iyioctl(struct ifnet *, u_long, void *); 127 int iyintr(void *); 128 void iyinit(struct iy_softc *); 129 void iystop(struct iy_softc *); 130 void iystart(struct ifnet *); 131 132 void iy_intr_rx(struct iy_softc *); 133 void iy_intr_tx(struct iy_softc *); 134 135 void iyreset(struct iy_softc *); 136 void iy_readframe(struct iy_softc *, int); 137 void iy_drop_packet_buffer(struct iy_softc *); 138 void iy_find_mem_size(struct iy_softc *); 139 void iyrint(struct iy_softc *); 140 void iytint(struct iy_softc *); 141 void iyxmit(struct iy_softc *); 142 static void iy_mc_setup(struct iy_softc *); 143 static void iy_mc_reset(struct iy_softc *); 144 void iyget(struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int); 145 void iyprobemem(struct iy_softc *); 146 static inline void eepromwritebit(bus_space_tag_t, bus_space_handle_t, int); 147 static inline int eepromreadbit(bus_space_tag_t, bus_space_handle_t); 148 149 #ifdef IYDEBUGX 150 void print_rbd(volatile struct iy_recv_buf_desc *); 151 152 int in_ifrint = 0; 153 int in_iftint = 0; 154 #endif 155 156 int iy_mediachange(struct ifnet *); 157 void iy_mediastatus(struct ifnet *, struct ifmediareq *); 158 159 int iyprobe(device_t, cfdata_t, void *); 160 void iyattach(device_t, device_t, void *); 161 162 static u_int16_t eepromread(bus_space_tag_t, bus_space_handle_t, int); 163 164 static int eepromreadall(bus_space_tag_t, bus_space_handle_t, u_int16_t *, 165 int); 166 167 CFATTACH_DECL_NEW(iy, sizeof(struct iy_softc), 168 iyprobe, iyattach, NULL, NULL); 169 170 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 171 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 172 173 int 174 iyprobe(device_t parent, cfdata_t match, void *aux) 175 { 176 struct isa_attach_args *ia = aux; 177 u_int16_t eaddr[8]; 178 bus_space_tag_t iot; 179 bus_space_handle_t ioh; 180 u_int8_t c, d; 181 int irq; 182 183 if (ia->ia_nio < 1) 184 return (0); 185 if (ia->ia_nirq < 1) 186 return (0); 187 188 if (ISA_DIRECT_CONFIG(ia)) 189 return (0); 190 191 iot = ia->ia_iot; 192 193 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 194 return 0; 195 196 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) 197 return 0; 198 199 /* try to find the round robin sig: */ 200 201 c = bus_space_read_1(iot, ioh, ID_REG); 202 if ((c & ID_REG_MASK) != ID_REG_SIG) 203 goto out; 204 205 d = bus_space_read_1(iot, ioh, ID_REG); 206 if ((d & ID_REG_MASK) != ID_REG_SIG) 207 goto out; 208 209 if (((d-c) & R_ROBIN_BITS) != 0x40) 210 goto out; 211 212 d = bus_space_read_1(iot, ioh, ID_REG); 213 if ((d & ID_REG_MASK) != ID_REG_SIG) 214 goto out; 215 216 if (((d-c) & R_ROBIN_BITS) != 0x80) 217 goto out; 218 219 d = bus_space_read_1(iot, ioh, ID_REG); 220 if ((d & ID_REG_MASK) != ID_REG_SIG) 221 goto out; 222 223 if (((d-c) & R_ROBIN_BITS) != 0xC0) 224 goto out; 225 226 d = bus_space_read_1(iot, ioh, ID_REG); 227 if ((d & ID_REG_MASK) != ID_REG_SIG) 228 goto out; 229 230 if (((d-c) & R_ROBIN_BITS) != 0x00) 231 goto out; 232 233 #ifdef IYDEBUG 234 printf("iyprobe verified working ID reg.\n"); 235 #endif 236 237 if (eepromreadall(iot, ioh, eaddr, 8)) 238 goto out; 239 240 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 241 irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 242 else 243 irq = ia->ia_irq[0].ir_irq; 244 245 if (irq >= sizeof(eepro_revirqmap)) 246 goto out; 247 248 if (eepro_revirqmap[irq] == 0xff) 249 goto out; 250 251 /* now lets reset the chip */ 252 253 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 254 delay(200); 255 256 ia->ia_nio = 1; 257 ia->ia_io[0].ir_size = 16; 258 259 ia->ia_nirq = 1; 260 ia->ia_irq[0].ir_irq = irq; 261 262 ia->ia_niomem = 0; 263 ia->ia_ndrq = 0; 264 265 bus_space_unmap(iot, ioh, 16); 266 return 1; /* found */ 267 out: 268 bus_space_unmap(iot, ioh, 16); 269 return 0; 270 } 271 272 void 273 iyattach(device_t parent, device_t self, void *aux) 274 { 275 struct iy_softc *sc = device_private(self); 276 struct isa_attach_args *ia = aux; 277 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 278 bus_space_tag_t iot; 279 bus_space_handle_t ioh; 280 unsigned temp; 281 u_int16_t eaddr[8]; 282 u_int8_t myaddr[ETHER_ADDR_LEN]; 283 int eirq; 284 285 iot = ia->ia_iot; 286 287 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) { 288 aprint_error(": can't map i/o space\n"); 289 return; 290 } 291 292 sc->sc_iot = iot; 293 sc->sc_ioh = ioh; 294 295 sc->mappedirq = eepro_revirqmap[ia->ia_irq[0].ir_irq]; 296 297 /* now let's reset the chip */ 298 299 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 300 delay(200); 301 302 iyprobemem(sc); 303 304 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 305 ifp->if_softc = sc; 306 ifp->if_start = iystart; 307 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 308 309 sc->doing_mc_setup = 0; 310 311 ifp->if_ioctl = iyioctl; 312 ifp->if_watchdog = iywatchdog; 313 314 IFQ_SET_READY(&ifp->if_snd); 315 316 (void)eepromreadall(iot, ioh, eaddr, 8); 317 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 318 319 #ifdef DIAGNOSTICS 320 if ((eaddr[EEPPEther0] != 321 eepromread(iot, ioh, EEPPEther0a)) && 322 (eaddr[EEPPEther1] != 323 eepromread(iot, ioh, EEPPEther1a)) && 324 (eaddr[EEPPEther2] != 325 eepromread(iot, ioh, EEPPEther2a))) 326 327 aprint_error("EEPROM Ethernet address differs from copy\n"); 328 #endif 329 330 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 331 myaddr[0] = eaddr[EEPPEther0] >> 8; 332 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 333 myaddr[2] = eaddr[EEPPEther1] >> 8; 334 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 335 myaddr[4] = eaddr[EEPPEther2] >> 8; 336 337 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 338 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 339 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 340 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 341 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 342 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 343 /* Attach the interface. */ 344 if_attach(ifp); 345 ether_ifattach(ifp, myaddr); 346 aprint_normal(": address %s, rev. %d, %d kB\n", 347 ether_sprintf(myaddr), 348 sc->hard_vers, sc->sram/1024); 349 350 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 351 if (eirq != ia->ia_irq[0].ir_irq) 352 aprint_error("%s: EEPROM irq setting %d ignored\n", 353 device_xname(sc->sc_dev), eirq); 354 355 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 356 IST_EDGE, IPL_NET, iyintr, sc); 357 358 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 359 RND_TYPE_NET, RND_FLAG_DEFAULT); 360 361 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 362 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 363 } 364 365 void 366 iystop(struct iy_softc *sc) 367 { 368 bus_space_tag_t iot; 369 bus_space_handle_t ioh; 370 #ifdef IYDEBUG 371 u_int p, v; 372 #endif 373 374 iot = sc->sc_iot; 375 ioh = sc->sc_ioh; 376 377 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 378 379 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 380 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 381 382 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 383 delay(200); 384 #ifdef IYDEBUG 385 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 386 device_xname(sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 387 p = sc->tx_last; 388 if (!p) 389 p = sc->tx_start; 390 do { 391 char sbuf[128]; 392 393 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 394 395 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 396 snprintb(sbuf, sizeof(sbuf), "\020\006Ab\010Dn", v); 397 printf("0x%04x: %s ", p, sbuf); 398 399 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 400 snprintb(sbuf, sizeof(sbuf), 401 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN" 402 "\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", v); 403 printf("%s", sbuf); 404 405 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 406 printf(" 0x%04x", p); 407 408 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 409 snprintb(sbuf, sizeof(sbuf), "\020\020Ch", v); 410 printf(" %s\n", sbuf); 411 412 } while (v & 0x8000); 413 #endif 414 sc->tx_start = sc->tx_end = sc->rx_size; 415 sc->tx_last = 0; 416 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 417 } 418 419 void 420 iyreset(struct iy_softc *sc) 421 { 422 int s; 423 s = splnet(); 424 iystop(sc); 425 iyinit(sc); 426 splx(s); 427 } 428 429 void 430 iyinit(struct iy_softc *sc) 431 { 432 int i; 433 unsigned temp; 434 struct ifnet *ifp; 435 bus_space_tag_t iot; 436 bus_space_handle_t ioh; 437 438 iot = sc->sc_iot; 439 ioh = sc->sc_ioh; 440 441 ifp = &sc->sc_ethercom.ec_if; 442 #ifdef IYDEBUG 443 printf("ifp is %p\n", ifp); 444 #endif 445 446 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 447 448 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 449 if (temp & 0x10) 450 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 451 452 for (i=0; i<6; ++i) { 453 bus_space_write_1(iot, ioh, I_ADD(i), CLLADDR(ifp->if_sadl)[i]); 454 } 455 456 temp = bus_space_read_1(iot, ioh, REG1); 457 bus_space_write_1(iot, ioh, REG1, 458 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 459 460 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 461 temp = MATCH_ALL; 462 } else 463 temp = MATCH_BRDCST; 464 465 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 466 467 #ifdef IYDEBUG 468 { 469 char sbuf[128]; 470 471 snprintb(sbuf, sizeof(sbuf), 472 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 473 temp); 474 475 printf("%s: RECV_MODES set to %s\n", device_xname(sc->sc_dev), 476 sbuf); 477 } 478 #endif 479 /* XXX VOODOO */ 480 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 481 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 482 /* XXX END OF VOODOO */ 483 484 485 delay(500000); /* for the hardware to test for the connector */ 486 487 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 488 #ifdef IYDEBUG 489 { 490 char sbuf[128]; 491 492 snprintb(sbuf, sizeof(sbuf), 493 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 494 temp); 495 printf("%s: media select was %s ", device_xname(sc->sc_dev), 496 sbuf); 497 } 498 #endif 499 temp = (temp & TEST_MODE_MASK); 500 501 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 502 case IFM_10_5: 503 temp &= ~ (BNC_BIT | TPE_BIT); 504 break; 505 506 case IFM_10_2: 507 temp = (temp & ~TPE_BIT) | BNC_BIT; 508 break; 509 510 case IFM_10_T: 511 temp = (temp & ~BNC_BIT) | TPE_BIT; 512 break; 513 default: 514 ; 515 /* nothing; leave as it is */ 516 } 517 switch (temp & (BNC_BIT | TPE_BIT)) { 518 case BNC_BIT: 519 sc->iy_media = IFM_ETHER | IFM_10_2; 520 break; 521 case TPE_BIT: 522 sc->iy_media = IFM_ETHER | IFM_10_T; 523 break; 524 default: 525 sc->iy_media = IFM_ETHER | IFM_10_5; 526 } 527 528 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 529 #ifdef IYDEBUG 530 { 531 char sbuf[128]; 532 533 snprintb(sbuf, sizeof(sbuf), 534 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 535 temp); 536 printf("changed to %s\n", sbuf); 537 } 538 #endif 539 540 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 541 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 542 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 543 544 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 545 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 546 547 #ifdef IYDEBUG 548 { 549 char sbuf[128]; 550 551 snprintb(sbuf, sizeof(sbuf), 552 "\020\4bad_irq\010flash/boot present", temp); 553 554 printf("%s: int no was %s\n", device_xname(sc->sc_dev), sbuf); 555 556 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 557 snprintb(sbuf, sizeof(sbuf), 558 "\020\4bad_irq\010flash/boot present", temp); 559 printf("%s: int no now %s\n", device_xname(sc->sc_dev), sbuf); 560 } 561 #endif 562 563 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 564 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 565 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 566 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 567 568 temp = bus_space_read_1(iot, ioh, REG1); 569 #ifdef IYDEBUG 570 { 571 char sbuf[128]; 572 573 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 574 temp); 575 576 printf("%s: HW access is %s\n", device_xname(sc->sc_dev), sbuf); 577 } 578 #endif 579 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 580 581 #ifdef IYDEBUG 582 { 583 char sbuf[128]; 584 585 temp = bus_space_read_1(iot, ioh, REG1); 586 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 587 temp); 588 printf("%s: HW access is %s\n", device_xname(sc->sc_dev), sbuf); 589 } 590 #endif 591 592 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 593 594 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 595 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 596 597 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 598 599 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 600 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 601 sc->rx_start = 0; 602 603 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 604 delay(200); 605 606 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 607 608 sc->tx_start = sc->tx_end = sc->rx_size; 609 sc->tx_last = 0; 610 611 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 612 613 ifp->if_flags |= IFF_RUNNING; 614 ifp->if_flags &= ~IFF_OACTIVE; 615 } 616 617 void 618 iystart(struct ifnet *ifp) 619 { 620 struct iy_softc *sc; 621 622 623 struct mbuf *m0, *m; 624 u_int len, pad, last, end; 625 u_int llen, residual; 626 int avail; 627 char *data; 628 unsigned temp; 629 u_int16_t resval, stat; 630 bus_space_tag_t iot; 631 bus_space_handle_t ioh; 632 633 #ifdef IYDEBUG 634 printf("iystart called\n"); 635 #endif 636 sc = ifp->if_softc; 637 638 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 639 return; 640 641 iy_intr_tx(sc); 642 643 iot = sc->sc_iot; 644 ioh = sc->sc_ioh; 645 646 for (;;) { 647 IFQ_POLL(&ifp->if_snd, m0); 648 if (m0 == NULL) 649 break; 650 #ifdef IYDEBUG 651 printf("%s: trying to write another packet to the hardware\n", 652 device_xname(sc->sc_dev)); 653 #endif 654 655 /* We need to use m->m_pkthdr.len, so require the header */ 656 if ((m0->m_flags & M_PKTHDR) == 0) 657 panic("iystart: no header mbuf"); 658 659 len = m0->m_pkthdr.len; 660 pad = len & 1; 661 662 #ifdef IYDEBUG 663 printf("%s: length is %d.\n", device_xname(sc->sc_dev), len); 664 #endif 665 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 666 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 667 } 668 669 if (len + pad > ETHER_MAX_LEN) { 670 /* packet is obviously too large: toss it */ 671 ++ifp->if_oerrors; 672 IFQ_DEQUEUE(&ifp->if_snd, m0); 673 m_freem(m0); 674 continue; 675 } 676 677 bpf_mtap(ifp, m0, BPF_D_OUT); 678 679 avail = sc->tx_start - sc->tx_end; 680 if (avail <= 0) 681 avail += sc->tx_size; 682 683 #ifdef IYDEBUG 684 printf("%s: avail is %d.\n", device_xname(sc->sc_dev), avail); 685 #endif 686 /* 687 * we MUST RUN at splnet here --- 688 * XXX todo: or even turn off the boards ints ??? hm... 689 */ 690 691 /* See if there is room to put another packet in the buffer. */ 692 693 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 694 #ifdef IYDEBUG 695 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 696 device_xname(sc->sc_dev), len, avail); 697 #endif 698 /* mark interface as full ... */ 699 ifp->if_flags |= IFF_OACTIVE; 700 701 /* and wait for any transmission result */ 702 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 703 704 temp = bus_space_read_1(iot, ioh, REG1); 705 bus_space_write_1(iot, ioh, REG1, 706 temp & ~XMT_CHAIN_INT); 707 708 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 709 710 return; 711 } 712 713 /* we know it fits in the hardware now, so dequeue it */ 714 IFQ_DEQUEUE(&ifp->if_snd, m0); 715 716 last = sc->tx_end; 717 end = last + pad + len + I595_XMT_HDRLEN; 718 719 if (end >= sc->sram) { 720 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 721 /* keep header in one piece */ 722 last = sc->rx_size; 723 end = last + pad + len + I595_XMT_HDRLEN; 724 } else 725 end -= sc->tx_size; 726 } 727 728 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 729 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 730 htole16(XMT_CMD)); 731 732 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 733 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 734 735 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 736 htole16(len + pad)); 737 738 residual = resval = 0; 739 740 while ((m = m0)!=0) { 741 data = mtod(m, void *); 742 llen = m->m_len; 743 if (residual) { 744 #ifdef IYDEBUG 745 printf("%s: merging residual with next mbuf.\n", 746 device_xname(sc->sc_dev)); 747 #endif 748 resval |= *data << 8; 749 bus_space_write_stream_2(iot, ioh, 750 MEM_PORT_REG, resval); 751 --llen; 752 ++data; 753 } 754 /* 755 * XXX ALIGNMENT LOSSAGE HERE. 756 */ 757 if (llen > 1) 758 bus_space_write_multi_stream_2(iot, ioh, 759 MEM_PORT_REG, (u_int16_t *) data, 760 llen>>1); 761 residual = llen & 1; 762 if (residual) { 763 resval = *(data + llen - 1); 764 #ifdef IYDEBUG 765 printf("%s: got odd mbuf to send.\n", 766 device_xname(sc->sc_dev)); 767 #endif 768 } 769 770 m0 = m_free(m); 771 } 772 773 if (residual) 774 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 775 resval); 776 777 pad >>= 1; 778 while (pad-- > 0) 779 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 780 781 #ifdef IYDEBUG 782 printf("%s: new last = 0x%x, end = 0x%x.\n", 783 device_xname(sc->sc_dev), last, end); 784 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 785 device_xname(sc->sc_dev), sc->tx_start, sc->tx_end, 786 sc->tx_last); 787 #endif 788 789 if (sc->tx_start != sc->tx_end) { 790 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 791 sc->tx_last + XMT_COUNT); 792 793 /* 794 * XXX We keep stat in le order, to potentially save 795 * a byte swap. 796 */ 797 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 798 799 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 800 sc->tx_last + XMT_CHAIN); 801 802 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 803 htole16(last)); 804 805 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 806 stat | htole16(CHAIN)); 807 #ifdef IYDEBUG 808 printf("%s: setting 0x%x to 0x%x\n", 809 device_xname(sc->sc_dev), sc->tx_last + XMT_COUNT, 810 le16toh(stat) | CHAIN); 811 #endif 812 } 813 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 814 815 /* XXX todo: enable ints here if disabled */ 816 817 ++ifp->if_opackets; 818 819 if (sc->tx_start == sc->tx_end) { 820 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 821 bus_space_write_1(iot, ioh, 0, XMT_CMD); 822 sc->tx_start = last; 823 #ifdef IYDEBUG 824 printf("%s: writing 0x%x to XAR and giving XCMD\n", 825 device_xname(sc->sc_dev), last); 826 #endif 827 } else { 828 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 829 #ifdef IYDEBUG 830 printf("%s: giving RESUME_XCMD\n", 831 device_xname(sc->sc_dev)); 832 #endif 833 } 834 sc->tx_last = last; 835 sc->tx_end = end; 836 } 837 /* and wait only for end of transmission chain */ 838 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 839 840 temp = bus_space_read_1(iot, ioh, REG1); 841 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 842 843 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 844 } 845 846 847 static inline void 848 eepromwritebit(bus_space_tag_t iot, bus_space_handle_t ioh, int what) 849 { 850 bus_space_write_1(iot, ioh, EEPROM_REG, what); 851 delay(1); 852 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 853 delay(1); 854 bus_space_write_1(iot, ioh, EEPROM_REG, what); 855 delay(1); 856 } 857 858 static inline int 859 eepromreadbit(bus_space_tag_t iot, bus_space_handle_t ioh) 860 { 861 int b; 862 863 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 864 delay(1); 865 b = bus_space_read_1(iot, ioh, EEPROM_REG); 866 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 867 delay(1); 868 869 return ((b & EEDO) != 0); 870 } 871 872 static u_int16_t 873 eepromread(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 874 { 875 volatile int i; 876 volatile int j; 877 volatile u_int16_t readval; 878 879 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 880 delay(1); 881 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 882 delay(1); 883 884 eepromwritebit(iot, ioh, EECS|EEDI); 885 eepromwritebit(iot, ioh, EECS|EEDI); 886 eepromwritebit(iot, ioh, EECS); 887 888 for (j=5; j>=0; --j) { 889 if ((offset>>j) & 1) 890 eepromwritebit(iot, ioh, EECS|EEDI); 891 else 892 eepromwritebit(iot, ioh, EECS); 893 } 894 895 for (readval=0, i=0; i<16; ++i) { 896 readval<<=1; 897 readval |= eepromreadbit(iot, ioh); 898 } 899 900 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 901 delay(1); 902 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 903 904 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 905 906 return readval; 907 } 908 909 /* 910 * Device timeout/watchdog routine. Entered if the device neglects to generate 911 * an interrupt after a transmit has been started on it. 912 */ 913 void 914 iywatchdog(struct ifnet *ifp) 915 { 916 struct iy_softc *sc = ifp->if_softc; 917 918 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 919 ++sc->sc_ethercom.ec_if.if_oerrors; 920 iyreset(sc); 921 } 922 923 /* 924 * What to do upon receipt of an interrupt. 925 */ 926 int 927 iyintr(void *arg) 928 { 929 struct iy_softc *sc; 930 struct ifnet *ifp; 931 bus_space_tag_t iot; 932 bus_space_handle_t ioh; 933 934 u_short status; 935 936 sc = arg; 937 iot = sc->sc_iot; 938 ioh = sc->sc_ioh; 939 940 ifp = &sc->sc_ethercom.ec_if; 941 942 status = bus_space_read_1(iot, ioh, STATUS_REG); 943 #ifdef IYDEBUG 944 if (status & ALL_INTS) { 945 char sbuf[128]; 946 947 snprintb(sbuf, sizeof(sbuf), "\020\1RX_STP\2RX\3TX\4EXEC", 948 status); 949 printf("%s: got interrupt %s", device_xname(sc->sc_dev), sbuf); 950 951 if (status & EXEC_INT) { 952 snprintb(sbuf, sizeof(sbuf), 953 "\020\6ABORT", bus_space_read_1(iot, ioh, 0)); 954 printf(" event %s\n", sbuf); 955 } else 956 printf("\n"); 957 } 958 #endif 959 if ((status & (RX_INT | TX_INT)) == 0) 960 return 0; 961 962 if (status & RX_INT) { 963 iy_intr_rx(sc); 964 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 965 } 966 if (status & TX_INT) { 967 /* Tell feeders we may be able to accept more data... */ 968 ifp->if_flags &= ~IFF_OACTIVE; 969 /* and get more data. */ 970 iystart(ifp); 971 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 972 } 973 974 rnd_add_uint32(&sc->rnd_source, status); 975 976 return 1; 977 } 978 979 void 980 iyget(struct iy_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh, 981 int rxlen) 982 { 983 struct mbuf *m, *top, **mp; 984 struct ifnet *ifp; 985 int len; 986 987 ifp = &sc->sc_ethercom.ec_if; 988 989 MGETHDR(m, M_DONTWAIT, MT_DATA); 990 if (m == 0) 991 goto dropped; 992 m_set_rcvif(m, ifp); 993 m->m_pkthdr.len = rxlen; 994 len = MHLEN; 995 top = 0; 996 mp = ⊤ 997 998 while (rxlen > 0) { 999 if (top) { 1000 MGET(m, M_DONTWAIT, MT_DATA); 1001 if (m == 0) { 1002 m_freem(top); 1003 goto dropped; 1004 } 1005 len = MLEN; 1006 } 1007 if (rxlen >= MINCLSIZE) { 1008 MCLGET(m, M_DONTWAIT); 1009 if ((m->m_flags & M_EXT) == 0) { 1010 m_free(m); 1011 m_freem(top); 1012 goto dropped; 1013 } 1014 len = MCLBYTES; 1015 } 1016 len = uimin(rxlen, len); 1017 /* 1018 * XXX ALIGNMENT LOSSAGE HERE. 1019 */ 1020 if (len > 1) { 1021 len &= ~1; 1022 1023 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1024 mtod(m, u_int16_t *), len/2); 1025 } else { 1026 #ifdef IYDEBUG 1027 printf("%s: received odd mbuf\n", 1028 device_xname(sc->sc_dev)); 1029 #endif 1030 *(mtod(m, char *)) = bus_space_read_stream_2(iot, ioh, 1031 MEM_PORT_REG); 1032 } 1033 m->m_len = len; 1034 rxlen -= len; 1035 *mp = m; 1036 mp = &m->m_next; 1037 } 1038 1039 if (top == NULL) 1040 return; 1041 1042 if_percpuq_enqueue(ifp->if_percpuq, top); 1043 return; 1044 1045 dropped: 1046 ++ifp->if_ierrors; 1047 return; 1048 } 1049 1050 void 1051 iy_intr_rx(struct iy_softc *sc) 1052 { 1053 bus_space_tag_t iot; 1054 bus_space_handle_t ioh; 1055 1056 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1057 1058 iot = sc->sc_iot; 1059 ioh = sc->sc_ioh; 1060 1061 rxadrs = sc->rx_start; 1062 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1063 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1064 rxnext = 0; 1065 1066 while (rxevnt == RCV_DONE) { 1067 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1068 MEM_PORT_REG)); 1069 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1070 MEM_PORT_REG)); 1071 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1072 MEM_PORT_REG)); 1073 #ifdef IYDEBUG 1074 { 1075 char sbuf[128]; 1076 1077 snprintb(sbuf, sizeof(sbuf), 1078 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1079 "\014CRCERR\015LENERR\016RCVOK\020TYP", rxstatus); 1080 1081 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1082 device_xname(sc->sc_dev), rxadrs, sbuf, rxnext, 1083 rxlen); 1084 } 1085 #else 1086 __USE(rxstatus); 1087 #endif 1088 iyget(sc, iot, ioh, rxlen); 1089 1090 /* move stop address */ 1091 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1092 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1093 1094 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1095 rxadrs = rxnext; 1096 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1097 MEM_PORT_REG)); 1098 } 1099 sc->rx_start = rxnext; 1100 } 1101 1102 void 1103 iy_intr_tx(struct iy_softc *sc) 1104 { 1105 bus_space_tag_t iot; 1106 bus_space_handle_t ioh; 1107 struct ifnet *ifp; 1108 u_int txstatus, txstat2, txlen, txnext; 1109 1110 ifp = &sc->sc_ethercom.ec_if; 1111 iot = sc->sc_iot; 1112 ioh = sc->sc_ioh; 1113 1114 while (sc->tx_start != sc->tx_end) { 1115 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1116 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1117 MEM_PORT_REG)); 1118 1119 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1120 break; 1121 1122 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1123 MEM_PORT_REG)); 1124 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1125 MEM_PORT_REG)); 1126 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1127 MEM_PORT_REG)); 1128 #ifdef IYDEBUG 1129 { 1130 char sbuf[128]; 1131 1132 snprintb(sbuf, sizeof(sbuf), 1133 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1134 "\011UND_RUN\012JERR\013LST_CRS" 1135 "\014LTCOL\016TX_OK\020COLL", txstat2); 1136 1137 printf("txstat 0x%x stat2 %s next 0x%x len 0x%x\n", 1138 txstatus, sbuf, txnext, txlen); 1139 } 1140 #endif 1141 if (txlen & CHAIN) 1142 sc->tx_start = txnext; 1143 else 1144 sc->tx_start = sc->tx_end; 1145 ifp->if_flags &= ~IFF_OACTIVE; 1146 1147 if (txstat2 & 0x0020) 1148 ifp->if_collisions += 16; 1149 else 1150 ifp->if_collisions += txstat2 & 0x000f; 1151 1152 if ((txstat2 & 0x2000) == 0) 1153 ++ifp->if_oerrors; 1154 } 1155 } 1156 1157 int 1158 iyioctl(struct ifnet *ifp, u_long cmd, void *data) 1159 { 1160 struct iy_softc *sc; 1161 struct ifaddr *ifa; 1162 struct ifreq *ifr; 1163 int s, error = 0; 1164 1165 sc = ifp->if_softc; 1166 ifa = (struct ifaddr *)data; 1167 ifr = (struct ifreq *)data; 1168 1169 #ifdef IYDEBUG 1170 printf("iyioctl called with ifp %p (%s) cmd 0x%lx data %p\n", 1171 ifp, ifp->if_xname, cmd, data); 1172 #endif 1173 1174 s = splnet(); 1175 1176 switch (cmd) { 1177 1178 case SIOCINITIFADDR: 1179 ifp->if_flags |= IFF_UP; 1180 1181 iyinit(sc); 1182 switch (ifa->ifa_addr->sa_family) { 1183 #ifdef INET 1184 case AF_INET: 1185 arp_ifinit(ifp, ifa); 1186 break; 1187 #endif 1188 default: 1189 break; 1190 } 1191 break; 1192 1193 case SIOCSIFFLAGS: 1194 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1195 break; 1196 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1197 /* XXX re-use ether_ioctl() */ 1198 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1199 case IFF_RUNNING: 1200 /* 1201 * If interface is marked down and it is running, then 1202 * stop it. 1203 */ 1204 iystop(sc); 1205 ifp->if_flags &= ~IFF_RUNNING; 1206 break; 1207 case IFF_UP: 1208 /* 1209 * If interface is marked up and it is stopped, then 1210 * start it. 1211 */ 1212 iyinit(sc); 1213 break; 1214 default: 1215 /* 1216 * Reset the interface to pick up changes in any other 1217 * flags that affect hardware registers. 1218 */ 1219 iystop(sc); 1220 iyinit(sc); 1221 break; 1222 } 1223 #ifdef IYDEBUGX 1224 if (ifp->if_flags & IFF_DEBUG) 1225 sc->sc_debug = IFY_ALL; 1226 else 1227 sc->sc_debug = 0; 1228 #endif 1229 break; 1230 1231 case SIOCADDMULTI: 1232 case SIOCDELMULTI: 1233 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1234 /* 1235 * Multicast list has changed; set the hardware filter 1236 * accordingly. 1237 */ 1238 if (ifp->if_flags & IFF_RUNNING) { 1239 /* XXX can't make it work otherwise */ 1240 iyreset(sc); 1241 iy_mc_reset(sc); 1242 } 1243 error = 0; 1244 } 1245 break; 1246 1247 case SIOCSIFMEDIA: 1248 case SIOCGIFMEDIA: 1249 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1250 break; 1251 default: 1252 error = ether_ioctl(ifp, cmd, data); 1253 } 1254 splx(s); 1255 return error; 1256 } 1257 1258 int 1259 iy_mediachange(struct ifnet *ifp) 1260 { 1261 struct iy_softc *sc = ifp->if_softc; 1262 1263 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1264 return EINVAL; 1265 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1266 case IFM_10_5: 1267 case IFM_10_2: 1268 case IFM_10_T: 1269 case IFM_AUTO: 1270 iystop(sc); 1271 iyinit(sc); 1272 return 0; 1273 default: 1274 return EINVAL; 1275 } 1276 } 1277 1278 void 1279 iy_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 1280 { 1281 struct iy_softc *sc = ifp->if_softc; 1282 1283 ifmr->ifm_active = sc->iy_media; 1284 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1285 } 1286 1287 1288 static void 1289 iy_mc_setup(struct iy_softc *sc) 1290 { 1291 struct ether_multi *enm; 1292 struct ether_multistep step; 1293 struct ethercom *ecp; 1294 struct ifnet *ifp; 1295 bus_space_tag_t iot; 1296 bus_space_handle_t ioh; 1297 int avail, last /*, end*/ , len; 1298 int timeout; 1299 volatile u_int16_t dum; 1300 u_int8_t temp; 1301 1302 1303 ecp = &sc->sc_ethercom; 1304 ifp = &ecp->ec_if; 1305 1306 iot = sc->sc_iot; 1307 ioh = sc->sc_ioh; 1308 1309 len = 6 * ecp->ec_multicnt; 1310 1311 avail = sc->tx_start - sc->tx_end; 1312 if (avail <= 0) 1313 avail += sc->tx_size; 1314 if (ifp->if_flags & IFF_DEBUG) 1315 printf("%s: iy_mc_setup called, %d addresses, " 1316 "%d/%d bytes needed/avail\n", ifp->if_xname, 1317 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1318 1319 last = sc->rx_size; 1320 1321 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1322 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1323 /* XXX VOODOO */ 1324 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1325 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1326 /* XXX END OF VOODOO */ 1327 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1328 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1329 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1330 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1331 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1332 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1333 1334 ETHER_FIRST_MULTI(step, ecp, enm); 1335 while(enm) { 1336 /* 1337 * XXX ALIGNMENT LOSSAGE HERE? 1338 */ 1339 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1340 (u_int16_t *) enm->enm_addrlo, 3); 1341 1342 ETHER_NEXT_MULTI(step, enm); 1343 } 1344 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1345 __USE(dum); 1346 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1347 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1348 1349 1350 sc->tx_start = sc->rx_size; 1351 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1352 1353 for (timeout=0; timeout<100; timeout++) { 1354 DELAY(2); 1355 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1356 continue; 1357 1358 temp = bus_space_read_1(iot, ioh, 0); 1359 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1360 #ifdef DIAGNOSTIC 1361 if (temp & 0x20) { 1362 aprint_error_dev(sc->sc_dev, 1363 "mc setup failed, %d usec\n", timeout * 2); 1364 } else if (((temp & 0x0f) == 0x03) && 1365 (ifp->if_flags & IFF_DEBUG)) { 1366 printf("%s: mc setup done, %d usec\n", 1367 device_xname(sc->sc_dev), timeout * 2); 1368 } 1369 #endif 1370 break; 1371 } 1372 sc->tx_start = sc->tx_end; 1373 ifp->if_flags &= ~IFF_OACTIVE; 1374 1375 } 1376 1377 static void 1378 iy_mc_reset(struct iy_softc *sc) 1379 { 1380 struct ether_multi *enm; 1381 struct ether_multistep step; 1382 struct ethercom *ecp; 1383 struct ifnet *ifp; 1384 bus_space_tag_t iot; 1385 bus_space_handle_t ioh; 1386 u_int16_t temp; 1387 1388 ecp = &sc->sc_ethercom; 1389 ifp = &ecp->ec_if; 1390 1391 iot = sc->sc_iot; 1392 ioh = sc->sc_ioh; 1393 1394 if (ecp->ec_multicnt > 63) { 1395 ifp->if_flags |= IFF_ALLMULTI; 1396 1397 } else if (ecp->ec_multicnt > 0) { 1398 /* 1399 * Step through the list of addresses. 1400 */ 1401 ETHER_FIRST_MULTI(step, ecp, enm); 1402 while(enm) { 1403 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1404 ifp->if_flags |= IFF_ALLMULTI; 1405 goto setupmulti; 1406 } 1407 ETHER_NEXT_MULTI(step, enm); 1408 } 1409 /* OK, we really need to do it now: */ 1410 #if 0 1411 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1412 != IFF_RUNNING) { 1413 ifp->if_flags |= IFF_OACTIVE; 1414 sc->want_mc_setup = 1; 1415 return; 1416 } 1417 #endif 1418 iy_mc_setup(sc); 1419 } else { 1420 ifp->if_flags &= ~IFF_ALLMULTI; 1421 } 1422 1423 setupmulti: 1424 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1425 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1426 temp = MATCH_ALL; 1427 } else 1428 temp = MATCH_BRDCST; 1429 1430 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1431 /* XXX VOODOO */ 1432 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1433 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1434 /* XXX END OF VOODOO */ 1435 1436 /* XXX TBD: setup hardware for all multicasts */ 1437 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1438 return; 1439 } 1440 1441 #ifdef IYDEBUGX 1442 void 1443 print_rbd(volatile struct ie_recv_buf_desc *rbd) 1444 { 1445 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1446 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1447 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1448 rbd->mbz); 1449 } 1450 #endif 1451 1452 void 1453 iyprobemem(struct iy_softc *sc) 1454 { 1455 bus_space_tag_t iot; 1456 bus_space_handle_t ioh; 1457 int testing; 1458 1459 iot = sc->sc_iot; 1460 ioh = sc->sc_ioh; 1461 1462 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1463 delay(1); 1464 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1465 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1466 1467 for (testing=65536; testing >= 4096; testing >>= 1) { 1468 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1469 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1470 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1471 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1472 #ifdef IYMEMDEBUG 1473 printf("%s: Didn't keep 0xdead at 0x%x\n", 1474 device_xname(sc->sc_dev), testing-2); 1475 #endif 1476 continue; 1477 } 1478 1479 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1480 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1481 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1482 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1483 #ifdef IYMEMDEBUG 1484 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1485 device_xname(sc->sc_dev), testing-2); 1486 #endif 1487 continue; 1488 } 1489 1490 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1491 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1492 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1493 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1494 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1495 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1496 #ifdef IYMEMDEBUG 1497 printf("%s: 0x%x alias of 0x0\n", 1498 device_xname(sc->sc_dev), testing >> 1); 1499 #endif 1500 continue; 1501 } 1502 1503 break; 1504 } 1505 1506 sc->sram = testing; 1507 1508 switch(testing) { 1509 case 65536: 1510 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1511 sc->rx_size = 44*1024; 1512 break; 1513 1514 case 32768: 1515 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1516 sc->rx_size = 22*1024; 1517 break; 1518 1519 case 16384: 1520 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1521 sc->rx_size = 10*1024; 1522 break; 1523 default: 1524 sc->rx_size = testing/2; 1525 break; 1526 } 1527 sc->tx_size = testing - sc->rx_size; 1528 } 1529 1530 static int 1531 eepromreadall(bus_space_tag_t iot, bus_space_handle_t ioh, u_int16_t *wordp, 1532 int maxi) 1533 { 1534 int i; 1535 u_int16_t checksum, tmp; 1536 1537 checksum = 0; 1538 1539 for (i=0; i<EEPP_LENGTH; ++i) { 1540 tmp = eepromread(iot, ioh, i); 1541 checksum += tmp; 1542 if (i<maxi) 1543 wordp[i] = tmp; 1544 } 1545 1546 if (checksum != EEPP_CHKSUM) { 1547 #ifdef IYDEBUG 1548 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1549 checksum, EEPP_CHKSUM); 1550 #endif 1551 return 1; 1552 } 1553 return 0; 1554 } 1555
Indexes created Wed Sep 24 22:09:59 GMT 2025