if_iy.c revision 1.106
1 /* $NetBSD: if_iy.c,v 1.106 2019/05/23 10:57:28 msaitoh Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Supported hardware: 36 * 37 * - Intel EtherExpress Pro/10. 38 * - possibly other boards using the i82595 chip and no special tweaks. 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.106 2019/05/23 10:57:28 msaitoh Exp $"); 43 44 #include "opt_inet.h" 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/mbuf.h> 49 #include <sys/buf.h> 50 #include <sys/protosw.h> 51 #include <sys/socket.h> 52 #include <sys/ioctl.h> 53 #include <sys/errno.h> 54 #include <sys/syslog.h> 55 #include <sys/device.h> 56 #include <sys/endian.h> 57 #include <sys/rndsource.h> 58 59 #include <net/if.h> 60 #include <net/if_types.h> 61 #include <net/if_dl.h> 62 #include <net/bpf.h> 63 #include <net/if_ether.h> 64 #include <net/if_media.h> 65 66 #ifdef INET 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/ip.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 75 #include <sys/cpu.h> 76 #include <sys/bus.h> 77 #include <sys/intr.h> 78 79 #include <dev/isa/isareg.h> 80 #include <dev/isa/isavar.h> 81 #include <dev/ic/i82595reg.h> 82 83 /* XXX why isn't this centralized? */ 84 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 85 #define bus_space_write_stream_2 bus_space_write_2 86 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 87 #define bus_space_read_stream_2 bus_space_read_2 88 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 89 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 90 91 /* 92 * Ethernet status, per interface. 93 */ 94 struct iy_softc { 95 device_t sc_dev; 96 void *sc_ih; 97 98 bus_space_tag_t sc_iot; 99 bus_space_handle_t sc_ioh; 100 101 struct ethercom sc_ethercom; 102 103 struct ifmedia iy_ifmedia; 104 int iy_media; 105 106 int mappedirq; 107 108 int hard_vers; 109 110 int promisc; 111 112 int sram, tx_size, rx_size; 113 114 int tx_start, tx_end, tx_last; 115 int rx_start; 116 117 int doing_mc_setup; 118 #ifdef IYDEBUG 119 int sc_debug; 120 #endif 121 122 krndsource_t rnd_source; 123 }; 124 125 void iywatchdog(struct ifnet *); 126 int iyioctl(struct ifnet *, u_long, void *); 127 int iyintr(void *); 128 void iyinit(struct iy_softc *); 129 void iystop(struct iy_softc *); 130 void iystart(struct ifnet *); 131 132 void iy_intr_rx(struct iy_softc *); 133 void iy_intr_tx(struct iy_softc *); 134 135 void iyreset(struct iy_softc *); 136 void iy_readframe(struct iy_softc *, int); 137 void iy_drop_packet_buffer(struct iy_softc *); 138 void iy_find_mem_size(struct iy_softc *); 139 void iyrint(struct iy_softc *); 140 void iytint(struct iy_softc *); 141 void iyxmit(struct iy_softc *); 142 static void iy_mc_setup(struct iy_softc *); 143 static void iy_mc_reset(struct iy_softc *); 144 void iyget(struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int); 145 void iyprobemem(struct iy_softc *); 146 static inline void eepromwritebit(bus_space_tag_t, bus_space_handle_t, int); 147 static inline int eepromreadbit(bus_space_tag_t, bus_space_handle_t); 148 149 #ifdef IYDEBUGX 150 void print_rbd(volatile struct iy_recv_buf_desc *); 151 152 int in_ifrint = 0; 153 int in_iftint = 0; 154 #endif 155 156 int iy_mediachange(struct ifnet *); 157 void iy_mediastatus(struct ifnet *, struct ifmediareq *); 158 159 int iyprobe(device_t, cfdata_t, void *); 160 void iyattach(device_t, device_t, void *); 161 162 static uint16_t eepromread(bus_space_tag_t, bus_space_handle_t, int); 163 164 static int eepromreadall(bus_space_tag_t, bus_space_handle_t, uint16_t *, 165 int); 166 167 CFATTACH_DECL_NEW(iy, sizeof(struct iy_softc), 168 iyprobe, iyattach, NULL, NULL); 169 170 static uint8_t eepro_irqmap[] = EEPP_INTMAP; 171 static uint8_t eepro_revirqmap[] = EEPP_RINTMAP; 172 173 int 174 iyprobe(device_t parent, cfdata_t match, void *aux) 175 { 176 struct isa_attach_args *ia = aux; 177 uint16_t eaddr[8]; 178 bus_space_tag_t iot; 179 bus_space_handle_t ioh; 180 uint8_t c, d; 181 int irq; 182 183 if (ia->ia_nio < 1) 184 return 0; 185 if (ia->ia_nirq < 1) 186 return 0; 187 188 if (ISA_DIRECT_CONFIG(ia)) 189 return 0; 190 191 iot = ia->ia_iot; 192 193 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 194 return 0; 195 196 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) 197 return 0; 198 199 /* try to find the round robin sig: */ 200 201 c = bus_space_read_1(iot, ioh, ID_REG); 202 if ((c & ID_REG_MASK) != ID_REG_SIG) 203 goto out; 204 205 d = bus_space_read_1(iot, ioh, ID_REG); 206 if ((d & ID_REG_MASK) != ID_REG_SIG) 207 goto out; 208 209 if (((d-c) & R_ROBIN_BITS) != 0x40) 210 goto out; 211 212 d = bus_space_read_1(iot, ioh, ID_REG); 213 if ((d & ID_REG_MASK) != ID_REG_SIG) 214 goto out; 215 216 if (((d-c) & R_ROBIN_BITS) != 0x80) 217 goto out; 218 219 d = bus_space_read_1(iot, ioh, ID_REG); 220 if ((d & ID_REG_MASK) != ID_REG_SIG) 221 goto out; 222 223 if (((d-c) & R_ROBIN_BITS) != 0xC0) 224 goto out; 225 226 d = bus_space_read_1(iot, ioh, ID_REG); 227 if ((d & ID_REG_MASK) != ID_REG_SIG) 228 goto out; 229 230 if (((d-c) & R_ROBIN_BITS) != 0x00) 231 goto out; 232 233 #ifdef IYDEBUG 234 printf("iyprobe verified working ID reg.\n"); 235 #endif 236 237 if (eepromreadall(iot, ioh, eaddr, 8)) 238 goto out; 239 240 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 241 irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 242 else 243 irq = ia->ia_irq[0].ir_irq; 244 245 if (irq >= sizeof(eepro_revirqmap)) 246 goto out; 247 248 if (eepro_revirqmap[irq] == 0xff) 249 goto out; 250 251 /* now lets reset the chip */ 252 253 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 254 delay(200); 255 256 ia->ia_nio = 1; 257 ia->ia_io[0].ir_size = 16; 258 259 ia->ia_nirq = 1; 260 ia->ia_irq[0].ir_irq = irq; 261 262 ia->ia_niomem = 0; 263 ia->ia_ndrq = 0; 264 265 bus_space_unmap(iot, ioh, 16); 266 return 1; /* found */ 267 out: 268 bus_space_unmap(iot, ioh, 16); 269 return 0; 270 } 271 272 void 273 iyattach(device_t parent, device_t self, void *aux) 274 { 275 struct iy_softc *sc = device_private(self); 276 struct isa_attach_args *ia = aux; 277 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 278 bus_space_tag_t iot; 279 bus_space_handle_t ioh; 280 unsigned temp; 281 uint16_t eaddr[8]; 282 uint8_t myaddr[ETHER_ADDR_LEN]; 283 int eirq; 284 285 iot = ia->ia_iot; 286 287 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) { 288 aprint_error(": can't map i/o space\n"); 289 return; 290 } 291 292 sc->sc_iot = iot; 293 sc->sc_ioh = ioh; 294 295 sc->mappedirq = eepro_revirqmap[ia->ia_irq[0].ir_irq]; 296 297 /* now let's reset the chip */ 298 299 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 300 delay(200); 301 302 iyprobemem(sc); 303 304 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 305 ifp->if_softc = sc; 306 ifp->if_start = iystart; 307 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 308 309 sc->doing_mc_setup = 0; 310 311 ifp->if_ioctl = iyioctl; 312 ifp->if_watchdog = iywatchdog; 313 314 IFQ_SET_READY(&ifp->if_snd); 315 316 (void)eepromreadall(iot, ioh, eaddr, 8); 317 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 318 319 #ifdef DIAGNOSTICS 320 if ((eaddr[EEPPEther0] != 321 eepromread(iot, ioh, EEPPEther0a)) && 322 (eaddr[EEPPEther1] != 323 eepromread(iot, ioh, EEPPEther1a)) && 324 (eaddr[EEPPEther2] != 325 eepromread(iot, ioh, EEPPEther2a))) 326 327 aprint_error("EEPROM Ethernet address differs from copy\n"); 328 #endif 329 330 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 331 myaddr[0] = eaddr[EEPPEther0] >> 8; 332 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 333 myaddr[2] = eaddr[EEPPEther1] >> 8; 334 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 335 myaddr[4] = eaddr[EEPPEther2] >> 8; 336 337 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 338 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 339 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 340 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 341 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 342 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 343 /* Attach the interface. */ 344 if_attach(ifp); 345 ether_ifattach(ifp, myaddr); 346 aprint_normal(": address %s, rev. %d, %d kB\n", 347 ether_sprintf(myaddr), 348 sc->hard_vers, sc->sram/1024); 349 350 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 351 if (eirq != ia->ia_irq[0].ir_irq) 352 aprint_error("%s: EEPROM irq setting %d ignored\n", 353 device_xname(sc->sc_dev), eirq); 354 355 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 356 IST_EDGE, IPL_NET, iyintr, sc); 357 358 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 359 RND_TYPE_NET, RND_FLAG_DEFAULT); 360 361 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 362 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 363 } 364 365 void 366 iystop(struct iy_softc *sc) 367 { 368 bus_space_tag_t iot; 369 bus_space_handle_t ioh; 370 #ifdef IYDEBUG 371 u_int p, v; 372 #endif 373 374 iot = sc->sc_iot; 375 ioh = sc->sc_ioh; 376 377 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 378 379 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 380 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 381 382 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 383 delay(200); 384 #ifdef IYDEBUG 385 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 386 device_xname(sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 387 p = sc->tx_last; 388 if (!p) 389 p = sc->tx_start; 390 do { 391 char sbuf[128]; 392 393 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 394 395 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 396 snprintb(sbuf, sizeof(sbuf), "\020\006Ab\010Dn", v); 397 printf("0x%04x: %s ", p, sbuf); 398 399 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 400 snprintb(sbuf, sizeof(sbuf), 401 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN" 402 "\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", v); 403 printf("%s", sbuf); 404 405 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 406 printf(" 0x%04x", p); 407 408 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 409 snprintb(sbuf, sizeof(sbuf), "\020\020Ch", v); 410 printf(" %s\n", sbuf); 411 412 } while (v & 0x8000); 413 #endif 414 sc->tx_start = sc->tx_end = sc->rx_size; 415 sc->tx_last = 0; 416 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 417 } 418 419 void 420 iyreset(struct iy_softc *sc) 421 { 422 int s; 423 s = splnet(); 424 iystop(sc); 425 iyinit(sc); 426 splx(s); 427 } 428 429 void 430 iyinit(struct iy_softc *sc) 431 { 432 int i; 433 unsigned temp; 434 struct ifnet *ifp; 435 bus_space_tag_t iot; 436 bus_space_handle_t ioh; 437 438 iot = sc->sc_iot; 439 ioh = sc->sc_ioh; 440 441 ifp = &sc->sc_ethercom.ec_if; 442 #ifdef IYDEBUG 443 printf("ifp is %p\n", ifp); 444 #endif 445 446 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 447 448 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 449 if (temp & 0x10) 450 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 451 452 for (i=0; i<6; ++i) { 453 bus_space_write_1(iot, ioh, I_ADD(i), CLLADDR(ifp->if_sadl)[i]); 454 } 455 456 temp = bus_space_read_1(iot, ioh, REG1); 457 bus_space_write_1(iot, ioh, REG1, 458 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 459 460 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) 461 temp = MATCH_ALL; 462 else 463 temp = MATCH_BRDCST; 464 465 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 466 467 #ifdef IYDEBUG 468 { 469 char sbuf[128]; 470 471 snprintb(sbuf, sizeof(sbuf), 472 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 473 temp); 474 475 printf("%s: RECV_MODES set to %s\n", device_xname(sc->sc_dev), 476 sbuf); 477 } 478 #endif 479 /* XXX VOODOO */ 480 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 481 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 482 /* XXX END OF VOODOO */ 483 484 485 delay(500000); /* for the hardware to test for the connector */ 486 487 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 488 #ifdef IYDEBUG 489 { 490 char sbuf[128]; 491 492 snprintb(sbuf, sizeof(sbuf), 493 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 494 temp); 495 printf("%s: media select was %s ", device_xname(sc->sc_dev), 496 sbuf); 497 } 498 #endif 499 temp = (temp & TEST_MODE_MASK); 500 501 switch (IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 502 case IFM_10_5: 503 temp &= ~ (BNC_BIT | TPE_BIT); 504 break; 505 506 case IFM_10_2: 507 temp = (temp & ~TPE_BIT) | BNC_BIT; 508 break; 509 510 case IFM_10_T: 511 temp = (temp & ~BNC_BIT) | TPE_BIT; 512 break; 513 default: 514 ; 515 /* nothing; leave as it is */ 516 } 517 switch (temp & (BNC_BIT | TPE_BIT)) { 518 case BNC_BIT: 519 sc->iy_media = IFM_ETHER | IFM_10_2; 520 break; 521 case TPE_BIT: 522 sc->iy_media = IFM_ETHER | IFM_10_T; 523 break; 524 default: 525 sc->iy_media = IFM_ETHER | IFM_10_5; 526 } 527 528 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 529 #ifdef IYDEBUG 530 { 531 char sbuf[128]; 532 533 snprintb(sbuf, sizeof(sbuf), 534 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 535 temp); 536 printf("changed to %s\n", sbuf); 537 } 538 #endif 539 540 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 541 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 542 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 543 544 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 545 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 546 547 #ifdef IYDEBUG 548 { 549 char sbuf[128]; 550 551 snprintb(sbuf, sizeof(sbuf), 552 "\020\4bad_irq\010flash/boot present", temp); 553 554 printf("%s: int no was %s\n", device_xname(sc->sc_dev), sbuf); 555 556 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 557 snprintb(sbuf, sizeof(sbuf), 558 "\020\4bad_irq\010flash/boot present", temp); 559 printf("%s: int no now %s\n", device_xname(sc->sc_dev), sbuf); 560 } 561 #endif 562 563 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 564 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 565 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 566 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 567 568 temp = bus_space_read_1(iot, ioh, REG1); 569 #ifdef IYDEBUG 570 { 571 char sbuf[128]; 572 573 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 574 temp); 575 576 printf("%s: HW access is %s\n", device_xname(sc->sc_dev), sbuf); 577 } 578 #endif 579 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 580 581 #ifdef IYDEBUG 582 { 583 char sbuf[128]; 584 585 temp = bus_space_read_1(iot, ioh, REG1); 586 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 587 temp); 588 printf("%s: HW access is %s\n", device_xname(sc->sc_dev), sbuf); 589 } 590 #endif 591 592 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 593 594 bus_space_write_1(iot, ioh, INT_MASK_REG, 595 ALL_INTS & ~(RX_BIT | TX_BIT)); 596 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 597 598 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 599 600 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 601 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 602 sc->rx_start = 0; 603 604 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 605 delay(200); 606 607 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 608 609 sc->tx_start = sc->tx_end = sc->rx_size; 610 sc->tx_last = 0; 611 612 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 613 614 ifp->if_flags |= IFF_RUNNING; 615 ifp->if_flags &= ~IFF_OACTIVE; 616 } 617 618 void 619 iystart(struct ifnet *ifp) 620 { 621 struct iy_softc *sc; 622 623 624 struct mbuf *m0, *m; 625 u_int len, pad, last, end; 626 u_int llen, residual; 627 int avail; 628 char *data; 629 unsigned temp; 630 uint16_t resval, stat; 631 bus_space_tag_t iot; 632 bus_space_handle_t ioh; 633 634 #ifdef IYDEBUG 635 printf("iystart called\n"); 636 #endif 637 sc = ifp->if_softc; 638 639 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 640 return; 641 642 iy_intr_tx(sc); 643 644 iot = sc->sc_iot; 645 ioh = sc->sc_ioh; 646 647 for (;;) { 648 IFQ_POLL(&ifp->if_snd, m0); 649 if (m0 == NULL) 650 break; 651 #ifdef IYDEBUG 652 printf("%s: trying to write another packet to the hardware\n", 653 device_xname(sc->sc_dev)); 654 #endif 655 656 /* We need to use m->m_pkthdr.len, so require the header */ 657 if ((m0->m_flags & M_PKTHDR) == 0) 658 panic("iystart: no header mbuf"); 659 660 len = m0->m_pkthdr.len; 661 pad = len & 1; 662 663 #ifdef IYDEBUG 664 printf("%s: length is %d.\n", device_xname(sc->sc_dev), len); 665 #endif 666 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 667 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 668 } 669 670 if (len + pad > ETHER_MAX_LEN) { 671 /* packet is obviously too large: toss it */ 672 ++ifp->if_oerrors; 673 IFQ_DEQUEUE(&ifp->if_snd, m0); 674 m_freem(m0); 675 continue; 676 } 677 678 bpf_mtap(ifp, m0, BPF_D_OUT); 679 680 avail = sc->tx_start - sc->tx_end; 681 if (avail <= 0) 682 avail += sc->tx_size; 683 684 #ifdef IYDEBUG 685 printf("%s: avail is %d.\n", device_xname(sc->sc_dev), avail); 686 #endif 687 /* 688 * we MUST RUN at splnet here --- 689 * XXX todo: or even turn off the boards ints ??? hm... 690 */ 691 692 /* See if there is room to put another packet in the buffer. */ 693 694 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 695 #ifdef IYDEBUG 696 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 697 device_xname(sc->sc_dev), len, avail); 698 #endif 699 /* mark interface as full ... */ 700 ifp->if_flags |= IFF_OACTIVE; 701 702 /* and wait for any transmission result */ 703 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 704 705 temp = bus_space_read_1(iot, ioh, REG1); 706 bus_space_write_1(iot, ioh, REG1, 707 temp & ~XMT_CHAIN_INT); 708 709 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 710 711 return; 712 } 713 714 /* we know it fits in the hardware now, so dequeue it */ 715 IFQ_DEQUEUE(&ifp->if_snd, m0); 716 717 last = sc->tx_end; 718 end = last + pad + len + I595_XMT_HDRLEN; 719 720 if (end >= sc->sram) { 721 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 722 /* keep header in one piece */ 723 last = sc->rx_size; 724 end = last + pad + len + I595_XMT_HDRLEN; 725 } else 726 end -= sc->tx_size; 727 } 728 729 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 730 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 731 htole16(XMT_CMD)); 732 733 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 734 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 735 736 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 737 htole16(len + pad)); 738 739 residual = resval = 0; 740 741 while ((m = m0)!=0) { 742 data = mtod(m, void *); 743 llen = m->m_len; 744 if (residual) { 745 #ifdef IYDEBUG 746 printf("%s: merging residual with next mbuf.\n", 747 device_xname(sc->sc_dev)); 748 #endif 749 resval |= *data << 8; 750 bus_space_write_stream_2(iot, ioh, 751 MEM_PORT_REG, resval); 752 --llen; 753 ++data; 754 } 755 /* 756 * XXX ALIGNMENT LOSSAGE HERE. 757 */ 758 if (llen > 1) 759 bus_space_write_multi_stream_2(iot, ioh, 760 MEM_PORT_REG, (uint16_t *) data, 761 llen>>1); 762 residual = llen & 1; 763 if (residual) { 764 resval = *(data + llen - 1); 765 #ifdef IYDEBUG 766 printf("%s: got odd mbuf to send.\n", 767 device_xname(sc->sc_dev)); 768 #endif 769 } 770 771 m0 = m_free(m); 772 } 773 774 if (residual) 775 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 776 resval); 777 778 pad >>= 1; 779 while (pad-- > 0) 780 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 781 782 #ifdef IYDEBUG 783 printf("%s: new last = 0x%x, end = 0x%x.\n", 784 device_xname(sc->sc_dev), last, end); 785 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 786 device_xname(sc->sc_dev), sc->tx_start, sc->tx_end, 787 sc->tx_last); 788 #endif 789 790 if (sc->tx_start != sc->tx_end) { 791 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 792 sc->tx_last + XMT_COUNT); 793 794 /* 795 * XXX We keep stat in le order, to potentially save 796 * a byte swap. 797 */ 798 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 799 800 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 801 sc->tx_last + XMT_CHAIN); 802 803 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 804 htole16(last)); 805 806 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 807 stat | htole16(CHAIN)); 808 #ifdef IYDEBUG 809 printf("%s: setting 0x%x to 0x%x\n", 810 device_xname(sc->sc_dev), sc->tx_last + XMT_COUNT, 811 le16toh(stat) | CHAIN); 812 #endif 813 } 814 /* dummy read */ 815 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 816 817 /* XXX todo: enable ints here if disabled */ 818 819 ++ifp->if_opackets; 820 821 if (sc->tx_start == sc->tx_end) { 822 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 823 bus_space_write_1(iot, ioh, 0, XMT_CMD); 824 sc->tx_start = last; 825 #ifdef IYDEBUG 826 printf("%s: writing 0x%x to XAR and giving XCMD\n", 827 device_xname(sc->sc_dev), last); 828 #endif 829 } else { 830 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 831 #ifdef IYDEBUG 832 printf("%s: giving RESUME_XCMD\n", 833 device_xname(sc->sc_dev)); 834 #endif 835 } 836 sc->tx_last = last; 837 sc->tx_end = end; 838 } 839 /* and wait only for end of transmission chain */ 840 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 841 842 temp = bus_space_read_1(iot, ioh, REG1); 843 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 844 845 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 846 } 847 848 849 static inline void 850 eepromwritebit(bus_space_tag_t iot, bus_space_handle_t ioh, int what) 851 { 852 bus_space_write_1(iot, ioh, EEPROM_REG, what); 853 delay(1); 854 bus_space_write_1(iot, ioh, EEPROM_REG, what | EESK); 855 delay(1); 856 bus_space_write_1(iot, ioh, EEPROM_REG, what); 857 delay(1); 858 } 859 860 static inline int 861 eepromreadbit(bus_space_tag_t iot, bus_space_handle_t ioh) 862 { 863 int b; 864 865 bus_space_write_1(iot, ioh, EEPROM_REG, EECS | EESK); 866 delay(1); 867 b = bus_space_read_1(iot, ioh, EEPROM_REG); 868 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 869 delay(1); 870 871 return ((b & EEDO) != 0); 872 } 873 874 static uint16_t 875 eepromread(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 876 { 877 volatile int i; 878 volatile int j; 879 volatile uint16_t readval; 880 881 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 882 delay(1); 883 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 884 delay(1); 885 886 eepromwritebit(iot, ioh, EECS | EEDI); 887 eepromwritebit(iot, ioh, EECS | EEDI); 888 eepromwritebit(iot, ioh, EECS); 889 890 for (j=5; j>=0; --j) { 891 if ((offset>>j) & 1) 892 eepromwritebit(iot, ioh, EECS | EEDI); 893 else 894 eepromwritebit(iot, ioh, EECS); 895 } 896 897 for (readval=0, i=0; i<16; ++i) { 898 readval<<=1; 899 readval |= eepromreadbit(iot, ioh); 900 } 901 902 bus_space_write_1(iot, ioh, EEPROM_REG, 0 | EESK); 903 delay(1); 904 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 905 906 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 907 908 return readval; 909 } 910 911 /* 912 * Device timeout/watchdog routine. Entered if the device neglects to generate 913 * an interrupt after a transmit has been started on it. 914 */ 915 void 916 iywatchdog(struct ifnet *ifp) 917 { 918 struct iy_softc *sc = ifp->if_softc; 919 920 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 921 ++sc->sc_ethercom.ec_if.if_oerrors; 922 iyreset(sc); 923 } 924 925 /* 926 * What to do upon receipt of an interrupt. 927 */ 928 int 929 iyintr(void *arg) 930 { 931 struct iy_softc *sc; 932 struct ifnet *ifp; 933 bus_space_tag_t iot; 934 bus_space_handle_t ioh; 935 936 u_short status; 937 938 sc = arg; 939 iot = sc->sc_iot; 940 ioh = sc->sc_ioh; 941 942 ifp = &sc->sc_ethercom.ec_if; 943 944 status = bus_space_read_1(iot, ioh, STATUS_REG); 945 #ifdef IYDEBUG 946 if (status & ALL_INTS) { 947 char sbuf[128]; 948 949 snprintb(sbuf, sizeof(sbuf), "\020\1RX_STP\2RX\3TX\4EXEC", 950 status); 951 printf("%s: got interrupt %s", device_xname(sc->sc_dev), sbuf); 952 953 if (status & EXEC_INT) { 954 snprintb(sbuf, sizeof(sbuf), 955 "\020\6ABORT", bus_space_read_1(iot, ioh, 0)); 956 printf(" event %s\n", sbuf); 957 } else 958 printf("\n"); 959 } 960 #endif 961 if ((status & (RX_INT | TX_INT)) == 0) 962 return 0; 963 964 if (status & RX_INT) { 965 iy_intr_rx(sc); 966 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 967 } 968 if (status & TX_INT) { 969 /* Tell feeders we may be able to accept more data... */ 970 ifp->if_flags &= ~IFF_OACTIVE; 971 /* and get more data. */ 972 iystart(ifp); 973 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 974 } 975 976 rnd_add_uint32(&sc->rnd_source, status); 977 978 return 1; 979 } 980 981 void 982 iyget(struct iy_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh, 983 int rxlen) 984 { 985 struct mbuf *m, *top, **mp; 986 struct ifnet *ifp; 987 int len; 988 989 ifp = &sc->sc_ethercom.ec_if; 990 991 MGETHDR(m, M_DONTWAIT, MT_DATA); 992 if (m == 0) 993 goto dropped; 994 m_set_rcvif(m, ifp); 995 m->m_pkthdr.len = rxlen; 996 len = MHLEN; 997 top = 0; 998 mp = ⊤ 999 1000 while (rxlen > 0) { 1001 if (top) { 1002 MGET(m, M_DONTWAIT, MT_DATA); 1003 if (m == 0) { 1004 m_freem(top); 1005 goto dropped; 1006 } 1007 len = MLEN; 1008 } 1009 if (rxlen >= MINCLSIZE) { 1010 MCLGET(m, M_DONTWAIT); 1011 if ((m->m_flags & M_EXT) == 0) { 1012 m_free(m); 1013 m_freem(top); 1014 goto dropped; 1015 } 1016 len = MCLBYTES; 1017 } 1018 len = uimin(rxlen, len); 1019 /* 1020 * XXX ALIGNMENT LOSSAGE HERE. 1021 */ 1022 if (len > 1) { 1023 len &= ~1; 1024 1025 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1026 mtod(m, uint16_t *), len / 2); 1027 } else { 1028 #ifdef IYDEBUG 1029 printf("%s: received odd mbuf\n", 1030 device_xname(sc->sc_dev)); 1031 #endif 1032 *(mtod(m, char *)) = bus_space_read_stream_2(iot, ioh, 1033 MEM_PORT_REG); 1034 } 1035 m->m_len = len; 1036 rxlen -= len; 1037 *mp = m; 1038 mp = &m->m_next; 1039 } 1040 1041 if (top == NULL) 1042 return; 1043 1044 if_percpuq_enqueue(ifp->if_percpuq, top); 1045 return; 1046 1047 dropped: 1048 ++ifp->if_ierrors; 1049 return; 1050 } 1051 1052 void 1053 iy_intr_rx(struct iy_softc *sc) 1054 { 1055 bus_space_tag_t iot; 1056 bus_space_handle_t ioh; 1057 1058 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1059 1060 iot = sc->sc_iot; 1061 ioh = sc->sc_ioh; 1062 1063 rxadrs = sc->rx_start; 1064 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1065 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1066 rxnext = 0; 1067 1068 while (rxevnt == RCV_DONE) { 1069 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1070 MEM_PORT_REG)); 1071 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1072 MEM_PORT_REG)); 1073 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1074 MEM_PORT_REG)); 1075 #ifdef IYDEBUG 1076 { 1077 char sbuf[128]; 1078 1079 snprintb(sbuf, sizeof(sbuf), 1080 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1081 "\014CRCERR\015LENERR\016RCVOK\020TYP", rxstatus); 1082 1083 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1084 device_xname(sc->sc_dev), rxadrs, sbuf, rxnext, 1085 rxlen); 1086 } 1087 #else 1088 __USE(rxstatus); 1089 #endif 1090 iyget(sc, iot, ioh, rxlen); 1091 1092 /* move stop address */ 1093 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1094 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1095 1096 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1097 rxadrs = rxnext; 1098 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1099 MEM_PORT_REG)); 1100 } 1101 sc->rx_start = rxnext; 1102 } 1103 1104 void 1105 iy_intr_tx(struct iy_softc *sc) 1106 { 1107 bus_space_tag_t iot; 1108 bus_space_handle_t ioh; 1109 struct ifnet *ifp; 1110 u_int txstatus, txstat2, txlen, txnext; 1111 1112 ifp = &sc->sc_ethercom.ec_if; 1113 iot = sc->sc_iot; 1114 ioh = sc->sc_ioh; 1115 1116 while (sc->tx_start != sc->tx_end) { 1117 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1118 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1119 MEM_PORT_REG)); 1120 1121 if ((txstatus & (TX_DONE | CMD_MASK)) != (TX_DONE | XMT_CMD)) 1122 break; 1123 1124 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1125 MEM_PORT_REG)); 1126 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1127 MEM_PORT_REG)); 1128 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1129 MEM_PORT_REG)); 1130 #ifdef IYDEBUG 1131 { 1132 char sbuf[128]; 1133 1134 snprintb(sbuf, sizeof(sbuf), 1135 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1136 "\011UND_RUN\012JERR\013LST_CRS" 1137 "\014LTCOL\016TX_OK\020COLL", txstat2); 1138 1139 printf("txstat 0x%x stat2 %s next 0x%x len 0x%x\n", 1140 txstatus, sbuf, txnext, txlen); 1141 } 1142 #endif 1143 if (txlen & CHAIN) 1144 sc->tx_start = txnext; 1145 else 1146 sc->tx_start = sc->tx_end; 1147 ifp->if_flags &= ~IFF_OACTIVE; 1148 1149 if (txstat2 & 0x0020) 1150 ifp->if_collisions += 16; 1151 else 1152 ifp->if_collisions += txstat2 & 0x000f; 1153 1154 if ((txstat2 & 0x2000) == 0) 1155 ++ifp->if_oerrors; 1156 } 1157 } 1158 1159 int 1160 iyioctl(struct ifnet *ifp, u_long cmd, void *data) 1161 { 1162 struct iy_softc *sc; 1163 struct ifaddr *ifa; 1164 struct ifreq *ifr; 1165 int s, error = 0; 1166 1167 sc = ifp->if_softc; 1168 ifa = (struct ifaddr *)data; 1169 ifr = (struct ifreq *)data; 1170 1171 #ifdef IYDEBUG 1172 printf("iyioctl called with ifp %p (%s) cmd 0x%lx data %p\n", 1173 ifp, ifp->if_xname, cmd, data); 1174 #endif 1175 1176 s = splnet(); 1177 1178 switch (cmd) { 1179 1180 case SIOCINITIFADDR: 1181 ifp->if_flags |= IFF_UP; 1182 1183 iyinit(sc); 1184 switch (ifa->ifa_addr->sa_family) { 1185 #ifdef INET 1186 case AF_INET: 1187 arp_ifinit(ifp, ifa); 1188 break; 1189 #endif 1190 default: 1191 break; 1192 } 1193 break; 1194 1195 case SIOCSIFFLAGS: 1196 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1197 break; 1198 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1199 /* XXX re-use ether_ioctl() */ 1200 switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { 1201 case IFF_RUNNING: 1202 /* 1203 * If interface is marked down and it is running, then 1204 * stop it. 1205 */ 1206 iystop(sc); 1207 ifp->if_flags &= ~IFF_RUNNING; 1208 break; 1209 case IFF_UP: 1210 /* 1211 * If interface is marked up and it is stopped, then 1212 * start it. 1213 */ 1214 iyinit(sc); 1215 break; 1216 default: 1217 /* 1218 * Reset the interface to pick up changes in any other 1219 * flags that affect hardware registers. 1220 */ 1221 iystop(sc); 1222 iyinit(sc); 1223 break; 1224 } 1225 #ifdef IYDEBUGX 1226 if (ifp->if_flags & IFF_DEBUG) 1227 sc->sc_debug = IFY_ALL; 1228 else 1229 sc->sc_debug = 0; 1230 #endif 1231 break; 1232 1233 case SIOCADDMULTI: 1234 case SIOCDELMULTI: 1235 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1236 /* 1237 * Multicast list has changed; set the hardware filter 1238 * accordingly. 1239 */ 1240 if (ifp->if_flags & IFF_RUNNING) { 1241 /* XXX can't make it work otherwise */ 1242 iyreset(sc); 1243 iy_mc_reset(sc); 1244 } 1245 error = 0; 1246 } 1247 break; 1248 1249 case SIOCSIFMEDIA: 1250 case SIOCGIFMEDIA: 1251 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1252 break; 1253 default: 1254 error = ether_ioctl(ifp, cmd, data); 1255 } 1256 splx(s); 1257 return error; 1258 } 1259 1260 int 1261 iy_mediachange(struct ifnet *ifp) 1262 { 1263 struct iy_softc *sc = ifp->if_softc; 1264 1265 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1266 return EINVAL; 1267 switch (IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1268 case IFM_10_5: 1269 case IFM_10_2: 1270 case IFM_10_T: 1271 case IFM_AUTO: 1272 iystop(sc); 1273 iyinit(sc); 1274 return 0; 1275 default: 1276 return EINVAL; 1277 } 1278 } 1279 1280 void 1281 iy_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 1282 { 1283 struct iy_softc *sc = ifp->if_softc; 1284 1285 ifmr->ifm_active = sc->iy_media; 1286 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1287 } 1288 1289 1290 static void 1291 iy_mc_setup(struct iy_softc *sc) 1292 { 1293 struct ether_multi *enm; 1294 struct ether_multistep step; 1295 struct ethercom *ecp; 1296 struct ifnet *ifp; 1297 bus_space_tag_t iot; 1298 bus_space_handle_t ioh; 1299 int avail, last /*, end*/ , len; 1300 int timeout; 1301 volatile uint16_t dum; 1302 uint8_t temp; 1303 1304 1305 ecp = &sc->sc_ethercom; 1306 ifp = &ecp->ec_if; 1307 1308 iot = sc->sc_iot; 1309 ioh = sc->sc_ioh; 1310 1311 len = 6 * ecp->ec_multicnt; 1312 1313 avail = sc->tx_start - sc->tx_end; 1314 if (avail <= 0) 1315 avail += sc->tx_size; 1316 if (ifp->if_flags & IFF_DEBUG) 1317 printf("%s: iy_mc_setup called, %d addresses, " 1318 "%d/%d bytes needed/avail\n", ifp->if_xname, 1319 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1320 1321 last = sc->rx_size; 1322 1323 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1324 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1325 /* XXX VOODOO */ 1326 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1327 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1328 /* XXX END OF VOODOO */ 1329 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1330 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1331 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1332 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1333 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1334 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1335 1336 ETHER_FIRST_MULTI(step, ecp, enm); 1337 while (enm) { 1338 /* 1339 * XXX ALIGNMENT LOSSAGE HERE? 1340 */ 1341 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1342 (uint16_t *) enm->enm_addrlo, 3); 1343 1344 ETHER_NEXT_MULTI(step, enm); 1345 } 1346 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1347 __USE(dum); 1348 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1349 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1350 1351 1352 sc->tx_start = sc->rx_size; 1353 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1354 1355 for (timeout=0; timeout<100; timeout++) { 1356 DELAY(2); 1357 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1358 continue; 1359 1360 temp = bus_space_read_1(iot, ioh, 0); 1361 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1362 #ifdef DIAGNOSTIC 1363 if (temp & 0x20) { 1364 aprint_error_dev(sc->sc_dev, 1365 "mc setup failed, %d usec\n", timeout * 2); 1366 } else if (((temp & 0x0f) == 0x03) && 1367 (ifp->if_flags & IFF_DEBUG)) { 1368 printf("%s: mc setup done, %d usec\n", 1369 device_xname(sc->sc_dev), timeout * 2); 1370 } 1371 #endif 1372 break; 1373 } 1374 sc->tx_start = sc->tx_end; 1375 ifp->if_flags &= ~IFF_OACTIVE; 1376 1377 } 1378 1379 static void 1380 iy_mc_reset(struct iy_softc *sc) 1381 { 1382 struct ether_multi *enm; 1383 struct ether_multistep step; 1384 struct ethercom *ecp; 1385 struct ifnet *ifp; 1386 bus_space_tag_t iot; 1387 bus_space_handle_t ioh; 1388 uint16_t temp; 1389 1390 ecp = &sc->sc_ethercom; 1391 ifp = &ecp->ec_if; 1392 1393 iot = sc->sc_iot; 1394 ioh = sc->sc_ioh; 1395 1396 if (ecp->ec_multicnt > 63) { 1397 ifp->if_flags |= IFF_ALLMULTI; 1398 1399 } else if (ecp->ec_multicnt > 0) { 1400 /* 1401 * Step through the list of addresses. 1402 */ 1403 ETHER_FIRST_MULTI(step, ecp, enm); 1404 while (enm) { 1405 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1406 ifp->if_flags |= IFF_ALLMULTI; 1407 goto setupmulti; 1408 } 1409 ETHER_NEXT_MULTI(step, enm); 1410 } 1411 /* OK, we really need to do it now: */ 1412 #if 0 1413 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1414 != IFF_RUNNING) { 1415 ifp->if_flags |= IFF_OACTIVE; 1416 sc->want_mc_setup = 1; 1417 return; 1418 } 1419 #endif 1420 iy_mc_setup(sc); 1421 } else { 1422 ifp->if_flags &= ~IFF_ALLMULTI; 1423 } 1424 1425 setupmulti: 1426 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1427 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) 1428 temp = MATCH_ALL; 1429 else 1430 temp = MATCH_BRDCST; 1431 1432 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1433 /* XXX VOODOO */ 1434 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1435 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1436 /* XXX END OF VOODOO */ 1437 1438 /* XXX TBD: setup hardware for all multicasts */ 1439 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1440 return; 1441 } 1442 1443 #ifdef IYDEBUGX 1444 void 1445 print_rbd(volatile struct ie_recv_buf_desc *rbd) 1446 { 1447 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1448 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1449 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1450 rbd->mbz); 1451 } 1452 #endif 1453 1454 void 1455 iyprobemem(struct iy_softc *sc) 1456 { 1457 bus_space_tag_t iot; 1458 bus_space_handle_t ioh; 1459 int testing; 1460 1461 iot = sc->sc_iot; 1462 ioh = sc->sc_ioh; 1463 1464 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1465 delay(1); 1466 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1467 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1468 1469 for (testing=65536; testing >= 4096; testing >>= 1) { 1470 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1471 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1472 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1473 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1474 #ifdef IYMEMDEBUG 1475 printf("%s: Didn't keep 0xdead at 0x%x\n", 1476 device_xname(sc->sc_dev), testing-2); 1477 #endif 1478 continue; 1479 } 1480 1481 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1482 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1483 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1484 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1485 #ifdef IYMEMDEBUG 1486 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1487 device_xname(sc->sc_dev), testing-2); 1488 #endif 1489 continue; 1490 } 1491 1492 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1493 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1494 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1495 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1496 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1497 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1498 #ifdef IYMEMDEBUG 1499 printf("%s: 0x%x alias of 0x0\n", 1500 device_xname(sc->sc_dev), testing >> 1); 1501 #endif 1502 continue; 1503 } 1504 1505 break; 1506 } 1507 1508 sc->sram = testing; 1509 1510 switch (testing) { 1511 case 65536: 1512 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1513 sc->rx_size = 44*1024; 1514 break; 1515 1516 case 32768: 1517 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1518 sc->rx_size = 22*1024; 1519 break; 1520 1521 case 16384: 1522 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1523 sc->rx_size = 10*1024; 1524 break; 1525 default: 1526 sc->rx_size = testing/2; 1527 break; 1528 } 1529 sc->tx_size = testing - sc->rx_size; 1530 } 1531 1532 static int 1533 eepromreadall(bus_space_tag_t iot, bus_space_handle_t ioh, uint16_t *wordp, 1534 int maxi) 1535 { 1536 int i; 1537 uint16_t checksum, tmp; 1538 1539 checksum = 0; 1540 1541 for (i=0; i<EEPP_LENGTH; ++i) { 1542 tmp = eepromread(iot, ioh, i); 1543 checksum += tmp; 1544 if (i<maxi) 1545 wordp[i] = tmp; 1546 } 1547 1548 if (checksum != EEPP_CHKSUM) { 1549 #ifdef IYDEBUG 1550 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1551 checksum, EEPP_CHKSUM); 1552 #endif 1553 return 1; 1554 } 1555 return 0; 1556 } 1557
Indexes created Thu Sep 25 06:09:39 GMT 2025