if_iy.c revision 1.14
1 /* $NetBSD: if_iy.c,v 1.14 1997/10/15 06:00:26 explorer Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/buf.h> 43 #include <sys/protosw.h> 44 #include <sys/socket.h> 45 #include <sys/ioctl.h> 46 #include <sys/errno.h> 47 #include <sys/syslog.h> 48 #include <sys/device.h> 49 #if NRND > 0 50 #include <sys/rnd.h> 51 #endif 52 53 #include <net/if.h> 54 #include <net/if_types.h> 55 #include <net/if_dl.h> 56 57 #include <net/if_ether.h> 58 59 #if NBPFILTER > 0 60 #include <net/bpf.h> 61 #include <net/bpfdesc.h> 62 #endif 63 64 #ifdef INET 65 #include <netinet/in.h> 66 #include <netinet/in_systm.h> 67 #include <netinet/in_var.h> 68 #include <netinet/ip.h> 69 #include <netinet/if_inarp.h> 70 #endif 71 72 #ifdef NS 73 #include <netns/ns.h> 74 #include <netns/ns_if.h> 75 #endif 76 77 #include <vm/vm.h> 78 79 #include <machine/cpu.h> 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/isa/isareg.h> 84 #include <dev/isa/isavar.h> 85 #include <dev/ic/i82595reg.h> 86 87 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 88 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 89 90 /* 91 * Ethernet status, per interface. 92 */ 93 struct iy_softc { 94 struct device sc_dev; 95 void *sc_ih; 96 97 bus_space_tag_t sc_iot; 98 bus_space_handle_t sc_ioh; 99 100 struct ethercom sc_ethercom; 101 102 int mappedirq; 103 104 int hard_vers; 105 106 int promisc; 107 108 int sram, tx_size, rx_size; 109 110 int tx_start, tx_end, tx_last; 111 int rx_start; 112 113 #ifdef IYDEBUG 114 int sc_debug; 115 #endif 116 117 #if NRND > 0 118 rndsource_element_t rnd_source; 119 #endif 120 }; 121 122 void iywatchdog __P((struct ifnet *)); 123 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 124 int iyintr __P((void *)); 125 void iyinit __P((struct iy_softc *)); 126 void iystop __P((struct iy_softc *)); 127 void iystart __P((struct ifnet *)); 128 129 void iy_intr_rx __P((struct iy_softc *)); 130 void iy_intr_tx __P((struct iy_softc *)); 131 132 void iyreset __P((struct iy_softc *)); 133 void iy_readframe __P((struct iy_softc *, int)); 134 void iy_drop_packet_buffer __P((struct iy_softc *)); 135 void iy_find_mem_size __P((struct iy_softc *)); 136 void iyrint __P((struct iy_softc *)); 137 void iytint __P((struct iy_softc *)); 138 void iyxmit __P((struct iy_softc *)); 139 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 140 void iyprobemem __P((struct iy_softc *)); 141 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 142 int)); 143 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 144 /* 145 * void iymeminit __P((void *, struct iy_softc *)); 146 * static int iy_mc_setup __P((struct iy_softc *, void *)); 147 * static void iy_mc_reset __P((struct iy_softc *)); 148 */ 149 #ifdef IYDEBUGX 150 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 151 152 int in_ifrint = 0; 153 int in_iftint = 0; 154 #endif 155 156 int iyprobe __P((struct device *, void *, void *)); 157 void iyattach __P((struct device *, struct device *, void *)); 158 159 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 160 161 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 162 int)); 163 164 struct cfattach iy_ca = { 165 sizeof(struct iy_softc), iyprobe, iyattach 166 }; 167 168 struct cfdriver iy_cd = { 169 NULL, "iy", DV_IFNET 170 }; 171 172 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 173 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 174 175 int 176 iyprobe(parent, match, aux) 177 struct device *parent; 178 void *match, *aux; 179 { 180 struct isa_attach_args *ia = aux; 181 u_int16_t eaddr[8]; 182 183 bus_space_tag_t iot; 184 bus_space_handle_t ioh; 185 186 u_int8_t c, d; 187 188 iot = ia->ia_iot; 189 190 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 191 return 0; 192 193 /* try to find the round robin sig: */ 194 195 c = bus_space_read_1(iot, ioh, ID_REG); 196 if ((c & ID_REG_MASK) != ID_REG_SIG) 197 goto out; 198 199 d = bus_space_read_1(iot, ioh, ID_REG); 200 if ((d & ID_REG_MASK) != ID_REG_SIG) 201 goto out; 202 203 if (((d-c) & R_ROBIN_BITS) != 0x40) 204 goto out; 205 206 d = bus_space_read_1(iot, ioh, ID_REG); 207 if ((d & ID_REG_MASK) != ID_REG_SIG) 208 goto out; 209 210 if (((d-c) & R_ROBIN_BITS) != 0x80) 211 goto out; 212 213 d = bus_space_read_1(iot, ioh, ID_REG); 214 if ((d & ID_REG_MASK) != ID_REG_SIG) 215 goto out; 216 217 if (((d-c) & R_ROBIN_BITS) != 0xC0) 218 goto out; 219 220 d = bus_space_read_1(iot, ioh, ID_REG); 221 if ((d & ID_REG_MASK) != ID_REG_SIG) 222 goto out; 223 224 if (((d-c) & R_ROBIN_BITS) != 0x00) 225 goto out; 226 227 #ifdef IYDEBUG 228 printf("iyprobe verified working ID reg.\n"); 229 #endif 230 231 if (eepromreadall(iot, ioh, eaddr, 8)) 232 goto out; 233 234 if (ia->ia_irq == IRQUNK) 235 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 236 237 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 238 goto out; 239 240 if (eepro_revirqmap[ia->ia_irq] == 0xff) 241 goto out; 242 243 /* now lets reset the chip */ 244 245 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 246 delay(200); 247 248 ia->ia_iosize = 16; 249 250 bus_space_unmap(iot, ioh, 16); 251 return 1; /* found */ 252 out: 253 bus_space_unmap(iot, ioh, 16); 254 return 0; 255 } 256 257 void 258 iyattach(parent, self, aux) 259 struct device *parent, *self; 260 void *aux; 261 { 262 struct iy_softc *sc = (void *)self; 263 struct isa_attach_args *ia = aux; 264 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 265 bus_space_tag_t iot; 266 bus_space_handle_t ioh; 267 unsigned temp; 268 u_int16_t eaddr[8]; 269 u_int8_t myaddr[ETHER_ADDR_LEN]; 270 int eirq; 271 272 iot = ia->ia_iot; 273 274 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 275 panic("Can't bus_space_map in iyattach"); 276 277 sc->sc_iot = iot; 278 sc->sc_ioh = ioh; 279 280 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 281 282 /* now let's reset the chip */ 283 284 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 285 delay(200); 286 287 iyprobemem(sc); 288 289 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 290 ifp->if_softc = sc; 291 ifp->if_start = iystart; 292 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS; 293 /* XXX todo: | IFF_MULTICAST */ 294 295 ifp->if_ioctl = iyioctl; 296 ifp->if_watchdog = iywatchdog; 297 298 (void)eepromreadall(iot, ioh, eaddr, 8); 299 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 300 301 #ifdef DIAGNOSTICS 302 if ((eaddr[EEPPEther0] != 303 eepromread(iot, ioh, EEPPEther0a)) && 304 (eaddr[EEPPEther1] != 305 eepromread(iot, ioh, EEPPEther1a)) && 306 (eaddr[EEPPEther2] != 307 eepromread(iot, ioh, EEPPEther2a))) 308 309 printf("EEPROM Ethernet address differs from copy\n"); 310 #endif 311 312 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 313 myaddr[0] = eaddr[EEPPEther0] >> 8; 314 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 315 myaddr[2] = eaddr[EEPPEther1] >> 8; 316 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 317 myaddr[4] = eaddr[EEPPEther2] >> 8; 318 319 /* Attach the interface. */ 320 if_attach(ifp); 321 ether_ifattach(ifp, myaddr); 322 printf(": address %s, rev. %d, %d kB\n", 323 ether_sprintf(myaddr), 324 sc->hard_vers, sc->sram/1024); 325 326 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 327 if (eirq != ia->ia_irq) 328 printf("%s: EEPROM irq setting %d ignored\n", 329 sc->sc_dev.dv_xname, eirq); 330 331 #if NBPFILTER > 0 332 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 333 #endif 334 335 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 336 IPL_NET, iyintr, sc); 337 338 #if NRND > 0 339 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET); 340 #endif 341 342 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 343 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 344 } 345 346 void 347 iystop(sc) 348 struct iy_softc *sc; 349 { 350 bus_space_tag_t iot; 351 bus_space_handle_t ioh; 352 #ifdef IYDEBUG 353 u_int p, v; 354 #endif 355 356 iot = sc->sc_iot; 357 ioh = sc->sc_ioh; 358 359 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 360 361 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 362 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 363 364 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 365 delay(200); 366 #ifdef IYDEBUG 367 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 368 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 369 p = sc->tx_last; 370 if (!p) 371 p = sc->tx_start; 372 do { 373 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 374 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 375 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 376 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 377 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 378 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 379 printf(" 0x%04x", p); 380 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 381 printf(" 0x%b\n", v, "\020\020Ch"); 382 383 } while (v & 0x8000); 384 #endif 385 sc->tx_start = sc->tx_end = sc->rx_size; 386 sc->tx_last = 0; 387 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 388 } 389 390 void 391 iyreset(sc) 392 struct iy_softc *sc; 393 { 394 int s; 395 s = splimp(); 396 iystop(sc); 397 iyinit(sc); 398 splx(s); 399 } 400 401 void 402 iyinit(sc) 403 struct iy_softc *sc; 404 { 405 int i; 406 unsigned temp; 407 struct ifnet *ifp; 408 bus_space_tag_t iot; 409 bus_space_handle_t ioh; 410 411 iot = sc->sc_iot; 412 ioh = sc->sc_ioh; 413 414 ifp = &sc->sc_ethercom.ec_if; 415 #ifdef IYDEBUG 416 printf("ifp is %p\n", ifp); 417 #endif 418 419 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 420 421 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 422 if (temp & 0x10) 423 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 424 425 for (i=0; i<6; ++i) { 426 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 427 } 428 429 temp = bus_space_read_1(iot, ioh, REG1); 430 bus_space_write_1(iot, ioh, REG1, 431 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 432 433 temp = bus_space_read_1(iot, ioh, RECV_MODES_REG); 434 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp | MATCH_BRDCST); 435 #ifdef IYDEBUG 436 printf("%s: RECV_MODES were %b set to %b\n", 437 sc->sc_dev.dv_xname, 438 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 439 temp|MATCH_BRDCST, 440 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 441 #endif 442 443 444 delay(500000); /* for the hardware to test for the connector */ 445 446 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 447 #ifdef IYDEBUG 448 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 449 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 450 #endif 451 temp = (temp & TEST_MODE_MASK); 452 453 switch(ifp->if_flags & (IFF_LINK0 | IFF_LINK1)) { 454 case IFF_LINK0: 455 temp &= ~ (BNC_BIT | TPE_BIT); 456 break; 457 458 case IFF_LINK1: 459 temp = (temp & ~TPE_BIT) | BNC_BIT; 460 break; 461 462 case IFF_LINK0|IFF_LINK1: 463 temp = (temp & ~BNC_BIT) | TPE_BIT; 464 break; 465 default: 466 /* nothing; leave as it is */ 467 } 468 469 470 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 471 #ifdef IYDEBUG 472 printf("changed to 0x%b\n", 473 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 474 #endif 475 476 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 477 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 478 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 479 480 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 481 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 482 483 #ifdef IYDEBUG 484 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 485 temp, "\020\4bad_irq\010flash/boot present"); 486 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 487 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 488 temp, "\020\4BAD IRQ\010flash/boot present"); 489 #endif 490 491 492 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 493 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 494 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 495 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 496 497 temp = bus_space_read_1(iot, ioh, REG1); 498 #ifdef IYDEBUG 499 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 500 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 501 #endif 502 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 503 504 #ifdef IYDEBUG 505 temp = bus_space_read_1(iot, ioh, REG1); 506 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 507 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 508 #endif 509 510 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 511 512 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 513 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 514 515 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 516 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 517 sc->rx_start = 0; 518 519 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 520 delay(200); 521 522 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 523 524 sc->tx_start = sc->tx_end = sc->rx_size; 525 sc->tx_last = 0; 526 527 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 528 529 ifp->if_flags |= IFF_RUNNING; 530 ifp->if_flags &= ~IFF_OACTIVE; 531 } 532 533 void 534 iystart(ifp) 535 struct ifnet *ifp; 536 { 537 struct iy_softc *sc; 538 539 540 struct mbuf *m0, *m; 541 u_int len, pad, last, end; 542 u_int llen, residual; 543 int avail; 544 caddr_t data; 545 u_int16_t resval, stat; 546 bus_space_tag_t iot; 547 bus_space_handle_t ioh; 548 549 #ifdef IYDEBUG 550 printf("iystart called\n"); 551 #endif 552 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 553 return; 554 555 sc = ifp->if_softc; 556 iot = sc->sc_iot; 557 ioh = sc->sc_ioh; 558 559 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 560 #ifdef IYDEBUG 561 printf("%s: trying to write another packet to the hardware\n", 562 sc->sc_dev.dv_xname); 563 #endif 564 565 /* We need to use m->m_pkthdr.len, so require the header */ 566 if ((m0->m_flags & M_PKTHDR) == 0) 567 panic("iystart: no header mbuf"); 568 569 len = m0->m_pkthdr.len; 570 pad = len & 1; 571 572 #ifdef IYDEBUG 573 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 574 #endif 575 if (len < ETHER_MIN_LEN) { 576 pad = ETHER_MIN_LEN - len; 577 } 578 579 if (len + pad > ETHER_MAX_LEN) { 580 /* packet is obviously too large: toss it */ 581 ++ifp->if_oerrors; 582 IF_DEQUEUE(&ifp->if_snd, m0); 583 m_freem(m0); 584 continue; 585 } 586 587 #if NBPFILTER > 0 588 if (ifp->if_bpf) 589 bpf_mtap(ifp->if_bpf, m0); 590 #endif 591 592 avail = sc->tx_start - sc->tx_end; 593 if (avail <= 0) 594 avail += sc->tx_size; 595 596 #ifdef IYDEBUG 597 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 598 #endif 599 /* 600 * we MUST RUN at splnet here --- 601 * XXX todo: or even turn off the boards ints ??? hm... 602 */ 603 604 /* See if there is room to put another packet in the buffer. */ 605 606 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 607 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 608 sc->sc_dev.dv_xname, len, avail); 609 ifp->if_flags |= IFF_OACTIVE; 610 return; 611 } 612 613 /* we know it fits in the hardware now, so dequeue it */ 614 IF_DEQUEUE(&ifp->if_snd, m0); 615 616 last = sc->tx_end; 617 end = last + pad + len + I595_XMT_HDRLEN; 618 619 if (end >= sc->sram) { 620 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 621 /* keep header in one piece */ 622 last = sc->rx_size; 623 end = last + pad + len + I595_XMT_HDRLEN; 624 } else 625 end -= sc->tx_size; 626 } 627 628 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 629 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 630 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 631 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 632 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 633 634 residual = resval = 0; 635 636 while ((m = m0)!=0) { 637 data = mtod(m, caddr_t); 638 llen = m->m_len; 639 if (residual) { 640 #ifdef IYDEBUG 641 printf("%s: merging residual with next mbuf.\n", 642 sc->sc_dev.dv_xname); 643 #endif 644 resval |= *data << 8; 645 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 646 --llen; 647 ++data; 648 } 649 if (llen > 1) 650 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 651 data, llen>>1); 652 residual = llen & 1; 653 if (residual) { 654 resval = *(data + llen - 1); 655 #ifdef IYDEBUG 656 printf("%s: got odd mbuf to send.\n", 657 sc->sc_dev.dv_xname); 658 #endif 659 } 660 661 MFREE(m, m0); 662 } 663 664 if (residual) 665 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 666 667 pad >>= 1; 668 while (pad-- > 0) 669 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 670 671 #ifdef IYDEBUG 672 printf("%s: new last = 0x%x, end = 0x%x.\n", 673 sc->sc_dev.dv_xname, last, end); 674 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 675 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 676 #endif 677 678 if (sc->tx_start != sc->tx_end) { 679 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 680 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 681 682 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 683 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 684 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 685 #ifdef IYDEBUG 686 printf("%s: setting 0x%x to 0x%x\n", 687 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 688 stat | CHAIN); 689 #endif 690 } 691 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 692 693 /* XXX todo: enable ints here if disabled */ 694 695 ++ifp->if_opackets; 696 697 if (sc->tx_start == sc->tx_end) { 698 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 699 bus_space_write_1(iot, ioh, 0, XMT_CMD); 700 sc->tx_start = last; 701 #ifdef IYDEBUG 702 printf("%s: writing 0x%x to XAR and giving XCMD\n", 703 sc->sc_dev.dv_xname, last); 704 #endif 705 } else { 706 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 707 #ifdef IYDEBUG 708 printf("%s: giving RESUME_XCMD\n", 709 sc->sc_dev.dv_xname); 710 #endif 711 } 712 sc->tx_last = last; 713 sc->tx_end = end; 714 } 715 } 716 717 718 static __inline void 719 eepromwritebit(iot, ioh, what) 720 bus_space_tag_t iot; 721 bus_space_handle_t ioh; 722 int what; 723 { 724 bus_space_write_1(iot, ioh, EEPROM_REG, what); 725 delay(1); 726 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 727 delay(1); 728 bus_space_write_1(iot, ioh, EEPROM_REG, what); 729 delay(1); 730 } 731 732 static __inline int 733 eepromreadbit(iot, ioh) 734 bus_space_tag_t iot; 735 bus_space_handle_t ioh; 736 { 737 int b; 738 739 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 740 delay(1); 741 b = bus_space_read_1(iot, ioh, EEPROM_REG); 742 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 743 delay(1); 744 745 return ((b & EEDO) != 0); 746 } 747 748 static u_int16_t 749 eepromread(iot, ioh, offset) 750 bus_space_tag_t iot; 751 bus_space_handle_t ioh; 752 int offset; 753 { 754 volatile int i; 755 volatile int j; 756 volatile u_int16_t readval; 757 758 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 759 delay(1); 760 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 761 delay(1); 762 763 eepromwritebit(iot, ioh, EECS|EEDI); 764 eepromwritebit(iot, ioh, EECS|EEDI); 765 eepromwritebit(iot, ioh, EECS); 766 767 for (j=5; j>=0; --j) { 768 if ((offset>>j) & 1) 769 eepromwritebit(iot, ioh, EECS|EEDI); 770 else 771 eepromwritebit(iot, ioh, EECS); 772 } 773 774 for (readval=0, i=0; i<16; ++i) { 775 readval<<=1; 776 readval |= eepromreadbit(iot, ioh); 777 } 778 779 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 780 delay(1); 781 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 782 783 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 784 785 return readval; 786 } 787 788 /* 789 * Device timeout/watchdog routine. Entered if the device neglects to generate 790 * an interrupt after a transmit has been started on it. 791 */ 792 void 793 iywatchdog(ifp) 794 struct ifnet *ifp; 795 { 796 struct iy_softc *sc = ifp->if_softc; 797 798 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 799 ++sc->sc_ethercom.ec_if.if_oerrors; 800 iyreset(sc); 801 } 802 803 /* 804 * What to do upon receipt of an interrupt. 805 */ 806 int 807 iyintr(arg) 808 void *arg; 809 { 810 struct iy_softc *sc = arg; 811 bus_space_tag_t iot; 812 bus_space_handle_t ioh; 813 814 register u_short status; 815 816 iot = sc->sc_iot; 817 ioh = sc->sc_ioh; 818 819 status = bus_space_read_1(iot, ioh, STATUS_REG); 820 #ifdef IYDEBUG 821 if (status & ALL_INTS) { 822 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 823 "\020\1RX_STP\2RX\3TX\4EXEC"); 824 if (status & EXEC_INT) 825 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 826 "\020\6ABORT"); 827 else 828 printf("\n"); 829 } 830 #endif 831 if (((status & (RX_INT | TX_INT)) == 0)) 832 return 0; 833 834 if (status & RX_INT) { 835 iy_intr_rx(sc); 836 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 837 } else if (status & TX_INT) { 838 iy_intr_tx(sc); 839 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 840 } 841 842 #if NRND > 0 843 rnd_add_uint32(&sc->rnd_source, status); 844 #endif 845 846 return 1; 847 } 848 849 void 850 iyget(sc, iot, ioh, rxlen) 851 struct iy_softc *sc; 852 bus_space_tag_t iot; 853 bus_space_handle_t ioh; 854 int rxlen; 855 { 856 struct mbuf *m, *top, **mp; 857 struct ether_header *eh; 858 struct ifnet *ifp; 859 int len; 860 861 ifp = &sc->sc_ethercom.ec_if; 862 863 MGETHDR(m, M_DONTWAIT, MT_DATA); 864 if (m == 0) 865 goto dropped; 866 m->m_pkthdr.rcvif = ifp; 867 m->m_pkthdr.len = rxlen; 868 len = MHLEN; 869 top = 0; 870 mp = ⊤ 871 872 while (rxlen > 0) { 873 if (top) { 874 MGET(m, M_DONTWAIT, MT_DATA); 875 if (m == 0) { 876 m_freem(top); 877 goto dropped; 878 } 879 len = MLEN; 880 } 881 if (rxlen >= MINCLSIZE) { 882 MCLGET(m, M_DONTWAIT); 883 if ((m->m_flags & M_EXT) == 0) { 884 m_free(m); 885 m_freem(top); 886 goto dropped; 887 } 888 len = MCLBYTES; 889 } 890 len = min(rxlen, len); 891 if (len > 1) { 892 len &= ~1; 893 894 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 895 mtod(m, caddr_t), len/2); 896 } else { 897 #ifdef IYDEBUG 898 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 899 #endif 900 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 901 MEM_PORT_REG); 902 } 903 m->m_len = len; 904 rxlen -= len; 905 *mp = m; 906 mp = &m->m_next; 907 } 908 /* XXX receive the top here */ 909 ++ifp->if_ipackets; 910 911 eh = mtod(top, struct ether_header *); 912 913 #if NBPFILTER > 0 914 if (ifp->if_bpf) { 915 bpf_mtap(ifp->if_bpf, top); 916 if ((ifp->if_flags & IFF_PROMISC) && 917 (eh->ether_dhost[0] & 1) == 0 && 918 bcmp(eh->ether_dhost, 919 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 920 sizeof(eh->ether_dhost)) != 0) { 921 922 m_freem(top); 923 return; 924 } 925 } 926 #endif 927 m_adj(top, sizeof(struct ether_header)); 928 ether_input(ifp, eh, top); 929 return; 930 931 dropped: 932 ++ifp->if_ierrors; 933 return; 934 } 935 void 936 iy_intr_rx(sc) 937 struct iy_softc *sc; 938 { 939 struct ifnet *ifp; 940 bus_space_tag_t iot; 941 bus_space_handle_t ioh; 942 943 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 944 945 iot = sc->sc_iot; 946 ioh = sc->sc_ioh; 947 ifp = &sc->sc_ethercom.ec_if; 948 949 rxadrs = sc->rx_start; 950 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 951 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 952 rxnext = 0; 953 954 while (rxevnt == RCV_DONE) { 955 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 956 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 957 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 958 #ifdef IYDEBUG 959 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 960 sc->sc_dev.dv_xname, rxadrs, rxstatus, 961 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 962 "\014CRCERR\015LENERR\016RCVOK\020TYP", 963 rxnext, rxlen); 964 #endif 965 iyget(sc, iot, ioh, rxlen); 966 967 /* move stop address */ 968 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 969 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 970 971 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 972 rxadrs = rxnext; 973 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 974 } 975 sc->rx_start = rxnext; 976 } 977 978 void 979 iy_intr_tx(sc) 980 struct iy_softc *sc; 981 { 982 bus_space_tag_t iot; 983 bus_space_handle_t ioh; 984 struct ifnet *ifp; 985 u_int txstatus, txstat2, txlen, txnext; 986 987 ifp = &sc->sc_ethercom.ec_if; 988 iot = sc->sc_iot; 989 ioh = sc->sc_ioh; 990 991 while (sc->tx_start != sc->tx_end) { 992 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 993 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 994 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 995 break; 996 997 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 998 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 999 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1000 #ifdef IYDEBUG 1001 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1002 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1003 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1004 txnext, txlen); 1005 #endif 1006 if (txlen & CHAIN) 1007 sc->tx_start = txnext; 1008 else 1009 sc->tx_start = sc->tx_end; 1010 ifp->if_flags &= ~IFF_OACTIVE; 1011 1012 if ((txstat2 & 0x2000) == 0) 1013 ++ifp->if_oerrors; 1014 if (txstat2 & 0x000f) 1015 ifp->if_oerrors += txstat2 & 0x000f; 1016 } 1017 ifp->if_flags &= ~IFF_OACTIVE; 1018 } 1019 1020 #if 0 1021 /* 1022 * Compare two Ether/802 addresses for equality, inlined and unrolled for 1023 * speed. I'd love to have an inline assembler version of this... 1024 */ 1025 static inline int 1026 ether_equal(one, two) 1027 u_char *one, *two; 1028 { 1029 1030 if (one[0] != two[0] || one[1] != two[1] || one[2] != two[2] || 1031 one[3] != two[3] || one[4] != two[4] || one[5] != two[5]) 1032 return 0; 1033 return 1; 1034 } 1035 1036 /* 1037 * Check for a valid address. to_bpf is filled in with one of the following: 1038 * 0 -> BPF doesn't get this packet 1039 * 1 -> BPF does get this packet 1040 * 2 -> BPF does get this packet, but we don't 1041 * Return value is true if the packet is for us, and false otherwise. 1042 * 1043 * This routine is a mess, but it's also critical that it be as fast 1044 * as possible. It could be made cleaner if we can assume that the 1045 * only client which will fiddle with IFF_PROMISC is BPF. This is 1046 * probably a good assumption, but we do not make it here. (Yet.) 1047 */ 1048 static inline int 1049 check_eh(sc, eh, to_bpf) 1050 struct iy_softc *sc; 1051 struct ether_header *eh; 1052 int *to_bpf; 1053 { 1054 int i; 1055 1056 switch (sc->promisc) { 1057 case IFF_ALLMULTI: 1058 /* 1059 * Receiving all multicasts, but no unicasts except those 1060 * destined for us. 1061 */ 1062 #if NBPFILTER > 0 1063 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); /* BPF gets this packet if anybody cares */ 1064 #endif 1065 if (eh->ether_dhost[0] & 1) 1066 return 1; 1067 if (ether_equal(eh->ether_dhost, 1068 LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1069 return 1; 1070 return 0; 1071 1072 case IFF_PROMISC: 1073 /* 1074 * Receiving all packets. These need to be passed on to BPF. 1075 */ 1076 #if NBPFILTER > 0 1077 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1078 #endif 1079 /* If for us, accept and hand up to BPF */ 1080 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1081 return 1; 1082 1083 #if NBPFILTER > 0 1084 if (*to_bpf) 1085 *to_bpf = 2; /* we don't need to see it */ 1086 #endif 1087 1088 /* 1089 * Not a multicast, so BPF wants to see it but we don't. 1090 */ 1091 if (!(eh->ether_dhost[0] & 1)) 1092 return 1; 1093 1094 /* 1095 * If it's one of our multicast groups, accept it and pass it 1096 * up. 1097 */ 1098 for (i = 0; i < sc->mcast_count; i++) { 1099 if (ether_equal(eh->ether_dhost, (u_char *)&sc->mcast_addrs[i])) { 1100 #if NBPFILTER > 0 1101 if (*to_bpf) 1102 *to_bpf = 1; 1103 #endif 1104 return 1; 1105 } 1106 } 1107 return 1; 1108 1109 case IFF_ALLMULTI | IFF_PROMISC: 1110 /* 1111 * Acting as a multicast router, and BPF running at the same 1112 * time. Whew! (Hope this is a fast machine...) 1113 */ 1114 #if NBPFILTER > 0 1115 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1116 #endif 1117 /* We want to see multicasts. */ 1118 if (eh->ether_dhost[0] & 1) 1119 return 1; 1120 1121 /* We want to see our own packets */ 1122 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1123 return 1; 1124 1125 /* Anything else goes to BPF but nothing else. */ 1126 #if NBPFILTER > 0 1127 if (*to_bpf) 1128 *to_bpf = 2; 1129 #endif 1130 return 1; 1131 1132 case 0: 1133 /* 1134 * Only accept unicast packets destined for us, or multicasts 1135 * for groups that we belong to. For now, we assume that the 1136 * '586 will only return packets that we asked it for. This 1137 * isn't strictly true (it uses hashing for the multicast 1138 * filter), but it will do in this case, and we want to get out 1139 * of here as quickly as possible. 1140 */ 1141 #if NBPFILTER > 0 1142 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1143 #endif 1144 return 1; 1145 } 1146 1147 #ifdef DIAGNOSTIC 1148 panic("check_eh: impossible"); 1149 #endif 1150 } 1151 #endif 1152 1153 int 1154 iyioctl(ifp, cmd, data) 1155 register struct ifnet *ifp; 1156 u_long cmd; 1157 caddr_t data; 1158 { 1159 struct iy_softc *sc; 1160 struct ifaddr *ifa; 1161 struct ifreq *ifr; 1162 int s, error = 0; 1163 1164 sc = ifp->if_softc; 1165 ifa = (struct ifaddr *)data; 1166 ifr = (struct ifreq *)data; 1167 1168 #ifdef IYDEBUG 1169 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1170 ifp, ifp->if_xname, cmd, data); 1171 #endif 1172 1173 s = splimp(); 1174 1175 switch (cmd) { 1176 1177 case SIOCSIFADDR: 1178 ifp->if_flags |= IFF_UP; 1179 1180 switch (ifa->ifa_addr->sa_family) { 1181 #ifdef INET 1182 case AF_INET: 1183 iyinit(sc); 1184 arp_ifinit(ifp, ifa); 1185 break; 1186 #endif 1187 #ifdef NS 1188 /* XXX - This code is probably wrong. */ 1189 case AF_NS: 1190 { 1191 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1192 1193 if (ns_nullhost(*ina)) 1194 ina->x_host = *(union ns_host *) 1195 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1196 else 1197 bcopy(ina->x_host.c_host, 1198 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1199 ETHER_ADDR_LEN); 1200 /* Set new address. */ 1201 iyinit(sc); 1202 break; 1203 } 1204 #endif /* NS */ 1205 default: 1206 iyinit(sc); 1207 break; 1208 } 1209 break; 1210 1211 case SIOCSIFFLAGS: 1212 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1213 if ((ifp->if_flags & IFF_UP) == 0 && 1214 (ifp->if_flags & IFF_RUNNING) != 0) { 1215 /* 1216 * If interface is marked down and it is running, then 1217 * stop it. 1218 */ 1219 iystop(sc); 1220 ifp->if_flags &= ~IFF_RUNNING; 1221 } else if ((ifp->if_flags & IFF_UP) != 0 && 1222 (ifp->if_flags & IFF_RUNNING) == 0) { 1223 /* 1224 * If interface is marked up and it is stopped, then 1225 * start it. 1226 */ 1227 iyinit(sc); 1228 } else { 1229 /* 1230 * Reset the interface to pick up changes in any other 1231 * flags that affect hardware registers. 1232 */ 1233 iystop(sc); 1234 iyinit(sc); 1235 } 1236 #ifdef IYDEBUGX 1237 if (ifp->if_flags & IFF_DEBUG) 1238 sc->sc_debug = IFY_ALL; 1239 else 1240 sc->sc_debug = 0; 1241 #endif 1242 break; 1243 1244 #if 0 /* XXX */ 1245 case SIOCADDMULTI: 1246 case SIOCDELMULTI: 1247 error = (cmd == SIOCADDMULTI) ? 1248 ether_addmulti(ifr, &sc->sc_ethercom): 1249 ether_delmulti(ifr, &sc->sc_ethercom); 1250 1251 if (error == ENETRESET) { 1252 /* 1253 * Multicast list has changed; set the hardware filter 1254 * accordingly. 1255 */ 1256 iy_mc_reset(sc); /* XXX */ 1257 error = 0; 1258 } 1259 break; 1260 #endif 1261 default: 1262 error = EINVAL; 1263 } 1264 splx(s); 1265 return error; 1266 } 1267 1268 #if 0 1269 static void 1270 iy_mc_reset(sc) 1271 struct iy_softc *sc; 1272 { 1273 struct ether_multi *enm; 1274 struct ether_multistep step; 1275 1276 /* 1277 * Step through the list of addresses. 1278 */ 1279 sc->mcast_count = 0; 1280 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 1281 while (enm) { 1282 if (sc->mcast_count >= MAXMCAST || 1283 bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1284 sc->sc_ethercom.ec_if.if_flags |= IFF_ALLMULTI; 1285 iyioctl(&sc->sc_ethercom.ec_if, SIOCSIFFLAGS, 1286 (void *)0); 1287 goto setflag; 1288 } 1289 1290 bcopy(enm->enm_addrlo, &sc->mcast_addrs[sc->mcast_count], 6); 1291 sc->mcast_count++; 1292 ETHER_NEXT_MULTI(step, enm); 1293 } 1294 setflag: 1295 sc->want_mcsetup = 1; 1296 } 1297 1298 #ifdef IYDEBUG 1299 void 1300 print_rbd(rbd) 1301 volatile struct ie_recv_buf_desc *rbd; 1302 { 1303 1304 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1305 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1306 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1307 rbd->mbz); 1308 } 1309 #endif 1310 #endif 1311 1312 void 1313 iyprobemem(sc) 1314 struct iy_softc *sc; 1315 { 1316 bus_space_tag_t iot; 1317 bus_space_handle_t ioh; 1318 int testing; 1319 1320 iot = sc->sc_iot; 1321 ioh = sc->sc_ioh; 1322 1323 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1324 delay(1); 1325 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1326 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1327 1328 for (testing=65536; testing >= 4096; testing >>= 1) { 1329 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1330 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1331 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1332 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1333 #ifdef IYMEMDEBUG 1334 printf("%s: Didn't keep 0xdead at 0x%x\n", 1335 sc->sc_dev.dv_xname, testing-2); 1336 #endif 1337 continue; 1338 } 1339 1340 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1341 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1342 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1343 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1344 #ifdef IYMEMDEBUG 1345 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1346 sc->sc_dev.dv_xname, testing-2); 1347 #endif 1348 continue; 1349 } 1350 1351 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1352 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1353 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1354 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1355 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1356 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1357 #ifdef IYMEMDEBUG 1358 printf("%s: 0x%x alias of 0x0\n", 1359 sc->sc_dev.dv_xname, testing >> 1); 1360 #endif 1361 continue; 1362 } 1363 1364 break; 1365 } 1366 1367 sc->sram = testing; 1368 1369 switch(testing) { 1370 case 65536: 1371 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1372 sc->rx_size = 44*1024; 1373 break; 1374 1375 case 32768: 1376 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1377 sc->rx_size = 22*1024; 1378 break; 1379 1380 case 16384: 1381 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1382 sc->rx_size = 10*1024; 1383 break; 1384 default: 1385 sc->rx_size = testing/2; 1386 break; 1387 } 1388 sc->tx_size = testing - sc->rx_size; 1389 } 1390 1391 static int 1392 eepromreadall(iot, ioh, wordp, maxi) 1393 bus_space_tag_t iot; 1394 bus_space_handle_t ioh; 1395 u_int16_t *wordp; 1396 int maxi; 1397 { 1398 int i; 1399 u_int16_t checksum, tmp; 1400 1401 checksum = 0; 1402 1403 for (i=0; i<EEPP_LENGTH; ++i) { 1404 tmp = eepromread(iot, ioh, i); 1405 checksum += tmp; 1406 if (i<maxi) 1407 wordp[i] = tmp; 1408 } 1409 1410 if (checksum != EEPP_CHKSUM) { 1411 #ifdef IYDEBUG 1412 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1413 checksum, EEPP_CHKSUM); 1414 #endif 1415 return 1; 1416 } 1417 return 0; 1418 } 1419
Indexes created Thu Sep 25 02:09:54 GMT 2025