if_iy.c revision 1.22
1 /* $NetBSD: if_iy.c,v 1.22 1998/07/05 00:51:21 jonathan Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include "opt_inet.h" 37 #include "bpfilter.h" 38 #include "rnd.h" 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/buf.h> 44 #include <sys/protosw.h> 45 #include <sys/socket.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #include <sys/syslog.h> 49 #include <sys/device.h> 50 #if NRND > 0 51 #include <sys/rnd.h> 52 #endif 53 54 #include <net/if.h> 55 #include <net/if_types.h> 56 #include <net/if_dl.h> 57 58 #include <net/if_ether.h> 59 60 #if NBPFILTER > 0 61 #include <net/bpf.h> 62 #include <net/bpfdesc.h> 63 #endif 64 65 #ifdef INET 66 #include <netinet/in.h> 67 #include <netinet/in_systm.h> 68 #include <netinet/in_var.h> 69 #include <netinet/ip.h> 70 #include <netinet/if_inarp.h> 71 #endif 72 73 #ifdef NS 74 #include <netns/ns.h> 75 #include <netns/ns_if.h> 76 #endif 77 78 #if defined(SIOCSIFMEDIA) 79 #include <net/if_media.h> 80 #endif 81 82 #include <vm/vm.h> 83 84 #include <machine/cpu.h> 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 88 #include <dev/isa/isareg.h> 89 #include <dev/isa/isavar.h> 90 #include <dev/ic/i82595reg.h> 91 92 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 93 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 94 95 /* 96 * Ethernet status, per interface. 97 */ 98 struct iy_softc { 99 struct device sc_dev; 100 void *sc_ih; 101 102 bus_space_tag_t sc_iot; 103 bus_space_handle_t sc_ioh; 104 105 struct ethercom sc_ethercom; 106 107 struct ifmedia iy_ifmedia; 108 int iy_media; 109 110 int mappedirq; 111 112 int hard_vers; 113 114 int promisc; 115 116 int sram, tx_size, rx_size; 117 118 int tx_start, tx_end, tx_last; 119 int rx_start; 120 121 #ifdef IYDEBUG 122 int sc_debug; 123 #endif 124 125 #if NRND > 0 126 rndsource_element_t rnd_source; 127 #endif 128 }; 129 130 void iywatchdog __P((struct ifnet *)); 131 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 132 int iyintr __P((void *)); 133 void iyinit __P((struct iy_softc *)); 134 void iystop __P((struct iy_softc *)); 135 void iystart __P((struct ifnet *)); 136 137 void iy_intr_rx __P((struct iy_softc *)); 138 void iy_intr_tx __P((struct iy_softc *)); 139 140 void iyreset __P((struct iy_softc *)); 141 void iy_readframe __P((struct iy_softc *, int)); 142 void iy_drop_packet_buffer __P((struct iy_softc *)); 143 void iy_find_mem_size __P((struct iy_softc *)); 144 void iyrint __P((struct iy_softc *)); 145 void iytint __P((struct iy_softc *)); 146 void iyxmit __P((struct iy_softc *)); 147 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 148 void iyprobemem __P((struct iy_softc *)); 149 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 150 int)); 151 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 152 /* 153 * void iymeminit __P((void *, struct iy_softc *)); 154 * static int iy_mc_setup __P((struct iy_softc *, void *)); 155 * static void iy_mc_reset __P((struct iy_softc *)); 156 */ 157 #ifdef IYDEBUGX 158 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 159 160 int in_ifrint = 0; 161 int in_iftint = 0; 162 #endif 163 164 int iy_mediachange __P((struct ifnet *)); 165 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 166 167 int iyprobe __P((struct device *, struct cfdata *, void *)); 168 void iyattach __P((struct device *, struct device *, void *)); 169 170 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 171 172 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 173 int)); 174 175 struct cfattach iy_ca = { 176 sizeof(struct iy_softc), iyprobe, iyattach 177 }; 178 179 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 180 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 181 182 int 183 iyprobe(parent, match, aux) 184 struct device *parent; 185 struct cfdata *match; 186 void *aux; 187 { 188 struct isa_attach_args *ia = aux; 189 u_int16_t eaddr[8]; 190 191 bus_space_tag_t iot; 192 bus_space_handle_t ioh; 193 194 u_int8_t c, d; 195 196 iot = ia->ia_iot; 197 198 if (ia->ia_iobase == IOBASEUNK) 199 return 0; 200 201 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 202 return 0; 203 204 /* try to find the round robin sig: */ 205 206 c = bus_space_read_1(iot, ioh, ID_REG); 207 if ((c & ID_REG_MASK) != ID_REG_SIG) 208 goto out; 209 210 d = bus_space_read_1(iot, ioh, ID_REG); 211 if ((d & ID_REG_MASK) != ID_REG_SIG) 212 goto out; 213 214 if (((d-c) & R_ROBIN_BITS) != 0x40) 215 goto out; 216 217 d = bus_space_read_1(iot, ioh, ID_REG); 218 if ((d & ID_REG_MASK) != ID_REG_SIG) 219 goto out; 220 221 if (((d-c) & R_ROBIN_BITS) != 0x80) 222 goto out; 223 224 d = bus_space_read_1(iot, ioh, ID_REG); 225 if ((d & ID_REG_MASK) != ID_REG_SIG) 226 goto out; 227 228 if (((d-c) & R_ROBIN_BITS) != 0xC0) 229 goto out; 230 231 d = bus_space_read_1(iot, ioh, ID_REG); 232 if ((d & ID_REG_MASK) != ID_REG_SIG) 233 goto out; 234 235 if (((d-c) & R_ROBIN_BITS) != 0x00) 236 goto out; 237 238 #ifdef IYDEBUG 239 printf("iyprobe verified working ID reg.\n"); 240 #endif 241 242 if (eepromreadall(iot, ioh, eaddr, 8)) 243 goto out; 244 245 if (ia->ia_irq == IRQUNK) 246 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 247 248 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 249 goto out; 250 251 if (eepro_revirqmap[ia->ia_irq] == 0xff) 252 goto out; 253 254 /* now lets reset the chip */ 255 256 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 257 delay(200); 258 259 ia->ia_iosize = 16; 260 261 bus_space_unmap(iot, ioh, 16); 262 return 1; /* found */ 263 out: 264 bus_space_unmap(iot, ioh, 16); 265 return 0; 266 } 267 268 void 269 iyattach(parent, self, aux) 270 struct device *parent, *self; 271 void *aux; 272 { 273 struct iy_softc *sc = (void *)self; 274 struct isa_attach_args *ia = aux; 275 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 276 bus_space_tag_t iot; 277 bus_space_handle_t ioh; 278 unsigned temp; 279 u_int16_t eaddr[8]; 280 u_int8_t myaddr[ETHER_ADDR_LEN]; 281 int eirq; 282 283 iot = ia->ia_iot; 284 285 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 286 printf(": can't map i/o space\n"); 287 return; 288 } 289 290 sc->sc_iot = iot; 291 sc->sc_ioh = ioh; 292 293 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 294 295 /* now let's reset the chip */ 296 297 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 298 delay(200); 299 300 iyprobemem(sc); 301 302 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 303 ifp->if_softc = sc; 304 ifp->if_start = iystart; 305 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS; 306 /* XXX todo: | IFF_MULTICAST */ 307 308 ifp->if_ioctl = iyioctl; 309 ifp->if_watchdog = iywatchdog; 310 311 (void)eepromreadall(iot, ioh, eaddr, 8); 312 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 313 314 #ifdef DIAGNOSTICS 315 if ((eaddr[EEPPEther0] != 316 eepromread(iot, ioh, EEPPEther0a)) && 317 (eaddr[EEPPEther1] != 318 eepromread(iot, ioh, EEPPEther1a)) && 319 (eaddr[EEPPEther2] != 320 eepromread(iot, ioh, EEPPEther2a))) 321 322 printf("EEPROM Ethernet address differs from copy\n"); 323 #endif 324 325 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 326 myaddr[0] = eaddr[EEPPEther0] >> 8; 327 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 328 myaddr[2] = eaddr[EEPPEther1] >> 8; 329 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 330 myaddr[4] = eaddr[EEPPEther2] >> 8; 331 332 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 333 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 334 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 335 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 336 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 337 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 338 /* Attach the interface. */ 339 if_attach(ifp); 340 ether_ifattach(ifp, myaddr); 341 printf(": address %s, rev. %d, %d kB\n", 342 ether_sprintf(myaddr), 343 sc->hard_vers, sc->sram/1024); 344 345 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 346 if (eirq != ia->ia_irq) 347 printf("%s: EEPROM irq setting %d ignored\n", 348 sc->sc_dev.dv_xname, eirq); 349 350 #if NBPFILTER > 0 351 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 352 #endif 353 354 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 355 IPL_NET, iyintr, sc); 356 357 #if NRND > 0 358 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET); 359 #endif 360 361 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 362 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 363 } 364 365 void 366 iystop(sc) 367 struct iy_softc *sc; 368 { 369 bus_space_tag_t iot; 370 bus_space_handle_t ioh; 371 #ifdef IYDEBUG 372 u_int p, v; 373 #endif 374 375 iot = sc->sc_iot; 376 ioh = sc->sc_ioh; 377 378 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 379 380 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 381 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 382 383 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 384 delay(200); 385 #ifdef IYDEBUG 386 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 387 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 388 p = sc->tx_last; 389 if (!p) 390 p = sc->tx_start; 391 do { 392 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 393 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 394 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 395 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 396 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 397 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 398 printf(" 0x%04x", p); 399 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 400 printf(" 0x%b\n", v, "\020\020Ch"); 401 402 } while (v & 0x8000); 403 #endif 404 sc->tx_start = sc->tx_end = sc->rx_size; 405 sc->tx_last = 0; 406 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 407 } 408 409 void 410 iyreset(sc) 411 struct iy_softc *sc; 412 { 413 int s; 414 s = splimp(); 415 iystop(sc); 416 iyinit(sc); 417 splx(s); 418 } 419 420 void 421 iyinit(sc) 422 struct iy_softc *sc; 423 { 424 int i; 425 unsigned temp; 426 struct ifnet *ifp; 427 bus_space_tag_t iot; 428 bus_space_handle_t ioh; 429 430 iot = sc->sc_iot; 431 ioh = sc->sc_ioh; 432 433 ifp = &sc->sc_ethercom.ec_if; 434 #ifdef IYDEBUG 435 printf("ifp is %p\n", ifp); 436 #endif 437 438 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 439 440 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 441 if (temp & 0x10) 442 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 443 444 for (i=0; i<6; ++i) { 445 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 446 } 447 448 temp = bus_space_read_1(iot, ioh, REG1); 449 bus_space_write_1(iot, ioh, REG1, 450 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 451 452 temp = bus_space_read_1(iot, ioh, RECV_MODES_REG); 453 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp | MATCH_BRDCST); 454 #ifdef IYDEBUG 455 printf("%s: RECV_MODES were %b set to %b\n", 456 sc->sc_dev.dv_xname, 457 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 458 temp|MATCH_BRDCST, 459 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 460 #endif 461 462 463 delay(500000); /* for the hardware to test for the connector */ 464 465 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 466 #ifdef IYDEBUG 467 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 468 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 469 #endif 470 temp = (temp & TEST_MODE_MASK); 471 472 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 473 case IFM_10_5: 474 temp &= ~ (BNC_BIT | TPE_BIT); 475 break; 476 477 case IFM_10_2: 478 temp = (temp & ~TPE_BIT) | BNC_BIT; 479 break; 480 481 case IFM_10_T: 482 temp = (temp & ~BNC_BIT) | TPE_BIT; 483 break; 484 default: 485 /* nothing; leave as it is */ 486 } 487 switch (temp & (BNC_BIT | TPE_BIT)) { 488 case BNC_BIT: 489 sc->iy_media = IFM_ETHER | IFM_10_2; 490 break; 491 case TPE_BIT: 492 sc->iy_media = IFM_ETHER | IFM_10_T; 493 break; 494 default: 495 sc->iy_media = IFM_ETHER | IFM_10_5; 496 } 497 498 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 499 #ifdef IYDEBUG 500 printf("changed to 0x%b\n", 501 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 502 #endif 503 504 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 505 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 506 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 507 508 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 509 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 510 511 #ifdef IYDEBUG 512 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 513 temp, "\020\4bad_irq\010flash/boot present"); 514 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 515 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 516 temp, "\020\4BAD IRQ\010flash/boot present"); 517 #endif 518 519 520 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 521 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 522 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 523 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 524 525 temp = bus_space_read_1(iot, ioh, REG1); 526 #ifdef IYDEBUG 527 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 528 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 529 #endif 530 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 531 532 #ifdef IYDEBUG 533 temp = bus_space_read_1(iot, ioh, REG1); 534 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 535 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 536 #endif 537 538 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 539 540 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 541 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 542 543 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 544 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 545 sc->rx_start = 0; 546 547 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 548 delay(200); 549 550 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 551 552 sc->tx_start = sc->tx_end = sc->rx_size; 553 sc->tx_last = 0; 554 555 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 556 557 ifp->if_flags |= IFF_RUNNING; 558 ifp->if_flags &= ~IFF_OACTIVE; 559 } 560 561 void 562 iystart(ifp) 563 struct ifnet *ifp; 564 { 565 struct iy_softc *sc; 566 567 568 struct mbuf *m0, *m; 569 u_int len, pad, last, end; 570 u_int llen, residual; 571 int avail; 572 caddr_t data; 573 u_int16_t resval, stat; 574 bus_space_tag_t iot; 575 bus_space_handle_t ioh; 576 577 #ifdef IYDEBUG 578 printf("iystart called\n"); 579 #endif 580 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 581 return; 582 583 sc = ifp->if_softc; 584 iot = sc->sc_iot; 585 ioh = sc->sc_ioh; 586 587 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 588 #ifdef IYDEBUG 589 printf("%s: trying to write another packet to the hardware\n", 590 sc->sc_dev.dv_xname); 591 #endif 592 593 /* We need to use m->m_pkthdr.len, so require the header */ 594 if ((m0->m_flags & M_PKTHDR) == 0) 595 panic("iystart: no header mbuf"); 596 597 len = m0->m_pkthdr.len; 598 pad = len & 1; 599 600 #ifdef IYDEBUG 601 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 602 #endif 603 if (len < ETHER_MIN_LEN) { 604 pad = ETHER_MIN_LEN - len; 605 } 606 607 if (len + pad > ETHER_MAX_LEN) { 608 /* packet is obviously too large: toss it */ 609 ++ifp->if_oerrors; 610 IF_DEQUEUE(&ifp->if_snd, m0); 611 m_freem(m0); 612 continue; 613 } 614 615 #if NBPFILTER > 0 616 if (ifp->if_bpf) 617 bpf_mtap(ifp->if_bpf, m0); 618 #endif 619 620 avail = sc->tx_start - sc->tx_end; 621 if (avail <= 0) 622 avail += sc->tx_size; 623 624 #ifdef IYDEBUG 625 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 626 #endif 627 /* 628 * we MUST RUN at splnet here --- 629 * XXX todo: or even turn off the boards ints ??? hm... 630 */ 631 632 /* See if there is room to put another packet in the buffer. */ 633 634 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 635 #ifdef IYDEBUG 636 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 637 sc->sc_dev.dv_xname, len, avail); 638 #endif 639 ifp->if_flags |= IFF_OACTIVE; 640 return; 641 } 642 643 /* we know it fits in the hardware now, so dequeue it */ 644 IF_DEQUEUE(&ifp->if_snd, m0); 645 646 last = sc->tx_end; 647 end = last + pad + len + I595_XMT_HDRLEN; 648 649 if (end >= sc->sram) { 650 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 651 /* keep header in one piece */ 652 last = sc->rx_size; 653 end = last + pad + len + I595_XMT_HDRLEN; 654 } else 655 end -= sc->tx_size; 656 } 657 658 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 659 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 660 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 661 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 662 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 663 664 residual = resval = 0; 665 666 while ((m = m0)!=0) { 667 data = mtod(m, caddr_t); 668 llen = m->m_len; 669 if (residual) { 670 #ifdef IYDEBUG 671 printf("%s: merging residual with next mbuf.\n", 672 sc->sc_dev.dv_xname); 673 #endif 674 resval |= *data << 8; 675 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 676 --llen; 677 ++data; 678 } 679 if (llen > 1) 680 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 681 data, llen>>1); 682 residual = llen & 1; 683 if (residual) { 684 resval = *(data + llen - 1); 685 #ifdef IYDEBUG 686 printf("%s: got odd mbuf to send.\n", 687 sc->sc_dev.dv_xname); 688 #endif 689 } 690 691 MFREE(m, m0); 692 } 693 694 if (residual) 695 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 696 697 pad >>= 1; 698 while (pad-- > 0) 699 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 700 701 #ifdef IYDEBUG 702 printf("%s: new last = 0x%x, end = 0x%x.\n", 703 sc->sc_dev.dv_xname, last, end); 704 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 705 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 706 #endif 707 708 if (sc->tx_start != sc->tx_end) { 709 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 710 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 711 712 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 713 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 714 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 715 #ifdef IYDEBUG 716 printf("%s: setting 0x%x to 0x%x\n", 717 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 718 stat | CHAIN); 719 #endif 720 } 721 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 722 723 /* XXX todo: enable ints here if disabled */ 724 725 ++ifp->if_opackets; 726 727 if (sc->tx_start == sc->tx_end) { 728 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 729 bus_space_write_1(iot, ioh, 0, XMT_CMD); 730 sc->tx_start = last; 731 #ifdef IYDEBUG 732 printf("%s: writing 0x%x to XAR and giving XCMD\n", 733 sc->sc_dev.dv_xname, last); 734 #endif 735 } else { 736 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 737 #ifdef IYDEBUG 738 printf("%s: giving RESUME_XCMD\n", 739 sc->sc_dev.dv_xname); 740 #endif 741 } 742 sc->tx_last = last; 743 sc->tx_end = end; 744 } 745 } 746 747 748 static __inline void 749 eepromwritebit(iot, ioh, what) 750 bus_space_tag_t iot; 751 bus_space_handle_t ioh; 752 int what; 753 { 754 bus_space_write_1(iot, ioh, EEPROM_REG, what); 755 delay(1); 756 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 757 delay(1); 758 bus_space_write_1(iot, ioh, EEPROM_REG, what); 759 delay(1); 760 } 761 762 static __inline int 763 eepromreadbit(iot, ioh) 764 bus_space_tag_t iot; 765 bus_space_handle_t ioh; 766 { 767 int b; 768 769 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 770 delay(1); 771 b = bus_space_read_1(iot, ioh, EEPROM_REG); 772 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 773 delay(1); 774 775 return ((b & EEDO) != 0); 776 } 777 778 static u_int16_t 779 eepromread(iot, ioh, offset) 780 bus_space_tag_t iot; 781 bus_space_handle_t ioh; 782 int offset; 783 { 784 volatile int i; 785 volatile int j; 786 volatile u_int16_t readval; 787 788 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 789 delay(1); 790 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 791 delay(1); 792 793 eepromwritebit(iot, ioh, EECS|EEDI); 794 eepromwritebit(iot, ioh, EECS|EEDI); 795 eepromwritebit(iot, ioh, EECS); 796 797 for (j=5; j>=0; --j) { 798 if ((offset>>j) & 1) 799 eepromwritebit(iot, ioh, EECS|EEDI); 800 else 801 eepromwritebit(iot, ioh, EECS); 802 } 803 804 for (readval=0, i=0; i<16; ++i) { 805 readval<<=1; 806 readval |= eepromreadbit(iot, ioh); 807 } 808 809 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 810 delay(1); 811 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 812 813 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 814 815 return readval; 816 } 817 818 /* 819 * Device timeout/watchdog routine. Entered if the device neglects to generate 820 * an interrupt after a transmit has been started on it. 821 */ 822 void 823 iywatchdog(ifp) 824 struct ifnet *ifp; 825 { 826 struct iy_softc *sc = ifp->if_softc; 827 828 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 829 ++sc->sc_ethercom.ec_if.if_oerrors; 830 iyreset(sc); 831 } 832 833 /* 834 * What to do upon receipt of an interrupt. 835 */ 836 int 837 iyintr(arg) 838 void *arg; 839 { 840 struct iy_softc *sc = arg; 841 bus_space_tag_t iot; 842 bus_space_handle_t ioh; 843 844 register u_short status; 845 846 iot = sc->sc_iot; 847 ioh = sc->sc_ioh; 848 849 status = bus_space_read_1(iot, ioh, STATUS_REG); 850 #ifdef IYDEBUG 851 if (status & ALL_INTS) { 852 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 853 "\020\1RX_STP\2RX\3TX\4EXEC"); 854 if (status & EXEC_INT) 855 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 856 "\020\6ABORT"); 857 else 858 printf("\n"); 859 } 860 #endif 861 if (((status & (RX_INT | TX_INT)) == 0)) 862 return 0; 863 864 if (status & RX_INT) { 865 iy_intr_rx(sc); 866 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 867 } else if (status & TX_INT) { 868 iy_intr_tx(sc); 869 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 870 } 871 872 #if NRND > 0 873 rnd_add_uint32(&sc->rnd_source, status); 874 #endif 875 876 return 1; 877 } 878 879 void 880 iyget(sc, iot, ioh, rxlen) 881 struct iy_softc *sc; 882 bus_space_tag_t iot; 883 bus_space_handle_t ioh; 884 int rxlen; 885 { 886 struct mbuf *m, *top, **mp; 887 struct ether_header *eh; 888 struct ifnet *ifp; 889 int len; 890 891 ifp = &sc->sc_ethercom.ec_if; 892 893 MGETHDR(m, M_DONTWAIT, MT_DATA); 894 if (m == 0) 895 goto dropped; 896 m->m_pkthdr.rcvif = ifp; 897 m->m_pkthdr.len = rxlen; 898 len = MHLEN; 899 top = 0; 900 mp = ⊤ 901 902 while (rxlen > 0) { 903 if (top) { 904 MGET(m, M_DONTWAIT, MT_DATA); 905 if (m == 0) { 906 m_freem(top); 907 goto dropped; 908 } 909 len = MLEN; 910 } 911 if (rxlen >= MINCLSIZE) { 912 MCLGET(m, M_DONTWAIT); 913 if ((m->m_flags & M_EXT) == 0) { 914 m_free(m); 915 m_freem(top); 916 goto dropped; 917 } 918 len = MCLBYTES; 919 } 920 len = min(rxlen, len); 921 if (len > 1) { 922 len &= ~1; 923 924 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 925 mtod(m, caddr_t), len/2); 926 } else { 927 #ifdef IYDEBUG 928 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 929 #endif 930 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 931 MEM_PORT_REG); 932 } 933 m->m_len = len; 934 rxlen -= len; 935 *mp = m; 936 mp = &m->m_next; 937 } 938 /* XXX receive the top here */ 939 ++ifp->if_ipackets; 940 941 eh = mtod(top, struct ether_header *); 942 943 #if NBPFILTER > 0 944 if (ifp->if_bpf) { 945 bpf_mtap(ifp->if_bpf, top); 946 if ((ifp->if_flags & IFF_PROMISC) && 947 (eh->ether_dhost[0] & 1) == 0 && 948 bcmp(eh->ether_dhost, 949 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 950 sizeof(eh->ether_dhost)) != 0) { 951 952 m_freem(top); 953 return; 954 } 955 } 956 #endif 957 m_adj(top, sizeof(struct ether_header)); 958 ether_input(ifp, eh, top); 959 return; 960 961 dropped: 962 ++ifp->if_ierrors; 963 return; 964 } 965 void 966 iy_intr_rx(sc) 967 struct iy_softc *sc; 968 { 969 struct ifnet *ifp; 970 bus_space_tag_t iot; 971 bus_space_handle_t ioh; 972 973 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 974 975 iot = sc->sc_iot; 976 ioh = sc->sc_ioh; 977 ifp = &sc->sc_ethercom.ec_if; 978 979 rxadrs = sc->rx_start; 980 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 981 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 982 rxnext = 0; 983 984 while (rxevnt == RCV_DONE) { 985 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 986 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 987 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 988 #ifdef IYDEBUG 989 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 990 sc->sc_dev.dv_xname, rxadrs, rxstatus, 991 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 992 "\014CRCERR\015LENERR\016RCVOK\020TYP", 993 rxnext, rxlen); 994 #endif 995 iyget(sc, iot, ioh, rxlen); 996 997 /* move stop address */ 998 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 999 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1000 1001 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1002 rxadrs = rxnext; 1003 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1004 } 1005 sc->rx_start = rxnext; 1006 } 1007 1008 void 1009 iy_intr_tx(sc) 1010 struct iy_softc *sc; 1011 { 1012 bus_space_tag_t iot; 1013 bus_space_handle_t ioh; 1014 struct ifnet *ifp; 1015 u_int txstatus, txstat2, txlen, txnext; 1016 1017 ifp = &sc->sc_ethercom.ec_if; 1018 iot = sc->sc_iot; 1019 ioh = sc->sc_ioh; 1020 1021 while (sc->tx_start != sc->tx_end) { 1022 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1023 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1024 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1025 break; 1026 1027 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1028 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1029 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1030 #ifdef IYDEBUG 1031 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1032 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1033 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1034 txnext, txlen); 1035 #endif 1036 if (txlen & CHAIN) 1037 sc->tx_start = txnext; 1038 else 1039 sc->tx_start = sc->tx_end; 1040 ifp->if_flags &= ~IFF_OACTIVE; 1041 1042 if ((txstat2 & 0x2000) == 0) 1043 ++ifp->if_oerrors; 1044 if (txstat2 & 0x000f) 1045 ifp->if_oerrors += txstat2 & 0x000f; 1046 } 1047 ifp->if_flags &= ~IFF_OACTIVE; 1048 } 1049 1050 #if 0 1051 /* 1052 * Compare two Ether/802 addresses for equality, inlined and unrolled for 1053 * speed. I'd love to have an inline assembler version of this... 1054 */ 1055 static inline int 1056 ether_equal(one, two) 1057 u_char *one, *two; 1058 { 1059 1060 if (one[0] != two[0] || one[1] != two[1] || one[2] != two[2] || 1061 one[3] != two[3] || one[4] != two[4] || one[5] != two[5]) 1062 return 0; 1063 return 1; 1064 } 1065 1066 /* 1067 * Check for a valid address. to_bpf is filled in with one of the following: 1068 * 0 -> BPF doesn't get this packet 1069 * 1 -> BPF does get this packet 1070 * 2 -> BPF does get this packet, but we don't 1071 * Return value is true if the packet is for us, and false otherwise. 1072 * 1073 * This routine is a mess, but it's also critical that it be as fast 1074 * as possible. It could be made cleaner if we can assume that the 1075 * only client which will fiddle with IFF_PROMISC is BPF. This is 1076 * probably a good assumption, but we do not make it here. (Yet.) 1077 */ 1078 static inline int 1079 check_eh(sc, eh, to_bpf) 1080 struct iy_softc *sc; 1081 struct ether_header *eh; 1082 int *to_bpf; 1083 { 1084 int i; 1085 1086 switch (sc->promisc) { 1087 case IFF_ALLMULTI: 1088 /* 1089 * Receiving all multicasts, but no unicasts except those 1090 * destined for us. 1091 */ 1092 #if NBPFILTER > 0 1093 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); /* BPF gets this packet if anybody cares */ 1094 #endif 1095 if (eh->ether_dhost[0] & 1) 1096 return 1; 1097 if (ether_equal(eh->ether_dhost, 1098 LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1099 return 1; 1100 return 0; 1101 1102 case IFF_PROMISC: 1103 /* 1104 * Receiving all packets. These need to be passed on to BPF. 1105 */ 1106 #if NBPFILTER > 0 1107 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1108 #endif 1109 /* If for us, accept and hand up to BPF */ 1110 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1111 return 1; 1112 1113 #if NBPFILTER > 0 1114 if (*to_bpf) 1115 *to_bpf = 2; /* we don't need to see it */ 1116 #endif 1117 1118 /* 1119 * Not a multicast, so BPF wants to see it but we don't. 1120 */ 1121 if (!(eh->ether_dhost[0] & 1)) 1122 return 1; 1123 1124 /* 1125 * If it's one of our multicast groups, accept it and pass it 1126 * up. 1127 */ 1128 for (i = 0; i < sc->mcast_count; i++) { 1129 if (ether_equal(eh->ether_dhost, (u_char *)&sc->mcast_addrs[i])) { 1130 #if NBPFILTER > 0 1131 if (*to_bpf) 1132 *to_bpf = 1; 1133 #endif 1134 return 1; 1135 } 1136 } 1137 return 1; 1138 1139 case IFF_ALLMULTI | IFF_PROMISC: 1140 /* 1141 * Acting as a multicast router, and BPF running at the same 1142 * time. Whew! (Hope this is a fast machine...) 1143 */ 1144 #if NBPFILTER > 0 1145 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1146 #endif 1147 /* We want to see multicasts. */ 1148 if (eh->ether_dhost[0] & 1) 1149 return 1; 1150 1151 /* We want to see our own packets */ 1152 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1153 return 1; 1154 1155 /* Anything else goes to BPF but nothing else. */ 1156 #if NBPFILTER > 0 1157 if (*to_bpf) 1158 *to_bpf = 2; 1159 #endif 1160 return 1; 1161 1162 case 0: 1163 /* 1164 * Only accept unicast packets destined for us, or multicasts 1165 * for groups that we belong to. For now, we assume that the 1166 * '586 will only return packets that we asked it for. This 1167 * isn't strictly true (it uses hashing for the multicast 1168 * filter), but it will do in this case, and we want to get out 1169 * of here as quickly as possible. 1170 */ 1171 #if NBPFILTER > 0 1172 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1173 #endif 1174 return 1; 1175 } 1176 1177 #ifdef DIAGNOSTIC 1178 panic("check_eh: impossible"); 1179 #endif 1180 } 1181 #endif 1182 1183 int 1184 iyioctl(ifp, cmd, data) 1185 register struct ifnet *ifp; 1186 u_long cmd; 1187 caddr_t data; 1188 { 1189 struct iy_softc *sc; 1190 struct ifaddr *ifa; 1191 struct ifreq *ifr; 1192 int s, error = 0; 1193 1194 sc = ifp->if_softc; 1195 ifa = (struct ifaddr *)data; 1196 ifr = (struct ifreq *)data; 1197 1198 #ifdef IYDEBUG 1199 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1200 ifp, ifp->if_xname, cmd, data); 1201 #endif 1202 1203 s = splimp(); 1204 1205 switch (cmd) { 1206 1207 case SIOCSIFADDR: 1208 ifp->if_flags |= IFF_UP; 1209 1210 switch (ifa->ifa_addr->sa_family) { 1211 #ifdef INET 1212 case AF_INET: 1213 iyinit(sc); 1214 arp_ifinit(ifp, ifa); 1215 break; 1216 #endif 1217 #ifdef NS 1218 /* XXX - This code is probably wrong. */ 1219 case AF_NS: 1220 { 1221 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1222 1223 if (ns_nullhost(*ina)) 1224 ina->x_host = *(union ns_host *) 1225 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1226 else 1227 bcopy(ina->x_host.c_host, 1228 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1229 ETHER_ADDR_LEN); 1230 /* Set new address. */ 1231 iyinit(sc); 1232 break; 1233 } 1234 #endif /* NS */ 1235 default: 1236 iyinit(sc); 1237 break; 1238 } 1239 break; 1240 1241 case SIOCSIFFLAGS: 1242 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1243 if ((ifp->if_flags & IFF_UP) == 0 && 1244 (ifp->if_flags & IFF_RUNNING) != 0) { 1245 /* 1246 * If interface is marked down and it is running, then 1247 * stop it. 1248 */ 1249 iystop(sc); 1250 ifp->if_flags &= ~IFF_RUNNING; 1251 } else if ((ifp->if_flags & IFF_UP) != 0 && 1252 (ifp->if_flags & IFF_RUNNING) == 0) { 1253 /* 1254 * If interface is marked up and it is stopped, then 1255 * start it. 1256 */ 1257 iyinit(sc); 1258 } else { 1259 /* 1260 * Reset the interface to pick up changes in any other 1261 * flags that affect hardware registers. 1262 */ 1263 iystop(sc); 1264 iyinit(sc); 1265 } 1266 #ifdef IYDEBUGX 1267 if (ifp->if_flags & IFF_DEBUG) 1268 sc->sc_debug = IFY_ALL; 1269 else 1270 sc->sc_debug = 0; 1271 #endif 1272 break; 1273 1274 #if 0 /* XXX */ 1275 case SIOCADDMULTI: 1276 case SIOCDELMULTI: 1277 error = (cmd == SIOCADDMULTI) ? 1278 ether_addmulti(ifr, &sc->sc_ethercom): 1279 ether_delmulti(ifr, &sc->sc_ethercom); 1280 1281 if (error == ENETRESET) { 1282 /* 1283 * Multicast list has changed; set the hardware filter 1284 * accordingly. 1285 */ 1286 iy_mc_reset(sc); /* XXX */ 1287 error = 0; 1288 } 1289 break; 1290 #endif 1291 case SIOCSIFMEDIA: 1292 case SIOCGIFMEDIA: 1293 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1294 break; 1295 default: 1296 error = EINVAL; 1297 } 1298 splx(s); 1299 return error; 1300 } 1301 1302 int 1303 iy_mediachange(ifp) 1304 struct ifnet *ifp; 1305 { 1306 struct iy_softc *sc = ifp->if_softc; 1307 1308 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1309 return EINVAL; 1310 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1311 case IFM_10_5: 1312 case IFM_10_2: 1313 case IFM_10_T: 1314 case IFM_AUTO: 1315 iystop(sc); 1316 iyinit(sc); 1317 return 0; 1318 default: 1319 return EINVAL; 1320 } 1321 } 1322 1323 void 1324 iy_mediastatus(ifp, ifmr) 1325 struct ifnet *ifp; 1326 struct ifmediareq *ifmr; 1327 { 1328 struct iy_softc *sc = ifp->if_softc; 1329 1330 ifmr->ifm_active = sc->iy_media; 1331 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1332 } 1333 1334 #if 0 1335 static void 1336 iy_mc_reset(sc) 1337 struct iy_softc *sc; 1338 { 1339 struct ether_multi *enm; 1340 struct ether_multistep step; 1341 1342 /* 1343 * Step through the list of addresses. 1344 */ 1345 sc->mcast_count = 0; 1346 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 1347 while (enm) { 1348 if (sc->mcast_count >= MAXMCAST || 1349 bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1350 sc->sc_ethercom.ec_if.if_flags |= IFF_ALLMULTI; 1351 iyioctl(&sc->sc_ethercom.ec_if, SIOCSIFFLAGS, 1352 (void *)0); 1353 goto setflag; 1354 } 1355 1356 bcopy(enm->enm_addrlo, &sc->mcast_addrs[sc->mcast_count], 6); 1357 sc->mcast_count++; 1358 ETHER_NEXT_MULTI(step, enm); 1359 } 1360 setflag: 1361 sc->want_mcsetup = 1; 1362 } 1363 1364 #ifdef IYDEBUG 1365 void 1366 print_rbd(rbd) 1367 volatile struct ie_recv_buf_desc *rbd; 1368 { 1369 1370 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1371 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1372 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1373 rbd->mbz); 1374 } 1375 #endif 1376 #endif 1377 1378 void 1379 iyprobemem(sc) 1380 struct iy_softc *sc; 1381 { 1382 bus_space_tag_t iot; 1383 bus_space_handle_t ioh; 1384 int testing; 1385 1386 iot = sc->sc_iot; 1387 ioh = sc->sc_ioh; 1388 1389 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1390 delay(1); 1391 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1392 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1393 1394 for (testing=65536; testing >= 4096; testing >>= 1) { 1395 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1396 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1397 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1398 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1399 #ifdef IYMEMDEBUG 1400 printf("%s: Didn't keep 0xdead at 0x%x\n", 1401 sc->sc_dev.dv_xname, testing-2); 1402 #endif 1403 continue; 1404 } 1405 1406 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1407 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1408 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1409 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1410 #ifdef IYMEMDEBUG 1411 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1412 sc->sc_dev.dv_xname, testing-2); 1413 #endif 1414 continue; 1415 } 1416 1417 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1418 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1419 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1420 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1421 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1422 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1423 #ifdef IYMEMDEBUG 1424 printf("%s: 0x%x alias of 0x0\n", 1425 sc->sc_dev.dv_xname, testing >> 1); 1426 #endif 1427 continue; 1428 } 1429 1430 break; 1431 } 1432 1433 sc->sram = testing; 1434 1435 switch(testing) { 1436 case 65536: 1437 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1438 sc->rx_size = 44*1024; 1439 break; 1440 1441 case 32768: 1442 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1443 sc->rx_size = 22*1024; 1444 break; 1445 1446 case 16384: 1447 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1448 sc->rx_size = 10*1024; 1449 break; 1450 default: 1451 sc->rx_size = testing/2; 1452 break; 1453 } 1454 sc->tx_size = testing - sc->rx_size; 1455 } 1456 1457 static int 1458 eepromreadall(iot, ioh, wordp, maxi) 1459 bus_space_tag_t iot; 1460 bus_space_handle_t ioh; 1461 u_int16_t *wordp; 1462 int maxi; 1463 { 1464 int i; 1465 u_int16_t checksum, tmp; 1466 1467 checksum = 0; 1468 1469 for (i=0; i<EEPP_LENGTH; ++i) { 1470 tmp = eepromread(iot, ioh, i); 1471 checksum += tmp; 1472 if (i<maxi) 1473 wordp[i] = tmp; 1474 } 1475 1476 if (checksum != EEPP_CHKSUM) { 1477 #ifdef IYDEBUG 1478 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1479 checksum, EEPP_CHKSUM); 1480 #endif 1481 return 1; 1482 } 1483 return 0; 1484 } 1485
Indexes created Fri Sep 26 08:10:20 GMT 2025