if_iy.c revision 1.24
1 /* $NetBSD: if_iy.c,v 1.24 1998/07/28 14:44:46 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include "opt_inet.h" 37 #include "opt_ns.h" 38 #include "bpfilter.h" 39 #include "rnd.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/buf.h> 45 #include <sys/protosw.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/syslog.h> 50 #include <sys/device.h> 51 #if NRND > 0 52 #include <sys/rnd.h> 53 #endif 54 55 #include <net/if.h> 56 #include <net/if_types.h> 57 #include <net/if_dl.h> 58 59 #include <net/if_ether.h> 60 61 #if NBPFILTER > 0 62 #include <net/bpf.h> 63 #include <net/bpfdesc.h> 64 #endif 65 66 #ifdef INET 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/ip.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 #ifdef NS 75 #include <netns/ns.h> 76 #include <netns/ns_if.h> 77 #endif 78 79 #if defined(SIOCSIFMEDIA) 80 #include <net/if_media.h> 81 #endif 82 83 #include <vm/vm.h> 84 85 #include <machine/cpu.h> 86 #include <machine/bus.h> 87 #include <machine/intr.h> 88 89 #include <dev/isa/isareg.h> 90 #include <dev/isa/isavar.h> 91 #include <dev/ic/i82595reg.h> 92 93 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 94 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 95 96 /* 97 * Ethernet status, per interface. 98 */ 99 struct iy_softc { 100 struct device sc_dev; 101 void *sc_ih; 102 103 bus_space_tag_t sc_iot; 104 bus_space_handle_t sc_ioh; 105 106 struct ethercom sc_ethercom; 107 108 struct ifmedia iy_ifmedia; 109 int iy_media; 110 111 int mappedirq; 112 113 int hard_vers; 114 115 int promisc; 116 117 int sram, tx_size, rx_size; 118 119 int tx_start, tx_end, tx_last; 120 int rx_start; 121 122 #ifdef IYDEBUG 123 int sc_debug; 124 #endif 125 126 #if NRND > 0 127 rndsource_element_t rnd_source; 128 #endif 129 }; 130 131 void iywatchdog __P((struct ifnet *)); 132 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 133 int iyintr __P((void *)); 134 void iyinit __P((struct iy_softc *)); 135 void iystop __P((struct iy_softc *)); 136 void iystart __P((struct ifnet *)); 137 138 void iy_intr_rx __P((struct iy_softc *)); 139 void iy_intr_tx __P((struct iy_softc *)); 140 141 void iyreset __P((struct iy_softc *)); 142 void iy_readframe __P((struct iy_softc *, int)); 143 void iy_drop_packet_buffer __P((struct iy_softc *)); 144 void iy_find_mem_size __P((struct iy_softc *)); 145 void iyrint __P((struct iy_softc *)); 146 void iytint __P((struct iy_softc *)); 147 void iyxmit __P((struct iy_softc *)); 148 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 149 void iyprobemem __P((struct iy_softc *)); 150 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 151 int)); 152 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 153 /* 154 * void iymeminit __P((void *, struct iy_softc *)); 155 * static int iy_mc_setup __P((struct iy_softc *, void *)); 156 * static void iy_mc_reset __P((struct iy_softc *)); 157 */ 158 #ifdef IYDEBUGX 159 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 160 161 int in_ifrint = 0; 162 int in_iftint = 0; 163 #endif 164 165 int iy_mediachange __P((struct ifnet *)); 166 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 167 168 int iyprobe __P((struct device *, struct cfdata *, void *)); 169 void iyattach __P((struct device *, struct device *, void *)); 170 171 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 172 173 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 174 int)); 175 176 struct cfattach iy_ca = { 177 sizeof(struct iy_softc), iyprobe, iyattach 178 }; 179 180 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 181 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 182 183 int 184 iyprobe(parent, match, aux) 185 struct device *parent; 186 struct cfdata *match; 187 void *aux; 188 { 189 struct isa_attach_args *ia = aux; 190 u_int16_t eaddr[8]; 191 192 bus_space_tag_t iot; 193 bus_space_handle_t ioh; 194 195 u_int8_t c, d; 196 197 iot = ia->ia_iot; 198 199 if (ia->ia_iobase == IOBASEUNK) 200 return 0; 201 202 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 203 return 0; 204 205 /* try to find the round robin sig: */ 206 207 c = bus_space_read_1(iot, ioh, ID_REG); 208 if ((c & ID_REG_MASK) != ID_REG_SIG) 209 goto out; 210 211 d = bus_space_read_1(iot, ioh, ID_REG); 212 if ((d & ID_REG_MASK) != ID_REG_SIG) 213 goto out; 214 215 if (((d-c) & R_ROBIN_BITS) != 0x40) 216 goto out; 217 218 d = bus_space_read_1(iot, ioh, ID_REG); 219 if ((d & ID_REG_MASK) != ID_REG_SIG) 220 goto out; 221 222 if (((d-c) & R_ROBIN_BITS) != 0x80) 223 goto out; 224 225 d = bus_space_read_1(iot, ioh, ID_REG); 226 if ((d & ID_REG_MASK) != ID_REG_SIG) 227 goto out; 228 229 if (((d-c) & R_ROBIN_BITS) != 0xC0) 230 goto out; 231 232 d = bus_space_read_1(iot, ioh, ID_REG); 233 if ((d & ID_REG_MASK) != ID_REG_SIG) 234 goto out; 235 236 if (((d-c) & R_ROBIN_BITS) != 0x00) 237 goto out; 238 239 #ifdef IYDEBUG 240 printf("iyprobe verified working ID reg.\n"); 241 #endif 242 243 if (eepromreadall(iot, ioh, eaddr, 8)) 244 goto out; 245 246 if (ia->ia_irq == IRQUNK) 247 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 248 249 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 250 goto out; 251 252 if (eepro_revirqmap[ia->ia_irq] == 0xff) 253 goto out; 254 255 /* now lets reset the chip */ 256 257 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 258 delay(200); 259 260 ia->ia_iosize = 16; 261 262 bus_space_unmap(iot, ioh, 16); 263 return 1; /* found */ 264 out: 265 bus_space_unmap(iot, ioh, 16); 266 return 0; 267 } 268 269 void 270 iyattach(parent, self, aux) 271 struct device *parent, *self; 272 void *aux; 273 { 274 struct iy_softc *sc = (void *)self; 275 struct isa_attach_args *ia = aux; 276 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 277 bus_space_tag_t iot; 278 bus_space_handle_t ioh; 279 unsigned temp; 280 u_int16_t eaddr[8]; 281 u_int8_t myaddr[ETHER_ADDR_LEN]; 282 int eirq; 283 284 iot = ia->ia_iot; 285 286 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 287 printf(": can't map i/o space\n"); 288 return; 289 } 290 291 sc->sc_iot = iot; 292 sc->sc_ioh = ioh; 293 294 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 295 296 /* now let's reset the chip */ 297 298 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 299 delay(200); 300 301 iyprobemem(sc); 302 303 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 304 ifp->if_softc = sc; 305 ifp->if_start = iystart; 306 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS; 307 /* XXX todo: | IFF_MULTICAST */ 308 309 ifp->if_ioctl = iyioctl; 310 ifp->if_watchdog = iywatchdog; 311 312 (void)eepromreadall(iot, ioh, eaddr, 8); 313 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 314 315 #ifdef DIAGNOSTICS 316 if ((eaddr[EEPPEther0] != 317 eepromread(iot, ioh, EEPPEther0a)) && 318 (eaddr[EEPPEther1] != 319 eepromread(iot, ioh, EEPPEther1a)) && 320 (eaddr[EEPPEther2] != 321 eepromread(iot, ioh, EEPPEther2a))) 322 323 printf("EEPROM Ethernet address differs from copy\n"); 324 #endif 325 326 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 327 myaddr[0] = eaddr[EEPPEther0] >> 8; 328 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 329 myaddr[2] = eaddr[EEPPEther1] >> 8; 330 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 331 myaddr[4] = eaddr[EEPPEther2] >> 8; 332 333 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 334 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 335 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 336 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 337 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 338 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 339 /* Attach the interface. */ 340 if_attach(ifp); 341 ether_ifattach(ifp, myaddr); 342 printf(": address %s, rev. %d, %d kB\n", 343 ether_sprintf(myaddr), 344 sc->hard_vers, sc->sram/1024); 345 346 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 347 if (eirq != ia->ia_irq) 348 printf("%s: EEPROM irq setting %d ignored\n", 349 sc->sc_dev.dv_xname, eirq); 350 351 #if NBPFILTER > 0 352 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 353 #endif 354 355 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 356 IPL_NET, iyintr, sc); 357 358 #if NRND > 0 359 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET); 360 #endif 361 362 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 363 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 364 } 365 366 void 367 iystop(sc) 368 struct iy_softc *sc; 369 { 370 bus_space_tag_t iot; 371 bus_space_handle_t ioh; 372 #ifdef IYDEBUG 373 u_int p, v; 374 #endif 375 376 iot = sc->sc_iot; 377 ioh = sc->sc_ioh; 378 379 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 380 381 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 382 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 383 384 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 385 delay(200); 386 #ifdef IYDEBUG 387 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 388 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 389 p = sc->tx_last; 390 if (!p) 391 p = sc->tx_start; 392 do { 393 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 394 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 395 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 396 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 397 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 398 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 399 printf(" 0x%04x", p); 400 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 401 printf(" 0x%b\n", v, "\020\020Ch"); 402 403 } while (v & 0x8000); 404 #endif 405 sc->tx_start = sc->tx_end = sc->rx_size; 406 sc->tx_last = 0; 407 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 408 } 409 410 void 411 iyreset(sc) 412 struct iy_softc *sc; 413 { 414 int s; 415 s = splimp(); 416 iystop(sc); 417 iyinit(sc); 418 splx(s); 419 } 420 421 void 422 iyinit(sc) 423 struct iy_softc *sc; 424 { 425 int i; 426 unsigned temp; 427 struct ifnet *ifp; 428 bus_space_tag_t iot; 429 bus_space_handle_t ioh; 430 431 iot = sc->sc_iot; 432 ioh = sc->sc_ioh; 433 434 ifp = &sc->sc_ethercom.ec_if; 435 #ifdef IYDEBUG 436 printf("ifp is %p\n", ifp); 437 #endif 438 439 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 440 441 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 442 if (temp & 0x10) 443 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 444 445 for (i=0; i<6; ++i) { 446 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 447 } 448 449 temp = bus_space_read_1(iot, ioh, REG1); 450 bus_space_write_1(iot, ioh, REG1, 451 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 452 453 temp = bus_space_read_1(iot, ioh, RECV_MODES_REG); 454 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp | MATCH_BRDCST); 455 #ifdef IYDEBUG 456 printf("%s: RECV_MODES were %b set to %b\n", 457 sc->sc_dev.dv_xname, 458 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 459 temp|MATCH_BRDCST, 460 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 461 #endif 462 463 464 delay(500000); /* for the hardware to test for the connector */ 465 466 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 467 #ifdef IYDEBUG 468 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 469 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 470 #endif 471 temp = (temp & TEST_MODE_MASK); 472 473 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 474 case IFM_10_5: 475 temp &= ~ (BNC_BIT | TPE_BIT); 476 break; 477 478 case IFM_10_2: 479 temp = (temp & ~TPE_BIT) | BNC_BIT; 480 break; 481 482 case IFM_10_T: 483 temp = (temp & ~BNC_BIT) | TPE_BIT; 484 break; 485 default: 486 /* nothing; leave as it is */ 487 } 488 switch (temp & (BNC_BIT | TPE_BIT)) { 489 case BNC_BIT: 490 sc->iy_media = IFM_ETHER | IFM_10_2; 491 break; 492 case TPE_BIT: 493 sc->iy_media = IFM_ETHER | IFM_10_T; 494 break; 495 default: 496 sc->iy_media = IFM_ETHER | IFM_10_5; 497 } 498 499 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 500 #ifdef IYDEBUG 501 printf("changed to 0x%b\n", 502 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 503 #endif 504 505 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 506 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 507 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 508 509 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 510 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 511 512 #ifdef IYDEBUG 513 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 514 temp, "\020\4bad_irq\010flash/boot present"); 515 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 516 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 517 temp, "\020\4BAD IRQ\010flash/boot present"); 518 #endif 519 520 521 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 522 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 523 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 524 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 525 526 temp = bus_space_read_1(iot, ioh, REG1); 527 #ifdef IYDEBUG 528 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 529 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 530 #endif 531 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 532 533 #ifdef IYDEBUG 534 temp = bus_space_read_1(iot, ioh, REG1); 535 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 536 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 537 #endif 538 539 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 540 541 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 542 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 543 544 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 545 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 546 sc->rx_start = 0; 547 548 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 549 delay(200); 550 551 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 552 553 sc->tx_start = sc->tx_end = sc->rx_size; 554 sc->tx_last = 0; 555 556 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 557 558 ifp->if_flags |= IFF_RUNNING; 559 ifp->if_flags &= ~IFF_OACTIVE; 560 } 561 562 void 563 iystart(ifp) 564 struct ifnet *ifp; 565 { 566 struct iy_softc *sc; 567 568 569 struct mbuf *m0, *m; 570 u_int len, pad, last, end; 571 u_int llen, residual; 572 int avail; 573 caddr_t data; 574 u_int16_t resval, stat; 575 bus_space_tag_t iot; 576 bus_space_handle_t ioh; 577 578 #ifdef IYDEBUG 579 printf("iystart called\n"); 580 #endif 581 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 582 return; 583 584 sc = ifp->if_softc; 585 iot = sc->sc_iot; 586 ioh = sc->sc_ioh; 587 588 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 589 #ifdef IYDEBUG 590 printf("%s: trying to write another packet to the hardware\n", 591 sc->sc_dev.dv_xname); 592 #endif 593 594 /* We need to use m->m_pkthdr.len, so require the header */ 595 if ((m0->m_flags & M_PKTHDR) == 0) 596 panic("iystart: no header mbuf"); 597 598 len = m0->m_pkthdr.len; 599 pad = len & 1; 600 601 #ifdef IYDEBUG 602 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 603 #endif 604 if (len < ETHER_MIN_LEN) { 605 pad = ETHER_MIN_LEN - len; 606 } 607 608 if (len + pad > ETHER_MAX_LEN) { 609 /* packet is obviously too large: toss it */ 610 ++ifp->if_oerrors; 611 IF_DEQUEUE(&ifp->if_snd, m0); 612 m_freem(m0); 613 continue; 614 } 615 616 #if NBPFILTER > 0 617 if (ifp->if_bpf) 618 bpf_mtap(ifp->if_bpf, m0); 619 #endif 620 621 avail = sc->tx_start - sc->tx_end; 622 if (avail <= 0) 623 avail += sc->tx_size; 624 625 #ifdef IYDEBUG 626 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 627 #endif 628 /* 629 * we MUST RUN at splnet here --- 630 * XXX todo: or even turn off the boards ints ??? hm... 631 */ 632 633 /* See if there is room to put another packet in the buffer. */ 634 635 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 636 #ifdef IYDEBUG 637 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 638 sc->sc_dev.dv_xname, len, avail); 639 #endif 640 ifp->if_flags |= IFF_OACTIVE; 641 return; 642 } 643 644 /* we know it fits in the hardware now, so dequeue it */ 645 IF_DEQUEUE(&ifp->if_snd, m0); 646 647 last = sc->tx_end; 648 end = last + pad + len + I595_XMT_HDRLEN; 649 650 if (end >= sc->sram) { 651 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 652 /* keep header in one piece */ 653 last = sc->rx_size; 654 end = last + pad + len + I595_XMT_HDRLEN; 655 } else 656 end -= sc->tx_size; 657 } 658 659 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 660 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 661 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 662 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 663 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 664 665 residual = resval = 0; 666 667 while ((m = m0)!=0) { 668 data = mtod(m, caddr_t); 669 llen = m->m_len; 670 if (residual) { 671 #ifdef IYDEBUG 672 printf("%s: merging residual with next mbuf.\n", 673 sc->sc_dev.dv_xname); 674 #endif 675 resval |= *data << 8; 676 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 677 --llen; 678 ++data; 679 } 680 if (llen > 1) 681 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 682 data, llen>>1); 683 residual = llen & 1; 684 if (residual) { 685 resval = *(data + llen - 1); 686 #ifdef IYDEBUG 687 printf("%s: got odd mbuf to send.\n", 688 sc->sc_dev.dv_xname); 689 #endif 690 } 691 692 MFREE(m, m0); 693 } 694 695 if (residual) 696 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 697 698 pad >>= 1; 699 while (pad-- > 0) 700 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 701 702 #ifdef IYDEBUG 703 printf("%s: new last = 0x%x, end = 0x%x.\n", 704 sc->sc_dev.dv_xname, last, end); 705 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 706 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 707 #endif 708 709 if (sc->tx_start != sc->tx_end) { 710 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 711 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 712 713 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 714 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 715 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 716 #ifdef IYDEBUG 717 printf("%s: setting 0x%x to 0x%x\n", 718 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 719 stat | CHAIN); 720 #endif 721 } 722 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 723 724 /* XXX todo: enable ints here if disabled */ 725 726 ++ifp->if_opackets; 727 728 if (sc->tx_start == sc->tx_end) { 729 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 730 bus_space_write_1(iot, ioh, 0, XMT_CMD); 731 sc->tx_start = last; 732 #ifdef IYDEBUG 733 printf("%s: writing 0x%x to XAR and giving XCMD\n", 734 sc->sc_dev.dv_xname, last); 735 #endif 736 } else { 737 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 738 #ifdef IYDEBUG 739 printf("%s: giving RESUME_XCMD\n", 740 sc->sc_dev.dv_xname); 741 #endif 742 } 743 sc->tx_last = last; 744 sc->tx_end = end; 745 } 746 } 747 748 749 static __inline void 750 eepromwritebit(iot, ioh, what) 751 bus_space_tag_t iot; 752 bus_space_handle_t ioh; 753 int what; 754 { 755 bus_space_write_1(iot, ioh, EEPROM_REG, what); 756 delay(1); 757 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 758 delay(1); 759 bus_space_write_1(iot, ioh, EEPROM_REG, what); 760 delay(1); 761 } 762 763 static __inline int 764 eepromreadbit(iot, ioh) 765 bus_space_tag_t iot; 766 bus_space_handle_t ioh; 767 { 768 int b; 769 770 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 771 delay(1); 772 b = bus_space_read_1(iot, ioh, EEPROM_REG); 773 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 774 delay(1); 775 776 return ((b & EEDO) != 0); 777 } 778 779 static u_int16_t 780 eepromread(iot, ioh, offset) 781 bus_space_tag_t iot; 782 bus_space_handle_t ioh; 783 int offset; 784 { 785 volatile int i; 786 volatile int j; 787 volatile u_int16_t readval; 788 789 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 790 delay(1); 791 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 792 delay(1); 793 794 eepromwritebit(iot, ioh, EECS|EEDI); 795 eepromwritebit(iot, ioh, EECS|EEDI); 796 eepromwritebit(iot, ioh, EECS); 797 798 for (j=5; j>=0; --j) { 799 if ((offset>>j) & 1) 800 eepromwritebit(iot, ioh, EECS|EEDI); 801 else 802 eepromwritebit(iot, ioh, EECS); 803 } 804 805 for (readval=0, i=0; i<16; ++i) { 806 readval<<=1; 807 readval |= eepromreadbit(iot, ioh); 808 } 809 810 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 811 delay(1); 812 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 813 814 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 815 816 return readval; 817 } 818 819 /* 820 * Device timeout/watchdog routine. Entered if the device neglects to generate 821 * an interrupt after a transmit has been started on it. 822 */ 823 void 824 iywatchdog(ifp) 825 struct ifnet *ifp; 826 { 827 struct iy_softc *sc = ifp->if_softc; 828 829 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 830 ++sc->sc_ethercom.ec_if.if_oerrors; 831 iyreset(sc); 832 } 833 834 /* 835 * What to do upon receipt of an interrupt. 836 */ 837 int 838 iyintr(arg) 839 void *arg; 840 { 841 struct iy_softc *sc = arg; 842 bus_space_tag_t iot; 843 bus_space_handle_t ioh; 844 845 register u_short status; 846 847 iot = sc->sc_iot; 848 ioh = sc->sc_ioh; 849 850 status = bus_space_read_1(iot, ioh, STATUS_REG); 851 #ifdef IYDEBUG 852 if (status & ALL_INTS) { 853 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 854 "\020\1RX_STP\2RX\3TX\4EXEC"); 855 if (status & EXEC_INT) 856 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 857 "\020\6ABORT"); 858 else 859 printf("\n"); 860 } 861 #endif 862 if (((status & (RX_INT | TX_INT)) == 0)) 863 return 0; 864 865 if (status & RX_INT) { 866 iy_intr_rx(sc); 867 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 868 } else if (status & TX_INT) { 869 iy_intr_tx(sc); 870 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 871 } 872 873 #if NRND > 0 874 rnd_add_uint32(&sc->rnd_source, status); 875 #endif 876 877 return 1; 878 } 879 880 void 881 iyget(sc, iot, ioh, rxlen) 882 struct iy_softc *sc; 883 bus_space_tag_t iot; 884 bus_space_handle_t ioh; 885 int rxlen; 886 { 887 struct mbuf *m, *top, **mp; 888 struct ether_header *eh; 889 struct ifnet *ifp; 890 int len; 891 892 ifp = &sc->sc_ethercom.ec_if; 893 894 MGETHDR(m, M_DONTWAIT, MT_DATA); 895 if (m == 0) 896 goto dropped; 897 m->m_pkthdr.rcvif = ifp; 898 m->m_pkthdr.len = rxlen; 899 len = MHLEN; 900 top = 0; 901 mp = ⊤ 902 903 while (rxlen > 0) { 904 if (top) { 905 MGET(m, M_DONTWAIT, MT_DATA); 906 if (m == 0) { 907 m_freem(top); 908 goto dropped; 909 } 910 len = MLEN; 911 } 912 if (rxlen >= MINCLSIZE) { 913 MCLGET(m, M_DONTWAIT); 914 if ((m->m_flags & M_EXT) == 0) { 915 m_free(m); 916 m_freem(top); 917 goto dropped; 918 } 919 len = MCLBYTES; 920 } 921 len = min(rxlen, len); 922 if (len > 1) { 923 len &= ~1; 924 925 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 926 mtod(m, caddr_t), len/2); 927 } else { 928 #ifdef IYDEBUG 929 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 930 #endif 931 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 932 MEM_PORT_REG); 933 } 934 m->m_len = len; 935 rxlen -= len; 936 *mp = m; 937 mp = &m->m_next; 938 } 939 /* XXX receive the top here */ 940 ++ifp->if_ipackets; 941 942 eh = mtod(top, struct ether_header *); 943 944 #if NBPFILTER > 0 945 if (ifp->if_bpf) { 946 bpf_mtap(ifp->if_bpf, top); 947 if ((ifp->if_flags & IFF_PROMISC) && 948 (eh->ether_dhost[0] & 1) == 0 && 949 bcmp(eh->ether_dhost, 950 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 951 sizeof(eh->ether_dhost)) != 0) { 952 953 m_freem(top); 954 return; 955 } 956 } 957 #endif 958 m_adj(top, sizeof(struct ether_header)); 959 ether_input(ifp, eh, top); 960 return; 961 962 dropped: 963 ++ifp->if_ierrors; 964 return; 965 } 966 void 967 iy_intr_rx(sc) 968 struct iy_softc *sc; 969 { 970 struct ifnet *ifp; 971 bus_space_tag_t iot; 972 bus_space_handle_t ioh; 973 974 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 975 976 iot = sc->sc_iot; 977 ioh = sc->sc_ioh; 978 ifp = &sc->sc_ethercom.ec_if; 979 980 rxadrs = sc->rx_start; 981 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 982 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 983 rxnext = 0; 984 985 while (rxevnt == RCV_DONE) { 986 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 987 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 988 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 989 #ifdef IYDEBUG 990 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 991 sc->sc_dev.dv_xname, rxadrs, rxstatus, 992 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 993 "\014CRCERR\015LENERR\016RCVOK\020TYP", 994 rxnext, rxlen); 995 #endif 996 iyget(sc, iot, ioh, rxlen); 997 998 /* move stop address */ 999 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1000 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1001 1002 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1003 rxadrs = rxnext; 1004 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1005 } 1006 sc->rx_start = rxnext; 1007 } 1008 1009 void 1010 iy_intr_tx(sc) 1011 struct iy_softc *sc; 1012 { 1013 bus_space_tag_t iot; 1014 bus_space_handle_t ioh; 1015 struct ifnet *ifp; 1016 u_int txstatus, txstat2, txlen, txnext; 1017 1018 ifp = &sc->sc_ethercom.ec_if; 1019 iot = sc->sc_iot; 1020 ioh = sc->sc_ioh; 1021 1022 while (sc->tx_start != sc->tx_end) { 1023 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1024 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1025 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1026 break; 1027 1028 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1029 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1030 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1031 #ifdef IYDEBUG 1032 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1033 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1034 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1035 txnext, txlen); 1036 #endif 1037 if (txlen & CHAIN) 1038 sc->tx_start = txnext; 1039 else 1040 sc->tx_start = sc->tx_end; 1041 ifp->if_flags &= ~IFF_OACTIVE; 1042 1043 if ((txstat2 & 0x2000) == 0) 1044 ++ifp->if_oerrors; 1045 if (txstat2 & 0x000f) 1046 ifp->if_oerrors += txstat2 & 0x000f; 1047 } 1048 ifp->if_flags &= ~IFF_OACTIVE; 1049 } 1050 1051 int 1052 iyioctl(ifp, cmd, data) 1053 register struct ifnet *ifp; 1054 u_long cmd; 1055 caddr_t data; 1056 { 1057 struct iy_softc *sc; 1058 struct ifaddr *ifa; 1059 struct ifreq *ifr; 1060 int s, error = 0; 1061 1062 sc = ifp->if_softc; 1063 ifa = (struct ifaddr *)data; 1064 ifr = (struct ifreq *)data; 1065 1066 #ifdef IYDEBUG 1067 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1068 ifp, ifp->if_xname, cmd, data); 1069 #endif 1070 1071 s = splimp(); 1072 1073 switch (cmd) { 1074 1075 case SIOCSIFADDR: 1076 ifp->if_flags |= IFF_UP; 1077 1078 switch (ifa->ifa_addr->sa_family) { 1079 #ifdef INET 1080 case AF_INET: 1081 iyinit(sc); 1082 arp_ifinit(ifp, ifa); 1083 break; 1084 #endif 1085 #ifdef NS 1086 /* XXX - This code is probably wrong. */ 1087 case AF_NS: 1088 { 1089 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1090 1091 if (ns_nullhost(*ina)) 1092 ina->x_host = *(union ns_host *) 1093 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1094 else 1095 bcopy(ina->x_host.c_host, 1096 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1097 ETHER_ADDR_LEN); 1098 /* Set new address. */ 1099 iyinit(sc); 1100 break; 1101 } 1102 #endif /* NS */ 1103 default: 1104 iyinit(sc); 1105 break; 1106 } 1107 break; 1108 1109 case SIOCSIFFLAGS: 1110 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1111 if ((ifp->if_flags & IFF_UP) == 0 && 1112 (ifp->if_flags & IFF_RUNNING) != 0) { 1113 /* 1114 * If interface is marked down and it is running, then 1115 * stop it. 1116 */ 1117 iystop(sc); 1118 ifp->if_flags &= ~IFF_RUNNING; 1119 } else if ((ifp->if_flags & IFF_UP) != 0 && 1120 (ifp->if_flags & IFF_RUNNING) == 0) { 1121 /* 1122 * If interface is marked up and it is stopped, then 1123 * start it. 1124 */ 1125 iyinit(sc); 1126 } else { 1127 /* 1128 * Reset the interface to pick up changes in any other 1129 * flags that affect hardware registers. 1130 */ 1131 iystop(sc); 1132 iyinit(sc); 1133 } 1134 #ifdef IYDEBUGX 1135 if (ifp->if_flags & IFF_DEBUG) 1136 sc->sc_debug = IFY_ALL; 1137 else 1138 sc->sc_debug = 0; 1139 #endif 1140 break; 1141 1142 #if 0 /* XXX */ 1143 case SIOCADDMULTI: 1144 case SIOCDELMULTI: 1145 error = (cmd == SIOCADDMULTI) ? 1146 ether_addmulti(ifr, &sc->sc_ethercom): 1147 ether_delmulti(ifr, &sc->sc_ethercom); 1148 1149 if (error == ENETRESET) { 1150 /* 1151 * Multicast list has changed; set the hardware filter 1152 * accordingly. 1153 */ 1154 iy_mc_reset(sc); /* XXX */ 1155 error = 0; 1156 } 1157 break; 1158 #endif 1159 case SIOCSIFMEDIA: 1160 case SIOCGIFMEDIA: 1161 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1162 break; 1163 default: 1164 error = EINVAL; 1165 } 1166 splx(s); 1167 return error; 1168 } 1169 1170 int 1171 iy_mediachange(ifp) 1172 struct ifnet *ifp; 1173 { 1174 struct iy_softc *sc = ifp->if_softc; 1175 1176 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1177 return EINVAL; 1178 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1179 case IFM_10_5: 1180 case IFM_10_2: 1181 case IFM_10_T: 1182 case IFM_AUTO: 1183 iystop(sc); 1184 iyinit(sc); 1185 return 0; 1186 default: 1187 return EINVAL; 1188 } 1189 } 1190 1191 void 1192 iy_mediastatus(ifp, ifmr) 1193 struct ifnet *ifp; 1194 struct ifmediareq *ifmr; 1195 { 1196 struct iy_softc *sc = ifp->if_softc; 1197 1198 ifmr->ifm_active = sc->iy_media; 1199 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1200 } 1201 1202 #if 0 1203 static void 1204 iy_mc_reset(sc) 1205 struct iy_softc *sc; 1206 { 1207 struct ether_multi *enm; 1208 struct ether_multistep step; 1209 1210 /* 1211 * Step through the list of addresses. 1212 */ 1213 sc->mcast_count = 0; 1214 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 1215 while (enm) { 1216 if (sc->mcast_count >= MAXMCAST || 1217 bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1218 sc->sc_ethercom.ec_if.if_flags |= IFF_ALLMULTI; 1219 iyioctl(&sc->sc_ethercom.ec_if, SIOCSIFFLAGS, 1220 (void *)0); 1221 goto setflag; 1222 } 1223 1224 bcopy(enm->enm_addrlo, &sc->mcast_addrs[sc->mcast_count], 6); 1225 sc->mcast_count++; 1226 ETHER_NEXT_MULTI(step, enm); 1227 } 1228 setflag: 1229 sc->want_mcsetup = 1; 1230 } 1231 1232 #ifdef IYDEBUG 1233 void 1234 print_rbd(rbd) 1235 volatile struct ie_recv_buf_desc *rbd; 1236 { 1237 1238 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1239 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1240 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1241 rbd->mbz); 1242 } 1243 #endif 1244 #endif 1245 1246 void 1247 iyprobemem(sc) 1248 struct iy_softc *sc; 1249 { 1250 bus_space_tag_t iot; 1251 bus_space_handle_t ioh; 1252 int testing; 1253 1254 iot = sc->sc_iot; 1255 ioh = sc->sc_ioh; 1256 1257 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1258 delay(1); 1259 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1260 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1261 1262 for (testing=65536; testing >= 4096; testing >>= 1) { 1263 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1264 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1265 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1266 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1267 #ifdef IYMEMDEBUG 1268 printf("%s: Didn't keep 0xdead at 0x%x\n", 1269 sc->sc_dev.dv_xname, testing-2); 1270 #endif 1271 continue; 1272 } 1273 1274 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1275 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1276 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1277 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1278 #ifdef IYMEMDEBUG 1279 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1280 sc->sc_dev.dv_xname, testing-2); 1281 #endif 1282 continue; 1283 } 1284 1285 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1286 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1287 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1288 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1289 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1290 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1291 #ifdef IYMEMDEBUG 1292 printf("%s: 0x%x alias of 0x0\n", 1293 sc->sc_dev.dv_xname, testing >> 1); 1294 #endif 1295 continue; 1296 } 1297 1298 break; 1299 } 1300 1301 sc->sram = testing; 1302 1303 switch(testing) { 1304 case 65536: 1305 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1306 sc->rx_size = 44*1024; 1307 break; 1308 1309 case 32768: 1310 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1311 sc->rx_size = 22*1024; 1312 break; 1313 1314 case 16384: 1315 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1316 sc->rx_size = 10*1024; 1317 break; 1318 default: 1319 sc->rx_size = testing/2; 1320 break; 1321 } 1322 sc->tx_size = testing - sc->rx_size; 1323 } 1324 1325 static int 1326 eepromreadall(iot, ioh, wordp, maxi) 1327 bus_space_tag_t iot; 1328 bus_space_handle_t ioh; 1329 u_int16_t *wordp; 1330 int maxi; 1331 { 1332 int i; 1333 u_int16_t checksum, tmp; 1334 1335 checksum = 0; 1336 1337 for (i=0; i<EEPP_LENGTH; ++i) { 1338 tmp = eepromread(iot, ioh, i); 1339 checksum += tmp; 1340 if (i<maxi) 1341 wordp[i] = tmp; 1342 } 1343 1344 if (checksum != EEPP_CHKSUM) { 1345 #ifdef IYDEBUG 1346 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1347 checksum, EEPP_CHKSUM); 1348 #endif 1349 return 1; 1350 } 1351 return 0; 1352 } 1353
Indexes created Thu Sep 25 02:09:54 GMT 2025