if_iy.c revision 1.25
1 /* $NetBSD: if_iy.c,v 1.25 1998/07/28 16:02:34 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include "opt_inet.h" 37 #include "opt_ns.h" 38 #include "bpfilter.h" 39 #include "rnd.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/buf.h> 45 #include <sys/protosw.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/syslog.h> 50 #include <sys/device.h> 51 #if NRND > 0 52 #include <sys/rnd.h> 53 #endif 54 55 #include <net/if.h> 56 #include <net/if_types.h> 57 #include <net/if_dl.h> 58 59 #include <net/if_ether.h> 60 61 #if NBPFILTER > 0 62 #include <net/bpf.h> 63 #include <net/bpfdesc.h> 64 #endif 65 66 #ifdef INET 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/ip.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 #ifdef NS 75 #include <netns/ns.h> 76 #include <netns/ns_if.h> 77 #endif 78 79 #if defined(SIOCSIFMEDIA) 80 #include <net/if_media.h> 81 #endif 82 83 #include <vm/vm.h> 84 85 #include <machine/cpu.h> 86 #include <machine/bus.h> 87 #include <machine/intr.h> 88 89 #include <dev/isa/isareg.h> 90 #include <dev/isa/isavar.h> 91 #include <dev/ic/i82595reg.h> 92 93 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 94 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 95 96 /* 97 * Ethernet status, per interface. 98 */ 99 struct iy_softc { 100 struct device sc_dev; 101 void *sc_ih; 102 103 bus_space_tag_t sc_iot; 104 bus_space_handle_t sc_ioh; 105 106 struct ethercom sc_ethercom; 107 108 struct ifmedia iy_ifmedia; 109 int iy_media; 110 111 int mappedirq; 112 113 int hard_vers; 114 115 int promisc; 116 117 int sram, tx_size, rx_size; 118 119 int tx_start, tx_end, tx_last; 120 int rx_start; 121 122 #ifdef IYDEBUG 123 int sc_debug; 124 #endif 125 126 #if NRND > 0 127 rndsource_element_t rnd_source; 128 #endif 129 }; 130 131 void iywatchdog __P((struct ifnet *)); 132 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 133 int iyintr __P((void *)); 134 void iyinit __P((struct iy_softc *)); 135 void iystop __P((struct iy_softc *)); 136 void iystart __P((struct ifnet *)); 137 138 void iy_intr_rx __P((struct iy_softc *)); 139 void iy_intr_tx __P((struct iy_softc *)); 140 141 void iyreset __P((struct iy_softc *)); 142 void iy_readframe __P((struct iy_softc *, int)); 143 void iy_drop_packet_buffer __P((struct iy_softc *)); 144 void iy_find_mem_size __P((struct iy_softc *)); 145 void iyrint __P((struct iy_softc *)); 146 void iytint __P((struct iy_softc *)); 147 void iyxmit __P((struct iy_softc *)); 148 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 149 void iyprobemem __P((struct iy_softc *)); 150 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 151 int)); 152 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 153 /* 154 * void iymeminit __P((void *, struct iy_softc *)); 155 * static int iy_mc_setup __P((struct iy_softc *, void *)); 156 * static void iy_mc_reset __P((struct iy_softc *)); 157 */ 158 #ifdef IYDEBUGX 159 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 160 161 int in_ifrint = 0; 162 int in_iftint = 0; 163 #endif 164 165 int iy_mediachange __P((struct ifnet *)); 166 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 167 168 int iyprobe __P((struct device *, struct cfdata *, void *)); 169 void iyattach __P((struct device *, struct device *, void *)); 170 171 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 172 173 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 174 int)); 175 176 struct cfattach iy_ca = { 177 sizeof(struct iy_softc), iyprobe, iyattach 178 }; 179 180 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 181 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 182 183 int 184 iyprobe(parent, match, aux) 185 struct device *parent; 186 struct cfdata *match; 187 void *aux; 188 { 189 struct isa_attach_args *ia = aux; 190 u_int16_t eaddr[8]; 191 192 bus_space_tag_t iot; 193 bus_space_handle_t ioh; 194 195 u_int8_t c, d; 196 197 iot = ia->ia_iot; 198 199 if (ia->ia_iobase == IOBASEUNK) 200 return 0; 201 202 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 203 return 0; 204 205 /* try to find the round robin sig: */ 206 207 c = bus_space_read_1(iot, ioh, ID_REG); 208 if ((c & ID_REG_MASK) != ID_REG_SIG) 209 goto out; 210 211 d = bus_space_read_1(iot, ioh, ID_REG); 212 if ((d & ID_REG_MASK) != ID_REG_SIG) 213 goto out; 214 215 if (((d-c) & R_ROBIN_BITS) != 0x40) 216 goto out; 217 218 d = bus_space_read_1(iot, ioh, ID_REG); 219 if ((d & ID_REG_MASK) != ID_REG_SIG) 220 goto out; 221 222 if (((d-c) & R_ROBIN_BITS) != 0x80) 223 goto out; 224 225 d = bus_space_read_1(iot, ioh, ID_REG); 226 if ((d & ID_REG_MASK) != ID_REG_SIG) 227 goto out; 228 229 if (((d-c) & R_ROBIN_BITS) != 0xC0) 230 goto out; 231 232 d = bus_space_read_1(iot, ioh, ID_REG); 233 if ((d & ID_REG_MASK) != ID_REG_SIG) 234 goto out; 235 236 if (((d-c) & R_ROBIN_BITS) != 0x00) 237 goto out; 238 239 #ifdef IYDEBUG 240 printf("iyprobe verified working ID reg.\n"); 241 #endif 242 243 if (eepromreadall(iot, ioh, eaddr, 8)) 244 goto out; 245 246 if (ia->ia_irq == IRQUNK) 247 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 248 249 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 250 goto out; 251 252 if (eepro_revirqmap[ia->ia_irq] == 0xff) 253 goto out; 254 255 /* now lets reset the chip */ 256 257 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 258 delay(200); 259 260 ia->ia_iosize = 16; 261 262 bus_space_unmap(iot, ioh, 16); 263 return 1; /* found */ 264 out: 265 bus_space_unmap(iot, ioh, 16); 266 return 0; 267 } 268 269 void 270 iyattach(parent, self, aux) 271 struct device *parent, *self; 272 void *aux; 273 { 274 struct iy_softc *sc = (void *)self; 275 struct isa_attach_args *ia = aux; 276 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 277 bus_space_tag_t iot; 278 bus_space_handle_t ioh; 279 unsigned temp; 280 u_int16_t eaddr[8]; 281 u_int8_t myaddr[ETHER_ADDR_LEN]; 282 int eirq; 283 284 iot = ia->ia_iot; 285 286 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 287 printf(": can't map i/o space\n"); 288 return; 289 } 290 291 sc->sc_iot = iot; 292 sc->sc_ioh = ioh; 293 294 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 295 296 /* now let's reset the chip */ 297 298 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 299 delay(200); 300 301 iyprobemem(sc); 302 303 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 304 ifp->if_softc = sc; 305 ifp->if_start = iystart; 306 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS; 307 /* XXX todo: | IFF_MULTICAST */ 308 309 ifp->if_ioctl = iyioctl; 310 ifp->if_watchdog = iywatchdog; 311 312 (void)eepromreadall(iot, ioh, eaddr, 8); 313 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 314 315 #ifdef DIAGNOSTICS 316 if ((eaddr[EEPPEther0] != 317 eepromread(iot, ioh, EEPPEther0a)) && 318 (eaddr[EEPPEther1] != 319 eepromread(iot, ioh, EEPPEther1a)) && 320 (eaddr[EEPPEther2] != 321 eepromread(iot, ioh, EEPPEther2a))) 322 323 printf("EEPROM Ethernet address differs from copy\n"); 324 #endif 325 326 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 327 myaddr[0] = eaddr[EEPPEther0] >> 8; 328 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 329 myaddr[2] = eaddr[EEPPEther1] >> 8; 330 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 331 myaddr[4] = eaddr[EEPPEther2] >> 8; 332 333 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 334 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 335 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 336 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 337 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 338 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 339 /* Attach the interface. */ 340 if_attach(ifp); 341 ether_ifattach(ifp, myaddr); 342 printf(": address %s, rev. %d, %d kB\n", 343 ether_sprintf(myaddr), 344 sc->hard_vers, sc->sram/1024); 345 346 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 347 if (eirq != ia->ia_irq) 348 printf("%s: EEPROM irq setting %d ignored\n", 349 sc->sc_dev.dv_xname, eirq); 350 351 #if NBPFILTER > 0 352 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 353 #endif 354 355 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 356 IPL_NET, iyintr, sc); 357 358 #if NRND > 0 359 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET); 360 #endif 361 362 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 363 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 364 } 365 366 void 367 iystop(sc) 368 struct iy_softc *sc; 369 { 370 bus_space_tag_t iot; 371 bus_space_handle_t ioh; 372 #ifdef IYDEBUG 373 u_int p, v; 374 #endif 375 376 iot = sc->sc_iot; 377 ioh = sc->sc_ioh; 378 379 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 380 381 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 382 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 383 384 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 385 delay(200); 386 #ifdef IYDEBUG 387 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 388 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 389 p = sc->tx_last; 390 if (!p) 391 p = sc->tx_start; 392 do { 393 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 394 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 395 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 396 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 397 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 398 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 399 printf(" 0x%04x", p); 400 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 401 printf(" 0x%b\n", v, "\020\020Ch"); 402 403 } while (v & 0x8000); 404 #endif 405 sc->tx_start = sc->tx_end = sc->rx_size; 406 sc->tx_last = 0; 407 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 408 } 409 410 void 411 iyreset(sc) 412 struct iy_softc *sc; 413 { 414 int s; 415 s = splimp(); 416 iystop(sc); 417 iyinit(sc); 418 splx(s); 419 } 420 421 void 422 iyinit(sc) 423 struct iy_softc *sc; 424 { 425 int i; 426 unsigned temp; 427 struct ifnet *ifp; 428 bus_space_tag_t iot; 429 bus_space_handle_t ioh; 430 431 iot = sc->sc_iot; 432 ioh = sc->sc_ioh; 433 434 ifp = &sc->sc_ethercom.ec_if; 435 #ifdef IYDEBUG 436 printf("ifp is %p\n", ifp); 437 #endif 438 439 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 440 441 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 442 if (temp & 0x10) 443 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 444 445 for (i=0; i<6; ++i) { 446 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 447 } 448 449 temp = bus_space_read_1(iot, ioh, REG1); 450 bus_space_write_1(iot, ioh, REG1, 451 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 452 453 #ifdef IYUSEOLD 454 temp = bus_space_read_1(iot, ioh, RECV_MODES_REG); 455 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp | MATCH_BRDCST); 456 #else 457 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 458 temp = MATCH_ALL; 459 } else if (sc->sc_ethercom.ec_multicnt) { 460 temp = MATCH_MULTI; 461 } else 462 temp = MATCH_ID; 463 464 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 465 #endif 466 #ifdef IYDEBUG 467 printf("%s: RECV_MODES were %b set to %b\n", 468 sc->sc_dev.dv_xname, 469 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 470 temp|MATCH_BRDCST, 471 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 472 #endif 473 474 475 delay(500000); /* for the hardware to test for the connector */ 476 477 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 478 #ifdef IYDEBUG 479 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 480 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 481 #endif 482 temp = (temp & TEST_MODE_MASK); 483 484 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 485 case IFM_10_5: 486 temp &= ~ (BNC_BIT | TPE_BIT); 487 break; 488 489 case IFM_10_2: 490 temp = (temp & ~TPE_BIT) | BNC_BIT; 491 break; 492 493 case IFM_10_T: 494 temp = (temp & ~BNC_BIT) | TPE_BIT; 495 break; 496 default: 497 /* nothing; leave as it is */ 498 } 499 switch (temp & (BNC_BIT | TPE_BIT)) { 500 case BNC_BIT: 501 sc->iy_media = IFM_ETHER | IFM_10_2; 502 break; 503 case TPE_BIT: 504 sc->iy_media = IFM_ETHER | IFM_10_T; 505 break; 506 default: 507 sc->iy_media = IFM_ETHER | IFM_10_5; 508 } 509 510 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 511 #ifdef IYDEBUG 512 printf("changed to 0x%b\n", 513 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 514 #endif 515 516 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 517 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 518 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 519 520 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 521 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 522 523 #ifdef IYDEBUG 524 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 525 temp, "\020\4bad_irq\010flash/boot present"); 526 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 527 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 528 temp, "\020\4BAD IRQ\010flash/boot present"); 529 #endif 530 531 532 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 533 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 534 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 535 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 536 537 temp = bus_space_read_1(iot, ioh, REG1); 538 #ifdef IYDEBUG 539 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 540 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 541 #endif 542 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 543 544 #ifdef IYDEBUG 545 temp = bus_space_read_1(iot, ioh, REG1); 546 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 547 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 548 #endif 549 550 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 551 552 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 553 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 554 555 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 556 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 557 sc->rx_start = 0; 558 559 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 560 delay(200); 561 562 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 563 564 sc->tx_start = sc->tx_end = sc->rx_size; 565 sc->tx_last = 0; 566 567 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 568 569 ifp->if_flags |= IFF_RUNNING; 570 ifp->if_flags &= ~IFF_OACTIVE; 571 } 572 573 void 574 iystart(ifp) 575 struct ifnet *ifp; 576 { 577 struct iy_softc *sc; 578 579 580 struct mbuf *m0, *m; 581 u_int len, pad, last, end; 582 u_int llen, residual; 583 int avail; 584 caddr_t data; 585 u_int16_t resval, stat; 586 bus_space_tag_t iot; 587 bus_space_handle_t ioh; 588 589 #ifdef IYDEBUG 590 printf("iystart called\n"); 591 #endif 592 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 593 return; 594 595 sc = ifp->if_softc; 596 iot = sc->sc_iot; 597 ioh = sc->sc_ioh; 598 599 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 600 #ifdef IYDEBUG 601 printf("%s: trying to write another packet to the hardware\n", 602 sc->sc_dev.dv_xname); 603 #endif 604 605 /* We need to use m->m_pkthdr.len, so require the header */ 606 if ((m0->m_flags & M_PKTHDR) == 0) 607 panic("iystart: no header mbuf"); 608 609 len = m0->m_pkthdr.len; 610 pad = len & 1; 611 612 #ifdef IYDEBUG 613 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 614 #endif 615 if (len < ETHER_MIN_LEN) { 616 pad = ETHER_MIN_LEN - len; 617 } 618 619 if (len + pad > ETHER_MAX_LEN) { 620 /* packet is obviously too large: toss it */ 621 ++ifp->if_oerrors; 622 IF_DEQUEUE(&ifp->if_snd, m0); 623 m_freem(m0); 624 continue; 625 } 626 627 #if NBPFILTER > 0 628 if (ifp->if_bpf) 629 bpf_mtap(ifp->if_bpf, m0); 630 #endif 631 632 avail = sc->tx_start - sc->tx_end; 633 if (avail <= 0) 634 avail += sc->tx_size; 635 636 #ifdef IYDEBUG 637 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 638 #endif 639 /* 640 * we MUST RUN at splnet here --- 641 * XXX todo: or even turn off the boards ints ??? hm... 642 */ 643 644 /* See if there is room to put another packet in the buffer. */ 645 646 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 647 #ifdef IYDEBUG 648 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 649 sc->sc_dev.dv_xname, len, avail); 650 #endif 651 ifp->if_flags |= IFF_OACTIVE; 652 return; 653 } 654 655 /* we know it fits in the hardware now, so dequeue it */ 656 IF_DEQUEUE(&ifp->if_snd, m0); 657 658 last = sc->tx_end; 659 end = last + pad + len + I595_XMT_HDRLEN; 660 661 if (end >= sc->sram) { 662 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 663 /* keep header in one piece */ 664 last = sc->rx_size; 665 end = last + pad + len + I595_XMT_HDRLEN; 666 } else 667 end -= sc->tx_size; 668 } 669 670 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 671 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 672 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 673 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 674 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 675 676 residual = resval = 0; 677 678 while ((m = m0)!=0) { 679 data = mtod(m, caddr_t); 680 llen = m->m_len; 681 if (residual) { 682 #ifdef IYDEBUG 683 printf("%s: merging residual with next mbuf.\n", 684 sc->sc_dev.dv_xname); 685 #endif 686 resval |= *data << 8; 687 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 688 --llen; 689 ++data; 690 } 691 if (llen > 1) 692 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 693 data, llen>>1); 694 residual = llen & 1; 695 if (residual) { 696 resval = *(data + llen - 1); 697 #ifdef IYDEBUG 698 printf("%s: got odd mbuf to send.\n", 699 sc->sc_dev.dv_xname); 700 #endif 701 } 702 703 MFREE(m, m0); 704 } 705 706 if (residual) 707 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 708 709 pad >>= 1; 710 while (pad-- > 0) 711 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 712 713 #ifdef IYDEBUG 714 printf("%s: new last = 0x%x, end = 0x%x.\n", 715 sc->sc_dev.dv_xname, last, end); 716 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 717 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 718 #endif 719 720 if (sc->tx_start != sc->tx_end) { 721 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 722 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 723 724 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 725 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 726 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 727 #ifdef IYDEBUG 728 printf("%s: setting 0x%x to 0x%x\n", 729 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 730 stat | CHAIN); 731 #endif 732 } 733 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 734 735 /* XXX todo: enable ints here if disabled */ 736 737 ++ifp->if_opackets; 738 739 if (sc->tx_start == sc->tx_end) { 740 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 741 bus_space_write_1(iot, ioh, 0, XMT_CMD); 742 sc->tx_start = last; 743 #ifdef IYDEBUG 744 printf("%s: writing 0x%x to XAR and giving XCMD\n", 745 sc->sc_dev.dv_xname, last); 746 #endif 747 } else { 748 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 749 #ifdef IYDEBUG 750 printf("%s: giving RESUME_XCMD\n", 751 sc->sc_dev.dv_xname); 752 #endif 753 } 754 sc->tx_last = last; 755 sc->tx_end = end; 756 } 757 } 758 759 760 static __inline void 761 eepromwritebit(iot, ioh, what) 762 bus_space_tag_t iot; 763 bus_space_handle_t ioh; 764 int what; 765 { 766 bus_space_write_1(iot, ioh, EEPROM_REG, what); 767 delay(1); 768 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 769 delay(1); 770 bus_space_write_1(iot, ioh, EEPROM_REG, what); 771 delay(1); 772 } 773 774 static __inline int 775 eepromreadbit(iot, ioh) 776 bus_space_tag_t iot; 777 bus_space_handle_t ioh; 778 { 779 int b; 780 781 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 782 delay(1); 783 b = bus_space_read_1(iot, ioh, EEPROM_REG); 784 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 785 delay(1); 786 787 return ((b & EEDO) != 0); 788 } 789 790 static u_int16_t 791 eepromread(iot, ioh, offset) 792 bus_space_tag_t iot; 793 bus_space_handle_t ioh; 794 int offset; 795 { 796 volatile int i; 797 volatile int j; 798 volatile u_int16_t readval; 799 800 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 801 delay(1); 802 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 803 delay(1); 804 805 eepromwritebit(iot, ioh, EECS|EEDI); 806 eepromwritebit(iot, ioh, EECS|EEDI); 807 eepromwritebit(iot, ioh, EECS); 808 809 for (j=5; j>=0; --j) { 810 if ((offset>>j) & 1) 811 eepromwritebit(iot, ioh, EECS|EEDI); 812 else 813 eepromwritebit(iot, ioh, EECS); 814 } 815 816 for (readval=0, i=0; i<16; ++i) { 817 readval<<=1; 818 readval |= eepromreadbit(iot, ioh); 819 } 820 821 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 822 delay(1); 823 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 824 825 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 826 827 return readval; 828 } 829 830 /* 831 * Device timeout/watchdog routine. Entered if the device neglects to generate 832 * an interrupt after a transmit has been started on it. 833 */ 834 void 835 iywatchdog(ifp) 836 struct ifnet *ifp; 837 { 838 struct iy_softc *sc = ifp->if_softc; 839 840 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 841 ++sc->sc_ethercom.ec_if.if_oerrors; 842 iyreset(sc); 843 } 844 845 /* 846 * What to do upon receipt of an interrupt. 847 */ 848 int 849 iyintr(arg) 850 void *arg; 851 { 852 struct iy_softc *sc = arg; 853 bus_space_tag_t iot; 854 bus_space_handle_t ioh; 855 856 register u_short status; 857 858 iot = sc->sc_iot; 859 ioh = sc->sc_ioh; 860 861 status = bus_space_read_1(iot, ioh, STATUS_REG); 862 #ifdef IYDEBUG 863 if (status & ALL_INTS) { 864 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 865 "\020\1RX_STP\2RX\3TX\4EXEC"); 866 if (status & EXEC_INT) 867 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 868 "\020\6ABORT"); 869 else 870 printf("\n"); 871 } 872 #endif 873 if (((status & (RX_INT | TX_INT)) == 0)) 874 return 0; 875 876 if (status & RX_INT) { 877 iy_intr_rx(sc); 878 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 879 } else if (status & TX_INT) { 880 iy_intr_tx(sc); 881 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 882 } 883 884 #if NRND > 0 885 rnd_add_uint32(&sc->rnd_source, status); 886 #endif 887 888 return 1; 889 } 890 891 void 892 iyget(sc, iot, ioh, rxlen) 893 struct iy_softc *sc; 894 bus_space_tag_t iot; 895 bus_space_handle_t ioh; 896 int rxlen; 897 { 898 struct mbuf *m, *top, **mp; 899 struct ether_header *eh; 900 struct ifnet *ifp; 901 int len; 902 903 ifp = &sc->sc_ethercom.ec_if; 904 905 MGETHDR(m, M_DONTWAIT, MT_DATA); 906 if (m == 0) 907 goto dropped; 908 m->m_pkthdr.rcvif = ifp; 909 m->m_pkthdr.len = rxlen; 910 len = MHLEN; 911 top = 0; 912 mp = ⊤ 913 914 while (rxlen > 0) { 915 if (top) { 916 MGET(m, M_DONTWAIT, MT_DATA); 917 if (m == 0) { 918 m_freem(top); 919 goto dropped; 920 } 921 len = MLEN; 922 } 923 if (rxlen >= MINCLSIZE) { 924 MCLGET(m, M_DONTWAIT); 925 if ((m->m_flags & M_EXT) == 0) { 926 m_free(m); 927 m_freem(top); 928 goto dropped; 929 } 930 len = MCLBYTES; 931 } 932 len = min(rxlen, len); 933 if (len > 1) { 934 len &= ~1; 935 936 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 937 mtod(m, caddr_t), len/2); 938 } else { 939 #ifdef IYDEBUG 940 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 941 #endif 942 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 943 MEM_PORT_REG); 944 } 945 m->m_len = len; 946 rxlen -= len; 947 *mp = m; 948 mp = &m->m_next; 949 } 950 /* XXX receive the top here */ 951 ++ifp->if_ipackets; 952 953 eh = mtod(top, struct ether_header *); 954 955 #if NBPFILTER > 0 956 if (ifp->if_bpf) { 957 bpf_mtap(ifp->if_bpf, top); 958 if ((ifp->if_flags & IFF_PROMISC) && 959 (eh->ether_dhost[0] & 1) == 0 && 960 bcmp(eh->ether_dhost, 961 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 962 sizeof(eh->ether_dhost)) != 0) { 963 964 m_freem(top); 965 return; 966 } 967 } 968 #endif 969 m_adj(top, sizeof(struct ether_header)); 970 ether_input(ifp, eh, top); 971 return; 972 973 dropped: 974 ++ifp->if_ierrors; 975 return; 976 } 977 void 978 iy_intr_rx(sc) 979 struct iy_softc *sc; 980 { 981 struct ifnet *ifp; 982 bus_space_tag_t iot; 983 bus_space_handle_t ioh; 984 985 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 986 987 iot = sc->sc_iot; 988 ioh = sc->sc_ioh; 989 ifp = &sc->sc_ethercom.ec_if; 990 991 rxadrs = sc->rx_start; 992 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 993 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 994 rxnext = 0; 995 996 while (rxevnt == RCV_DONE) { 997 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 998 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 999 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1000 #ifdef IYDEBUG 1001 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 1002 sc->sc_dev.dv_xname, rxadrs, rxstatus, 1003 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1004 "\014CRCERR\015LENERR\016RCVOK\020TYP", 1005 rxnext, rxlen); 1006 #endif 1007 iyget(sc, iot, ioh, rxlen); 1008 1009 /* move stop address */ 1010 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1011 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1012 1013 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1014 rxadrs = rxnext; 1015 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1016 } 1017 sc->rx_start = rxnext; 1018 } 1019 1020 void 1021 iy_intr_tx(sc) 1022 struct iy_softc *sc; 1023 { 1024 bus_space_tag_t iot; 1025 bus_space_handle_t ioh; 1026 struct ifnet *ifp; 1027 u_int txstatus, txstat2, txlen, txnext; 1028 1029 ifp = &sc->sc_ethercom.ec_if; 1030 iot = sc->sc_iot; 1031 ioh = sc->sc_ioh; 1032 1033 while (sc->tx_start != sc->tx_end) { 1034 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1035 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1036 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1037 break; 1038 1039 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1040 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1041 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1042 #ifdef IYDEBUG 1043 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1044 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1045 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1046 txnext, txlen); 1047 #endif 1048 if (txlen & CHAIN) 1049 sc->tx_start = txnext; 1050 else 1051 sc->tx_start = sc->tx_end; 1052 ifp->if_flags &= ~IFF_OACTIVE; 1053 1054 if ((txstat2 & 0x2000) == 0) 1055 ++ifp->if_oerrors; 1056 if (txstat2 & 0x000f) 1057 ifp->if_oerrors += txstat2 & 0x000f; 1058 } 1059 ifp->if_flags &= ~IFF_OACTIVE; 1060 } 1061 1062 int 1063 iyioctl(ifp, cmd, data) 1064 register struct ifnet *ifp; 1065 u_long cmd; 1066 caddr_t data; 1067 { 1068 struct iy_softc *sc; 1069 struct ifaddr *ifa; 1070 struct ifreq *ifr; 1071 int s, error = 0; 1072 1073 sc = ifp->if_softc; 1074 ifa = (struct ifaddr *)data; 1075 ifr = (struct ifreq *)data; 1076 1077 #ifdef IYDEBUG 1078 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1079 ifp, ifp->if_xname, cmd, data); 1080 #endif 1081 1082 s = splimp(); 1083 1084 switch (cmd) { 1085 1086 case SIOCSIFADDR: 1087 ifp->if_flags |= IFF_UP; 1088 1089 switch (ifa->ifa_addr->sa_family) { 1090 #ifdef INET 1091 case AF_INET: 1092 iyinit(sc); 1093 arp_ifinit(ifp, ifa); 1094 break; 1095 #endif 1096 #ifdef NS 1097 /* XXX - This code is probably wrong. */ 1098 case AF_NS: 1099 { 1100 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1101 1102 if (ns_nullhost(*ina)) 1103 ina->x_host = *(union ns_host *) 1104 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1105 else 1106 bcopy(ina->x_host.c_host, 1107 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1108 ETHER_ADDR_LEN); 1109 /* Set new address. */ 1110 iyinit(sc); 1111 break; 1112 } 1113 #endif /* NS */ 1114 default: 1115 iyinit(sc); 1116 break; 1117 } 1118 break; 1119 1120 case SIOCSIFFLAGS: 1121 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1122 if ((ifp->if_flags & IFF_UP) == 0 && 1123 (ifp->if_flags & IFF_RUNNING) != 0) { 1124 /* 1125 * If interface is marked down and it is running, then 1126 * stop it. 1127 */ 1128 iystop(sc); 1129 ifp->if_flags &= ~IFF_RUNNING; 1130 } else if ((ifp->if_flags & IFF_UP) != 0 && 1131 (ifp->if_flags & IFF_RUNNING) == 0) { 1132 /* 1133 * If interface is marked up and it is stopped, then 1134 * start it. 1135 */ 1136 iyinit(sc); 1137 } else { 1138 /* 1139 * Reset the interface to pick up changes in any other 1140 * flags that affect hardware registers. 1141 */ 1142 iystop(sc); 1143 iyinit(sc); 1144 } 1145 #ifdef IYDEBUGX 1146 if (ifp->if_flags & IFF_DEBUG) 1147 sc->sc_debug = IFY_ALL; 1148 else 1149 sc->sc_debug = 0; 1150 #endif 1151 break; 1152 1153 #if 0 /* XXX */ 1154 case SIOCADDMULTI: 1155 case SIOCDELMULTI: 1156 error = (cmd == SIOCADDMULTI) ? 1157 ether_addmulti(ifr, &sc->sc_ethercom): 1158 ether_delmulti(ifr, &sc->sc_ethercom); 1159 1160 if (error == ENETRESET) { 1161 /* 1162 * Multicast list has changed; set the hardware filter 1163 * accordingly. 1164 */ 1165 iy_mc_reset(sc); /* XXX */ 1166 error = 0; 1167 } 1168 break; 1169 #endif 1170 case SIOCSIFMEDIA: 1171 case SIOCGIFMEDIA: 1172 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1173 break; 1174 default: 1175 error = EINVAL; 1176 } 1177 splx(s); 1178 return error; 1179 } 1180 1181 int 1182 iy_mediachange(ifp) 1183 struct ifnet *ifp; 1184 { 1185 struct iy_softc *sc = ifp->if_softc; 1186 1187 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1188 return EINVAL; 1189 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1190 case IFM_10_5: 1191 case IFM_10_2: 1192 case IFM_10_T: 1193 case IFM_AUTO: 1194 iystop(sc); 1195 iyinit(sc); 1196 return 0; 1197 default: 1198 return EINVAL; 1199 } 1200 } 1201 1202 void 1203 iy_mediastatus(ifp, ifmr) 1204 struct ifnet *ifp; 1205 struct ifmediareq *ifmr; 1206 { 1207 struct iy_softc *sc = ifp->if_softc; 1208 1209 ifmr->ifm_active = sc->iy_media; 1210 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1211 } 1212 1213 #if 0 1214 static void 1215 iy_mc_reset(sc) 1216 struct iy_softc *sc; 1217 { 1218 struct ether_multi *enm; 1219 struct ether_multistep step; 1220 struct ethercom *ecp; 1221 struct ifnet *ifp; 1222 1223 ecp = &sc->sc_ethercom; 1224 ifp = &ecp->ec_if; 1225 1226 if (ecp->ec_multicnt > 63) { 1227 goto needallmulti; 1228 1229 } else if (ec->ec_multicnt > 0) { 1230 /* 1231 * Step through the list of addresses. 1232 */ 1233 ETHER_FIRST_MULTI(step, ecp, enm); 1234 while(enm) { 1235 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1236 goto needallmulti; 1237 } 1238 ETHER_NEXT_MULTI(step, enm); 1239 } 1240 /* OK, we really need to do it now: */ 1241 ETHER_FIRST_MULTI(step, ecp, enm); 1242 /* 1243 * XXX TBD: find a suitable place in the TX buffer for the 1244 * setup command, and write its header and our unicast address 1245 */ 1246 while(enm) { 1247 /* XXX TBD: write the next multicast address */ 1248 ETHER_NEXT_MULTI(step, enm); 1249 } 1250 /* XXX TBD: write command and wait for the result */ 1251 1252 } else { 1253 /* XXX TBD: setup for no multicasts */ 1254 } 1255 return; 1256 1257 needallmulti: 1258 ifp->if_flags |= IFF_ALLMULTI; 1259 iyioctl(ifp, SIOCSIFFLAGS, (void *)0); 1260 /* XXX TBD: and setup hardware for all multicasts */ 1261 return; 1262 } 1263 1264 #ifdef IYDEBUG 1265 void 1266 print_rbd(rbd) 1267 volatile struct ie_recv_buf_desc *rbd; 1268 { 1269 1270 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1271 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1272 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1273 rbd->mbz); 1274 } 1275 #endif 1276 #endif 1277 1278 void 1279 iyprobemem(sc) 1280 struct iy_softc *sc; 1281 { 1282 bus_space_tag_t iot; 1283 bus_space_handle_t ioh; 1284 int testing; 1285 1286 iot = sc->sc_iot; 1287 ioh = sc->sc_ioh; 1288 1289 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1290 delay(1); 1291 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1292 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1293 1294 for (testing=65536; testing >= 4096; testing >>= 1) { 1295 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1296 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1297 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1298 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1299 #ifdef IYMEMDEBUG 1300 printf("%s: Didn't keep 0xdead at 0x%x\n", 1301 sc->sc_dev.dv_xname, testing-2); 1302 #endif 1303 continue; 1304 } 1305 1306 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1307 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1308 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1309 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1310 #ifdef IYMEMDEBUG 1311 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1312 sc->sc_dev.dv_xname, testing-2); 1313 #endif 1314 continue; 1315 } 1316 1317 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1318 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1319 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1320 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1321 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1322 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1323 #ifdef IYMEMDEBUG 1324 printf("%s: 0x%x alias of 0x0\n", 1325 sc->sc_dev.dv_xname, testing >> 1); 1326 #endif 1327 continue; 1328 } 1329 1330 break; 1331 } 1332 1333 sc->sram = testing; 1334 1335 switch(testing) { 1336 case 65536: 1337 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1338 sc->rx_size = 44*1024; 1339 break; 1340 1341 case 32768: 1342 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1343 sc->rx_size = 22*1024; 1344 break; 1345 1346 case 16384: 1347 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1348 sc->rx_size = 10*1024; 1349 break; 1350 default: 1351 sc->rx_size = testing/2; 1352 break; 1353 } 1354 sc->tx_size = testing - sc->rx_size; 1355 } 1356 1357 static int 1358 eepromreadall(iot, ioh, wordp, maxi) 1359 bus_space_tag_t iot; 1360 bus_space_handle_t ioh; 1361 u_int16_t *wordp; 1362 int maxi; 1363 { 1364 int i; 1365 u_int16_t checksum, tmp; 1366 1367 checksum = 0; 1368 1369 for (i=0; i<EEPP_LENGTH; ++i) { 1370 tmp = eepromread(iot, ioh, i); 1371 checksum += tmp; 1372 if (i<maxi) 1373 wordp[i] = tmp; 1374 } 1375 1376 if (checksum != EEPP_CHKSUM) { 1377 #ifdef IYDEBUG 1378 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1379 checksum, EEPP_CHKSUM); 1380 #endif 1381 return 1; 1382 } 1383 return 0; 1384 } 1385
Indexes created Fri Sep 26 08:10:20 GMT 2025