if_iy.c revision 1.26
1 /* $NetBSD: if_iy.c,v 1.26 1998/07/30 16:40:19 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include "opt_inet.h" 37 #include "opt_ns.h" 38 #include "bpfilter.h" 39 #include "rnd.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/buf.h> 45 #include <sys/protosw.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/syslog.h> 50 #include <sys/device.h> 51 #if NRND > 0 52 #include <sys/rnd.h> 53 #endif 54 55 #include <net/if.h> 56 #include <net/if_types.h> 57 #include <net/if_dl.h> 58 59 #include <net/if_ether.h> 60 61 #if NBPFILTER > 0 62 #include <net/bpf.h> 63 #include <net/bpfdesc.h> 64 #endif 65 66 #ifdef INET 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/ip.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 #ifdef NS 75 #include <netns/ns.h> 76 #include <netns/ns_if.h> 77 #endif 78 79 #if defined(SIOCSIFMEDIA) 80 #include <net/if_media.h> 81 #endif 82 83 #include <vm/vm.h> 84 85 #include <machine/cpu.h> 86 #include <machine/bus.h> 87 #include <machine/intr.h> 88 89 #include <dev/isa/isareg.h> 90 #include <dev/isa/isavar.h> 91 #include <dev/ic/i82595reg.h> 92 93 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 94 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 95 96 /* 97 * Ethernet status, per interface. 98 */ 99 struct iy_softc { 100 struct device sc_dev; 101 void *sc_ih; 102 103 bus_space_tag_t sc_iot; 104 bus_space_handle_t sc_ioh; 105 106 struct ethercom sc_ethercom; 107 108 struct ifmedia iy_ifmedia; 109 int iy_media; 110 111 int mappedirq; 112 113 int hard_vers; 114 115 int promisc; 116 117 int sram, tx_size, rx_size; 118 119 int tx_start, tx_end, tx_last; 120 int rx_start; 121 122 int doing_mc_setup; 123 #ifdef IYDEBUG 124 int sc_debug; 125 #endif 126 127 #if NRND > 0 128 rndsource_element_t rnd_source; 129 #endif 130 }; 131 132 void iywatchdog __P((struct ifnet *)); 133 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 134 int iyintr __P((void *)); 135 void iyinit __P((struct iy_softc *)); 136 void iystop __P((struct iy_softc *)); 137 void iystart __P((struct ifnet *)); 138 139 void iy_intr_rx __P((struct iy_softc *)); 140 void iy_intr_tx __P((struct iy_softc *)); 141 142 void iyreset __P((struct iy_softc *)); 143 void iy_readframe __P((struct iy_softc *, int)); 144 void iy_drop_packet_buffer __P((struct iy_softc *)); 145 void iy_find_mem_size __P((struct iy_softc *)); 146 void iyrint __P((struct iy_softc *)); 147 void iytint __P((struct iy_softc *)); 148 void iyxmit __P((struct iy_softc *)); 149 static void iy_mc_setup __P((struct iy_softc *)); 150 static void iy_mc_reset __P((struct iy_softc *)); 151 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 152 void iyprobemem __P((struct iy_softc *)); 153 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 154 int)); 155 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 156 157 #ifdef IYDEBUGX 158 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 159 160 int in_ifrint = 0; 161 int in_iftint = 0; 162 #endif 163 164 int iy_mediachange __P((struct ifnet *)); 165 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 166 167 int iyprobe __P((struct device *, struct cfdata *, void *)); 168 void iyattach __P((struct device *, struct device *, void *)); 169 170 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 171 172 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 173 int)); 174 175 struct cfattach iy_ca = { 176 sizeof(struct iy_softc), iyprobe, iyattach 177 }; 178 179 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 180 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 181 182 int 183 iyprobe(parent, match, aux) 184 struct device *parent; 185 struct cfdata *match; 186 void *aux; 187 { 188 struct isa_attach_args *ia = aux; 189 u_int16_t eaddr[8]; 190 191 bus_space_tag_t iot; 192 bus_space_handle_t ioh; 193 194 u_int8_t c, d; 195 196 iot = ia->ia_iot; 197 198 if (ia->ia_iobase == IOBASEUNK) 199 return 0; 200 201 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 202 return 0; 203 204 /* try to find the round robin sig: */ 205 206 c = bus_space_read_1(iot, ioh, ID_REG); 207 if ((c & ID_REG_MASK) != ID_REG_SIG) 208 goto out; 209 210 d = bus_space_read_1(iot, ioh, ID_REG); 211 if ((d & ID_REG_MASK) != ID_REG_SIG) 212 goto out; 213 214 if (((d-c) & R_ROBIN_BITS) != 0x40) 215 goto out; 216 217 d = bus_space_read_1(iot, ioh, ID_REG); 218 if ((d & ID_REG_MASK) != ID_REG_SIG) 219 goto out; 220 221 if (((d-c) & R_ROBIN_BITS) != 0x80) 222 goto out; 223 224 d = bus_space_read_1(iot, ioh, ID_REG); 225 if ((d & ID_REG_MASK) != ID_REG_SIG) 226 goto out; 227 228 if (((d-c) & R_ROBIN_BITS) != 0xC0) 229 goto out; 230 231 d = bus_space_read_1(iot, ioh, ID_REG); 232 if ((d & ID_REG_MASK) != ID_REG_SIG) 233 goto out; 234 235 if (((d-c) & R_ROBIN_BITS) != 0x00) 236 goto out; 237 238 #ifdef IYDEBUG 239 printf("iyprobe verified working ID reg.\n"); 240 #endif 241 242 if (eepromreadall(iot, ioh, eaddr, 8)) 243 goto out; 244 245 if (ia->ia_irq == IRQUNK) 246 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 247 248 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 249 goto out; 250 251 if (eepro_revirqmap[ia->ia_irq] == 0xff) 252 goto out; 253 254 /* now lets reset the chip */ 255 256 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 257 delay(200); 258 259 ia->ia_iosize = 16; 260 261 bus_space_unmap(iot, ioh, 16); 262 return 1; /* found */ 263 out: 264 bus_space_unmap(iot, ioh, 16); 265 return 0; 266 } 267 268 void 269 iyattach(parent, self, aux) 270 struct device *parent, *self; 271 void *aux; 272 { 273 struct iy_softc *sc = (void *)self; 274 struct isa_attach_args *ia = aux; 275 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 276 bus_space_tag_t iot; 277 bus_space_handle_t ioh; 278 unsigned temp; 279 u_int16_t eaddr[8]; 280 u_int8_t myaddr[ETHER_ADDR_LEN]; 281 int eirq; 282 283 iot = ia->ia_iot; 284 285 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 286 printf(": can't map i/o space\n"); 287 return; 288 } 289 290 sc->sc_iot = iot; 291 sc->sc_ioh = ioh; 292 293 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 294 295 /* now let's reset the chip */ 296 297 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 298 delay(200); 299 300 iyprobemem(sc); 301 302 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 303 ifp->if_softc = sc; 304 ifp->if_start = iystart; 305 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 306 | IFF_MULTICAST; 307 308 sc->doing_mc_setup = 0; 309 310 ifp->if_ioctl = iyioctl; 311 ifp->if_watchdog = iywatchdog; 312 313 (void)eepromreadall(iot, ioh, eaddr, 8); 314 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 315 316 #ifdef DIAGNOSTICS 317 if ((eaddr[EEPPEther0] != 318 eepromread(iot, ioh, EEPPEther0a)) && 319 (eaddr[EEPPEther1] != 320 eepromread(iot, ioh, EEPPEther1a)) && 321 (eaddr[EEPPEther2] != 322 eepromread(iot, ioh, EEPPEther2a))) 323 324 printf("EEPROM Ethernet address differs from copy\n"); 325 #endif 326 327 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 328 myaddr[0] = eaddr[EEPPEther0] >> 8; 329 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 330 myaddr[2] = eaddr[EEPPEther1] >> 8; 331 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 332 myaddr[4] = eaddr[EEPPEther2] >> 8; 333 334 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 335 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 336 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 337 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 338 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 339 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 340 /* Attach the interface. */ 341 if_attach(ifp); 342 ether_ifattach(ifp, myaddr); 343 printf(": address %s, rev. %d, %d kB\n", 344 ether_sprintf(myaddr), 345 sc->hard_vers, sc->sram/1024); 346 347 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 348 if (eirq != ia->ia_irq) 349 printf("%s: EEPROM irq setting %d ignored\n", 350 sc->sc_dev.dv_xname, eirq); 351 352 #if NBPFILTER > 0 353 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 354 #endif 355 356 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 357 IPL_NET, iyintr, sc); 358 359 #if NRND > 0 360 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET); 361 #endif 362 363 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 364 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 365 } 366 367 void 368 iystop(sc) 369 struct iy_softc *sc; 370 { 371 bus_space_tag_t iot; 372 bus_space_handle_t ioh; 373 #ifdef IYDEBUG 374 u_int p, v; 375 #endif 376 377 iot = sc->sc_iot; 378 ioh = sc->sc_ioh; 379 380 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 381 382 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 383 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 384 385 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 386 delay(200); 387 #ifdef IYDEBUG 388 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 389 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 390 p = sc->tx_last; 391 if (!p) 392 p = sc->tx_start; 393 do { 394 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 395 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 396 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 397 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 398 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 399 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 400 printf(" 0x%04x", p); 401 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 402 printf(" 0x%b\n", v, "\020\020Ch"); 403 404 } while (v & 0x8000); 405 #endif 406 sc->tx_start = sc->tx_end = sc->rx_size; 407 sc->tx_last = 0; 408 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 409 } 410 411 void 412 iyreset(sc) 413 struct iy_softc *sc; 414 { 415 int s; 416 s = splimp(); 417 iystop(sc); 418 iyinit(sc); 419 splx(s); 420 } 421 422 void 423 iyinit(sc) 424 struct iy_softc *sc; 425 { 426 int i; 427 unsigned temp; 428 struct ifnet *ifp; 429 bus_space_tag_t iot; 430 bus_space_handle_t ioh; 431 432 iot = sc->sc_iot; 433 ioh = sc->sc_ioh; 434 435 ifp = &sc->sc_ethercom.ec_if; 436 #ifdef IYDEBUG 437 printf("ifp is %p\n", ifp); 438 #endif 439 440 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 441 442 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 443 if (temp & 0x10) 444 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 445 446 for (i=0; i<6; ++i) { 447 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 448 } 449 450 temp = bus_space_read_1(iot, ioh, REG1); 451 bus_space_write_1(iot, ioh, REG1, 452 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 453 454 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 455 temp = MATCH_ALL; 456 } else if (sc->sc_ethercom.ec_multicnt) { 457 temp = MATCH_MULTI; 458 } else 459 temp = MATCH_ID; 460 461 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 462 463 #ifdef IYDEBUG 464 printf("%s: RECV_MODES set to %b\n", sc->sc_dev.dv_xname, 465 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 466 #endif 467 /* XXX VOODOO */ 468 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 469 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 470 /* XXX END OF VOODOO */ 471 472 473 delay(500000); /* for the hardware to test for the connector */ 474 475 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 476 #ifdef IYDEBUG 477 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 478 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 479 #endif 480 temp = (temp & TEST_MODE_MASK); 481 482 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 483 case IFM_10_5: 484 temp &= ~ (BNC_BIT | TPE_BIT); 485 break; 486 487 case IFM_10_2: 488 temp = (temp & ~TPE_BIT) | BNC_BIT; 489 break; 490 491 case IFM_10_T: 492 temp = (temp & ~BNC_BIT) | TPE_BIT; 493 break; 494 default: 495 /* nothing; leave as it is */ 496 } 497 switch (temp & (BNC_BIT | TPE_BIT)) { 498 case BNC_BIT: 499 sc->iy_media = IFM_ETHER | IFM_10_2; 500 break; 501 case TPE_BIT: 502 sc->iy_media = IFM_ETHER | IFM_10_T; 503 break; 504 default: 505 sc->iy_media = IFM_ETHER | IFM_10_5; 506 } 507 508 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 509 #ifdef IYDEBUG 510 printf("changed to 0x%b\n", 511 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 512 #endif 513 514 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 515 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 516 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 517 518 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 519 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 520 521 #ifdef IYDEBUG 522 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 523 temp, "\020\4bad_irq\010flash/boot present"); 524 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 525 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 526 temp, "\020\4BAD IRQ\010flash/boot present"); 527 #endif 528 529 530 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 531 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 532 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 533 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 534 535 temp = bus_space_read_1(iot, ioh, REG1); 536 #ifdef IYDEBUG 537 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 538 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 539 #endif 540 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 541 542 #ifdef IYDEBUG 543 temp = bus_space_read_1(iot, ioh, REG1); 544 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 545 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 546 #endif 547 548 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 549 550 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 551 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 552 553 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 554 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 555 sc->rx_start = 0; 556 557 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 558 delay(200); 559 560 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 561 562 sc->tx_start = sc->tx_end = sc->rx_size; 563 sc->tx_last = 0; 564 565 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 566 567 ifp->if_flags |= IFF_RUNNING; 568 ifp->if_flags &= ~IFF_OACTIVE; 569 } 570 571 void 572 iystart(ifp) 573 struct ifnet *ifp; 574 { 575 struct iy_softc *sc; 576 577 578 struct mbuf *m0, *m; 579 u_int len, pad, last, end; 580 u_int llen, residual; 581 int avail; 582 caddr_t data; 583 u_int16_t resval, stat; 584 bus_space_tag_t iot; 585 bus_space_handle_t ioh; 586 587 #ifdef IYDEBUG 588 printf("iystart called\n"); 589 #endif 590 sc = ifp->if_softc; 591 592 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 593 return; 594 595 iot = sc->sc_iot; 596 ioh = sc->sc_ioh; 597 598 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 599 #ifdef IYDEBUG 600 printf("%s: trying to write another packet to the hardware\n", 601 sc->sc_dev.dv_xname); 602 #endif 603 604 /* We need to use m->m_pkthdr.len, so require the header */ 605 if ((m0->m_flags & M_PKTHDR) == 0) 606 panic("iystart: no header mbuf"); 607 608 len = m0->m_pkthdr.len; 609 pad = len & 1; 610 611 #ifdef IYDEBUG 612 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 613 #endif 614 if (len < ETHER_MIN_LEN) { 615 pad = ETHER_MIN_LEN - len; 616 } 617 618 if (len + pad > ETHER_MAX_LEN) { 619 /* packet is obviously too large: toss it */ 620 ++ifp->if_oerrors; 621 IF_DEQUEUE(&ifp->if_snd, m0); 622 m_freem(m0); 623 continue; 624 } 625 626 #if NBPFILTER > 0 627 if (ifp->if_bpf) 628 bpf_mtap(ifp->if_bpf, m0); 629 #endif 630 631 avail = sc->tx_start - sc->tx_end; 632 if (avail <= 0) 633 avail += sc->tx_size; 634 635 #ifdef IYDEBUG 636 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 637 #endif 638 /* 639 * we MUST RUN at splnet here --- 640 * XXX todo: or even turn off the boards ints ??? hm... 641 */ 642 643 /* See if there is room to put another packet in the buffer. */ 644 645 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 646 #ifdef IYDEBUG 647 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 648 sc->sc_dev.dv_xname, len, avail); 649 #endif 650 ifp->if_flags |= IFF_OACTIVE; 651 return; 652 } 653 654 /* we know it fits in the hardware now, so dequeue it */ 655 IF_DEQUEUE(&ifp->if_snd, m0); 656 657 last = sc->tx_end; 658 end = last + pad + len + I595_XMT_HDRLEN; 659 660 if (end >= sc->sram) { 661 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 662 /* keep header in one piece */ 663 last = sc->rx_size; 664 end = last + pad + len + I595_XMT_HDRLEN; 665 } else 666 end -= sc->tx_size; 667 } 668 669 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 670 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 671 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 672 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 673 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 674 675 residual = resval = 0; 676 677 while ((m = m0)!=0) { 678 data = mtod(m, caddr_t); 679 llen = m->m_len; 680 if (residual) { 681 #ifdef IYDEBUG 682 printf("%s: merging residual with next mbuf.\n", 683 sc->sc_dev.dv_xname); 684 #endif 685 resval |= *data << 8; 686 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 687 --llen; 688 ++data; 689 } 690 if (llen > 1) 691 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 692 data, llen>>1); 693 residual = llen & 1; 694 if (residual) { 695 resval = *(data + llen - 1); 696 #ifdef IYDEBUG 697 printf("%s: got odd mbuf to send.\n", 698 sc->sc_dev.dv_xname); 699 #endif 700 } 701 702 MFREE(m, m0); 703 } 704 705 if (residual) 706 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 707 708 pad >>= 1; 709 while (pad-- > 0) 710 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 711 712 #ifdef IYDEBUG 713 printf("%s: new last = 0x%x, end = 0x%x.\n", 714 sc->sc_dev.dv_xname, last, end); 715 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 716 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 717 #endif 718 719 if (sc->tx_start != sc->tx_end) { 720 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 721 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 722 723 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 724 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 725 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 726 #ifdef IYDEBUG 727 printf("%s: setting 0x%x to 0x%x\n", 728 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 729 stat | CHAIN); 730 #endif 731 } 732 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 733 734 /* XXX todo: enable ints here if disabled */ 735 736 ++ifp->if_opackets; 737 738 if (sc->tx_start == sc->tx_end) { 739 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 740 bus_space_write_1(iot, ioh, 0, XMT_CMD); 741 sc->tx_start = last; 742 #ifdef IYDEBUG 743 printf("%s: writing 0x%x to XAR and giving XCMD\n", 744 sc->sc_dev.dv_xname, last); 745 #endif 746 } else { 747 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 748 #ifdef IYDEBUG 749 printf("%s: giving RESUME_XCMD\n", 750 sc->sc_dev.dv_xname); 751 #endif 752 } 753 sc->tx_last = last; 754 sc->tx_end = end; 755 } 756 } 757 758 759 static __inline void 760 eepromwritebit(iot, ioh, what) 761 bus_space_tag_t iot; 762 bus_space_handle_t ioh; 763 int what; 764 { 765 bus_space_write_1(iot, ioh, EEPROM_REG, what); 766 delay(1); 767 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 768 delay(1); 769 bus_space_write_1(iot, ioh, EEPROM_REG, what); 770 delay(1); 771 } 772 773 static __inline int 774 eepromreadbit(iot, ioh) 775 bus_space_tag_t iot; 776 bus_space_handle_t ioh; 777 { 778 int b; 779 780 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 781 delay(1); 782 b = bus_space_read_1(iot, ioh, EEPROM_REG); 783 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 784 delay(1); 785 786 return ((b & EEDO) != 0); 787 } 788 789 static u_int16_t 790 eepromread(iot, ioh, offset) 791 bus_space_tag_t iot; 792 bus_space_handle_t ioh; 793 int offset; 794 { 795 volatile int i; 796 volatile int j; 797 volatile u_int16_t readval; 798 799 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 800 delay(1); 801 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 802 delay(1); 803 804 eepromwritebit(iot, ioh, EECS|EEDI); 805 eepromwritebit(iot, ioh, EECS|EEDI); 806 eepromwritebit(iot, ioh, EECS); 807 808 for (j=5; j>=0; --j) { 809 if ((offset>>j) & 1) 810 eepromwritebit(iot, ioh, EECS|EEDI); 811 else 812 eepromwritebit(iot, ioh, EECS); 813 } 814 815 for (readval=0, i=0; i<16; ++i) { 816 readval<<=1; 817 readval |= eepromreadbit(iot, ioh); 818 } 819 820 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 821 delay(1); 822 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 823 824 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 825 826 return readval; 827 } 828 829 /* 830 * Device timeout/watchdog routine. Entered if the device neglects to generate 831 * an interrupt after a transmit has been started on it. 832 */ 833 void 834 iywatchdog(ifp) 835 struct ifnet *ifp; 836 { 837 struct iy_softc *sc = ifp->if_softc; 838 839 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 840 ++sc->sc_ethercom.ec_if.if_oerrors; 841 iyreset(sc); 842 } 843 844 /* 845 * What to do upon receipt of an interrupt. 846 */ 847 int 848 iyintr(arg) 849 void *arg; 850 { 851 struct iy_softc *sc = arg; 852 bus_space_tag_t iot; 853 bus_space_handle_t ioh; 854 855 register u_short status; 856 857 iot = sc->sc_iot; 858 ioh = sc->sc_ioh; 859 860 status = bus_space_read_1(iot, ioh, STATUS_REG); 861 #ifdef IYDEBUG 862 if (status & ALL_INTS) { 863 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 864 "\020\1RX_STP\2RX\3TX\4EXEC"); 865 if (status & EXEC_INT) 866 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 867 "\020\6ABORT"); 868 else 869 printf("\n"); 870 } 871 #endif 872 if ((status & (RX_INT | TX_INT)) == 0) 873 return 0; 874 875 if (status & RX_INT) { 876 iy_intr_rx(sc); 877 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 878 } 879 if (status & TX_INT) { 880 iy_intr_tx(sc); 881 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 882 } 883 884 #if NRND > 0 885 rnd_add_uint32(&sc->rnd_source, status); 886 #endif 887 888 return 1; 889 } 890 891 void 892 iyget(sc, iot, ioh, rxlen) 893 struct iy_softc *sc; 894 bus_space_tag_t iot; 895 bus_space_handle_t ioh; 896 int rxlen; 897 { 898 struct mbuf *m, *top, **mp; 899 struct ether_header *eh; 900 struct ifnet *ifp; 901 int len; 902 903 ifp = &sc->sc_ethercom.ec_if; 904 905 MGETHDR(m, M_DONTWAIT, MT_DATA); 906 if (m == 0) 907 goto dropped; 908 m->m_pkthdr.rcvif = ifp; 909 m->m_pkthdr.len = rxlen; 910 len = MHLEN; 911 top = 0; 912 mp = ⊤ 913 914 while (rxlen > 0) { 915 if (top) { 916 MGET(m, M_DONTWAIT, MT_DATA); 917 if (m == 0) { 918 m_freem(top); 919 goto dropped; 920 } 921 len = MLEN; 922 } 923 if (rxlen >= MINCLSIZE) { 924 MCLGET(m, M_DONTWAIT); 925 if ((m->m_flags & M_EXT) == 0) { 926 m_free(m); 927 m_freem(top); 928 goto dropped; 929 } 930 len = MCLBYTES; 931 } 932 len = min(rxlen, len); 933 if (len > 1) { 934 len &= ~1; 935 936 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 937 mtod(m, caddr_t), len/2); 938 } else { 939 #ifdef IYDEBUG 940 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 941 #endif 942 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 943 MEM_PORT_REG); 944 } 945 m->m_len = len; 946 rxlen -= len; 947 *mp = m; 948 mp = &m->m_next; 949 } 950 /* XXX receive the top here */ 951 ++ifp->if_ipackets; 952 953 eh = mtod(top, struct ether_header *); 954 955 #if NBPFILTER > 0 956 if (ifp->if_bpf) { 957 bpf_mtap(ifp->if_bpf, top); 958 if ((ifp->if_flags & IFF_PROMISC) && 959 (eh->ether_dhost[0] & 1) == 0 && 960 bcmp(eh->ether_dhost, 961 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 962 sizeof(eh->ether_dhost)) != 0) { 963 964 m_freem(top); 965 return; 966 } 967 } 968 #endif 969 m_adj(top, sizeof(struct ether_header)); 970 ether_input(ifp, eh, top); 971 return; 972 973 dropped: 974 ++ifp->if_ierrors; 975 return; 976 } 977 978 void 979 iy_intr_rx(sc) 980 struct iy_softc *sc; 981 { 982 struct ifnet *ifp; 983 bus_space_tag_t iot; 984 bus_space_handle_t ioh; 985 986 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 987 988 iot = sc->sc_iot; 989 ioh = sc->sc_ioh; 990 ifp = &sc->sc_ethercom.ec_if; 991 992 rxadrs = sc->rx_start; 993 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 994 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 995 rxnext = 0; 996 997 while (rxevnt == RCV_DONE) { 998 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 999 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1000 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1001 #ifdef IYDEBUG 1002 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 1003 sc->sc_dev.dv_xname, rxadrs, rxstatus, 1004 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1005 "\014CRCERR\015LENERR\016RCVOK\020TYP", 1006 rxnext, rxlen); 1007 #endif 1008 iyget(sc, iot, ioh, rxlen); 1009 1010 /* move stop address */ 1011 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1012 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1013 1014 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1015 rxadrs = rxnext; 1016 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1017 } 1018 sc->rx_start = rxnext; 1019 } 1020 1021 void 1022 iy_intr_tx(sc) 1023 struct iy_softc *sc; 1024 { 1025 bus_space_tag_t iot; 1026 bus_space_handle_t ioh; 1027 struct ifnet *ifp; 1028 u_int txstatus, txstat2, txlen, txnext; 1029 1030 ifp = &sc->sc_ethercom.ec_if; 1031 iot = sc->sc_iot; 1032 ioh = sc->sc_ioh; 1033 1034 while (sc->tx_start != sc->tx_end) { 1035 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1036 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1037 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1038 break; 1039 1040 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1041 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1042 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1043 #ifdef IYDEBUG 1044 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1045 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1046 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1047 txnext, txlen); 1048 #endif 1049 if (txlen & CHAIN) 1050 sc->tx_start = txnext; 1051 else 1052 sc->tx_start = sc->tx_end; 1053 ifp->if_flags &= ~IFF_OACTIVE; 1054 1055 if ((txstat2 & 0x2000) == 0) 1056 ++ifp->if_oerrors; 1057 if (txstat2 & 0x000f) 1058 ifp->if_oerrors += txstat2 & 0x000f; 1059 } 1060 ifp->if_flags &= ~IFF_OACTIVE; 1061 } 1062 1063 int 1064 iyioctl(ifp, cmd, data) 1065 register struct ifnet *ifp; 1066 u_long cmd; 1067 caddr_t data; 1068 { 1069 struct iy_softc *sc; 1070 struct ifaddr *ifa; 1071 struct ifreq *ifr; 1072 int s, error = 0; 1073 1074 sc = ifp->if_softc; 1075 ifa = (struct ifaddr *)data; 1076 ifr = (struct ifreq *)data; 1077 1078 #ifdef IYDEBUG 1079 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1080 ifp, ifp->if_xname, cmd, data); 1081 #endif 1082 1083 s = splimp(); 1084 1085 switch (cmd) { 1086 1087 case SIOCSIFADDR: 1088 ifp->if_flags |= IFF_UP; 1089 1090 switch (ifa->ifa_addr->sa_family) { 1091 #ifdef INET 1092 case AF_INET: 1093 iyinit(sc); 1094 arp_ifinit(ifp, ifa); 1095 break; 1096 #endif 1097 #ifdef NS 1098 /* XXX - This code is probably wrong. */ 1099 case AF_NS: 1100 { 1101 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1102 1103 if (ns_nullhost(*ina)) 1104 ina->x_host = *(union ns_host *) 1105 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1106 else 1107 bcopy(ina->x_host.c_host, 1108 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1109 ETHER_ADDR_LEN); 1110 /* Set new address. */ 1111 iyinit(sc); 1112 break; 1113 } 1114 #endif /* NS */ 1115 default: 1116 iyinit(sc); 1117 break; 1118 } 1119 break; 1120 1121 case SIOCSIFFLAGS: 1122 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1123 if ((ifp->if_flags & IFF_UP) == 0 && 1124 (ifp->if_flags & IFF_RUNNING) != 0) { 1125 /* 1126 * If interface is marked down and it is running, then 1127 * stop it. 1128 */ 1129 iystop(sc); 1130 ifp->if_flags &= ~IFF_RUNNING; 1131 } else if ((ifp->if_flags & IFF_UP) != 0 && 1132 (ifp->if_flags & IFF_RUNNING) == 0) { 1133 /* 1134 * If interface is marked up and it is stopped, then 1135 * start it. 1136 */ 1137 iyinit(sc); 1138 } else { 1139 /* 1140 * Reset the interface to pick up changes in any other 1141 * flags that affect hardware registers. 1142 */ 1143 iystop(sc); 1144 iyinit(sc); 1145 } 1146 #ifdef IYDEBUGX 1147 if (ifp->if_flags & IFF_DEBUG) 1148 sc->sc_debug = IFY_ALL; 1149 else 1150 sc->sc_debug = 0; 1151 #endif 1152 break; 1153 1154 case SIOCADDMULTI: 1155 case SIOCDELMULTI: 1156 error = (cmd == SIOCADDMULTI) ? 1157 ether_addmulti(ifr, &sc->sc_ethercom): 1158 ether_delmulti(ifr, &sc->sc_ethercom); 1159 1160 if (error == ENETRESET) { 1161 /* 1162 * Multicast list has changed; set the hardware filter 1163 * accordingly. 1164 */ 1165 iyreset(sc); /* XXX can't make it work otherwise */ 1166 iy_mc_reset(sc); 1167 error = 0; 1168 } 1169 break; 1170 #endif /* XXX???XXX */ 1171 case SIOCSIFMEDIA: 1172 case SIOCGIFMEDIA: 1173 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1174 break; 1175 default: 1176 error = EINVAL; 1177 } 1178 splx(s); 1179 return error; 1180 } 1181 1182 int 1183 iy_mediachange(ifp) 1184 struct ifnet *ifp; 1185 { 1186 struct iy_softc *sc = ifp->if_softc; 1187 1188 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1189 return EINVAL; 1190 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1191 case IFM_10_5: 1192 case IFM_10_2: 1193 case IFM_10_T: 1194 case IFM_AUTO: 1195 iystop(sc); 1196 iyinit(sc); 1197 return 0; 1198 default: 1199 return EINVAL; 1200 } 1201 } 1202 1203 void 1204 iy_mediastatus(ifp, ifmr) 1205 struct ifnet *ifp; 1206 struct ifmediareq *ifmr; 1207 { 1208 struct iy_softc *sc = ifp->if_softc; 1209 1210 ifmr->ifm_active = sc->iy_media; 1211 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1212 } 1213 1214 1215 static void 1216 iy_mc_setup(sc) 1217 struct iy_softc *sc; 1218 { 1219 struct ether_multi *enm; 1220 struct ether_multistep step; 1221 struct ethercom *ecp; 1222 struct ifnet *ifp; 1223 bus_space_tag_t iot; 1224 bus_space_handle_t ioh; 1225 int avail, last /*, end*/ , len; 1226 int timeout; 1227 u_int8_t temp; 1228 1229 1230 ecp = &sc->sc_ethercom; 1231 ifp = &ecp->ec_if; 1232 1233 iot = sc->sc_iot; 1234 ioh = sc->sc_ioh; 1235 1236 len = 6 * ecp->ec_multicnt + 6; 1237 1238 avail = sc->tx_start - sc->tx_end; 1239 if (avail <= 0) 1240 avail += sc->tx_size; 1241 printf("iy_mc_setup called, %d addresses, %d/%d bytes needed/avail\n", 1242 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1243 1244 last = sc->rx_size; 1245 1246 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1247 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_MULTI); 1248 /* XXX VOODOO */ 1249 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1250 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1251 /* XXX END OF VOODOO */ 1252 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1253 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1254 bus_space_write_2(iot, ioh, MEM_PORT_REG, MC_SETUP_CMD); 1255 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1256 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1257 bus_space_write_2(iot, ioh, MEM_PORT_REG, len); 1258 1259 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1260 LLADDR(ifp->if_sadl), 3); 1261 1262 ETHER_FIRST_MULTI(step, ecp, enm); 1263 while(enm) { 1264 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1265 enm->enm_addrlo, 3); 1266 1267 ETHER_NEXT_MULTI(step, enm); 1268 } 1269 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1270 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1271 1272 1273 sc->tx_start = sc->rx_size; 1274 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1275 1276 for (timeout=0; timeout<100; timeout++) { 1277 DELAY(2); 1278 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1279 continue; 1280 1281 temp = bus_space_read_1(iot, ioh, 0); 1282 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1283 #ifdef DIAGNOSTIC 1284 if (temp & 0x20) { 1285 printf("%s: mc setup failed, %d usec\n", 1286 sc->sc_dev.dv_xname, timeout * 2); 1287 } else if ((temp & 0x0f) == 0x03) { 1288 printf("%s: mc setup done, %d usec\n", 1289 sc->sc_dev.dv_xname, timeout * 2); 1290 } 1291 #endif 1292 break; 1293 } 1294 sc->tx_start = sc->tx_end; 1295 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1296 1297 } 1298 1299 static void 1300 iy_mc_reset(sc) 1301 struct iy_softc *sc; 1302 { 1303 struct ether_multi *enm; 1304 struct ether_multistep step; 1305 struct ethercom *ecp; 1306 struct ifnet *ifp; 1307 bus_space_tag_t iot; 1308 bus_space_handle_t ioh; 1309 u_int16_t temp; 1310 1311 ecp = &sc->sc_ethercom; 1312 ifp = &ecp->ec_if; 1313 1314 iot = sc->sc_iot; 1315 ioh = sc->sc_ioh; 1316 1317 if (ecp->ec_multicnt > 63) { 1318 ifp->if_flags |= IFF_ALLMULTI; 1319 1320 } else if (ecp->ec_multicnt > 0) { 1321 /* 1322 * Step through the list of addresses. 1323 */ 1324 ETHER_FIRST_MULTI(step, ecp, enm); 1325 while(enm) { 1326 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1327 ifp->if_flags |= IFF_ALLMULTI; 1328 goto setupmulti; 1329 } 1330 ETHER_NEXT_MULTI(step, enm); 1331 } 1332 /* OK, we really need to do it now: */ 1333 #if 0 1334 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1335 != IFF_RUNNING) { 1336 ifp->if_flags |= IFF_OACTIVE; 1337 sc->want_mc_setup = 1; 1338 return; 1339 } 1340 #endif 1341 iy_mc_setup(sc); 1342 } else { 1343 ifp->if_flags &= ~IFF_ALLMULTI; 1344 } 1345 1346 setupmulti: 1347 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1348 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1349 temp = MATCH_ALL; 1350 } else if (sc->sc_ethercom.ec_multicnt) { 1351 temp = MATCH_MULTI; 1352 } else 1353 temp = MATCH_ID; 1354 1355 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1356 /* XXX VOODOO */ 1357 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1358 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1359 /* XXX END OF VOODOO */ 1360 1361 /* XXX TBD: setup hardware for all multicasts */ 1362 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1363 return; 1364 } 1365 1366 #ifdef IYDEBUG 1367 void 1368 print_rbd(rbd) 1369 volatile struct ie_recv_buf_desc *rbd; 1370 { 1371 1372 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1373 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1374 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1375 rbd->mbz); 1376 } 1377 #endif 1378 1379 void 1380 iyprobemem(sc) 1381 struct iy_softc *sc; 1382 { 1383 bus_space_tag_t iot; 1384 bus_space_handle_t ioh; 1385 int testing; 1386 1387 iot = sc->sc_iot; 1388 ioh = sc->sc_ioh; 1389 1390 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1391 delay(1); 1392 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1393 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1394 1395 for (testing=65536; testing >= 4096; testing >>= 1) { 1396 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1397 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1398 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1399 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1400 #ifdef IYMEMDEBUG 1401 printf("%s: Didn't keep 0xdead at 0x%x\n", 1402 sc->sc_dev.dv_xname, testing-2); 1403 #endif 1404 continue; 1405 } 1406 1407 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1408 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1409 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1410 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1411 #ifdef IYMEMDEBUG 1412 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1413 sc->sc_dev.dv_xname, testing-2); 1414 #endif 1415 continue; 1416 } 1417 1418 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1419 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1420 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1421 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1422 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1423 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1424 #ifdef IYMEMDEBUG 1425 printf("%s: 0x%x alias of 0x0\n", 1426 sc->sc_dev.dv_xname, testing >> 1); 1427 #endif 1428 continue; 1429 } 1430 1431 break; 1432 } 1433 1434 sc->sram = testing; 1435 1436 switch(testing) { 1437 case 65536: 1438 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1439 sc->rx_size = 44*1024; 1440 break; 1441 1442 case 32768: 1443 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1444 sc->rx_size = 22*1024; 1445 break; 1446 1447 case 16384: 1448 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1449 sc->rx_size = 10*1024; 1450 break; 1451 default: 1452 sc->rx_size = testing/2; 1453 break; 1454 } 1455 sc->tx_size = testing - sc->rx_size; 1456 } 1457 1458 static int 1459 eepromreadall(iot, ioh, wordp, maxi) 1460 bus_space_tag_t iot; 1461 bus_space_handle_t ioh; 1462 u_int16_t *wordp; 1463 int maxi; 1464 { 1465 int i; 1466 u_int16_t checksum, tmp; 1467 1468 checksum = 0; 1469 1470 for (i=0; i<EEPP_LENGTH; ++i) { 1471 tmp = eepromread(iot, ioh, i); 1472 checksum += tmp; 1473 if (i<maxi) 1474 wordp[i] = tmp; 1475 } 1476 1477 if (checksum != EEPP_CHKSUM) { 1478 #ifdef IYDEBUG 1479 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1480 checksum, EEPP_CHKSUM); 1481 #endif 1482 return 1; 1483 } 1484 return 0; 1485 } 1486
Indexes created Thu Sep 25 16:09:42 GMT 2025