if_iy.c revision 1.28
1 /* $NetBSD: if_iy.c,v 1.28 1998/07/31 01:10:13 rvb Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 /* 37 * Supported hardware: 38 * 39 * - Intel EtherExpress Pro/10. 40 * - possibly other boards using the i82595 chip and no special tweaks. 41 */ 42 43 #include "opt_inet.h" 44 #include "opt_ns.h" 45 #include "bpfilter.h" 46 #include "rnd.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/buf.h> 52 #include <sys/protosw.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/syslog.h> 57 #include <sys/device.h> 58 #if NRND > 0 59 #include <sys/rnd.h> 60 #endif 61 62 #include <net/if.h> 63 #include <net/if_types.h> 64 #include <net/if_dl.h> 65 66 #include <net/if_ether.h> 67 68 #if NBPFILTER > 0 69 #include <net/bpf.h> 70 #include <net/bpfdesc.h> 71 #endif 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #include <netinet/in_systm.h> 76 #include <netinet/in_var.h> 77 #include <netinet/ip.h> 78 #include <netinet/if_inarp.h> 79 #endif 80 81 #ifdef NS 82 #include <netns/ns.h> 83 #include <netns/ns_if.h> 84 #endif 85 86 #if defined(SIOCSIFMEDIA) 87 #include <net/if_media.h> 88 #endif 89 90 #include <vm/vm.h> 91 92 #include <machine/cpu.h> 93 #include <machine/bus.h> 94 #include <machine/intr.h> 95 96 #include <dev/isa/isareg.h> 97 #include <dev/isa/isavar.h> 98 #include <dev/ic/i82595reg.h> 99 100 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 101 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 102 103 /* 104 * Ethernet status, per interface. 105 */ 106 struct iy_softc { 107 struct device sc_dev; 108 void *sc_ih; 109 110 bus_space_tag_t sc_iot; 111 bus_space_handle_t sc_ioh; 112 113 struct ethercom sc_ethercom; 114 115 struct ifmedia iy_ifmedia; 116 int iy_media; 117 118 int mappedirq; 119 120 int hard_vers; 121 122 int promisc; 123 124 int sram, tx_size, rx_size; 125 126 int tx_start, tx_end, tx_last; 127 int rx_start; 128 129 int doing_mc_setup; 130 #ifdef IYDEBUG 131 int sc_debug; 132 #endif 133 134 #if NRND > 0 135 rndsource_element_t rnd_source; 136 #endif 137 }; 138 139 void iywatchdog __P((struct ifnet *)); 140 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 141 int iyintr __P((void *)); 142 void iyinit __P((struct iy_softc *)); 143 void iystop __P((struct iy_softc *)); 144 void iystart __P((struct ifnet *)); 145 146 void iy_intr_rx __P((struct iy_softc *)); 147 void iy_intr_tx __P((struct iy_softc *)); 148 149 void iyreset __P((struct iy_softc *)); 150 void iy_readframe __P((struct iy_softc *, int)); 151 void iy_drop_packet_buffer __P((struct iy_softc *)); 152 void iy_find_mem_size __P((struct iy_softc *)); 153 void iyrint __P((struct iy_softc *)); 154 void iytint __P((struct iy_softc *)); 155 void iyxmit __P((struct iy_softc *)); 156 static void iy_mc_setup __P((struct iy_softc *)); 157 static void iy_mc_reset __P((struct iy_softc *)); 158 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 159 void iyprobemem __P((struct iy_softc *)); 160 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 161 int)); 162 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 163 164 #ifdef IYDEBUGX 165 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 166 167 int in_ifrint = 0; 168 int in_iftint = 0; 169 #endif 170 171 int iy_mediachange __P((struct ifnet *)); 172 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 173 174 int iyprobe __P((struct device *, struct cfdata *, void *)); 175 void iyattach __P((struct device *, struct device *, void *)); 176 177 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 178 179 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 180 int)); 181 182 struct cfattach iy_ca = { 183 sizeof(struct iy_softc), iyprobe, iyattach 184 }; 185 186 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 187 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 188 189 int 190 iyprobe(parent, match, aux) 191 struct device *parent; 192 struct cfdata *match; 193 void *aux; 194 { 195 struct isa_attach_args *ia = aux; 196 u_int16_t eaddr[8]; 197 198 bus_space_tag_t iot; 199 bus_space_handle_t ioh; 200 201 u_int8_t c, d; 202 203 iot = ia->ia_iot; 204 205 if (ia->ia_iobase == IOBASEUNK) 206 return 0; 207 208 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 209 return 0; 210 211 /* try to find the round robin sig: */ 212 213 c = bus_space_read_1(iot, ioh, ID_REG); 214 if ((c & ID_REG_MASK) != ID_REG_SIG) 215 goto out; 216 217 d = bus_space_read_1(iot, ioh, ID_REG); 218 if ((d & ID_REG_MASK) != ID_REG_SIG) 219 goto out; 220 221 if (((d-c) & R_ROBIN_BITS) != 0x40) 222 goto out; 223 224 d = bus_space_read_1(iot, ioh, ID_REG); 225 if ((d & ID_REG_MASK) != ID_REG_SIG) 226 goto out; 227 228 if (((d-c) & R_ROBIN_BITS) != 0x80) 229 goto out; 230 231 d = bus_space_read_1(iot, ioh, ID_REG); 232 if ((d & ID_REG_MASK) != ID_REG_SIG) 233 goto out; 234 235 if (((d-c) & R_ROBIN_BITS) != 0xC0) 236 goto out; 237 238 d = bus_space_read_1(iot, ioh, ID_REG); 239 if ((d & ID_REG_MASK) != ID_REG_SIG) 240 goto out; 241 242 if (((d-c) & R_ROBIN_BITS) != 0x00) 243 goto out; 244 245 #ifdef IYDEBUG 246 printf("iyprobe verified working ID reg.\n"); 247 #endif 248 249 if (eepromreadall(iot, ioh, eaddr, 8)) 250 goto out; 251 252 if (ia->ia_irq == IRQUNK) 253 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 254 255 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 256 goto out; 257 258 if (eepro_revirqmap[ia->ia_irq] == 0xff) 259 goto out; 260 261 /* now lets reset the chip */ 262 263 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 264 delay(200); 265 266 ia->ia_iosize = 16; 267 268 bus_space_unmap(iot, ioh, 16); 269 return 1; /* found */ 270 out: 271 bus_space_unmap(iot, ioh, 16); 272 return 0; 273 } 274 275 void 276 iyattach(parent, self, aux) 277 struct device *parent, *self; 278 void *aux; 279 { 280 struct iy_softc *sc = (void *)self; 281 struct isa_attach_args *ia = aux; 282 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 283 bus_space_tag_t iot; 284 bus_space_handle_t ioh; 285 unsigned temp; 286 u_int16_t eaddr[8]; 287 u_int8_t myaddr[ETHER_ADDR_LEN]; 288 int eirq; 289 290 iot = ia->ia_iot; 291 292 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 293 printf(": can't map i/o space\n"); 294 return; 295 } 296 297 sc->sc_iot = iot; 298 sc->sc_ioh = ioh; 299 300 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 301 302 /* now let's reset the chip */ 303 304 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 305 delay(200); 306 307 iyprobemem(sc); 308 309 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 310 ifp->if_softc = sc; 311 ifp->if_start = iystart; 312 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 313 | IFF_MULTICAST; 314 315 sc->doing_mc_setup = 0; 316 317 ifp->if_ioctl = iyioctl; 318 ifp->if_watchdog = iywatchdog; 319 320 (void)eepromreadall(iot, ioh, eaddr, 8); 321 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 322 323 #ifdef DIAGNOSTICS 324 if ((eaddr[EEPPEther0] != 325 eepromread(iot, ioh, EEPPEther0a)) && 326 (eaddr[EEPPEther1] != 327 eepromread(iot, ioh, EEPPEther1a)) && 328 (eaddr[EEPPEther2] != 329 eepromread(iot, ioh, EEPPEther2a))) 330 331 printf("EEPROM Ethernet address differs from copy\n"); 332 #endif 333 334 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 335 myaddr[0] = eaddr[EEPPEther0] >> 8; 336 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 337 myaddr[2] = eaddr[EEPPEther1] >> 8; 338 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 339 myaddr[4] = eaddr[EEPPEther2] >> 8; 340 341 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 342 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 343 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 344 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 345 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 346 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 347 /* Attach the interface. */ 348 if_attach(ifp); 349 ether_ifattach(ifp, myaddr); 350 printf(": address %s, rev. %d, %d kB\n", 351 ether_sprintf(myaddr), 352 sc->hard_vers, sc->sram/1024); 353 354 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 355 if (eirq != ia->ia_irq) 356 printf("%s: EEPROM irq setting %d ignored\n", 357 sc->sc_dev.dv_xname, eirq); 358 359 #if NBPFILTER > 0 360 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 361 #endif 362 363 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 364 IPL_NET, iyintr, sc); 365 366 #if NRND > 0 367 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET); 368 #endif 369 370 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 371 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 372 } 373 374 void 375 iystop(sc) 376 struct iy_softc *sc; 377 { 378 bus_space_tag_t iot; 379 bus_space_handle_t ioh; 380 #ifdef IYDEBUG 381 u_int p, v; 382 #endif 383 384 iot = sc->sc_iot; 385 ioh = sc->sc_ioh; 386 387 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 388 389 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 390 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 391 392 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 393 delay(200); 394 #ifdef IYDEBUG 395 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 396 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 397 p = sc->tx_last; 398 if (!p) 399 p = sc->tx_start; 400 do { 401 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 402 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 403 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 404 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 405 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 406 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 407 printf(" 0x%04x", p); 408 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 409 printf(" 0x%b\n", v, "\020\020Ch"); 410 411 } while (v & 0x8000); 412 #endif 413 sc->tx_start = sc->tx_end = sc->rx_size; 414 sc->tx_last = 0; 415 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 416 } 417 418 void 419 iyreset(sc) 420 struct iy_softc *sc; 421 { 422 int s; 423 s = splimp(); 424 iystop(sc); 425 iyinit(sc); 426 splx(s); 427 } 428 429 void 430 iyinit(sc) 431 struct iy_softc *sc; 432 { 433 int i; 434 unsigned temp; 435 struct ifnet *ifp; 436 bus_space_tag_t iot; 437 bus_space_handle_t ioh; 438 439 iot = sc->sc_iot; 440 ioh = sc->sc_ioh; 441 442 ifp = &sc->sc_ethercom.ec_if; 443 #ifdef IYDEBUG 444 printf("ifp is %p\n", ifp); 445 #endif 446 447 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 448 449 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 450 if (temp & 0x10) 451 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 452 453 for (i=0; i<6; ++i) { 454 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 455 } 456 457 temp = bus_space_read_1(iot, ioh, REG1); 458 bus_space_write_1(iot, ioh, REG1, 459 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 460 461 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 462 temp = MATCH_ALL; 463 } else if (sc->sc_ethercom.ec_multicnt) { 464 temp = MATCH_MULTI; 465 } else 466 temp = MATCH_ID; 467 468 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 469 470 #ifdef IYDEBUG 471 printf("%s: RECV_MODES set to %b\n", sc->sc_dev.dv_xname, 472 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 473 #endif 474 /* XXX VOODOO */ 475 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 476 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 477 /* XXX END OF VOODOO */ 478 479 480 delay(500000); /* for the hardware to test for the connector */ 481 482 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 483 #ifdef IYDEBUG 484 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 485 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 486 #endif 487 temp = (temp & TEST_MODE_MASK); 488 489 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 490 case IFM_10_5: 491 temp &= ~ (BNC_BIT | TPE_BIT); 492 break; 493 494 case IFM_10_2: 495 temp = (temp & ~TPE_BIT) | BNC_BIT; 496 break; 497 498 case IFM_10_T: 499 temp = (temp & ~BNC_BIT) | TPE_BIT; 500 break; 501 default: 502 /* nothing; leave as it is */ 503 } 504 switch (temp & (BNC_BIT | TPE_BIT)) { 505 case BNC_BIT: 506 sc->iy_media = IFM_ETHER | IFM_10_2; 507 break; 508 case TPE_BIT: 509 sc->iy_media = IFM_ETHER | IFM_10_T; 510 break; 511 default: 512 sc->iy_media = IFM_ETHER | IFM_10_5; 513 } 514 515 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 516 #ifdef IYDEBUG 517 printf("changed to 0x%b\n", 518 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 519 #endif 520 521 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 522 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 523 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 524 525 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 526 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 527 528 #ifdef IYDEBUG 529 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 530 temp, "\020\4bad_irq\010flash/boot present"); 531 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 532 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 533 temp, "\020\4BAD IRQ\010flash/boot present"); 534 #endif 535 536 537 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 538 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 539 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 540 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 541 542 temp = bus_space_read_1(iot, ioh, REG1); 543 #ifdef IYDEBUG 544 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 545 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 546 #endif 547 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 548 549 #ifdef IYDEBUG 550 temp = bus_space_read_1(iot, ioh, REG1); 551 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 552 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 553 #endif 554 555 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 556 557 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 558 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 559 560 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 561 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 562 sc->rx_start = 0; 563 564 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 565 delay(200); 566 567 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 568 569 sc->tx_start = sc->tx_end = sc->rx_size; 570 sc->tx_last = 0; 571 572 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 573 574 ifp->if_flags |= IFF_RUNNING; 575 ifp->if_flags &= ~IFF_OACTIVE; 576 } 577 578 void 579 iystart(ifp) 580 struct ifnet *ifp; 581 { 582 struct iy_softc *sc; 583 584 585 struct mbuf *m0, *m; 586 u_int len, pad, last, end; 587 u_int llen, residual; 588 int avail; 589 caddr_t data; 590 u_int16_t resval, stat; 591 bus_space_tag_t iot; 592 bus_space_handle_t ioh; 593 594 #ifdef IYDEBUG 595 printf("iystart called\n"); 596 #endif 597 sc = ifp->if_softc; 598 599 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 600 return; 601 602 iot = sc->sc_iot; 603 ioh = sc->sc_ioh; 604 605 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 606 #ifdef IYDEBUG 607 printf("%s: trying to write another packet to the hardware\n", 608 sc->sc_dev.dv_xname); 609 #endif 610 611 /* We need to use m->m_pkthdr.len, so require the header */ 612 if ((m0->m_flags & M_PKTHDR) == 0) 613 panic("iystart: no header mbuf"); 614 615 len = m0->m_pkthdr.len; 616 pad = len & 1; 617 618 #ifdef IYDEBUG 619 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 620 #endif 621 if (len < ETHER_MIN_LEN) { 622 pad = ETHER_MIN_LEN - len; 623 } 624 625 if (len + pad > ETHER_MAX_LEN) { 626 /* packet is obviously too large: toss it */ 627 ++ifp->if_oerrors; 628 IF_DEQUEUE(&ifp->if_snd, m0); 629 m_freem(m0); 630 continue; 631 } 632 633 #if NBPFILTER > 0 634 if (ifp->if_bpf) 635 bpf_mtap(ifp->if_bpf, m0); 636 #endif 637 638 avail = sc->tx_start - sc->tx_end; 639 if (avail <= 0) 640 avail += sc->tx_size; 641 642 #ifdef IYDEBUG 643 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 644 #endif 645 /* 646 * we MUST RUN at splnet here --- 647 * XXX todo: or even turn off the boards ints ??? hm... 648 */ 649 650 /* See if there is room to put another packet in the buffer. */ 651 652 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 653 #ifdef IYDEBUG 654 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 655 sc->sc_dev.dv_xname, len, avail); 656 #endif 657 ifp->if_flags |= IFF_OACTIVE; 658 return; 659 } 660 661 /* we know it fits in the hardware now, so dequeue it */ 662 IF_DEQUEUE(&ifp->if_snd, m0); 663 664 last = sc->tx_end; 665 end = last + pad + len + I595_XMT_HDRLEN; 666 667 if (end >= sc->sram) { 668 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 669 /* keep header in one piece */ 670 last = sc->rx_size; 671 end = last + pad + len + I595_XMT_HDRLEN; 672 } else 673 end -= sc->tx_size; 674 } 675 676 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 677 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 678 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 679 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 680 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 681 682 residual = resval = 0; 683 684 while ((m = m0)!=0) { 685 data = mtod(m, caddr_t); 686 llen = m->m_len; 687 if (residual) { 688 #ifdef IYDEBUG 689 printf("%s: merging residual with next mbuf.\n", 690 sc->sc_dev.dv_xname); 691 #endif 692 resval |= *data << 8; 693 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 694 --llen; 695 ++data; 696 } 697 if (llen > 1) 698 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 699 data, llen>>1); 700 residual = llen & 1; 701 if (residual) { 702 resval = *(data + llen - 1); 703 #ifdef IYDEBUG 704 printf("%s: got odd mbuf to send.\n", 705 sc->sc_dev.dv_xname); 706 #endif 707 } 708 709 MFREE(m, m0); 710 } 711 712 if (residual) 713 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 714 715 pad >>= 1; 716 while (pad-- > 0) 717 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 718 719 #ifdef IYDEBUG 720 printf("%s: new last = 0x%x, end = 0x%x.\n", 721 sc->sc_dev.dv_xname, last, end); 722 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 723 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 724 #endif 725 726 if (sc->tx_start != sc->tx_end) { 727 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 728 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 729 730 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 731 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 732 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 733 #ifdef IYDEBUG 734 printf("%s: setting 0x%x to 0x%x\n", 735 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 736 stat | CHAIN); 737 #endif 738 } 739 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 740 741 /* XXX todo: enable ints here if disabled */ 742 743 ++ifp->if_opackets; 744 745 if (sc->tx_start == sc->tx_end) { 746 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 747 bus_space_write_1(iot, ioh, 0, XMT_CMD); 748 sc->tx_start = last; 749 #ifdef IYDEBUG 750 printf("%s: writing 0x%x to XAR and giving XCMD\n", 751 sc->sc_dev.dv_xname, last); 752 #endif 753 } else { 754 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 755 #ifdef IYDEBUG 756 printf("%s: giving RESUME_XCMD\n", 757 sc->sc_dev.dv_xname); 758 #endif 759 } 760 sc->tx_last = last; 761 sc->tx_end = end; 762 } 763 } 764 765 766 static __inline void 767 eepromwritebit(iot, ioh, what) 768 bus_space_tag_t iot; 769 bus_space_handle_t ioh; 770 int what; 771 { 772 bus_space_write_1(iot, ioh, EEPROM_REG, what); 773 delay(1); 774 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 775 delay(1); 776 bus_space_write_1(iot, ioh, EEPROM_REG, what); 777 delay(1); 778 } 779 780 static __inline int 781 eepromreadbit(iot, ioh) 782 bus_space_tag_t iot; 783 bus_space_handle_t ioh; 784 { 785 int b; 786 787 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 788 delay(1); 789 b = bus_space_read_1(iot, ioh, EEPROM_REG); 790 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 791 delay(1); 792 793 return ((b & EEDO) != 0); 794 } 795 796 static u_int16_t 797 eepromread(iot, ioh, offset) 798 bus_space_tag_t iot; 799 bus_space_handle_t ioh; 800 int offset; 801 { 802 volatile int i; 803 volatile int j; 804 volatile u_int16_t readval; 805 806 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 807 delay(1); 808 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 809 delay(1); 810 811 eepromwritebit(iot, ioh, EECS|EEDI); 812 eepromwritebit(iot, ioh, EECS|EEDI); 813 eepromwritebit(iot, ioh, EECS); 814 815 for (j=5; j>=0; --j) { 816 if ((offset>>j) & 1) 817 eepromwritebit(iot, ioh, EECS|EEDI); 818 else 819 eepromwritebit(iot, ioh, EECS); 820 } 821 822 for (readval=0, i=0; i<16; ++i) { 823 readval<<=1; 824 readval |= eepromreadbit(iot, ioh); 825 } 826 827 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 828 delay(1); 829 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 830 831 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 832 833 return readval; 834 } 835 836 /* 837 * Device timeout/watchdog routine. Entered if the device neglects to generate 838 * an interrupt after a transmit has been started on it. 839 */ 840 void 841 iywatchdog(ifp) 842 struct ifnet *ifp; 843 { 844 struct iy_softc *sc = ifp->if_softc; 845 846 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 847 ++sc->sc_ethercom.ec_if.if_oerrors; 848 iyreset(sc); 849 } 850 851 /* 852 * What to do upon receipt of an interrupt. 853 */ 854 int 855 iyintr(arg) 856 void *arg; 857 { 858 struct iy_softc *sc = arg; 859 bus_space_tag_t iot; 860 bus_space_handle_t ioh; 861 862 register u_short status; 863 864 iot = sc->sc_iot; 865 ioh = sc->sc_ioh; 866 867 status = bus_space_read_1(iot, ioh, STATUS_REG); 868 #ifdef IYDEBUG 869 if (status & ALL_INTS) { 870 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 871 "\020\1RX_STP\2RX\3TX\4EXEC"); 872 if (status & EXEC_INT) 873 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 874 "\020\6ABORT"); 875 else 876 printf("\n"); 877 } 878 #endif 879 if ((status & (RX_INT | TX_INT)) == 0) 880 return 0; 881 882 if (status & RX_INT) { 883 iy_intr_rx(sc); 884 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 885 } 886 if (status & TX_INT) { 887 iy_intr_tx(sc); 888 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 889 } 890 891 #if NRND > 0 892 rnd_add_uint32(&sc->rnd_source, status); 893 #endif 894 895 return 1; 896 } 897 898 void 899 iyget(sc, iot, ioh, rxlen) 900 struct iy_softc *sc; 901 bus_space_tag_t iot; 902 bus_space_handle_t ioh; 903 int rxlen; 904 { 905 struct mbuf *m, *top, **mp; 906 struct ether_header *eh; 907 struct ifnet *ifp; 908 int len; 909 910 ifp = &sc->sc_ethercom.ec_if; 911 912 MGETHDR(m, M_DONTWAIT, MT_DATA); 913 if (m == 0) 914 goto dropped; 915 m->m_pkthdr.rcvif = ifp; 916 m->m_pkthdr.len = rxlen; 917 len = MHLEN; 918 top = 0; 919 mp = ⊤ 920 921 while (rxlen > 0) { 922 if (top) { 923 MGET(m, M_DONTWAIT, MT_DATA); 924 if (m == 0) { 925 m_freem(top); 926 goto dropped; 927 } 928 len = MLEN; 929 } 930 if (rxlen >= MINCLSIZE) { 931 MCLGET(m, M_DONTWAIT); 932 if ((m->m_flags & M_EXT) == 0) { 933 m_free(m); 934 m_freem(top); 935 goto dropped; 936 } 937 len = MCLBYTES; 938 } 939 len = min(rxlen, len); 940 if (len > 1) { 941 len &= ~1; 942 943 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 944 mtod(m, caddr_t), len/2); 945 } else { 946 #ifdef IYDEBUG 947 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 948 #endif 949 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 950 MEM_PORT_REG); 951 } 952 m->m_len = len; 953 rxlen -= len; 954 *mp = m; 955 mp = &m->m_next; 956 } 957 /* XXX receive the top here */ 958 ++ifp->if_ipackets; 959 960 eh = mtod(top, struct ether_header *); 961 962 #if NBPFILTER > 0 963 if (ifp->if_bpf) { 964 bpf_mtap(ifp->if_bpf, top); 965 if ((ifp->if_flags & IFF_PROMISC) && 966 (eh->ether_dhost[0] & 1) == 0 && 967 bcmp(eh->ether_dhost, 968 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 969 sizeof(eh->ether_dhost)) != 0) { 970 971 m_freem(top); 972 return; 973 } 974 } 975 #endif 976 m_adj(top, sizeof(struct ether_header)); 977 ether_input(ifp, eh, top); 978 return; 979 980 dropped: 981 ++ifp->if_ierrors; 982 return; 983 } 984 985 void 986 iy_intr_rx(sc) 987 struct iy_softc *sc; 988 { 989 struct ifnet *ifp; 990 bus_space_tag_t iot; 991 bus_space_handle_t ioh; 992 993 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 994 995 iot = sc->sc_iot; 996 ioh = sc->sc_ioh; 997 ifp = &sc->sc_ethercom.ec_if; 998 999 rxadrs = sc->rx_start; 1000 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1001 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1002 rxnext = 0; 1003 1004 while (rxevnt == RCV_DONE) { 1005 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1006 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1007 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1008 #ifdef IYDEBUG 1009 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 1010 sc->sc_dev.dv_xname, rxadrs, rxstatus, 1011 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1012 "\014CRCERR\015LENERR\016RCVOK\020TYP", 1013 rxnext, rxlen); 1014 #endif 1015 iyget(sc, iot, ioh, rxlen); 1016 1017 /* move stop address */ 1018 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1019 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1020 1021 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1022 rxadrs = rxnext; 1023 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1024 } 1025 sc->rx_start = rxnext; 1026 } 1027 1028 void 1029 iy_intr_tx(sc) 1030 struct iy_softc *sc; 1031 { 1032 bus_space_tag_t iot; 1033 bus_space_handle_t ioh; 1034 struct ifnet *ifp; 1035 u_int txstatus, txstat2, txlen, txnext; 1036 1037 ifp = &sc->sc_ethercom.ec_if; 1038 iot = sc->sc_iot; 1039 ioh = sc->sc_ioh; 1040 1041 while (sc->tx_start != sc->tx_end) { 1042 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1043 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1044 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1045 break; 1046 1047 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1048 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1049 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1050 #ifdef IYDEBUG 1051 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1052 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1053 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1054 txnext, txlen); 1055 #endif 1056 if (txlen & CHAIN) 1057 sc->tx_start = txnext; 1058 else 1059 sc->tx_start = sc->tx_end; 1060 ifp->if_flags &= ~IFF_OACTIVE; 1061 1062 if ((txstat2 & 0x2000) == 0) 1063 ++ifp->if_oerrors; 1064 if (txstat2 & 0x000f) 1065 ifp->if_oerrors += txstat2 & 0x000f; 1066 } 1067 ifp->if_flags &= ~IFF_OACTIVE; 1068 } 1069 1070 int 1071 iyioctl(ifp, cmd, data) 1072 register struct ifnet *ifp; 1073 u_long cmd; 1074 caddr_t data; 1075 { 1076 struct iy_softc *sc; 1077 struct ifaddr *ifa; 1078 struct ifreq *ifr; 1079 int s, error = 0; 1080 1081 sc = ifp->if_softc; 1082 ifa = (struct ifaddr *)data; 1083 ifr = (struct ifreq *)data; 1084 1085 #ifdef IYDEBUG 1086 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1087 ifp, ifp->if_xname, cmd, data); 1088 #endif 1089 1090 s = splimp(); 1091 1092 switch (cmd) { 1093 1094 case SIOCSIFADDR: 1095 ifp->if_flags |= IFF_UP; 1096 1097 switch (ifa->ifa_addr->sa_family) { 1098 #ifdef INET 1099 case AF_INET: 1100 iyinit(sc); 1101 arp_ifinit(ifp, ifa); 1102 break; 1103 #endif 1104 #ifdef NS 1105 /* XXX - This code is probably wrong. */ 1106 case AF_NS: 1107 { 1108 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1109 1110 if (ns_nullhost(*ina)) 1111 ina->x_host = *(union ns_host *) 1112 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1113 else 1114 bcopy(ina->x_host.c_host, 1115 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1116 ETHER_ADDR_LEN); 1117 /* Set new address. */ 1118 iyinit(sc); 1119 break; 1120 } 1121 #endif /* NS */ 1122 default: 1123 iyinit(sc); 1124 break; 1125 } 1126 break; 1127 1128 case SIOCSIFFLAGS: 1129 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1130 if ((ifp->if_flags & IFF_UP) == 0 && 1131 (ifp->if_flags & IFF_RUNNING) != 0) { 1132 /* 1133 * If interface is marked down and it is running, then 1134 * stop it. 1135 */ 1136 iystop(sc); 1137 ifp->if_flags &= ~IFF_RUNNING; 1138 } else if ((ifp->if_flags & IFF_UP) != 0 && 1139 (ifp->if_flags & IFF_RUNNING) == 0) { 1140 /* 1141 * If interface is marked up and it is stopped, then 1142 * start it. 1143 */ 1144 iyinit(sc); 1145 } else { 1146 /* 1147 * Reset the interface to pick up changes in any other 1148 * flags that affect hardware registers. 1149 */ 1150 iystop(sc); 1151 iyinit(sc); 1152 } 1153 #ifdef IYDEBUGX 1154 if (ifp->if_flags & IFF_DEBUG) 1155 sc->sc_debug = IFY_ALL; 1156 else 1157 sc->sc_debug = 0; 1158 #endif 1159 break; 1160 1161 case SIOCADDMULTI: 1162 case SIOCDELMULTI: 1163 error = (cmd == SIOCADDMULTI) ? 1164 ether_addmulti(ifr, &sc->sc_ethercom): 1165 ether_delmulti(ifr, &sc->sc_ethercom); 1166 1167 if (error == ENETRESET) { 1168 /* 1169 * Multicast list has changed; set the hardware filter 1170 * accordingly. 1171 */ 1172 iyreset(sc); /* XXX can't make it work otherwise */ 1173 iy_mc_reset(sc); 1174 error = 0; 1175 } 1176 break; 1177 1178 case SIOCSIFMEDIA: 1179 case SIOCGIFMEDIA: 1180 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1181 break; 1182 default: 1183 error = EINVAL; 1184 } 1185 splx(s); 1186 return error; 1187 } 1188 1189 int 1190 iy_mediachange(ifp) 1191 struct ifnet *ifp; 1192 { 1193 struct iy_softc *sc = ifp->if_softc; 1194 1195 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1196 return EINVAL; 1197 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1198 case IFM_10_5: 1199 case IFM_10_2: 1200 case IFM_10_T: 1201 case IFM_AUTO: 1202 iystop(sc); 1203 iyinit(sc); 1204 return 0; 1205 default: 1206 return EINVAL; 1207 } 1208 } 1209 1210 void 1211 iy_mediastatus(ifp, ifmr) 1212 struct ifnet *ifp; 1213 struct ifmediareq *ifmr; 1214 { 1215 struct iy_softc *sc = ifp->if_softc; 1216 1217 ifmr->ifm_active = sc->iy_media; 1218 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1219 } 1220 1221 1222 static void 1223 iy_mc_setup(sc) 1224 struct iy_softc *sc; 1225 { 1226 struct ether_multi *enm; 1227 struct ether_multistep step; 1228 struct ethercom *ecp; 1229 struct ifnet *ifp; 1230 bus_space_tag_t iot; 1231 bus_space_handle_t ioh; 1232 int avail, last /*, end*/ , len; 1233 int timeout; 1234 u_int8_t temp; 1235 1236 1237 ecp = &sc->sc_ethercom; 1238 ifp = &ecp->ec_if; 1239 1240 iot = sc->sc_iot; 1241 ioh = sc->sc_ioh; 1242 1243 len = 6 * ecp->ec_multicnt + 6; 1244 1245 avail = sc->tx_start - sc->tx_end; 1246 if (avail <= 0) 1247 avail += sc->tx_size; 1248 printf("iy_mc_setup called, %d addresses, %d/%d bytes needed/avail\n", 1249 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1250 1251 last = sc->rx_size; 1252 1253 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1254 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_MULTI); 1255 /* XXX VOODOO */ 1256 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1257 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1258 /* XXX END OF VOODOO */ 1259 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1260 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1261 bus_space_write_2(iot, ioh, MEM_PORT_REG, MC_SETUP_CMD); 1262 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1263 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1264 bus_space_write_2(iot, ioh, MEM_PORT_REG, len); 1265 1266 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1267 LLADDR(ifp->if_sadl), 3); 1268 1269 ETHER_FIRST_MULTI(step, ecp, enm); 1270 while(enm) { 1271 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1272 enm->enm_addrlo, 3); 1273 1274 ETHER_NEXT_MULTI(step, enm); 1275 } 1276 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1277 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1278 1279 1280 sc->tx_start = sc->rx_size; 1281 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1282 1283 for (timeout=0; timeout<100; timeout++) { 1284 DELAY(2); 1285 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1286 continue; 1287 1288 temp = bus_space_read_1(iot, ioh, 0); 1289 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1290 #ifdef DIAGNOSTIC 1291 if (temp & 0x20) { 1292 printf("%s: mc setup failed, %d usec\n", 1293 sc->sc_dev.dv_xname, timeout * 2); 1294 } else if ((temp & 0x0f) == 0x03) { 1295 printf("%s: mc setup done, %d usec\n", 1296 sc->sc_dev.dv_xname, timeout * 2); 1297 } 1298 #endif 1299 break; 1300 } 1301 sc->tx_start = sc->tx_end; 1302 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1303 1304 } 1305 1306 static void 1307 iy_mc_reset(sc) 1308 struct iy_softc *sc; 1309 { 1310 struct ether_multi *enm; 1311 struct ether_multistep step; 1312 struct ethercom *ecp; 1313 struct ifnet *ifp; 1314 bus_space_tag_t iot; 1315 bus_space_handle_t ioh; 1316 u_int16_t temp; 1317 1318 ecp = &sc->sc_ethercom; 1319 ifp = &ecp->ec_if; 1320 1321 iot = sc->sc_iot; 1322 ioh = sc->sc_ioh; 1323 1324 if (ecp->ec_multicnt > 63) { 1325 ifp->if_flags |= IFF_ALLMULTI; 1326 1327 } else if (ecp->ec_multicnt > 0) { 1328 /* 1329 * Step through the list of addresses. 1330 */ 1331 ETHER_FIRST_MULTI(step, ecp, enm); 1332 while(enm) { 1333 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1334 ifp->if_flags |= IFF_ALLMULTI; 1335 goto setupmulti; 1336 } 1337 ETHER_NEXT_MULTI(step, enm); 1338 } 1339 /* OK, we really need to do it now: */ 1340 #if 0 1341 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1342 != IFF_RUNNING) { 1343 ifp->if_flags |= IFF_OACTIVE; 1344 sc->want_mc_setup = 1; 1345 return; 1346 } 1347 #endif 1348 iy_mc_setup(sc); 1349 } else { 1350 ifp->if_flags &= ~IFF_ALLMULTI; 1351 } 1352 1353 setupmulti: 1354 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1355 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1356 temp = MATCH_ALL; 1357 } else if (sc->sc_ethercom.ec_multicnt) { 1358 temp = MATCH_MULTI; 1359 } else 1360 temp = MATCH_ID; 1361 1362 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1363 /* XXX VOODOO */ 1364 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1365 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1366 /* XXX END OF VOODOO */ 1367 1368 /* XXX TBD: setup hardware for all multicasts */ 1369 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1370 return; 1371 } 1372 1373 #ifdef IYDEBUG 1374 void 1375 print_rbd(rbd) 1376 volatile struct ie_recv_buf_desc *rbd; 1377 { 1378 1379 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1380 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1381 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1382 rbd->mbz); 1383 } 1384 #endif 1385 1386 void 1387 iyprobemem(sc) 1388 struct iy_softc *sc; 1389 { 1390 bus_space_tag_t iot; 1391 bus_space_handle_t ioh; 1392 int testing; 1393 1394 iot = sc->sc_iot; 1395 ioh = sc->sc_ioh; 1396 1397 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1398 delay(1); 1399 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1400 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1401 1402 for (testing=65536; testing >= 4096; testing >>= 1) { 1403 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1404 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1405 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1406 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1407 #ifdef IYMEMDEBUG 1408 printf("%s: Didn't keep 0xdead at 0x%x\n", 1409 sc->sc_dev.dv_xname, testing-2); 1410 #endif 1411 continue; 1412 } 1413 1414 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1415 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1416 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1417 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1418 #ifdef IYMEMDEBUG 1419 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1420 sc->sc_dev.dv_xname, testing-2); 1421 #endif 1422 continue; 1423 } 1424 1425 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1426 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1427 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1428 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1429 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1430 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1431 #ifdef IYMEMDEBUG 1432 printf("%s: 0x%x alias of 0x0\n", 1433 sc->sc_dev.dv_xname, testing >> 1); 1434 #endif 1435 continue; 1436 } 1437 1438 break; 1439 } 1440 1441 sc->sram = testing; 1442 1443 switch(testing) { 1444 case 65536: 1445 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1446 sc->rx_size = 44*1024; 1447 break; 1448 1449 case 32768: 1450 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1451 sc->rx_size = 22*1024; 1452 break; 1453 1454 case 16384: 1455 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1456 sc->rx_size = 10*1024; 1457 break; 1458 default: 1459 sc->rx_size = testing/2; 1460 break; 1461 } 1462 sc->tx_size = testing - sc->rx_size; 1463 } 1464 1465 static int 1466 eepromreadall(iot, ioh, wordp, maxi) 1467 bus_space_tag_t iot; 1468 bus_space_handle_t ioh; 1469 u_int16_t *wordp; 1470 int maxi; 1471 { 1472 int i; 1473 u_int16_t checksum, tmp; 1474 1475 checksum = 0; 1476 1477 for (i=0; i<EEPP_LENGTH; ++i) { 1478 tmp = eepromread(iot, ioh, i); 1479 checksum += tmp; 1480 if (i<maxi) 1481 wordp[i] = tmp; 1482 } 1483 1484 if (checksum != EEPP_CHKSUM) { 1485 #ifdef IYDEBUG 1486 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1487 checksum, EEPP_CHKSUM); 1488 #endif 1489 return 1; 1490 } 1491 return 0; 1492 } 1493
Indexes created Thu Sep 25 06:09:39 GMT 2025