if_iy.c revision 1.29.4.1
1 /* $NetBSD: if_iy.c,v 1.29.4.1 1998/12/11 04:53:01 kenh Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 /* 37 * Supported hardware: 38 * 39 * - Intel EtherExpress Pro/10. 40 * - possibly other boards using the i82595 chip and no special tweaks. 41 */ 42 43 #include "opt_inet.h" 44 #include "opt_ns.h" 45 #include "bpfilter.h" 46 #include "rnd.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/buf.h> 52 #include <sys/protosw.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/syslog.h> 57 #include <sys/device.h> 58 #if NRND > 0 59 #include <sys/rnd.h> 60 #endif 61 62 #include <net/if.h> 63 #include <net/if_types.h> 64 #include <net/if_dl.h> 65 66 #include <net/if_ether.h> 67 68 #if NBPFILTER > 0 69 #include <net/bpf.h> 70 #include <net/bpfdesc.h> 71 #endif 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #include <netinet/in_systm.h> 76 #include <netinet/in_var.h> 77 #include <netinet/ip.h> 78 #include <netinet/if_inarp.h> 79 #endif 80 81 #ifdef NS 82 #include <netns/ns.h> 83 #include <netns/ns_if.h> 84 #endif 85 86 #if defined(SIOCSIFMEDIA) 87 #include <net/if_media.h> 88 #endif 89 90 #include <vm/vm.h> 91 92 #include <machine/cpu.h> 93 #include <machine/bus.h> 94 #include <machine/intr.h> 95 96 #include <dev/isa/isareg.h> 97 #include <dev/isa/isavar.h> 98 #include <dev/ic/i82595reg.h> 99 100 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 101 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 102 103 /* 104 * Ethernet status, per interface. 105 */ 106 struct iy_softc { 107 struct device sc_dev; 108 void *sc_ih; 109 110 bus_space_tag_t sc_iot; 111 bus_space_handle_t sc_ioh; 112 113 struct ethercom sc_ethercom; 114 115 struct ifmedia iy_ifmedia; 116 int iy_media; 117 118 int mappedirq; 119 120 int hard_vers; 121 122 int promisc; 123 124 int sram, tx_size, rx_size; 125 126 int tx_start, tx_end, tx_last; 127 int rx_start; 128 129 int doing_mc_setup; 130 #ifdef IYDEBUG 131 int sc_debug; 132 #endif 133 134 #if NRND > 0 135 rndsource_element_t rnd_source; 136 #endif 137 }; 138 139 void iywatchdog __P((struct ifnet *)); 140 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 141 int iyintr __P((void *)); 142 void iyinit __P((struct iy_softc *)); 143 void iystop __P((struct iy_softc *)); 144 void iystart __P((struct ifnet *)); 145 146 void iy_intr_rx __P((struct iy_softc *)); 147 void iy_intr_tx __P((struct iy_softc *)); 148 149 void iyreset __P((struct iy_softc *)); 150 void iy_readframe __P((struct iy_softc *, int)); 151 void iy_drop_packet_buffer __P((struct iy_softc *)); 152 void iy_find_mem_size __P((struct iy_softc *)); 153 void iyrint __P((struct iy_softc *)); 154 void iytint __P((struct iy_softc *)); 155 void iyxmit __P((struct iy_softc *)); 156 static void iy_mc_setup __P((struct iy_softc *)); 157 static void iy_mc_reset __P((struct iy_softc *)); 158 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 159 void iyprobemem __P((struct iy_softc *)); 160 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 161 int)); 162 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 163 164 #ifdef IYDEBUGX 165 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 166 167 int in_ifrint = 0; 168 int in_iftint = 0; 169 #endif 170 171 int iy_mediachange __P((struct ifnet *)); 172 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 173 174 int iyprobe __P((struct device *, struct cfdata *, void *)); 175 void iyattach __P((struct device *, struct device *, void *)); 176 177 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 178 179 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 180 int)); 181 182 struct cfattach iy_ca = { 183 sizeof(struct iy_softc), iyprobe, iyattach 184 }; 185 186 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 187 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 188 189 int 190 iyprobe(parent, match, aux) 191 struct device *parent; 192 struct cfdata *match; 193 void *aux; 194 { 195 struct isa_attach_args *ia = aux; 196 u_int16_t eaddr[8]; 197 198 bus_space_tag_t iot; 199 bus_space_handle_t ioh; 200 201 u_int8_t c, d; 202 203 iot = ia->ia_iot; 204 205 if (ia->ia_iobase == IOBASEUNK) 206 return 0; 207 208 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 209 return 0; 210 211 /* try to find the round robin sig: */ 212 213 c = bus_space_read_1(iot, ioh, ID_REG); 214 if ((c & ID_REG_MASK) != ID_REG_SIG) 215 goto out; 216 217 d = bus_space_read_1(iot, ioh, ID_REG); 218 if ((d & ID_REG_MASK) != ID_REG_SIG) 219 goto out; 220 221 if (((d-c) & R_ROBIN_BITS) != 0x40) 222 goto out; 223 224 d = bus_space_read_1(iot, ioh, ID_REG); 225 if ((d & ID_REG_MASK) != ID_REG_SIG) 226 goto out; 227 228 if (((d-c) & R_ROBIN_BITS) != 0x80) 229 goto out; 230 231 d = bus_space_read_1(iot, ioh, ID_REG); 232 if ((d & ID_REG_MASK) != ID_REG_SIG) 233 goto out; 234 235 if (((d-c) & R_ROBIN_BITS) != 0xC0) 236 goto out; 237 238 d = bus_space_read_1(iot, ioh, ID_REG); 239 if ((d & ID_REG_MASK) != ID_REG_SIG) 240 goto out; 241 242 if (((d-c) & R_ROBIN_BITS) != 0x00) 243 goto out; 244 245 #ifdef IYDEBUG 246 printf("iyprobe verified working ID reg.\n"); 247 #endif 248 249 if (eepromreadall(iot, ioh, eaddr, 8)) 250 goto out; 251 252 if (ia->ia_irq == IRQUNK) 253 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 254 255 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 256 goto out; 257 258 if (eepro_revirqmap[ia->ia_irq] == 0xff) 259 goto out; 260 261 /* now lets reset the chip */ 262 263 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 264 delay(200); 265 266 ia->ia_iosize = 16; 267 268 bus_space_unmap(iot, ioh, 16); 269 return 1; /* found */ 270 out: 271 bus_space_unmap(iot, ioh, 16); 272 return 0; 273 } 274 275 void 276 iyattach(parent, self, aux) 277 struct device *parent, *self; 278 void *aux; 279 { 280 struct iy_softc *sc = (void *)self; 281 struct isa_attach_args *ia = aux; 282 struct ifnet *ifp; 283 bus_space_tag_t iot; 284 bus_space_handle_t ioh; 285 unsigned temp; 286 u_int16_t eaddr[8]; 287 u_int8_t myaddr[ETHER_ADDR_LEN]; 288 int eirq; 289 290 iot = ia->ia_iot; 291 292 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 293 printf(": can't map i/o space\n"); 294 return; 295 } 296 297 sc->sc_iot = iot; 298 sc->sc_ioh = ioh; 299 300 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 301 302 /* now let's reset the chip */ 303 304 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 305 delay(200); 306 307 iyprobemem(sc); 308 309 ifp = if_alloc(); 310 sc->sc_ethercom.ec_if = ifp; 311 ifp->if_ifcom = &sc->sc_ethercom; 312 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 313 ifp->if_softc = sc; 314 ifp->if_start = iystart; 315 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 316 | IFF_MULTICAST; 317 318 sc->doing_mc_setup = 0; 319 320 ifp->if_ioctl = iyioctl; 321 ifp->if_watchdog = iywatchdog; 322 323 (void)eepromreadall(iot, ioh, eaddr, 8); 324 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 325 326 #ifdef DIAGNOSTICS 327 if ((eaddr[EEPPEther0] != 328 eepromread(iot, ioh, EEPPEther0a)) && 329 (eaddr[EEPPEther1] != 330 eepromread(iot, ioh, EEPPEther1a)) && 331 (eaddr[EEPPEther2] != 332 eepromread(iot, ioh, EEPPEther2a))) 333 334 printf("EEPROM Ethernet address differs from copy\n"); 335 #endif 336 337 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 338 myaddr[0] = eaddr[EEPPEther0] >> 8; 339 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 340 myaddr[2] = eaddr[EEPPEther1] >> 8; 341 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 342 myaddr[4] = eaddr[EEPPEther2] >> 8; 343 344 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 345 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 346 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 347 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 348 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 349 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 350 /* Attach the interface. */ 351 if_attach(ifp); 352 ether_ifattach(ifp, myaddr); 353 printf(": address %s, rev. %d, %d kB\n", 354 ether_sprintf(myaddr), 355 sc->hard_vers, sc->sram/1024); 356 357 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 358 if (eirq != ia->ia_irq) 359 printf("%s: EEPROM irq setting %d ignored\n", 360 sc->sc_dev.dv_xname, eirq); 361 362 #if NBPFILTER > 0 363 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 364 #endif 365 366 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 367 IPL_NET, iyintr, sc); 368 369 #if NRND > 0 370 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET); 371 #endif 372 373 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 374 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 375 } 376 377 void 378 iystop(sc) 379 struct iy_softc *sc; 380 { 381 bus_space_tag_t iot; 382 bus_space_handle_t ioh; 383 #ifdef IYDEBUG 384 u_int p, v; 385 #endif 386 387 iot = sc->sc_iot; 388 ioh = sc->sc_ioh; 389 390 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 391 392 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 393 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 394 395 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 396 delay(200); 397 #ifdef IYDEBUG 398 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 399 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 400 p = sc->tx_last; 401 if (!p) 402 p = sc->tx_start; 403 do { 404 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 405 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 406 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 407 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 408 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 409 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 410 printf(" 0x%04x", p); 411 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 412 printf(" 0x%b\n", v, "\020\020Ch"); 413 414 } while (v & 0x8000); 415 #endif 416 sc->tx_start = sc->tx_end = sc->rx_size; 417 sc->tx_last = 0; 418 sc->sc_ethercom.ec_if->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 419 } 420 421 void 422 iyreset(sc) 423 struct iy_softc *sc; 424 { 425 int s; 426 s = splnet(); 427 iystop(sc); 428 iyinit(sc); 429 splx(s); 430 } 431 432 void 433 iyinit(sc) 434 struct iy_softc *sc; 435 { 436 int i; 437 unsigned temp; 438 struct ifnet *ifp; 439 bus_space_tag_t iot; 440 bus_space_handle_t ioh; 441 442 iot = sc->sc_iot; 443 ioh = sc->sc_ioh; 444 445 ifp = sc->sc_ethercom.ec_if; 446 #ifdef IYDEBUG 447 printf("ifp is %p\n", ifp); 448 #endif 449 450 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 451 452 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 453 if (temp & 0x10) 454 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 455 456 for (i=0; i<6; ++i) { 457 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 458 } 459 460 temp = bus_space_read_1(iot, ioh, REG1); 461 bus_space_write_1(iot, ioh, REG1, 462 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 463 464 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 465 temp = MATCH_ALL; 466 } else if (sc->sc_ethercom.ec_multicnt) { 467 temp = MATCH_MULTI; 468 } else 469 temp = MATCH_ID; 470 471 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 472 473 #ifdef IYDEBUG 474 printf("%s: RECV_MODES set to %b\n", sc->sc_dev.dv_xname, 475 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 476 #endif 477 /* XXX VOODOO */ 478 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 479 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 480 /* XXX END OF VOODOO */ 481 482 483 delay(500000); /* for the hardware to test for the connector */ 484 485 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 486 #ifdef IYDEBUG 487 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 488 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 489 #endif 490 temp = (temp & TEST_MODE_MASK); 491 492 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 493 case IFM_10_5: 494 temp &= ~ (BNC_BIT | TPE_BIT); 495 break; 496 497 case IFM_10_2: 498 temp = (temp & ~TPE_BIT) | BNC_BIT; 499 break; 500 501 case IFM_10_T: 502 temp = (temp & ~BNC_BIT) | TPE_BIT; 503 break; 504 default: 505 /* nothing; leave as it is */ 506 } 507 switch (temp & (BNC_BIT | TPE_BIT)) { 508 case BNC_BIT: 509 sc->iy_media = IFM_ETHER | IFM_10_2; 510 break; 511 case TPE_BIT: 512 sc->iy_media = IFM_ETHER | IFM_10_T; 513 break; 514 default: 515 sc->iy_media = IFM_ETHER | IFM_10_5; 516 } 517 518 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 519 #ifdef IYDEBUG 520 printf("changed to 0x%b\n", 521 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 522 #endif 523 524 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 525 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 526 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 527 528 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 529 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 530 531 #ifdef IYDEBUG 532 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 533 temp, "\020\4bad_irq\010flash/boot present"); 534 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 535 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 536 temp, "\020\4BAD IRQ\010flash/boot present"); 537 #endif 538 539 540 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 541 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 542 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 543 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 544 545 temp = bus_space_read_1(iot, ioh, REG1); 546 #ifdef IYDEBUG 547 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 548 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 549 #endif 550 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 551 552 #ifdef IYDEBUG 553 temp = bus_space_read_1(iot, ioh, REG1); 554 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 555 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 556 #endif 557 558 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 559 560 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 561 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 562 563 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 564 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 565 sc->rx_start = 0; 566 567 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 568 delay(200); 569 570 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 571 572 sc->tx_start = sc->tx_end = sc->rx_size; 573 sc->tx_last = 0; 574 575 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 576 577 ifp->if_flags |= IFF_RUNNING; 578 ifp->if_flags &= ~IFF_OACTIVE; 579 } 580 581 void 582 iystart(ifp) 583 struct ifnet *ifp; 584 { 585 struct iy_softc *sc; 586 587 588 struct mbuf *m0, *m; 589 u_int len, pad, last, end; 590 u_int llen, residual; 591 int avail; 592 caddr_t data; 593 u_int16_t resval, stat; 594 bus_space_tag_t iot; 595 bus_space_handle_t ioh; 596 597 #ifdef IYDEBUG 598 printf("iystart called\n"); 599 #endif 600 sc = ifp->if_softc; 601 602 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 603 return; 604 605 iot = sc->sc_iot; 606 ioh = sc->sc_ioh; 607 608 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 609 #ifdef IYDEBUG 610 printf("%s: trying to write another packet to the hardware\n", 611 sc->sc_dev.dv_xname); 612 #endif 613 614 /* We need to use m->m_pkthdr.len, so require the header */ 615 if ((m0->m_flags & M_PKTHDR) == 0) 616 panic("iystart: no header mbuf"); 617 618 len = m0->m_pkthdr.len; 619 pad = len & 1; 620 621 #ifdef IYDEBUG 622 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 623 #endif 624 if (len < ETHER_MIN_LEN) { 625 pad = ETHER_MIN_LEN - len; 626 } 627 628 if (len + pad > ETHER_MAX_LEN) { 629 /* packet is obviously too large: toss it */ 630 ++ifp->if_oerrors; 631 IF_DEQUEUE(&ifp->if_snd, m0); 632 m_freem(m0); 633 continue; 634 } 635 636 #if NBPFILTER > 0 637 if (ifp->if_bpf) 638 bpf_mtap(ifp->if_bpf, m0); 639 #endif 640 641 avail = sc->tx_start - sc->tx_end; 642 if (avail <= 0) 643 avail += sc->tx_size; 644 645 #ifdef IYDEBUG 646 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 647 #endif 648 /* 649 * we MUST RUN at splnet here --- 650 * XXX todo: or even turn off the boards ints ??? hm... 651 */ 652 653 /* See if there is room to put another packet in the buffer. */ 654 655 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 656 #ifdef IYDEBUG 657 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 658 sc->sc_dev.dv_xname, len, avail); 659 #endif 660 ifp->if_flags |= IFF_OACTIVE; 661 return; 662 } 663 664 /* we know it fits in the hardware now, so dequeue it */ 665 IF_DEQUEUE(&ifp->if_snd, m0); 666 667 last = sc->tx_end; 668 end = last + pad + len + I595_XMT_HDRLEN; 669 670 if (end >= sc->sram) { 671 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 672 /* keep header in one piece */ 673 last = sc->rx_size; 674 end = last + pad + len + I595_XMT_HDRLEN; 675 } else 676 end -= sc->tx_size; 677 } 678 679 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 680 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 681 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 682 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 683 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 684 685 residual = resval = 0; 686 687 while ((m = m0)!=0) { 688 data = mtod(m, caddr_t); 689 llen = m->m_len; 690 if (residual) { 691 #ifdef IYDEBUG 692 printf("%s: merging residual with next mbuf.\n", 693 sc->sc_dev.dv_xname); 694 #endif 695 resval |= *data << 8; 696 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 697 --llen; 698 ++data; 699 } 700 if (llen > 1) 701 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 702 data, llen>>1); 703 residual = llen & 1; 704 if (residual) { 705 resval = *(data + llen - 1); 706 #ifdef IYDEBUG 707 printf("%s: got odd mbuf to send.\n", 708 sc->sc_dev.dv_xname); 709 #endif 710 } 711 712 MFREE(m, m0); 713 } 714 715 if (residual) 716 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 717 718 pad >>= 1; 719 while (pad-- > 0) 720 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 721 722 #ifdef IYDEBUG 723 printf("%s: new last = 0x%x, end = 0x%x.\n", 724 sc->sc_dev.dv_xname, last, end); 725 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 726 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 727 #endif 728 729 if (sc->tx_start != sc->tx_end) { 730 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 731 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 732 733 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 734 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 735 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 736 #ifdef IYDEBUG 737 printf("%s: setting 0x%x to 0x%x\n", 738 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 739 stat | CHAIN); 740 #endif 741 } 742 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 743 744 /* XXX todo: enable ints here if disabled */ 745 746 ++ifp->if_opackets; 747 748 if (sc->tx_start == sc->tx_end) { 749 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 750 bus_space_write_1(iot, ioh, 0, XMT_CMD); 751 sc->tx_start = last; 752 #ifdef IYDEBUG 753 printf("%s: writing 0x%x to XAR and giving XCMD\n", 754 sc->sc_dev.dv_xname, last); 755 #endif 756 } else { 757 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 758 #ifdef IYDEBUG 759 printf("%s: giving RESUME_XCMD\n", 760 sc->sc_dev.dv_xname); 761 #endif 762 } 763 sc->tx_last = last; 764 sc->tx_end = end; 765 } 766 } 767 768 769 static __inline void 770 eepromwritebit(iot, ioh, what) 771 bus_space_tag_t iot; 772 bus_space_handle_t ioh; 773 int what; 774 { 775 bus_space_write_1(iot, ioh, EEPROM_REG, what); 776 delay(1); 777 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 778 delay(1); 779 bus_space_write_1(iot, ioh, EEPROM_REG, what); 780 delay(1); 781 } 782 783 static __inline int 784 eepromreadbit(iot, ioh) 785 bus_space_tag_t iot; 786 bus_space_handle_t ioh; 787 { 788 int b; 789 790 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 791 delay(1); 792 b = bus_space_read_1(iot, ioh, EEPROM_REG); 793 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 794 delay(1); 795 796 return ((b & EEDO) != 0); 797 } 798 799 static u_int16_t 800 eepromread(iot, ioh, offset) 801 bus_space_tag_t iot; 802 bus_space_handle_t ioh; 803 int offset; 804 { 805 volatile int i; 806 volatile int j; 807 volatile u_int16_t readval; 808 809 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 810 delay(1); 811 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 812 delay(1); 813 814 eepromwritebit(iot, ioh, EECS|EEDI); 815 eepromwritebit(iot, ioh, EECS|EEDI); 816 eepromwritebit(iot, ioh, EECS); 817 818 for (j=5; j>=0; --j) { 819 if ((offset>>j) & 1) 820 eepromwritebit(iot, ioh, EECS|EEDI); 821 else 822 eepromwritebit(iot, ioh, EECS); 823 } 824 825 for (readval=0, i=0; i<16; ++i) { 826 readval<<=1; 827 readval |= eepromreadbit(iot, ioh); 828 } 829 830 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 831 delay(1); 832 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 833 834 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 835 836 return readval; 837 } 838 839 /* 840 * Device timeout/watchdog routine. Entered if the device neglects to generate 841 * an interrupt after a transmit has been started on it. 842 */ 843 void 844 iywatchdog(ifp) 845 struct ifnet *ifp; 846 { 847 struct iy_softc *sc = ifp->if_softc; 848 849 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 850 ++ifp->if_oerrors; 851 iyreset(sc); 852 } 853 854 /* 855 * What to do upon receipt of an interrupt. 856 */ 857 int 858 iyintr(arg) 859 void *arg; 860 { 861 struct iy_softc *sc = arg; 862 bus_space_tag_t iot; 863 bus_space_handle_t ioh; 864 865 register u_short status; 866 867 iot = sc->sc_iot; 868 ioh = sc->sc_ioh; 869 870 status = bus_space_read_1(iot, ioh, STATUS_REG); 871 #ifdef IYDEBUG 872 if (status & ALL_INTS) { 873 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 874 "\020\1RX_STP\2RX\3TX\4EXEC"); 875 if (status & EXEC_INT) 876 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 877 "\020\6ABORT"); 878 else 879 printf("\n"); 880 } 881 #endif 882 if ((status & (RX_INT | TX_INT)) == 0) 883 return 0; 884 885 if (status & RX_INT) { 886 iy_intr_rx(sc); 887 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 888 } 889 if (status & TX_INT) { 890 iy_intr_tx(sc); 891 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 892 } 893 894 #if NRND > 0 895 rnd_add_uint32(&sc->rnd_source, status); 896 #endif 897 898 return 1; 899 } 900 901 void 902 iyget(sc, iot, ioh, rxlen) 903 struct iy_softc *sc; 904 bus_space_tag_t iot; 905 bus_space_handle_t ioh; 906 int rxlen; 907 { 908 struct mbuf *m, *top, **mp; 909 struct ether_header *eh; 910 struct ifnet *ifp; 911 int len; 912 913 ifp = sc->sc_ethercom.ec_if; 914 915 MGETHDR(m, M_DONTWAIT, MT_DATA); 916 if (m == 0) 917 goto dropped; 918 m->m_pkthdr.rcvif = ifp; 919 if_addref(ifp); 920 m->m_pkthdr.len = rxlen; 921 len = MHLEN; 922 top = 0; 923 mp = ⊤ 924 925 while (rxlen > 0) { 926 if (top) { 927 MGET(m, M_DONTWAIT, MT_DATA); 928 if (m == 0) { 929 m_freem(top); 930 goto dropped; 931 } 932 len = MLEN; 933 } 934 if (rxlen >= MINCLSIZE) { 935 MCLGET(m, M_DONTWAIT); 936 if ((m->m_flags & M_EXT) == 0) { 937 m_free(m); 938 m_freem(top); 939 goto dropped; 940 } 941 len = MCLBYTES; 942 } 943 len = min(rxlen, len); 944 if (len > 1) { 945 len &= ~1; 946 947 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 948 mtod(m, caddr_t), len/2); 949 } else { 950 #ifdef IYDEBUG 951 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 952 #endif 953 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 954 MEM_PORT_REG); 955 } 956 m->m_len = len; 957 rxlen -= len; 958 *mp = m; 959 mp = &m->m_next; 960 } 961 /* XXX receive the top here */ 962 ++ifp->if_ipackets; 963 964 eh = mtod(top, struct ether_header *); 965 966 #if NBPFILTER > 0 967 if (ifp->if_bpf) { 968 bpf_mtap(ifp->if_bpf, top); 969 if ((ifp->if_flags & IFF_PROMISC) && 970 (eh->ether_dhost[0] & 1) == 0 && 971 bcmp(eh->ether_dhost, 972 LLADDR(ifp->if_sadl), 973 sizeof(eh->ether_dhost)) != 0) { 974 975 m_freem(top); 976 return; 977 } 978 } 979 #endif 980 m_adj(top, sizeof(struct ether_header)); 981 ether_input(ifp, eh, top); 982 return; 983 984 dropped: 985 ++ifp->if_ierrors; 986 return; 987 } 988 989 void 990 iy_intr_rx(sc) 991 struct iy_softc *sc; 992 { 993 struct ifnet *ifp; 994 bus_space_tag_t iot; 995 bus_space_handle_t ioh; 996 997 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 998 999 iot = sc->sc_iot; 1000 ioh = sc->sc_ioh; 1001 ifp = sc->sc_ethercom.ec_if; 1002 1003 rxadrs = sc->rx_start; 1004 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1005 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1006 rxnext = 0; 1007 1008 while (rxevnt == RCV_DONE) { 1009 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1010 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1011 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1012 #ifdef IYDEBUG 1013 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 1014 sc->sc_dev.dv_xname, rxadrs, rxstatus, 1015 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1016 "\014CRCERR\015LENERR\016RCVOK\020TYP", 1017 rxnext, rxlen); 1018 #endif 1019 iyget(sc, iot, ioh, rxlen); 1020 1021 /* move stop address */ 1022 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1023 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1024 1025 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1026 rxadrs = rxnext; 1027 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1028 } 1029 sc->rx_start = rxnext; 1030 } 1031 1032 void 1033 iy_intr_tx(sc) 1034 struct iy_softc *sc; 1035 { 1036 bus_space_tag_t iot; 1037 bus_space_handle_t ioh; 1038 struct ifnet *ifp; 1039 u_int txstatus, txstat2, txlen, txnext; 1040 1041 ifp = sc->sc_ethercom.ec_if; 1042 iot = sc->sc_iot; 1043 ioh = sc->sc_ioh; 1044 1045 while (sc->tx_start != sc->tx_end) { 1046 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1047 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1048 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1049 break; 1050 1051 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1052 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1053 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1054 #ifdef IYDEBUG 1055 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1056 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1057 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1058 txnext, txlen); 1059 #endif 1060 if (txlen & CHAIN) 1061 sc->tx_start = txnext; 1062 else 1063 sc->tx_start = sc->tx_end; 1064 ifp->if_flags &= ~IFF_OACTIVE; 1065 1066 if ((txstat2 & 0x2000) == 0) 1067 ++ifp->if_oerrors; 1068 if (txstat2 & 0x000f) 1069 ifp->if_oerrors += txstat2 & 0x000f; 1070 } 1071 ifp->if_flags &= ~IFF_OACTIVE; 1072 } 1073 1074 int 1075 iyioctl(ifp, cmd, data) 1076 register struct ifnet *ifp; 1077 u_long cmd; 1078 caddr_t data; 1079 { 1080 struct iy_softc *sc; 1081 struct ifaddr *ifa; 1082 struct ifreq *ifr; 1083 int s, error = 0; 1084 1085 sc = ifp->if_softc; 1086 ifa = (struct ifaddr *)data; 1087 ifr = (struct ifreq *)data; 1088 1089 #ifdef IYDEBUG 1090 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1091 ifp, ifp->if_xname, cmd, data); 1092 #endif 1093 1094 s = splnet(); 1095 1096 switch (cmd) { 1097 1098 case SIOCSIFADDR: 1099 ifp->if_flags |= IFF_UP; 1100 1101 switch (ifa->ifa_addr->sa_family) { 1102 #ifdef INET 1103 case AF_INET: 1104 iyinit(sc); 1105 arp_ifinit(ifp, ifa); 1106 break; 1107 #endif 1108 #ifdef NS 1109 /* XXX - This code is probably wrong. */ 1110 case AF_NS: 1111 { 1112 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1113 1114 if (ns_nullhost(*ina)) 1115 ina->x_host = *(union ns_host *) 1116 LLADDR(ifp->if_sadl); 1117 else 1118 bcopy(ina->x_host.c_host, 1119 LLADDR(ifp->if_sadl), 1120 ETHER_ADDR_LEN); 1121 /* Set new address. */ 1122 iyinit(sc); 1123 break; 1124 } 1125 #endif /* NS */ 1126 default: 1127 iyinit(sc); 1128 break; 1129 } 1130 break; 1131 1132 case SIOCSIFFLAGS: 1133 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1134 if ((ifp->if_flags & IFF_UP) == 0 && 1135 (ifp->if_flags & IFF_RUNNING) != 0) { 1136 /* 1137 * If interface is marked down and it is running, then 1138 * stop it. 1139 */ 1140 iystop(sc); 1141 ifp->if_flags &= ~IFF_RUNNING; 1142 } else if ((ifp->if_flags & IFF_UP) != 0 && 1143 (ifp->if_flags & IFF_RUNNING) == 0) { 1144 /* 1145 * If interface is marked up and it is stopped, then 1146 * start it. 1147 */ 1148 iyinit(sc); 1149 } else { 1150 /* 1151 * Reset the interface to pick up changes in any other 1152 * flags that affect hardware registers. 1153 */ 1154 iystop(sc); 1155 iyinit(sc); 1156 } 1157 #ifdef IYDEBUGX 1158 if (ifp->if_flags & IFF_DEBUG) 1159 sc->sc_debug = IFY_ALL; 1160 else 1161 sc->sc_debug = 0; 1162 #endif 1163 break; 1164 1165 case SIOCADDMULTI: 1166 case SIOCDELMULTI: 1167 error = (cmd == SIOCADDMULTI) ? 1168 ether_addmulti(ifr, ifp->if_ifcom): 1169 ether_delmulti(ifr, ifp->if_ifcom); 1170 1171 if (error == ENETRESET) { 1172 /* 1173 * Multicast list has changed; set the hardware filter 1174 * accordingly. 1175 */ 1176 iyreset(sc); /* XXX can't make it work otherwise */ 1177 iy_mc_reset(sc); 1178 error = 0; 1179 } 1180 break; 1181 1182 case SIOCSIFMEDIA: 1183 case SIOCGIFMEDIA: 1184 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1185 break; 1186 default: 1187 error = EINVAL; 1188 } 1189 splx(s); 1190 return error; 1191 } 1192 1193 int 1194 iy_mediachange(ifp) 1195 struct ifnet *ifp; 1196 { 1197 struct iy_softc *sc = ifp->if_softc; 1198 1199 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1200 return EINVAL; 1201 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1202 case IFM_10_5: 1203 case IFM_10_2: 1204 case IFM_10_T: 1205 case IFM_AUTO: 1206 iystop(sc); 1207 iyinit(sc); 1208 return 0; 1209 default: 1210 return EINVAL; 1211 } 1212 } 1213 1214 void 1215 iy_mediastatus(ifp, ifmr) 1216 struct ifnet *ifp; 1217 struct ifmediareq *ifmr; 1218 { 1219 struct iy_softc *sc = ifp->if_softc; 1220 1221 ifmr->ifm_active = sc->iy_media; 1222 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1223 } 1224 1225 1226 static void 1227 iy_mc_setup(sc) 1228 struct iy_softc *sc; 1229 { 1230 struct ether_multi *enm; 1231 struct ether_multistep step; 1232 struct ifnet *ifp = sc->sc_ethercom.ec_if; 1233 struct ethercom *ecp; 1234 bus_space_tag_t iot; 1235 bus_space_handle_t ioh; 1236 int avail, last /*, end*/ , len; 1237 int timeout; 1238 u_int8_t temp; 1239 1240 1241 ecp = &sc->sc_ethercom; 1242 ifp = ecp->ec_if; 1243 1244 iot = sc->sc_iot; 1245 ioh = sc->sc_ioh; 1246 1247 len = 6 * ecp->ec_multicnt + 6; 1248 1249 avail = sc->tx_start - sc->tx_end; 1250 if (avail <= 0) 1251 avail += sc->tx_size; 1252 printf("iy_mc_setup called, %d addresses, %d/%d bytes needed/avail\n", 1253 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1254 1255 last = sc->rx_size; 1256 1257 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1258 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_MULTI); 1259 /* XXX VOODOO */ 1260 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1261 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1262 /* XXX END OF VOODOO */ 1263 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1264 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1265 bus_space_write_2(iot, ioh, MEM_PORT_REG, MC_SETUP_CMD); 1266 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1267 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1268 bus_space_write_2(iot, ioh, MEM_PORT_REG, len); 1269 1270 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1271 LLADDR(ifp->if_sadl), 3); 1272 1273 ETHER_FIRST_MULTI(step, ecp, enm); 1274 while(enm) { 1275 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1276 enm->enm_addrlo, 3); 1277 1278 ETHER_NEXT_MULTI(step, enm); 1279 } 1280 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1281 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1282 1283 1284 sc->tx_start = sc->rx_size; 1285 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1286 1287 for (timeout=0; timeout<100; timeout++) { 1288 DELAY(2); 1289 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1290 continue; 1291 1292 temp = bus_space_read_1(iot, ioh, 0); 1293 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1294 #ifdef DIAGNOSTIC 1295 if (temp & 0x20) { 1296 printf("%s: mc setup failed, %d usec\n", 1297 sc->sc_dev.dv_xname, timeout * 2); 1298 } else if ((temp & 0x0f) == 0x03) { 1299 printf("%s: mc setup done, %d usec\n", 1300 sc->sc_dev.dv_xname, timeout * 2); 1301 } 1302 #endif 1303 break; 1304 } 1305 sc->tx_start = sc->tx_end; 1306 sc->sc_ethercom.ec_if->if_flags &= ~IFF_OACTIVE; 1307 1308 } 1309 1310 static void 1311 iy_mc_reset(sc) 1312 struct iy_softc *sc; 1313 { 1314 struct ether_multi *enm; 1315 struct ether_multistep step; 1316 struct ethercom *ecp; 1317 struct ifnet *ifp; 1318 bus_space_tag_t iot; 1319 bus_space_handle_t ioh; 1320 u_int16_t temp; 1321 1322 ecp = &sc->sc_ethercom; 1323 ifp = ecp->ec_if; 1324 1325 iot = sc->sc_iot; 1326 ioh = sc->sc_ioh; 1327 1328 if (ecp->ec_multicnt > 63) { 1329 ifp->if_flags |= IFF_ALLMULTI; 1330 1331 } else if (ecp->ec_multicnt > 0) { 1332 /* 1333 * Step through the list of addresses. 1334 */ 1335 ETHER_FIRST_MULTI(step, ecp, enm); 1336 while(enm) { 1337 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1338 ifp->if_flags |= IFF_ALLMULTI; 1339 goto setupmulti; 1340 } 1341 ETHER_NEXT_MULTI(step, enm); 1342 } 1343 /* OK, we really need to do it now: */ 1344 #if 0 1345 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1346 != IFF_RUNNING) { 1347 ifp->if_flags |= IFF_OACTIVE; 1348 sc->want_mc_setup = 1; 1349 return; 1350 } 1351 #endif 1352 iy_mc_setup(sc); 1353 } else { 1354 ifp->if_flags &= ~IFF_ALLMULTI; 1355 } 1356 1357 setupmulti: 1358 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1359 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1360 temp = MATCH_ALL; 1361 } else if (sc->sc_ethercom.ec_multicnt) { 1362 temp = MATCH_MULTI; 1363 } else 1364 temp = MATCH_ID; 1365 1366 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1367 /* XXX VOODOO */ 1368 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1369 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1370 /* XXX END OF VOODOO */ 1371 1372 /* XXX TBD: setup hardware for all multicasts */ 1373 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1374 return; 1375 } 1376 1377 #ifdef IYDEBUG 1378 void 1379 print_rbd(rbd) 1380 volatile struct ie_recv_buf_desc *rbd; 1381 { 1382 1383 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1384 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1385 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1386 rbd->mbz); 1387 } 1388 #endif 1389 1390 void 1391 iyprobemem(sc) 1392 struct iy_softc *sc; 1393 { 1394 bus_space_tag_t iot; 1395 bus_space_handle_t ioh; 1396 int testing; 1397 1398 iot = sc->sc_iot; 1399 ioh = sc->sc_ioh; 1400 1401 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1402 delay(1); 1403 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1404 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1405 1406 for (testing=65536; testing >= 4096; testing >>= 1) { 1407 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1408 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1409 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1410 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1411 #ifdef IYMEMDEBUG 1412 printf("%s: Didn't keep 0xdead at 0x%x\n", 1413 sc->sc_dev.dv_xname, testing-2); 1414 #endif 1415 continue; 1416 } 1417 1418 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1419 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1420 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1421 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1422 #ifdef IYMEMDEBUG 1423 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1424 sc->sc_dev.dv_xname, testing-2); 1425 #endif 1426 continue; 1427 } 1428 1429 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1430 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1431 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1432 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1433 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1434 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1435 #ifdef IYMEMDEBUG 1436 printf("%s: 0x%x alias of 0x0\n", 1437 sc->sc_dev.dv_xname, testing >> 1); 1438 #endif 1439 continue; 1440 } 1441 1442 break; 1443 } 1444 1445 sc->sram = testing; 1446 1447 switch(testing) { 1448 case 65536: 1449 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1450 sc->rx_size = 44*1024; 1451 break; 1452 1453 case 32768: 1454 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1455 sc->rx_size = 22*1024; 1456 break; 1457 1458 case 16384: 1459 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1460 sc->rx_size = 10*1024; 1461 break; 1462 default: 1463 sc->rx_size = testing/2; 1464 break; 1465 } 1466 sc->tx_size = testing - sc->rx_size; 1467 } 1468 1469 static int 1470 eepromreadall(iot, ioh, wordp, maxi) 1471 bus_space_tag_t iot; 1472 bus_space_handle_t ioh; 1473 u_int16_t *wordp; 1474 int maxi; 1475 { 1476 int i; 1477 u_int16_t checksum, tmp; 1478 1479 checksum = 0; 1480 1481 for (i=0; i<EEPP_LENGTH; ++i) { 1482 tmp = eepromread(iot, ioh, i); 1483 checksum += tmp; 1484 if (i<maxi) 1485 wordp[i] = tmp; 1486 } 1487 1488 if (checksum != EEPP_CHKSUM) { 1489 #ifdef IYDEBUG 1490 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1491 checksum, EEPP_CHKSUM); 1492 #endif 1493 return 1; 1494 } 1495 return 0; 1496 } 1497
Indexes created Wed Oct 01 15:09:59 GMT 2025