if_iy.c revision 1.31
1 /* $NetBSD: if_iy.c,v 1.31 1999/02/16 23:34:13 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include "opt_inet.h" 49 #include "opt_ns.h" 50 #include "bpfilter.h" 51 #include "rnd.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/mbuf.h> 56 #include <sys/buf.h> 57 #include <sys/protosw.h> 58 #include <sys/socket.h> 59 #include <sys/ioctl.h> 60 #include <sys/errno.h> 61 #include <sys/syslog.h> 62 #include <sys/device.h> 63 #if NRND > 0 64 #include <sys/rnd.h> 65 #endif 66 67 #include <net/if.h> 68 #include <net/if_types.h> 69 #include <net/if_dl.h> 70 71 #include <net/if_ether.h> 72 73 #if NBPFILTER > 0 74 #include <net/bpf.h> 75 #include <net/bpfdesc.h> 76 #endif 77 78 #ifdef INET 79 #include <netinet/in.h> 80 #include <netinet/in_systm.h> 81 #include <netinet/in_var.h> 82 #include <netinet/ip.h> 83 #include <netinet/if_inarp.h> 84 #endif 85 86 #ifdef NS 87 #include <netns/ns.h> 88 #include <netns/ns_if.h> 89 #endif 90 91 #if defined(SIOCSIFMEDIA) 92 #include <net/if_media.h> 93 #endif 94 95 #include <vm/vm.h> 96 97 #include <machine/cpu.h> 98 #include <machine/bus.h> 99 #include <machine/intr.h> 100 101 #include <dev/isa/isareg.h> 102 #include <dev/isa/isavar.h> 103 #include <dev/ic/i82595reg.h> 104 105 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 106 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 107 108 /* 109 * Ethernet status, per interface. 110 */ 111 struct iy_softc { 112 struct device sc_dev; 113 void *sc_ih; 114 115 bus_space_tag_t sc_iot; 116 bus_space_handle_t sc_ioh; 117 118 struct ethercom sc_ethercom; 119 120 struct ifmedia iy_ifmedia; 121 int iy_media; 122 123 int mappedirq; 124 125 int hard_vers; 126 127 int promisc; 128 129 int sram, tx_size, rx_size; 130 131 int tx_start, tx_end, tx_last; 132 int rx_start; 133 134 int doing_mc_setup; 135 #ifdef IYDEBUG 136 int sc_debug; 137 #endif 138 139 #if NRND > 0 140 rndsource_element_t rnd_source; 141 #endif 142 }; 143 144 void iywatchdog __P((struct ifnet *)); 145 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 146 int iyintr __P((void *)); 147 void iyinit __P((struct iy_softc *)); 148 void iystop __P((struct iy_softc *)); 149 void iystart __P((struct ifnet *)); 150 151 void iy_intr_rx __P((struct iy_softc *)); 152 void iy_intr_tx __P((struct iy_softc *)); 153 154 void iyreset __P((struct iy_softc *)); 155 void iy_readframe __P((struct iy_softc *, int)); 156 void iy_drop_packet_buffer __P((struct iy_softc *)); 157 void iy_find_mem_size __P((struct iy_softc *)); 158 void iyrint __P((struct iy_softc *)); 159 void iytint __P((struct iy_softc *)); 160 void iyxmit __P((struct iy_softc *)); 161 static void iy_mc_setup __P((struct iy_softc *)); 162 static void iy_mc_reset __P((struct iy_softc *)); 163 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 164 void iyprobemem __P((struct iy_softc *)); 165 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 166 int)); 167 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 168 169 #ifdef IYDEBUGX 170 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 171 172 int in_ifrint = 0; 173 int in_iftint = 0; 174 #endif 175 176 int iy_mediachange __P((struct ifnet *)); 177 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 178 179 int iyprobe __P((struct device *, struct cfdata *, void *)); 180 void iyattach __P((struct device *, struct device *, void *)); 181 182 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 183 184 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 185 int)); 186 187 struct cfattach iy_ca = { 188 sizeof(struct iy_softc), iyprobe, iyattach 189 }; 190 191 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 192 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 193 194 int 195 iyprobe(parent, match, aux) 196 struct device *parent; 197 struct cfdata *match; 198 void *aux; 199 { 200 struct isa_attach_args *ia = aux; 201 u_int16_t eaddr[8]; 202 203 bus_space_tag_t iot; 204 bus_space_handle_t ioh; 205 206 u_int8_t c, d; 207 208 iot = ia->ia_iot; 209 210 if (ia->ia_iobase == IOBASEUNK) 211 return 0; 212 213 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 214 return 0; 215 216 /* try to find the round robin sig: */ 217 218 c = bus_space_read_1(iot, ioh, ID_REG); 219 if ((c & ID_REG_MASK) != ID_REG_SIG) 220 goto out; 221 222 d = bus_space_read_1(iot, ioh, ID_REG); 223 if ((d & ID_REG_MASK) != ID_REG_SIG) 224 goto out; 225 226 if (((d-c) & R_ROBIN_BITS) != 0x40) 227 goto out; 228 229 d = bus_space_read_1(iot, ioh, ID_REG); 230 if ((d & ID_REG_MASK) != ID_REG_SIG) 231 goto out; 232 233 if (((d-c) & R_ROBIN_BITS) != 0x80) 234 goto out; 235 236 d = bus_space_read_1(iot, ioh, ID_REG); 237 if ((d & ID_REG_MASK) != ID_REG_SIG) 238 goto out; 239 240 if (((d-c) & R_ROBIN_BITS) != 0xC0) 241 goto out; 242 243 d = bus_space_read_1(iot, ioh, ID_REG); 244 if ((d & ID_REG_MASK) != ID_REG_SIG) 245 goto out; 246 247 if (((d-c) & R_ROBIN_BITS) != 0x00) 248 goto out; 249 250 #ifdef IYDEBUG 251 printf("iyprobe verified working ID reg.\n"); 252 #endif 253 254 if (eepromreadall(iot, ioh, eaddr, 8)) 255 goto out; 256 257 if (ia->ia_irq == IRQUNK) 258 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 259 260 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 261 goto out; 262 263 if (eepro_revirqmap[ia->ia_irq] == 0xff) 264 goto out; 265 266 /* now lets reset the chip */ 267 268 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 269 delay(200); 270 271 ia->ia_iosize = 16; 272 273 bus_space_unmap(iot, ioh, 16); 274 return 1; /* found */ 275 out: 276 bus_space_unmap(iot, ioh, 16); 277 return 0; 278 } 279 280 void 281 iyattach(parent, self, aux) 282 struct device *parent, *self; 283 void *aux; 284 { 285 struct iy_softc *sc = (void *)self; 286 struct isa_attach_args *ia = aux; 287 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 288 bus_space_tag_t iot; 289 bus_space_handle_t ioh; 290 unsigned temp; 291 u_int16_t eaddr[8]; 292 u_int8_t myaddr[ETHER_ADDR_LEN]; 293 int eirq; 294 295 iot = ia->ia_iot; 296 297 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 298 printf(": can't map i/o space\n"); 299 return; 300 } 301 302 sc->sc_iot = iot; 303 sc->sc_ioh = ioh; 304 305 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 306 307 /* now let's reset the chip */ 308 309 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 310 delay(200); 311 312 iyprobemem(sc); 313 314 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 315 ifp->if_softc = sc; 316 ifp->if_start = iystart; 317 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 318 | IFF_MULTICAST; 319 320 sc->doing_mc_setup = 0; 321 322 ifp->if_ioctl = iyioctl; 323 ifp->if_watchdog = iywatchdog; 324 325 (void)eepromreadall(iot, ioh, eaddr, 8); 326 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 327 328 #ifdef DIAGNOSTICS 329 if ((eaddr[EEPPEther0] != 330 eepromread(iot, ioh, EEPPEther0a)) && 331 (eaddr[EEPPEther1] != 332 eepromread(iot, ioh, EEPPEther1a)) && 333 (eaddr[EEPPEther2] != 334 eepromread(iot, ioh, EEPPEther2a))) 335 336 printf("EEPROM Ethernet address differs from copy\n"); 337 #endif 338 339 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 340 myaddr[0] = eaddr[EEPPEther0] >> 8; 341 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 342 myaddr[2] = eaddr[EEPPEther1] >> 8; 343 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 344 myaddr[4] = eaddr[EEPPEther2] >> 8; 345 346 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 347 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 348 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 349 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 350 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 351 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 352 /* Attach the interface. */ 353 if_attach(ifp); 354 ether_ifattach(ifp, myaddr); 355 printf(": address %s, rev. %d, %d kB\n", 356 ether_sprintf(myaddr), 357 sc->hard_vers, sc->sram/1024); 358 359 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 360 if (eirq != ia->ia_irq) 361 printf("%s: EEPROM irq setting %d ignored\n", 362 sc->sc_dev.dv_xname, eirq); 363 364 #if NBPFILTER > 0 365 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 366 #endif 367 368 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 369 IPL_NET, iyintr, sc); 370 371 #if NRND > 0 372 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET); 373 #endif 374 375 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 376 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 377 } 378 379 void 380 iystop(sc) 381 struct iy_softc *sc; 382 { 383 bus_space_tag_t iot; 384 bus_space_handle_t ioh; 385 #ifdef IYDEBUG 386 u_int p, v; 387 #endif 388 389 iot = sc->sc_iot; 390 ioh = sc->sc_ioh; 391 392 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 393 394 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 395 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 396 397 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 398 delay(200); 399 #ifdef IYDEBUG 400 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 401 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 402 p = sc->tx_last; 403 if (!p) 404 p = sc->tx_start; 405 do { 406 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 407 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 408 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 409 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 410 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 411 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 412 printf(" 0x%04x", p); 413 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 414 printf(" 0x%b\n", v, "\020\020Ch"); 415 416 } while (v & 0x8000); 417 #endif 418 sc->tx_start = sc->tx_end = sc->rx_size; 419 sc->tx_last = 0; 420 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 421 } 422 423 void 424 iyreset(sc) 425 struct iy_softc *sc; 426 { 427 int s; 428 s = splnet(); 429 iystop(sc); 430 iyinit(sc); 431 splx(s); 432 } 433 434 void 435 iyinit(sc) 436 struct iy_softc *sc; 437 { 438 int i; 439 unsigned temp; 440 struct ifnet *ifp; 441 bus_space_tag_t iot; 442 bus_space_handle_t ioh; 443 444 iot = sc->sc_iot; 445 ioh = sc->sc_ioh; 446 447 ifp = &sc->sc_ethercom.ec_if; 448 #ifdef IYDEBUG 449 printf("ifp is %p\n", ifp); 450 #endif 451 452 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 453 454 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 455 if (temp & 0x10) 456 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 457 458 for (i=0; i<6; ++i) { 459 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 460 } 461 462 temp = bus_space_read_1(iot, ioh, REG1); 463 bus_space_write_1(iot, ioh, REG1, 464 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 465 466 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 467 temp = MATCH_ALL; 468 } else if (sc->sc_ethercom.ec_multicnt) { 469 temp = MATCH_MULTI; 470 } else 471 temp = MATCH_ID; 472 473 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 474 475 #ifdef IYDEBUG 476 printf("%s: RECV_MODES set to %b\n", sc->sc_dev.dv_xname, 477 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 478 #endif 479 /* XXX VOODOO */ 480 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 481 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 482 /* XXX END OF VOODOO */ 483 484 485 delay(500000); /* for the hardware to test for the connector */ 486 487 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 488 #ifdef IYDEBUG 489 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 490 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 491 #endif 492 temp = (temp & TEST_MODE_MASK); 493 494 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 495 case IFM_10_5: 496 temp &= ~ (BNC_BIT | TPE_BIT); 497 break; 498 499 case IFM_10_2: 500 temp = (temp & ~TPE_BIT) | BNC_BIT; 501 break; 502 503 case IFM_10_T: 504 temp = (temp & ~BNC_BIT) | TPE_BIT; 505 break; 506 default: 507 /* nothing; leave as it is */ 508 } 509 switch (temp & (BNC_BIT | TPE_BIT)) { 510 case BNC_BIT: 511 sc->iy_media = IFM_ETHER | IFM_10_2; 512 break; 513 case TPE_BIT: 514 sc->iy_media = IFM_ETHER | IFM_10_T; 515 break; 516 default: 517 sc->iy_media = IFM_ETHER | IFM_10_5; 518 } 519 520 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 521 #ifdef IYDEBUG 522 printf("changed to 0x%b\n", 523 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 524 #endif 525 526 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 527 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 528 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 529 530 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 531 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 532 533 #ifdef IYDEBUG 534 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 535 temp, "\020\4bad_irq\010flash/boot present"); 536 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 537 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 538 temp, "\020\4BAD IRQ\010flash/boot present"); 539 #endif 540 541 542 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 543 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 544 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 545 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 546 547 temp = bus_space_read_1(iot, ioh, REG1); 548 #ifdef IYDEBUG 549 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 550 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 551 #endif 552 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 553 554 #ifdef IYDEBUG 555 temp = bus_space_read_1(iot, ioh, REG1); 556 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 557 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 558 #endif 559 560 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 561 562 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 563 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 564 565 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 566 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 567 sc->rx_start = 0; 568 569 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 570 delay(200); 571 572 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 573 574 sc->tx_start = sc->tx_end = sc->rx_size; 575 sc->tx_last = 0; 576 577 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 578 579 ifp->if_flags |= IFF_RUNNING; 580 ifp->if_flags &= ~IFF_OACTIVE; 581 } 582 583 void 584 iystart(ifp) 585 struct ifnet *ifp; 586 { 587 struct iy_softc *sc; 588 589 590 struct mbuf *m0, *m; 591 u_int len, pad, last, end; 592 u_int llen, residual; 593 int avail; 594 caddr_t data; 595 u_int16_t resval, stat; 596 bus_space_tag_t iot; 597 bus_space_handle_t ioh; 598 599 #ifdef IYDEBUG 600 printf("iystart called\n"); 601 #endif 602 sc = ifp->if_softc; 603 604 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 605 return; 606 607 iot = sc->sc_iot; 608 ioh = sc->sc_ioh; 609 610 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 611 #ifdef IYDEBUG 612 printf("%s: trying to write another packet to the hardware\n", 613 sc->sc_dev.dv_xname); 614 #endif 615 616 /* We need to use m->m_pkthdr.len, so require the header */ 617 if ((m0->m_flags & M_PKTHDR) == 0) 618 panic("iystart: no header mbuf"); 619 620 len = m0->m_pkthdr.len; 621 pad = len & 1; 622 623 #ifdef IYDEBUG 624 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 625 #endif 626 if (len < ETHER_MIN_LEN) { 627 pad = ETHER_MIN_LEN - len; 628 } 629 630 if (len + pad > ETHER_MAX_LEN) { 631 /* packet is obviously too large: toss it */ 632 ++ifp->if_oerrors; 633 IF_DEQUEUE(&ifp->if_snd, m0); 634 m_freem(m0); 635 continue; 636 } 637 638 #if NBPFILTER > 0 639 if (ifp->if_bpf) 640 bpf_mtap(ifp->if_bpf, m0); 641 #endif 642 643 avail = sc->tx_start - sc->tx_end; 644 if (avail <= 0) 645 avail += sc->tx_size; 646 647 #ifdef IYDEBUG 648 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 649 #endif 650 /* 651 * we MUST RUN at splnet here --- 652 * XXX todo: or even turn off the boards ints ??? hm... 653 */ 654 655 /* See if there is room to put another packet in the buffer. */ 656 657 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 658 #ifdef IYDEBUG 659 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 660 sc->sc_dev.dv_xname, len, avail); 661 #endif 662 ifp->if_flags |= IFF_OACTIVE; 663 return; 664 } 665 666 /* we know it fits in the hardware now, so dequeue it */ 667 IF_DEQUEUE(&ifp->if_snd, m0); 668 669 last = sc->tx_end; 670 end = last + pad + len + I595_XMT_HDRLEN; 671 672 if (end >= sc->sram) { 673 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 674 /* keep header in one piece */ 675 last = sc->rx_size; 676 end = last + pad + len + I595_XMT_HDRLEN; 677 } else 678 end -= sc->tx_size; 679 } 680 681 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 682 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 683 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 684 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 685 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 686 687 residual = resval = 0; 688 689 while ((m = m0)!=0) { 690 data = mtod(m, caddr_t); 691 llen = m->m_len; 692 if (residual) { 693 #ifdef IYDEBUG 694 printf("%s: merging residual with next mbuf.\n", 695 sc->sc_dev.dv_xname); 696 #endif 697 resval |= *data << 8; 698 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 699 --llen; 700 ++data; 701 } 702 if (llen > 1) 703 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 704 data, llen>>1); 705 residual = llen & 1; 706 if (residual) { 707 resval = *(data + llen - 1); 708 #ifdef IYDEBUG 709 printf("%s: got odd mbuf to send.\n", 710 sc->sc_dev.dv_xname); 711 #endif 712 } 713 714 MFREE(m, m0); 715 } 716 717 if (residual) 718 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 719 720 pad >>= 1; 721 while (pad-- > 0) 722 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 723 724 #ifdef IYDEBUG 725 printf("%s: new last = 0x%x, end = 0x%x.\n", 726 sc->sc_dev.dv_xname, last, end); 727 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 728 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 729 #endif 730 731 if (sc->tx_start != sc->tx_end) { 732 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 733 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 734 735 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 736 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 737 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 738 #ifdef IYDEBUG 739 printf("%s: setting 0x%x to 0x%x\n", 740 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 741 stat | CHAIN); 742 #endif 743 } 744 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 745 746 /* XXX todo: enable ints here if disabled */ 747 748 ++ifp->if_opackets; 749 750 if (sc->tx_start == sc->tx_end) { 751 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 752 bus_space_write_1(iot, ioh, 0, XMT_CMD); 753 sc->tx_start = last; 754 #ifdef IYDEBUG 755 printf("%s: writing 0x%x to XAR and giving XCMD\n", 756 sc->sc_dev.dv_xname, last); 757 #endif 758 } else { 759 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 760 #ifdef IYDEBUG 761 printf("%s: giving RESUME_XCMD\n", 762 sc->sc_dev.dv_xname); 763 #endif 764 } 765 sc->tx_last = last; 766 sc->tx_end = end; 767 } 768 } 769 770 771 static __inline void 772 eepromwritebit(iot, ioh, what) 773 bus_space_tag_t iot; 774 bus_space_handle_t ioh; 775 int what; 776 { 777 bus_space_write_1(iot, ioh, EEPROM_REG, what); 778 delay(1); 779 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 780 delay(1); 781 bus_space_write_1(iot, ioh, EEPROM_REG, what); 782 delay(1); 783 } 784 785 static __inline int 786 eepromreadbit(iot, ioh) 787 bus_space_tag_t iot; 788 bus_space_handle_t ioh; 789 { 790 int b; 791 792 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 793 delay(1); 794 b = bus_space_read_1(iot, ioh, EEPROM_REG); 795 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 796 delay(1); 797 798 return ((b & EEDO) != 0); 799 } 800 801 static u_int16_t 802 eepromread(iot, ioh, offset) 803 bus_space_tag_t iot; 804 bus_space_handle_t ioh; 805 int offset; 806 { 807 volatile int i; 808 volatile int j; 809 volatile u_int16_t readval; 810 811 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 812 delay(1); 813 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 814 delay(1); 815 816 eepromwritebit(iot, ioh, EECS|EEDI); 817 eepromwritebit(iot, ioh, EECS|EEDI); 818 eepromwritebit(iot, ioh, EECS); 819 820 for (j=5; j>=0; --j) { 821 if ((offset>>j) & 1) 822 eepromwritebit(iot, ioh, EECS|EEDI); 823 else 824 eepromwritebit(iot, ioh, EECS); 825 } 826 827 for (readval=0, i=0; i<16; ++i) { 828 readval<<=1; 829 readval |= eepromreadbit(iot, ioh); 830 } 831 832 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 833 delay(1); 834 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 835 836 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 837 838 return readval; 839 } 840 841 /* 842 * Device timeout/watchdog routine. Entered if the device neglects to generate 843 * an interrupt after a transmit has been started on it. 844 */ 845 void 846 iywatchdog(ifp) 847 struct ifnet *ifp; 848 { 849 struct iy_softc *sc = ifp->if_softc; 850 851 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 852 ++sc->sc_ethercom.ec_if.if_oerrors; 853 iyreset(sc); 854 } 855 856 /* 857 * What to do upon receipt of an interrupt. 858 */ 859 int 860 iyintr(arg) 861 void *arg; 862 { 863 struct iy_softc *sc = arg; 864 bus_space_tag_t iot; 865 bus_space_handle_t ioh; 866 867 register u_short status; 868 869 iot = sc->sc_iot; 870 ioh = sc->sc_ioh; 871 872 status = bus_space_read_1(iot, ioh, STATUS_REG); 873 #ifdef IYDEBUG 874 if (status & ALL_INTS) { 875 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 876 "\020\1RX_STP\2RX\3TX\4EXEC"); 877 if (status & EXEC_INT) 878 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 879 "\020\6ABORT"); 880 else 881 printf("\n"); 882 } 883 #endif 884 if ((status & (RX_INT | TX_INT)) == 0) 885 return 0; 886 887 if (status & RX_INT) { 888 iy_intr_rx(sc); 889 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 890 } 891 if (status & TX_INT) { 892 iy_intr_tx(sc); 893 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 894 } 895 896 #if NRND > 0 897 rnd_add_uint32(&sc->rnd_source, status); 898 #endif 899 900 return 1; 901 } 902 903 void 904 iyget(sc, iot, ioh, rxlen) 905 struct iy_softc *sc; 906 bus_space_tag_t iot; 907 bus_space_handle_t ioh; 908 int rxlen; 909 { 910 struct mbuf *m, *top, **mp; 911 struct ether_header *eh; 912 struct ifnet *ifp; 913 int len; 914 915 ifp = &sc->sc_ethercom.ec_if; 916 917 MGETHDR(m, M_DONTWAIT, MT_DATA); 918 if (m == 0) 919 goto dropped; 920 m->m_pkthdr.rcvif = ifp; 921 m->m_pkthdr.len = rxlen; 922 len = MHLEN; 923 top = 0; 924 mp = ⊤ 925 926 while (rxlen > 0) { 927 if (top) { 928 MGET(m, M_DONTWAIT, MT_DATA); 929 if (m == 0) { 930 m_freem(top); 931 goto dropped; 932 } 933 len = MLEN; 934 } 935 if (rxlen >= MINCLSIZE) { 936 MCLGET(m, M_DONTWAIT); 937 if ((m->m_flags & M_EXT) == 0) { 938 m_free(m); 939 m_freem(top); 940 goto dropped; 941 } 942 len = MCLBYTES; 943 } 944 len = min(rxlen, len); 945 if (len > 1) { 946 len &= ~1; 947 948 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 949 mtod(m, caddr_t), len/2); 950 } else { 951 #ifdef IYDEBUG 952 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 953 #endif 954 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 955 MEM_PORT_REG); 956 } 957 m->m_len = len; 958 rxlen -= len; 959 *mp = m; 960 mp = &m->m_next; 961 } 962 /* XXX receive the top here */ 963 ++ifp->if_ipackets; 964 965 eh = mtod(top, struct ether_header *); 966 967 #if NBPFILTER > 0 968 if (ifp->if_bpf) { 969 bpf_mtap(ifp->if_bpf, top); 970 if ((ifp->if_flags & IFF_PROMISC) && 971 (eh->ether_dhost[0] & 1) == 0 && 972 bcmp(eh->ether_dhost, 973 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 974 sizeof(eh->ether_dhost)) != 0) { 975 976 m_freem(top); 977 return; 978 } 979 } 980 #endif 981 m_adj(top, sizeof(struct ether_header)); 982 ether_input(ifp, eh, top); 983 return; 984 985 dropped: 986 ++ifp->if_ierrors; 987 return; 988 } 989 990 void 991 iy_intr_rx(sc) 992 struct iy_softc *sc; 993 { 994 struct ifnet *ifp; 995 bus_space_tag_t iot; 996 bus_space_handle_t ioh; 997 998 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 999 1000 iot = sc->sc_iot; 1001 ioh = sc->sc_ioh; 1002 ifp = &sc->sc_ethercom.ec_if; 1003 1004 rxadrs = sc->rx_start; 1005 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1006 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1007 rxnext = 0; 1008 1009 while (rxevnt == RCV_DONE) { 1010 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1011 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1012 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1013 #ifdef IYDEBUG 1014 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 1015 sc->sc_dev.dv_xname, rxadrs, rxstatus, 1016 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1017 "\014CRCERR\015LENERR\016RCVOK\020TYP", 1018 rxnext, rxlen); 1019 #endif 1020 iyget(sc, iot, ioh, rxlen); 1021 1022 /* move stop address */ 1023 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1024 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1025 1026 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1027 rxadrs = rxnext; 1028 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1029 } 1030 sc->rx_start = rxnext; 1031 } 1032 1033 void 1034 iy_intr_tx(sc) 1035 struct iy_softc *sc; 1036 { 1037 bus_space_tag_t iot; 1038 bus_space_handle_t ioh; 1039 struct ifnet *ifp; 1040 u_int txstatus, txstat2, txlen, txnext; 1041 1042 ifp = &sc->sc_ethercom.ec_if; 1043 iot = sc->sc_iot; 1044 ioh = sc->sc_ioh; 1045 1046 while (sc->tx_start != sc->tx_end) { 1047 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1048 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1049 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1050 break; 1051 1052 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1053 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1054 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1055 #ifdef IYDEBUG 1056 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1057 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1058 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1059 txnext, txlen); 1060 #endif 1061 if (txlen & CHAIN) 1062 sc->tx_start = txnext; 1063 else 1064 sc->tx_start = sc->tx_end; 1065 ifp->if_flags &= ~IFF_OACTIVE; 1066 1067 if ((txstat2 & 0x2000) == 0) 1068 ++ifp->if_oerrors; 1069 if (txstat2 & 0x000f) 1070 ifp->if_oerrors += txstat2 & 0x000f; 1071 } 1072 ifp->if_flags &= ~IFF_OACTIVE; 1073 } 1074 1075 int 1076 iyioctl(ifp, cmd, data) 1077 register struct ifnet *ifp; 1078 u_long cmd; 1079 caddr_t data; 1080 { 1081 struct iy_softc *sc; 1082 struct ifaddr *ifa; 1083 struct ifreq *ifr; 1084 int s, error = 0; 1085 1086 sc = ifp->if_softc; 1087 ifa = (struct ifaddr *)data; 1088 ifr = (struct ifreq *)data; 1089 1090 #ifdef IYDEBUG 1091 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1092 ifp, ifp->if_xname, cmd, data); 1093 #endif 1094 1095 s = splnet(); 1096 1097 switch (cmd) { 1098 1099 case SIOCSIFADDR: 1100 ifp->if_flags |= IFF_UP; 1101 1102 switch (ifa->ifa_addr->sa_family) { 1103 #ifdef INET 1104 case AF_INET: 1105 iyinit(sc); 1106 arp_ifinit(ifp, ifa); 1107 break; 1108 #endif 1109 #ifdef NS 1110 /* XXX - This code is probably wrong. */ 1111 case AF_NS: 1112 { 1113 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1114 1115 if (ns_nullhost(*ina)) 1116 ina->x_host = *(union ns_host *) 1117 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1118 else 1119 bcopy(ina->x_host.c_host, 1120 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1121 ETHER_ADDR_LEN); 1122 /* Set new address. */ 1123 iyinit(sc); 1124 break; 1125 } 1126 #endif /* NS */ 1127 default: 1128 iyinit(sc); 1129 break; 1130 } 1131 break; 1132 1133 case SIOCSIFFLAGS: 1134 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1135 if ((ifp->if_flags & IFF_UP) == 0 && 1136 (ifp->if_flags & IFF_RUNNING) != 0) { 1137 /* 1138 * If interface is marked down and it is running, then 1139 * stop it. 1140 */ 1141 iystop(sc); 1142 ifp->if_flags &= ~IFF_RUNNING; 1143 } else if ((ifp->if_flags & IFF_UP) != 0 && 1144 (ifp->if_flags & IFF_RUNNING) == 0) { 1145 /* 1146 * If interface is marked up and it is stopped, then 1147 * start it. 1148 */ 1149 iyinit(sc); 1150 } else { 1151 /* 1152 * Reset the interface to pick up changes in any other 1153 * flags that affect hardware registers. 1154 */ 1155 iystop(sc); 1156 iyinit(sc); 1157 } 1158 #ifdef IYDEBUGX 1159 if (ifp->if_flags & IFF_DEBUG) 1160 sc->sc_debug = IFY_ALL; 1161 else 1162 sc->sc_debug = 0; 1163 #endif 1164 break; 1165 1166 case SIOCADDMULTI: 1167 case SIOCDELMULTI: 1168 error = (cmd == SIOCADDMULTI) ? 1169 ether_addmulti(ifr, &sc->sc_ethercom): 1170 ether_delmulti(ifr, &sc->sc_ethercom); 1171 1172 if (error == ENETRESET) { 1173 /* 1174 * Multicast list has changed; set the hardware filter 1175 * accordingly. 1176 */ 1177 iyreset(sc); /* XXX can't make it work otherwise */ 1178 iy_mc_reset(sc); 1179 error = 0; 1180 } 1181 break; 1182 1183 case SIOCSIFMEDIA: 1184 case SIOCGIFMEDIA: 1185 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1186 break; 1187 default: 1188 error = EINVAL; 1189 } 1190 splx(s); 1191 return error; 1192 } 1193 1194 int 1195 iy_mediachange(ifp) 1196 struct ifnet *ifp; 1197 { 1198 struct iy_softc *sc = ifp->if_softc; 1199 1200 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1201 return EINVAL; 1202 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1203 case IFM_10_5: 1204 case IFM_10_2: 1205 case IFM_10_T: 1206 case IFM_AUTO: 1207 iystop(sc); 1208 iyinit(sc); 1209 return 0; 1210 default: 1211 return EINVAL; 1212 } 1213 } 1214 1215 void 1216 iy_mediastatus(ifp, ifmr) 1217 struct ifnet *ifp; 1218 struct ifmediareq *ifmr; 1219 { 1220 struct iy_softc *sc = ifp->if_softc; 1221 1222 ifmr->ifm_active = sc->iy_media; 1223 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1224 } 1225 1226 1227 static void 1228 iy_mc_setup(sc) 1229 struct iy_softc *sc; 1230 { 1231 struct ether_multi *enm; 1232 struct ether_multistep step; 1233 struct ethercom *ecp; 1234 struct ifnet *ifp; 1235 bus_space_tag_t iot; 1236 bus_space_handle_t ioh; 1237 int avail, last /*, end*/ , len; 1238 int timeout; 1239 u_int8_t temp; 1240 1241 1242 ecp = &sc->sc_ethercom; 1243 ifp = &ecp->ec_if; 1244 1245 iot = sc->sc_iot; 1246 ioh = sc->sc_ioh; 1247 1248 len = 6 * ecp->ec_multicnt + 6; 1249 1250 avail = sc->tx_start - sc->tx_end; 1251 if (avail <= 0) 1252 avail += sc->tx_size; 1253 printf("iy_mc_setup called, %d addresses, %d/%d bytes needed/avail\n", 1254 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1255 1256 last = sc->rx_size; 1257 1258 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1259 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_MULTI); 1260 /* XXX VOODOO */ 1261 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1262 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1263 /* XXX END OF VOODOO */ 1264 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1265 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1266 bus_space_write_2(iot, ioh, MEM_PORT_REG, MC_SETUP_CMD); 1267 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1268 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1269 bus_space_write_2(iot, ioh, MEM_PORT_REG, len); 1270 1271 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1272 LLADDR(ifp->if_sadl), 3); 1273 1274 ETHER_FIRST_MULTI(step, ecp, enm); 1275 while(enm) { 1276 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1277 enm->enm_addrlo, 3); 1278 1279 ETHER_NEXT_MULTI(step, enm); 1280 } 1281 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1282 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1283 1284 1285 sc->tx_start = sc->rx_size; 1286 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1287 1288 for (timeout=0; timeout<100; timeout++) { 1289 DELAY(2); 1290 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1291 continue; 1292 1293 temp = bus_space_read_1(iot, ioh, 0); 1294 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1295 #ifdef DIAGNOSTIC 1296 if (temp & 0x20) { 1297 printf("%s: mc setup failed, %d usec\n", 1298 sc->sc_dev.dv_xname, timeout * 2); 1299 } else if ((temp & 0x0f) == 0x03) { 1300 printf("%s: mc setup done, %d usec\n", 1301 sc->sc_dev.dv_xname, timeout * 2); 1302 } 1303 #endif 1304 break; 1305 } 1306 sc->tx_start = sc->tx_end; 1307 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1308 1309 } 1310 1311 static void 1312 iy_mc_reset(sc) 1313 struct iy_softc *sc; 1314 { 1315 struct ether_multi *enm; 1316 struct ether_multistep step; 1317 struct ethercom *ecp; 1318 struct ifnet *ifp; 1319 bus_space_tag_t iot; 1320 bus_space_handle_t ioh; 1321 u_int16_t temp; 1322 1323 ecp = &sc->sc_ethercom; 1324 ifp = &ecp->ec_if; 1325 1326 iot = sc->sc_iot; 1327 ioh = sc->sc_ioh; 1328 1329 if (ecp->ec_multicnt > 63) { 1330 ifp->if_flags |= IFF_ALLMULTI; 1331 1332 } else if (ecp->ec_multicnt > 0) { 1333 /* 1334 * Step through the list of addresses. 1335 */ 1336 ETHER_FIRST_MULTI(step, ecp, enm); 1337 while(enm) { 1338 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1339 ifp->if_flags |= IFF_ALLMULTI; 1340 goto setupmulti; 1341 } 1342 ETHER_NEXT_MULTI(step, enm); 1343 } 1344 /* OK, we really need to do it now: */ 1345 #if 0 1346 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1347 != IFF_RUNNING) { 1348 ifp->if_flags |= IFF_OACTIVE; 1349 sc->want_mc_setup = 1; 1350 return; 1351 } 1352 #endif 1353 iy_mc_setup(sc); 1354 } else { 1355 ifp->if_flags &= ~IFF_ALLMULTI; 1356 } 1357 1358 setupmulti: 1359 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1360 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1361 temp = MATCH_ALL; 1362 } else if (sc->sc_ethercom.ec_multicnt) { 1363 temp = MATCH_MULTI; 1364 } else 1365 temp = MATCH_ID; 1366 1367 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1368 /* XXX VOODOO */ 1369 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1370 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1371 /* XXX END OF VOODOO */ 1372 1373 /* XXX TBD: setup hardware for all multicasts */ 1374 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1375 return; 1376 } 1377 1378 #ifdef IYDEBUG 1379 void 1380 print_rbd(rbd) 1381 volatile struct ie_recv_buf_desc *rbd; 1382 { 1383 1384 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1385 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1386 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1387 rbd->mbz); 1388 } 1389 #endif 1390 1391 void 1392 iyprobemem(sc) 1393 struct iy_softc *sc; 1394 { 1395 bus_space_tag_t iot; 1396 bus_space_handle_t ioh; 1397 int testing; 1398 1399 iot = sc->sc_iot; 1400 ioh = sc->sc_ioh; 1401 1402 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1403 delay(1); 1404 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1405 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1406 1407 for (testing=65536; testing >= 4096; testing >>= 1) { 1408 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1409 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1410 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1411 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1412 #ifdef IYMEMDEBUG 1413 printf("%s: Didn't keep 0xdead at 0x%x\n", 1414 sc->sc_dev.dv_xname, testing-2); 1415 #endif 1416 continue; 1417 } 1418 1419 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1420 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1421 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1422 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1423 #ifdef IYMEMDEBUG 1424 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1425 sc->sc_dev.dv_xname, testing-2); 1426 #endif 1427 continue; 1428 } 1429 1430 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1431 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1432 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1433 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1434 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1435 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1436 #ifdef IYMEMDEBUG 1437 printf("%s: 0x%x alias of 0x0\n", 1438 sc->sc_dev.dv_xname, testing >> 1); 1439 #endif 1440 continue; 1441 } 1442 1443 break; 1444 } 1445 1446 sc->sram = testing; 1447 1448 switch(testing) { 1449 case 65536: 1450 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1451 sc->rx_size = 44*1024; 1452 break; 1453 1454 case 32768: 1455 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1456 sc->rx_size = 22*1024; 1457 break; 1458 1459 case 16384: 1460 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1461 sc->rx_size = 10*1024; 1462 break; 1463 default: 1464 sc->rx_size = testing/2; 1465 break; 1466 } 1467 sc->tx_size = testing - sc->rx_size; 1468 } 1469 1470 static int 1471 eepromreadall(iot, ioh, wordp, maxi) 1472 bus_space_tag_t iot; 1473 bus_space_handle_t ioh; 1474 u_int16_t *wordp; 1475 int maxi; 1476 { 1477 int i; 1478 u_int16_t checksum, tmp; 1479 1480 checksum = 0; 1481 1482 for (i=0; i<EEPP_LENGTH; ++i) { 1483 tmp = eepromread(iot, ioh, i); 1484 checksum += tmp; 1485 if (i<maxi) 1486 wordp[i] = tmp; 1487 } 1488 1489 if (checksum != EEPP_CHKSUM) { 1490 #ifdef IYDEBUG 1491 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1492 checksum, EEPP_CHKSUM); 1493 #endif 1494 return 1; 1495 } 1496 return 0; 1497 } 1498
Indexes created Thu Sep 25 08:09:54 GMT 2025