if_iy.c revision 1.32
1 /* $NetBSD: if_iy.c,v 1.32 1999/02/28 17:09:26 explorer Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include "opt_inet.h" 49 #include "opt_ns.h" 50 #include "bpfilter.h" 51 #include "rnd.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/mbuf.h> 56 #include <sys/buf.h> 57 #include <sys/protosw.h> 58 #include <sys/socket.h> 59 #include <sys/ioctl.h> 60 #include <sys/errno.h> 61 #include <sys/syslog.h> 62 #include <sys/device.h> 63 #if NRND > 0 64 #include <sys/rnd.h> 65 #endif 66 67 #include <net/if.h> 68 #include <net/if_types.h> 69 #include <net/if_dl.h> 70 71 #include <net/if_ether.h> 72 73 #if NBPFILTER > 0 74 #include <net/bpf.h> 75 #include <net/bpfdesc.h> 76 #endif 77 78 #ifdef INET 79 #include <netinet/in.h> 80 #include <netinet/in_systm.h> 81 #include <netinet/in_var.h> 82 #include <netinet/ip.h> 83 #include <netinet/if_inarp.h> 84 #endif 85 86 #ifdef NS 87 #include <netns/ns.h> 88 #include <netns/ns_if.h> 89 #endif 90 91 #if defined(SIOCSIFMEDIA) 92 #include <net/if_media.h> 93 #endif 94 95 #include <vm/vm.h> 96 97 #include <machine/cpu.h> 98 #include <machine/bus.h> 99 #include <machine/intr.h> 100 101 #include <dev/isa/isareg.h> 102 #include <dev/isa/isavar.h> 103 #include <dev/ic/i82595reg.h> 104 105 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 106 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 107 108 /* 109 * Ethernet status, per interface. 110 */ 111 struct iy_softc { 112 struct device sc_dev; 113 void *sc_ih; 114 115 bus_space_tag_t sc_iot; 116 bus_space_handle_t sc_ioh; 117 118 struct ethercom sc_ethercom; 119 120 struct ifmedia iy_ifmedia; 121 int iy_media; 122 123 int mappedirq; 124 125 int hard_vers; 126 127 int promisc; 128 129 int sram, tx_size, rx_size; 130 131 int tx_start, tx_end, tx_last; 132 int rx_start; 133 134 int doing_mc_setup; 135 #ifdef IYDEBUG 136 int sc_debug; 137 #endif 138 139 #if NRND > 0 140 rndsource_element_t rnd_source; 141 #endif 142 }; 143 144 void iywatchdog __P((struct ifnet *)); 145 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 146 int iyintr __P((void *)); 147 void iyinit __P((struct iy_softc *)); 148 void iystop __P((struct iy_softc *)); 149 void iystart __P((struct ifnet *)); 150 151 void iy_intr_rx __P((struct iy_softc *)); 152 void iy_intr_tx __P((struct iy_softc *)); 153 154 void iyreset __P((struct iy_softc *)); 155 void iy_readframe __P((struct iy_softc *, int)); 156 void iy_drop_packet_buffer __P((struct iy_softc *)); 157 void iy_find_mem_size __P((struct iy_softc *)); 158 void iyrint __P((struct iy_softc *)); 159 void iytint __P((struct iy_softc *)); 160 void iyxmit __P((struct iy_softc *)); 161 static void iy_mc_setup __P((struct iy_softc *)); 162 static void iy_mc_reset __P((struct iy_softc *)); 163 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 164 void iyprobemem __P((struct iy_softc *)); 165 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 166 int)); 167 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 168 169 #ifdef IYDEBUGX 170 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 171 172 int in_ifrint = 0; 173 int in_iftint = 0; 174 #endif 175 176 int iy_mediachange __P((struct ifnet *)); 177 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 178 179 int iyprobe __P((struct device *, struct cfdata *, void *)); 180 void iyattach __P((struct device *, struct device *, void *)); 181 182 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 183 184 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 185 int)); 186 187 struct cfattach iy_ca = { 188 sizeof(struct iy_softc), iyprobe, iyattach 189 }; 190 191 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 192 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 193 194 int 195 iyprobe(parent, match, aux) 196 struct device *parent; 197 struct cfdata *match; 198 void *aux; 199 { 200 struct isa_attach_args *ia = aux; 201 u_int16_t eaddr[8]; 202 203 bus_space_tag_t iot; 204 bus_space_handle_t ioh; 205 206 u_int8_t c, d; 207 208 iot = ia->ia_iot; 209 210 if (ia->ia_iobase == IOBASEUNK) 211 return 0; 212 213 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 214 return 0; 215 216 /* try to find the round robin sig: */ 217 218 c = bus_space_read_1(iot, ioh, ID_REG); 219 if ((c & ID_REG_MASK) != ID_REG_SIG) 220 goto out; 221 222 d = bus_space_read_1(iot, ioh, ID_REG); 223 if ((d & ID_REG_MASK) != ID_REG_SIG) 224 goto out; 225 226 if (((d-c) & R_ROBIN_BITS) != 0x40) 227 goto out; 228 229 d = bus_space_read_1(iot, ioh, ID_REG); 230 if ((d & ID_REG_MASK) != ID_REG_SIG) 231 goto out; 232 233 if (((d-c) & R_ROBIN_BITS) != 0x80) 234 goto out; 235 236 d = bus_space_read_1(iot, ioh, ID_REG); 237 if ((d & ID_REG_MASK) != ID_REG_SIG) 238 goto out; 239 240 if (((d-c) & R_ROBIN_BITS) != 0xC0) 241 goto out; 242 243 d = bus_space_read_1(iot, ioh, ID_REG); 244 if ((d & ID_REG_MASK) != ID_REG_SIG) 245 goto out; 246 247 if (((d-c) & R_ROBIN_BITS) != 0x00) 248 goto out; 249 250 #ifdef IYDEBUG 251 printf("iyprobe verified working ID reg.\n"); 252 #endif 253 254 if (eepromreadall(iot, ioh, eaddr, 8)) 255 goto out; 256 257 if (ia->ia_irq == IRQUNK) 258 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 259 260 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 261 goto out; 262 263 if (eepro_revirqmap[ia->ia_irq] == 0xff) 264 goto out; 265 266 /* now lets reset the chip */ 267 268 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 269 delay(200); 270 271 ia->ia_iosize = 16; 272 273 bus_space_unmap(iot, ioh, 16); 274 return 1; /* found */ 275 out: 276 bus_space_unmap(iot, ioh, 16); 277 return 0; 278 } 279 280 void 281 iyattach(parent, self, aux) 282 struct device *parent, *self; 283 void *aux; 284 { 285 struct iy_softc *sc = (void *)self; 286 struct isa_attach_args *ia = aux; 287 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 288 bus_space_tag_t iot; 289 bus_space_handle_t ioh; 290 unsigned temp; 291 u_int16_t eaddr[8]; 292 u_int8_t myaddr[ETHER_ADDR_LEN]; 293 int eirq; 294 295 iot = ia->ia_iot; 296 297 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 298 printf(": can't map i/o space\n"); 299 return; 300 } 301 302 sc->sc_iot = iot; 303 sc->sc_ioh = ioh; 304 305 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 306 307 /* now let's reset the chip */ 308 309 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 310 delay(200); 311 312 iyprobemem(sc); 313 314 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 315 ifp->if_softc = sc; 316 ifp->if_start = iystart; 317 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 318 | IFF_MULTICAST; 319 320 sc->doing_mc_setup = 0; 321 322 ifp->if_ioctl = iyioctl; 323 ifp->if_watchdog = iywatchdog; 324 325 (void)eepromreadall(iot, ioh, eaddr, 8); 326 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 327 328 #ifdef DIAGNOSTICS 329 if ((eaddr[EEPPEther0] != 330 eepromread(iot, ioh, EEPPEther0a)) && 331 (eaddr[EEPPEther1] != 332 eepromread(iot, ioh, EEPPEther1a)) && 333 (eaddr[EEPPEther2] != 334 eepromread(iot, ioh, EEPPEther2a))) 335 336 printf("EEPROM Ethernet address differs from copy\n"); 337 #endif 338 339 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 340 myaddr[0] = eaddr[EEPPEther0] >> 8; 341 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 342 myaddr[2] = eaddr[EEPPEther1] >> 8; 343 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 344 myaddr[4] = eaddr[EEPPEther2] >> 8; 345 346 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 347 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 348 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 349 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 350 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 351 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 352 /* Attach the interface. */ 353 if_attach(ifp); 354 ether_ifattach(ifp, myaddr); 355 printf(": address %s, rev. %d, %d kB\n", 356 ether_sprintf(myaddr), 357 sc->hard_vers, sc->sram/1024); 358 359 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 360 if (eirq != ia->ia_irq) 361 printf("%s: EEPROM irq setting %d ignored\n", 362 sc->sc_dev.dv_xname, eirq); 363 364 #if NBPFILTER > 0 365 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 366 #endif 367 368 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 369 IPL_NET, iyintr, sc); 370 371 #if NRND > 0 372 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 373 RND_TYPE_NET, 0); 374 #endif 375 376 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 377 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 378 } 379 380 void 381 iystop(sc) 382 struct iy_softc *sc; 383 { 384 bus_space_tag_t iot; 385 bus_space_handle_t ioh; 386 #ifdef IYDEBUG 387 u_int p, v; 388 #endif 389 390 iot = sc->sc_iot; 391 ioh = sc->sc_ioh; 392 393 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 394 395 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 396 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 397 398 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 399 delay(200); 400 #ifdef IYDEBUG 401 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 402 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 403 p = sc->tx_last; 404 if (!p) 405 p = sc->tx_start; 406 do { 407 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 408 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 409 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 410 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 411 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 412 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 413 printf(" 0x%04x", p); 414 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 415 printf(" 0x%b\n", v, "\020\020Ch"); 416 417 } while (v & 0x8000); 418 #endif 419 sc->tx_start = sc->tx_end = sc->rx_size; 420 sc->tx_last = 0; 421 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 422 } 423 424 void 425 iyreset(sc) 426 struct iy_softc *sc; 427 { 428 int s; 429 s = splnet(); 430 iystop(sc); 431 iyinit(sc); 432 splx(s); 433 } 434 435 void 436 iyinit(sc) 437 struct iy_softc *sc; 438 { 439 int i; 440 unsigned temp; 441 struct ifnet *ifp; 442 bus_space_tag_t iot; 443 bus_space_handle_t ioh; 444 445 iot = sc->sc_iot; 446 ioh = sc->sc_ioh; 447 448 ifp = &sc->sc_ethercom.ec_if; 449 #ifdef IYDEBUG 450 printf("ifp is %p\n", ifp); 451 #endif 452 453 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 454 455 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 456 if (temp & 0x10) 457 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 458 459 for (i=0; i<6; ++i) { 460 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 461 } 462 463 temp = bus_space_read_1(iot, ioh, REG1); 464 bus_space_write_1(iot, ioh, REG1, 465 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 466 467 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 468 temp = MATCH_ALL; 469 } else if (sc->sc_ethercom.ec_multicnt) { 470 temp = MATCH_MULTI; 471 } else 472 temp = MATCH_ID; 473 474 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 475 476 #ifdef IYDEBUG 477 printf("%s: RECV_MODES set to %b\n", sc->sc_dev.dv_xname, 478 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 479 #endif 480 /* XXX VOODOO */ 481 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 482 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 483 /* XXX END OF VOODOO */ 484 485 486 delay(500000); /* for the hardware to test for the connector */ 487 488 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 489 #ifdef IYDEBUG 490 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 491 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 492 #endif 493 temp = (temp & TEST_MODE_MASK); 494 495 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 496 case IFM_10_5: 497 temp &= ~ (BNC_BIT | TPE_BIT); 498 break; 499 500 case IFM_10_2: 501 temp = (temp & ~TPE_BIT) | BNC_BIT; 502 break; 503 504 case IFM_10_T: 505 temp = (temp & ~BNC_BIT) | TPE_BIT; 506 break; 507 default: 508 /* nothing; leave as it is */ 509 } 510 switch (temp & (BNC_BIT | TPE_BIT)) { 511 case BNC_BIT: 512 sc->iy_media = IFM_ETHER | IFM_10_2; 513 break; 514 case TPE_BIT: 515 sc->iy_media = IFM_ETHER | IFM_10_T; 516 break; 517 default: 518 sc->iy_media = IFM_ETHER | IFM_10_5; 519 } 520 521 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 522 #ifdef IYDEBUG 523 printf("changed to 0x%b\n", 524 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 525 #endif 526 527 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 528 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 529 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 530 531 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 532 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 533 534 #ifdef IYDEBUG 535 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 536 temp, "\020\4bad_irq\010flash/boot present"); 537 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 538 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 539 temp, "\020\4BAD IRQ\010flash/boot present"); 540 #endif 541 542 543 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 544 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 545 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 546 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 547 548 temp = bus_space_read_1(iot, ioh, REG1); 549 #ifdef IYDEBUG 550 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 551 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 552 #endif 553 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 554 555 #ifdef IYDEBUG 556 temp = bus_space_read_1(iot, ioh, REG1); 557 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 558 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 559 #endif 560 561 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 562 563 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 564 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 565 566 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 567 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 568 sc->rx_start = 0; 569 570 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 571 delay(200); 572 573 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 574 575 sc->tx_start = sc->tx_end = sc->rx_size; 576 sc->tx_last = 0; 577 578 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 579 580 ifp->if_flags |= IFF_RUNNING; 581 ifp->if_flags &= ~IFF_OACTIVE; 582 } 583 584 void 585 iystart(ifp) 586 struct ifnet *ifp; 587 { 588 struct iy_softc *sc; 589 590 591 struct mbuf *m0, *m; 592 u_int len, pad, last, end; 593 u_int llen, residual; 594 int avail; 595 caddr_t data; 596 u_int16_t resval, stat; 597 bus_space_tag_t iot; 598 bus_space_handle_t ioh; 599 600 #ifdef IYDEBUG 601 printf("iystart called\n"); 602 #endif 603 sc = ifp->if_softc; 604 605 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 606 return; 607 608 iot = sc->sc_iot; 609 ioh = sc->sc_ioh; 610 611 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 612 #ifdef IYDEBUG 613 printf("%s: trying to write another packet to the hardware\n", 614 sc->sc_dev.dv_xname); 615 #endif 616 617 /* We need to use m->m_pkthdr.len, so require the header */ 618 if ((m0->m_flags & M_PKTHDR) == 0) 619 panic("iystart: no header mbuf"); 620 621 len = m0->m_pkthdr.len; 622 pad = len & 1; 623 624 #ifdef IYDEBUG 625 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 626 #endif 627 if (len < ETHER_MIN_LEN) { 628 pad = ETHER_MIN_LEN - len; 629 } 630 631 if (len + pad > ETHER_MAX_LEN) { 632 /* packet is obviously too large: toss it */ 633 ++ifp->if_oerrors; 634 IF_DEQUEUE(&ifp->if_snd, m0); 635 m_freem(m0); 636 continue; 637 } 638 639 #if NBPFILTER > 0 640 if (ifp->if_bpf) 641 bpf_mtap(ifp->if_bpf, m0); 642 #endif 643 644 avail = sc->tx_start - sc->tx_end; 645 if (avail <= 0) 646 avail += sc->tx_size; 647 648 #ifdef IYDEBUG 649 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 650 #endif 651 /* 652 * we MUST RUN at splnet here --- 653 * XXX todo: or even turn off the boards ints ??? hm... 654 */ 655 656 /* See if there is room to put another packet in the buffer. */ 657 658 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 659 #ifdef IYDEBUG 660 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 661 sc->sc_dev.dv_xname, len, avail); 662 #endif 663 ifp->if_flags |= IFF_OACTIVE; 664 return; 665 } 666 667 /* we know it fits in the hardware now, so dequeue it */ 668 IF_DEQUEUE(&ifp->if_snd, m0); 669 670 last = sc->tx_end; 671 end = last + pad + len + I595_XMT_HDRLEN; 672 673 if (end >= sc->sram) { 674 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 675 /* keep header in one piece */ 676 last = sc->rx_size; 677 end = last + pad + len + I595_XMT_HDRLEN; 678 } else 679 end -= sc->tx_size; 680 } 681 682 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 683 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 684 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 685 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 686 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 687 688 residual = resval = 0; 689 690 while ((m = m0)!=0) { 691 data = mtod(m, caddr_t); 692 llen = m->m_len; 693 if (residual) { 694 #ifdef IYDEBUG 695 printf("%s: merging residual with next mbuf.\n", 696 sc->sc_dev.dv_xname); 697 #endif 698 resval |= *data << 8; 699 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 700 --llen; 701 ++data; 702 } 703 if (llen > 1) 704 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 705 data, llen>>1); 706 residual = llen & 1; 707 if (residual) { 708 resval = *(data + llen - 1); 709 #ifdef IYDEBUG 710 printf("%s: got odd mbuf to send.\n", 711 sc->sc_dev.dv_xname); 712 #endif 713 } 714 715 MFREE(m, m0); 716 } 717 718 if (residual) 719 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 720 721 pad >>= 1; 722 while (pad-- > 0) 723 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 724 725 #ifdef IYDEBUG 726 printf("%s: new last = 0x%x, end = 0x%x.\n", 727 sc->sc_dev.dv_xname, last, end); 728 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 729 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 730 #endif 731 732 if (sc->tx_start != sc->tx_end) { 733 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 734 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 735 736 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 737 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 738 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 739 #ifdef IYDEBUG 740 printf("%s: setting 0x%x to 0x%x\n", 741 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 742 stat | CHAIN); 743 #endif 744 } 745 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 746 747 /* XXX todo: enable ints here if disabled */ 748 749 ++ifp->if_opackets; 750 751 if (sc->tx_start == sc->tx_end) { 752 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 753 bus_space_write_1(iot, ioh, 0, XMT_CMD); 754 sc->tx_start = last; 755 #ifdef IYDEBUG 756 printf("%s: writing 0x%x to XAR and giving XCMD\n", 757 sc->sc_dev.dv_xname, last); 758 #endif 759 } else { 760 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 761 #ifdef IYDEBUG 762 printf("%s: giving RESUME_XCMD\n", 763 sc->sc_dev.dv_xname); 764 #endif 765 } 766 sc->tx_last = last; 767 sc->tx_end = end; 768 } 769 } 770 771 772 static __inline void 773 eepromwritebit(iot, ioh, what) 774 bus_space_tag_t iot; 775 bus_space_handle_t ioh; 776 int what; 777 { 778 bus_space_write_1(iot, ioh, EEPROM_REG, what); 779 delay(1); 780 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 781 delay(1); 782 bus_space_write_1(iot, ioh, EEPROM_REG, what); 783 delay(1); 784 } 785 786 static __inline int 787 eepromreadbit(iot, ioh) 788 bus_space_tag_t iot; 789 bus_space_handle_t ioh; 790 { 791 int b; 792 793 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 794 delay(1); 795 b = bus_space_read_1(iot, ioh, EEPROM_REG); 796 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 797 delay(1); 798 799 return ((b & EEDO) != 0); 800 } 801 802 static u_int16_t 803 eepromread(iot, ioh, offset) 804 bus_space_tag_t iot; 805 bus_space_handle_t ioh; 806 int offset; 807 { 808 volatile int i; 809 volatile int j; 810 volatile u_int16_t readval; 811 812 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 813 delay(1); 814 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 815 delay(1); 816 817 eepromwritebit(iot, ioh, EECS|EEDI); 818 eepromwritebit(iot, ioh, EECS|EEDI); 819 eepromwritebit(iot, ioh, EECS); 820 821 for (j=5; j>=0; --j) { 822 if ((offset>>j) & 1) 823 eepromwritebit(iot, ioh, EECS|EEDI); 824 else 825 eepromwritebit(iot, ioh, EECS); 826 } 827 828 for (readval=0, i=0; i<16; ++i) { 829 readval<<=1; 830 readval |= eepromreadbit(iot, ioh); 831 } 832 833 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 834 delay(1); 835 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 836 837 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 838 839 return readval; 840 } 841 842 /* 843 * Device timeout/watchdog routine. Entered if the device neglects to generate 844 * an interrupt after a transmit has been started on it. 845 */ 846 void 847 iywatchdog(ifp) 848 struct ifnet *ifp; 849 { 850 struct iy_softc *sc = ifp->if_softc; 851 852 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 853 ++sc->sc_ethercom.ec_if.if_oerrors; 854 iyreset(sc); 855 } 856 857 /* 858 * What to do upon receipt of an interrupt. 859 */ 860 int 861 iyintr(arg) 862 void *arg; 863 { 864 struct iy_softc *sc = arg; 865 bus_space_tag_t iot; 866 bus_space_handle_t ioh; 867 868 register u_short status; 869 870 iot = sc->sc_iot; 871 ioh = sc->sc_ioh; 872 873 status = bus_space_read_1(iot, ioh, STATUS_REG); 874 #ifdef IYDEBUG 875 if (status & ALL_INTS) { 876 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 877 "\020\1RX_STP\2RX\3TX\4EXEC"); 878 if (status & EXEC_INT) 879 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 880 "\020\6ABORT"); 881 else 882 printf("\n"); 883 } 884 #endif 885 if ((status & (RX_INT | TX_INT)) == 0) 886 return 0; 887 888 if (status & RX_INT) { 889 iy_intr_rx(sc); 890 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 891 } 892 if (status & TX_INT) { 893 iy_intr_tx(sc); 894 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 895 } 896 897 #if NRND > 0 898 rnd_add_uint32(&sc->rnd_source, status); 899 #endif 900 901 return 1; 902 } 903 904 void 905 iyget(sc, iot, ioh, rxlen) 906 struct iy_softc *sc; 907 bus_space_tag_t iot; 908 bus_space_handle_t ioh; 909 int rxlen; 910 { 911 struct mbuf *m, *top, **mp; 912 struct ether_header *eh; 913 struct ifnet *ifp; 914 int len; 915 916 ifp = &sc->sc_ethercom.ec_if; 917 918 MGETHDR(m, M_DONTWAIT, MT_DATA); 919 if (m == 0) 920 goto dropped; 921 m->m_pkthdr.rcvif = ifp; 922 m->m_pkthdr.len = rxlen; 923 len = MHLEN; 924 top = 0; 925 mp = ⊤ 926 927 while (rxlen > 0) { 928 if (top) { 929 MGET(m, M_DONTWAIT, MT_DATA); 930 if (m == 0) { 931 m_freem(top); 932 goto dropped; 933 } 934 len = MLEN; 935 } 936 if (rxlen >= MINCLSIZE) { 937 MCLGET(m, M_DONTWAIT); 938 if ((m->m_flags & M_EXT) == 0) { 939 m_free(m); 940 m_freem(top); 941 goto dropped; 942 } 943 len = MCLBYTES; 944 } 945 len = min(rxlen, len); 946 if (len > 1) { 947 len &= ~1; 948 949 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 950 mtod(m, caddr_t), len/2); 951 } else { 952 #ifdef IYDEBUG 953 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 954 #endif 955 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 956 MEM_PORT_REG); 957 } 958 m->m_len = len; 959 rxlen -= len; 960 *mp = m; 961 mp = &m->m_next; 962 } 963 /* XXX receive the top here */ 964 ++ifp->if_ipackets; 965 966 eh = mtod(top, struct ether_header *); 967 968 #if NBPFILTER > 0 969 if (ifp->if_bpf) { 970 bpf_mtap(ifp->if_bpf, top); 971 if ((ifp->if_flags & IFF_PROMISC) && 972 (eh->ether_dhost[0] & 1) == 0 && 973 bcmp(eh->ether_dhost, 974 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 975 sizeof(eh->ether_dhost)) != 0) { 976 977 m_freem(top); 978 return; 979 } 980 } 981 #endif 982 m_adj(top, sizeof(struct ether_header)); 983 ether_input(ifp, eh, top); 984 return; 985 986 dropped: 987 ++ifp->if_ierrors; 988 return; 989 } 990 991 void 992 iy_intr_rx(sc) 993 struct iy_softc *sc; 994 { 995 struct ifnet *ifp; 996 bus_space_tag_t iot; 997 bus_space_handle_t ioh; 998 999 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1000 1001 iot = sc->sc_iot; 1002 ioh = sc->sc_ioh; 1003 ifp = &sc->sc_ethercom.ec_if; 1004 1005 rxadrs = sc->rx_start; 1006 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1007 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1008 rxnext = 0; 1009 1010 while (rxevnt == RCV_DONE) { 1011 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1012 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1013 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1014 #ifdef IYDEBUG 1015 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 1016 sc->sc_dev.dv_xname, rxadrs, rxstatus, 1017 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1018 "\014CRCERR\015LENERR\016RCVOK\020TYP", 1019 rxnext, rxlen); 1020 #endif 1021 iyget(sc, iot, ioh, rxlen); 1022 1023 /* move stop address */ 1024 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1025 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1026 1027 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1028 rxadrs = rxnext; 1029 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1030 } 1031 sc->rx_start = rxnext; 1032 } 1033 1034 void 1035 iy_intr_tx(sc) 1036 struct iy_softc *sc; 1037 { 1038 bus_space_tag_t iot; 1039 bus_space_handle_t ioh; 1040 struct ifnet *ifp; 1041 u_int txstatus, txstat2, txlen, txnext; 1042 1043 ifp = &sc->sc_ethercom.ec_if; 1044 iot = sc->sc_iot; 1045 ioh = sc->sc_ioh; 1046 1047 while (sc->tx_start != sc->tx_end) { 1048 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1049 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1050 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1051 break; 1052 1053 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1054 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1055 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1056 #ifdef IYDEBUG 1057 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1058 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1059 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1060 txnext, txlen); 1061 #endif 1062 if (txlen & CHAIN) 1063 sc->tx_start = txnext; 1064 else 1065 sc->tx_start = sc->tx_end; 1066 ifp->if_flags &= ~IFF_OACTIVE; 1067 1068 if ((txstat2 & 0x2000) == 0) 1069 ++ifp->if_oerrors; 1070 if (txstat2 & 0x000f) 1071 ifp->if_oerrors += txstat2 & 0x000f; 1072 } 1073 ifp->if_flags &= ~IFF_OACTIVE; 1074 } 1075 1076 int 1077 iyioctl(ifp, cmd, data) 1078 register struct ifnet *ifp; 1079 u_long cmd; 1080 caddr_t data; 1081 { 1082 struct iy_softc *sc; 1083 struct ifaddr *ifa; 1084 struct ifreq *ifr; 1085 int s, error = 0; 1086 1087 sc = ifp->if_softc; 1088 ifa = (struct ifaddr *)data; 1089 ifr = (struct ifreq *)data; 1090 1091 #ifdef IYDEBUG 1092 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1093 ifp, ifp->if_xname, cmd, data); 1094 #endif 1095 1096 s = splnet(); 1097 1098 switch (cmd) { 1099 1100 case SIOCSIFADDR: 1101 ifp->if_flags |= IFF_UP; 1102 1103 switch (ifa->ifa_addr->sa_family) { 1104 #ifdef INET 1105 case AF_INET: 1106 iyinit(sc); 1107 arp_ifinit(ifp, ifa); 1108 break; 1109 #endif 1110 #ifdef NS 1111 /* XXX - This code is probably wrong. */ 1112 case AF_NS: 1113 { 1114 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1115 1116 if (ns_nullhost(*ina)) 1117 ina->x_host = *(union ns_host *) 1118 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1119 else 1120 bcopy(ina->x_host.c_host, 1121 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1122 ETHER_ADDR_LEN); 1123 /* Set new address. */ 1124 iyinit(sc); 1125 break; 1126 } 1127 #endif /* NS */ 1128 default: 1129 iyinit(sc); 1130 break; 1131 } 1132 break; 1133 1134 case SIOCSIFFLAGS: 1135 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1136 if ((ifp->if_flags & IFF_UP) == 0 && 1137 (ifp->if_flags & IFF_RUNNING) != 0) { 1138 /* 1139 * If interface is marked down and it is running, then 1140 * stop it. 1141 */ 1142 iystop(sc); 1143 ifp->if_flags &= ~IFF_RUNNING; 1144 } else if ((ifp->if_flags & IFF_UP) != 0 && 1145 (ifp->if_flags & IFF_RUNNING) == 0) { 1146 /* 1147 * If interface is marked up and it is stopped, then 1148 * start it. 1149 */ 1150 iyinit(sc); 1151 } else { 1152 /* 1153 * Reset the interface to pick up changes in any other 1154 * flags that affect hardware registers. 1155 */ 1156 iystop(sc); 1157 iyinit(sc); 1158 } 1159 #ifdef IYDEBUGX 1160 if (ifp->if_flags & IFF_DEBUG) 1161 sc->sc_debug = IFY_ALL; 1162 else 1163 sc->sc_debug = 0; 1164 #endif 1165 break; 1166 1167 case SIOCADDMULTI: 1168 case SIOCDELMULTI: 1169 error = (cmd == SIOCADDMULTI) ? 1170 ether_addmulti(ifr, &sc->sc_ethercom): 1171 ether_delmulti(ifr, &sc->sc_ethercom); 1172 1173 if (error == ENETRESET) { 1174 /* 1175 * Multicast list has changed; set the hardware filter 1176 * accordingly. 1177 */ 1178 iyreset(sc); /* XXX can't make it work otherwise */ 1179 iy_mc_reset(sc); 1180 error = 0; 1181 } 1182 break; 1183 1184 case SIOCSIFMEDIA: 1185 case SIOCGIFMEDIA: 1186 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1187 break; 1188 default: 1189 error = EINVAL; 1190 } 1191 splx(s); 1192 return error; 1193 } 1194 1195 int 1196 iy_mediachange(ifp) 1197 struct ifnet *ifp; 1198 { 1199 struct iy_softc *sc = ifp->if_softc; 1200 1201 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1202 return EINVAL; 1203 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1204 case IFM_10_5: 1205 case IFM_10_2: 1206 case IFM_10_T: 1207 case IFM_AUTO: 1208 iystop(sc); 1209 iyinit(sc); 1210 return 0; 1211 default: 1212 return EINVAL; 1213 } 1214 } 1215 1216 void 1217 iy_mediastatus(ifp, ifmr) 1218 struct ifnet *ifp; 1219 struct ifmediareq *ifmr; 1220 { 1221 struct iy_softc *sc = ifp->if_softc; 1222 1223 ifmr->ifm_active = sc->iy_media; 1224 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1225 } 1226 1227 1228 static void 1229 iy_mc_setup(sc) 1230 struct iy_softc *sc; 1231 { 1232 struct ether_multi *enm; 1233 struct ether_multistep step; 1234 struct ethercom *ecp; 1235 struct ifnet *ifp; 1236 bus_space_tag_t iot; 1237 bus_space_handle_t ioh; 1238 int avail, last /*, end*/ , len; 1239 int timeout; 1240 u_int8_t temp; 1241 1242 1243 ecp = &sc->sc_ethercom; 1244 ifp = &ecp->ec_if; 1245 1246 iot = sc->sc_iot; 1247 ioh = sc->sc_ioh; 1248 1249 len = 6 * ecp->ec_multicnt + 6; 1250 1251 avail = sc->tx_start - sc->tx_end; 1252 if (avail <= 0) 1253 avail += sc->tx_size; 1254 printf("iy_mc_setup called, %d addresses, %d/%d bytes needed/avail\n", 1255 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1256 1257 last = sc->rx_size; 1258 1259 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1260 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_MULTI); 1261 /* XXX VOODOO */ 1262 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1263 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1264 /* XXX END OF VOODOO */ 1265 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1266 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1267 bus_space_write_2(iot, ioh, MEM_PORT_REG, MC_SETUP_CMD); 1268 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1269 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1270 bus_space_write_2(iot, ioh, MEM_PORT_REG, len); 1271 1272 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1273 LLADDR(ifp->if_sadl), 3); 1274 1275 ETHER_FIRST_MULTI(step, ecp, enm); 1276 while(enm) { 1277 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1278 enm->enm_addrlo, 3); 1279 1280 ETHER_NEXT_MULTI(step, enm); 1281 } 1282 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1283 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1284 1285 1286 sc->tx_start = sc->rx_size; 1287 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1288 1289 for (timeout=0; timeout<100; timeout++) { 1290 DELAY(2); 1291 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1292 continue; 1293 1294 temp = bus_space_read_1(iot, ioh, 0); 1295 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1296 #ifdef DIAGNOSTIC 1297 if (temp & 0x20) { 1298 printf("%s: mc setup failed, %d usec\n", 1299 sc->sc_dev.dv_xname, timeout * 2); 1300 } else if ((temp & 0x0f) == 0x03) { 1301 printf("%s: mc setup done, %d usec\n", 1302 sc->sc_dev.dv_xname, timeout * 2); 1303 } 1304 #endif 1305 break; 1306 } 1307 sc->tx_start = sc->tx_end; 1308 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1309 1310 } 1311 1312 static void 1313 iy_mc_reset(sc) 1314 struct iy_softc *sc; 1315 { 1316 struct ether_multi *enm; 1317 struct ether_multistep step; 1318 struct ethercom *ecp; 1319 struct ifnet *ifp; 1320 bus_space_tag_t iot; 1321 bus_space_handle_t ioh; 1322 u_int16_t temp; 1323 1324 ecp = &sc->sc_ethercom; 1325 ifp = &ecp->ec_if; 1326 1327 iot = sc->sc_iot; 1328 ioh = sc->sc_ioh; 1329 1330 if (ecp->ec_multicnt > 63) { 1331 ifp->if_flags |= IFF_ALLMULTI; 1332 1333 } else if (ecp->ec_multicnt > 0) { 1334 /* 1335 * Step through the list of addresses. 1336 */ 1337 ETHER_FIRST_MULTI(step, ecp, enm); 1338 while(enm) { 1339 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1340 ifp->if_flags |= IFF_ALLMULTI; 1341 goto setupmulti; 1342 } 1343 ETHER_NEXT_MULTI(step, enm); 1344 } 1345 /* OK, we really need to do it now: */ 1346 #if 0 1347 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1348 != IFF_RUNNING) { 1349 ifp->if_flags |= IFF_OACTIVE; 1350 sc->want_mc_setup = 1; 1351 return; 1352 } 1353 #endif 1354 iy_mc_setup(sc); 1355 } else { 1356 ifp->if_flags &= ~IFF_ALLMULTI; 1357 } 1358 1359 setupmulti: 1360 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1361 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1362 temp = MATCH_ALL; 1363 } else if (sc->sc_ethercom.ec_multicnt) { 1364 temp = MATCH_MULTI; 1365 } else 1366 temp = MATCH_ID; 1367 1368 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1369 /* XXX VOODOO */ 1370 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1371 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1372 /* XXX END OF VOODOO */ 1373 1374 /* XXX TBD: setup hardware for all multicasts */ 1375 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1376 return; 1377 } 1378 1379 #ifdef IYDEBUG 1380 void 1381 print_rbd(rbd) 1382 volatile struct ie_recv_buf_desc *rbd; 1383 { 1384 1385 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1386 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1387 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1388 rbd->mbz); 1389 } 1390 #endif 1391 1392 void 1393 iyprobemem(sc) 1394 struct iy_softc *sc; 1395 { 1396 bus_space_tag_t iot; 1397 bus_space_handle_t ioh; 1398 int testing; 1399 1400 iot = sc->sc_iot; 1401 ioh = sc->sc_ioh; 1402 1403 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1404 delay(1); 1405 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1406 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1407 1408 for (testing=65536; testing >= 4096; testing >>= 1) { 1409 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1410 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1411 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1412 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1413 #ifdef IYMEMDEBUG 1414 printf("%s: Didn't keep 0xdead at 0x%x\n", 1415 sc->sc_dev.dv_xname, testing-2); 1416 #endif 1417 continue; 1418 } 1419 1420 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1421 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1422 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1423 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1424 #ifdef IYMEMDEBUG 1425 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1426 sc->sc_dev.dv_xname, testing-2); 1427 #endif 1428 continue; 1429 } 1430 1431 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1432 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1433 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1434 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1435 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1436 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1437 #ifdef IYMEMDEBUG 1438 printf("%s: 0x%x alias of 0x0\n", 1439 sc->sc_dev.dv_xname, testing >> 1); 1440 #endif 1441 continue; 1442 } 1443 1444 break; 1445 } 1446 1447 sc->sram = testing; 1448 1449 switch(testing) { 1450 case 65536: 1451 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1452 sc->rx_size = 44*1024; 1453 break; 1454 1455 case 32768: 1456 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1457 sc->rx_size = 22*1024; 1458 break; 1459 1460 case 16384: 1461 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1462 sc->rx_size = 10*1024; 1463 break; 1464 default: 1465 sc->rx_size = testing/2; 1466 break; 1467 } 1468 sc->tx_size = testing - sc->rx_size; 1469 } 1470 1471 static int 1472 eepromreadall(iot, ioh, wordp, maxi) 1473 bus_space_tag_t iot; 1474 bus_space_handle_t ioh; 1475 u_int16_t *wordp; 1476 int maxi; 1477 { 1478 int i; 1479 u_int16_t checksum, tmp; 1480 1481 checksum = 0; 1482 1483 for (i=0; i<EEPP_LENGTH; ++i) { 1484 tmp = eepromread(iot, ioh, i); 1485 checksum += tmp; 1486 if (i<maxi) 1487 wordp[i] = tmp; 1488 } 1489 1490 if (checksum != EEPP_CHKSUM) { 1491 #ifdef IYDEBUG 1492 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1493 checksum, EEPP_CHKSUM); 1494 #endif 1495 return 1; 1496 } 1497 return 0; 1498 } 1499
Indexes created Thu Sep 25 16:09:42 GMT 2025