if_iy.c revision 1.33
1 /* $NetBSD: if_iy.c,v 1.33 1999/03/25 23:21:38 thorpej Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include "opt_inet.h" 49 #include "opt_ns.h" 50 #include "bpfilter.h" 51 #include "rnd.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/mbuf.h> 56 #include <sys/buf.h> 57 #include <sys/protosw.h> 58 #include <sys/socket.h> 59 #include <sys/ioctl.h> 60 #include <sys/errno.h> 61 #include <sys/syslog.h> 62 #include <sys/device.h> 63 #if NRND > 0 64 #include <sys/rnd.h> 65 #endif 66 67 #include <net/if.h> 68 #include <net/if_types.h> 69 #include <net/if_dl.h> 70 71 #include <net/if_ether.h> 72 73 #if NBPFILTER > 0 74 #include <net/bpf.h> 75 #include <net/bpfdesc.h> 76 #endif 77 78 #ifdef INET 79 #include <netinet/in.h> 80 #include <netinet/in_systm.h> 81 #include <netinet/in_var.h> 82 #include <netinet/ip.h> 83 #include <netinet/if_inarp.h> 84 #endif 85 86 #ifdef NS 87 #include <netns/ns.h> 88 #include <netns/ns_if.h> 89 #endif 90 91 #if defined(SIOCSIFMEDIA) 92 #include <net/if_media.h> 93 #endif 94 95 #include <vm/vm.h> 96 97 #include <machine/cpu.h> 98 #include <machine/bus.h> 99 #include <machine/intr.h> 100 101 #include <dev/isa/isareg.h> 102 #include <dev/isa/isavar.h> 103 #include <dev/ic/i82595reg.h> 104 105 /* 106 * Ethernet status, per interface. 107 */ 108 struct iy_softc { 109 struct device sc_dev; 110 void *sc_ih; 111 112 bus_space_tag_t sc_iot; 113 bus_space_handle_t sc_ioh; 114 115 struct ethercom sc_ethercom; 116 117 struct ifmedia iy_ifmedia; 118 int iy_media; 119 120 int mappedirq; 121 122 int hard_vers; 123 124 int promisc; 125 126 int sram, tx_size, rx_size; 127 128 int tx_start, tx_end, tx_last; 129 int rx_start; 130 131 int doing_mc_setup; 132 #ifdef IYDEBUG 133 int sc_debug; 134 #endif 135 136 #if NRND > 0 137 rndsource_element_t rnd_source; 138 #endif 139 }; 140 141 void iywatchdog __P((struct ifnet *)); 142 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 143 int iyintr __P((void *)); 144 void iyinit __P((struct iy_softc *)); 145 void iystop __P((struct iy_softc *)); 146 void iystart __P((struct ifnet *)); 147 148 void iy_intr_rx __P((struct iy_softc *)); 149 void iy_intr_tx __P((struct iy_softc *)); 150 151 void iyreset __P((struct iy_softc *)); 152 void iy_readframe __P((struct iy_softc *, int)); 153 void iy_drop_packet_buffer __P((struct iy_softc *)); 154 void iy_find_mem_size __P((struct iy_softc *)); 155 void iyrint __P((struct iy_softc *)); 156 void iytint __P((struct iy_softc *)); 157 void iyxmit __P((struct iy_softc *)); 158 static void iy_mc_setup __P((struct iy_softc *)); 159 static void iy_mc_reset __P((struct iy_softc *)); 160 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 161 void iyprobemem __P((struct iy_softc *)); 162 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 163 int)); 164 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 165 166 #ifdef IYDEBUGX 167 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 168 169 int in_ifrint = 0; 170 int in_iftint = 0; 171 #endif 172 173 int iy_mediachange __P((struct ifnet *)); 174 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 175 176 int iyprobe __P((struct device *, struct cfdata *, void *)); 177 void iyattach __P((struct device *, struct device *, void *)); 178 179 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 180 181 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 182 int)); 183 184 struct cfattach iy_ca = { 185 sizeof(struct iy_softc), iyprobe, iyattach 186 }; 187 188 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 189 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 190 191 int 192 iyprobe(parent, match, aux) 193 struct device *parent; 194 struct cfdata *match; 195 void *aux; 196 { 197 struct isa_attach_args *ia = aux; 198 u_int16_t eaddr[8]; 199 200 bus_space_tag_t iot; 201 bus_space_handle_t ioh; 202 203 u_int8_t c, d; 204 205 iot = ia->ia_iot; 206 207 if (ia->ia_iobase == IOBASEUNK) 208 return 0; 209 210 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 211 return 0; 212 213 /* try to find the round robin sig: */ 214 215 c = bus_space_read_1(iot, ioh, ID_REG); 216 if ((c & ID_REG_MASK) != ID_REG_SIG) 217 goto out; 218 219 d = bus_space_read_1(iot, ioh, ID_REG); 220 if ((d & ID_REG_MASK) != ID_REG_SIG) 221 goto out; 222 223 if (((d-c) & R_ROBIN_BITS) != 0x40) 224 goto out; 225 226 d = bus_space_read_1(iot, ioh, ID_REG); 227 if ((d & ID_REG_MASK) != ID_REG_SIG) 228 goto out; 229 230 if (((d-c) & R_ROBIN_BITS) != 0x80) 231 goto out; 232 233 d = bus_space_read_1(iot, ioh, ID_REG); 234 if ((d & ID_REG_MASK) != ID_REG_SIG) 235 goto out; 236 237 if (((d-c) & R_ROBIN_BITS) != 0xC0) 238 goto out; 239 240 d = bus_space_read_1(iot, ioh, ID_REG); 241 if ((d & ID_REG_MASK) != ID_REG_SIG) 242 goto out; 243 244 if (((d-c) & R_ROBIN_BITS) != 0x00) 245 goto out; 246 247 #ifdef IYDEBUG 248 printf("iyprobe verified working ID reg.\n"); 249 #endif 250 251 if (eepromreadall(iot, ioh, eaddr, 8)) 252 goto out; 253 254 if (ia->ia_irq == IRQUNK) 255 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 256 257 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 258 goto out; 259 260 if (eepro_revirqmap[ia->ia_irq] == 0xff) 261 goto out; 262 263 /* now lets reset the chip */ 264 265 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 266 delay(200); 267 268 ia->ia_iosize = 16; 269 270 bus_space_unmap(iot, ioh, 16); 271 return 1; /* found */ 272 out: 273 bus_space_unmap(iot, ioh, 16); 274 return 0; 275 } 276 277 void 278 iyattach(parent, self, aux) 279 struct device *parent, *self; 280 void *aux; 281 { 282 struct iy_softc *sc = (void *)self; 283 struct isa_attach_args *ia = aux; 284 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 285 bus_space_tag_t iot; 286 bus_space_handle_t ioh; 287 unsigned temp; 288 u_int16_t eaddr[8]; 289 u_int8_t myaddr[ETHER_ADDR_LEN]; 290 int eirq; 291 292 iot = ia->ia_iot; 293 294 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 295 printf(": can't map i/o space\n"); 296 return; 297 } 298 299 sc->sc_iot = iot; 300 sc->sc_ioh = ioh; 301 302 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 303 304 /* now let's reset the chip */ 305 306 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 307 delay(200); 308 309 iyprobemem(sc); 310 311 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 312 ifp->if_softc = sc; 313 ifp->if_start = iystart; 314 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 315 | IFF_MULTICAST; 316 317 sc->doing_mc_setup = 0; 318 319 ifp->if_ioctl = iyioctl; 320 ifp->if_watchdog = iywatchdog; 321 322 (void)eepromreadall(iot, ioh, eaddr, 8); 323 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 324 325 #ifdef DIAGNOSTICS 326 if ((eaddr[EEPPEther0] != 327 eepromread(iot, ioh, EEPPEther0a)) && 328 (eaddr[EEPPEther1] != 329 eepromread(iot, ioh, EEPPEther1a)) && 330 (eaddr[EEPPEther2] != 331 eepromread(iot, ioh, EEPPEther2a))) 332 333 printf("EEPROM Ethernet address differs from copy\n"); 334 #endif 335 336 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 337 myaddr[0] = eaddr[EEPPEther0] >> 8; 338 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 339 myaddr[2] = eaddr[EEPPEther1] >> 8; 340 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 341 myaddr[4] = eaddr[EEPPEther2] >> 8; 342 343 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 344 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 345 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 346 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 347 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 348 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 349 /* Attach the interface. */ 350 if_attach(ifp); 351 ether_ifattach(ifp, myaddr); 352 printf(": address %s, rev. %d, %d kB\n", 353 ether_sprintf(myaddr), 354 sc->hard_vers, sc->sram/1024); 355 356 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 357 if (eirq != ia->ia_irq) 358 printf("%s: EEPROM irq setting %d ignored\n", 359 sc->sc_dev.dv_xname, eirq); 360 361 #if NBPFILTER > 0 362 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 363 #endif 364 365 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 366 IPL_NET, iyintr, sc); 367 368 #if NRND > 0 369 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 370 RND_TYPE_NET, 0); 371 #endif 372 373 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 374 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 375 } 376 377 void 378 iystop(sc) 379 struct iy_softc *sc; 380 { 381 bus_space_tag_t iot; 382 bus_space_handle_t ioh; 383 #ifdef IYDEBUG 384 u_int p, v; 385 #endif 386 387 iot = sc->sc_iot; 388 ioh = sc->sc_ioh; 389 390 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 391 392 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 393 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 394 395 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 396 delay(200); 397 #ifdef IYDEBUG 398 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 399 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 400 p = sc->tx_last; 401 if (!p) 402 p = sc->tx_start; 403 do { 404 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 405 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 406 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 407 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 408 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 409 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 410 printf(" 0x%04x", p); 411 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 412 printf(" 0x%b\n", v, "\020\020Ch"); 413 414 } while (v & 0x8000); 415 #endif 416 sc->tx_start = sc->tx_end = sc->rx_size; 417 sc->tx_last = 0; 418 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 419 } 420 421 void 422 iyreset(sc) 423 struct iy_softc *sc; 424 { 425 int s; 426 s = splnet(); 427 iystop(sc); 428 iyinit(sc); 429 splx(s); 430 } 431 432 void 433 iyinit(sc) 434 struct iy_softc *sc; 435 { 436 int i; 437 unsigned temp; 438 struct ifnet *ifp; 439 bus_space_tag_t iot; 440 bus_space_handle_t ioh; 441 442 iot = sc->sc_iot; 443 ioh = sc->sc_ioh; 444 445 ifp = &sc->sc_ethercom.ec_if; 446 #ifdef IYDEBUG 447 printf("ifp is %p\n", ifp); 448 #endif 449 450 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 451 452 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 453 if (temp & 0x10) 454 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 455 456 for (i=0; i<6; ++i) { 457 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 458 } 459 460 temp = bus_space_read_1(iot, ioh, REG1); 461 bus_space_write_1(iot, ioh, REG1, 462 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 463 464 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 465 temp = MATCH_ALL; 466 } else if (sc->sc_ethercom.ec_multicnt) { 467 temp = MATCH_MULTI; 468 } else 469 temp = MATCH_ID; 470 471 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 472 473 #ifdef IYDEBUG 474 printf("%s: RECV_MODES set to %b\n", sc->sc_dev.dv_xname, 475 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 476 #endif 477 /* XXX VOODOO */ 478 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 479 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 480 /* XXX END OF VOODOO */ 481 482 483 delay(500000); /* for the hardware to test for the connector */ 484 485 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 486 #ifdef IYDEBUG 487 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 488 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 489 #endif 490 temp = (temp & TEST_MODE_MASK); 491 492 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 493 case IFM_10_5: 494 temp &= ~ (BNC_BIT | TPE_BIT); 495 break; 496 497 case IFM_10_2: 498 temp = (temp & ~TPE_BIT) | BNC_BIT; 499 break; 500 501 case IFM_10_T: 502 temp = (temp & ~BNC_BIT) | TPE_BIT; 503 break; 504 default: 505 /* nothing; leave as it is */ 506 } 507 switch (temp & (BNC_BIT | TPE_BIT)) { 508 case BNC_BIT: 509 sc->iy_media = IFM_ETHER | IFM_10_2; 510 break; 511 case TPE_BIT: 512 sc->iy_media = IFM_ETHER | IFM_10_T; 513 break; 514 default: 515 sc->iy_media = IFM_ETHER | IFM_10_5; 516 } 517 518 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 519 #ifdef IYDEBUG 520 printf("changed to 0x%b\n", 521 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 522 #endif 523 524 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 525 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 526 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 527 528 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 529 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 530 531 #ifdef IYDEBUG 532 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 533 temp, "\020\4bad_irq\010flash/boot present"); 534 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 535 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 536 temp, "\020\4BAD IRQ\010flash/boot present"); 537 #endif 538 539 540 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 541 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 542 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 543 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 544 545 temp = bus_space_read_1(iot, ioh, REG1); 546 #ifdef IYDEBUG 547 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 548 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 549 #endif 550 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 551 552 #ifdef IYDEBUG 553 temp = bus_space_read_1(iot, ioh, REG1); 554 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 555 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 556 #endif 557 558 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 559 560 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 561 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 562 563 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 564 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 565 sc->rx_start = 0; 566 567 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 568 delay(200); 569 570 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 571 572 sc->tx_start = sc->tx_end = sc->rx_size; 573 sc->tx_last = 0; 574 575 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 576 577 ifp->if_flags |= IFF_RUNNING; 578 ifp->if_flags &= ~IFF_OACTIVE; 579 } 580 581 void 582 iystart(ifp) 583 struct ifnet *ifp; 584 { 585 struct iy_softc *sc; 586 587 588 struct mbuf *m0, *m; 589 u_int len, pad, last, end; 590 u_int llen, residual; 591 int avail; 592 caddr_t data; 593 u_int16_t resval, stat; 594 bus_space_tag_t iot; 595 bus_space_handle_t ioh; 596 597 #ifdef IYDEBUG 598 printf("iystart called\n"); 599 #endif 600 sc = ifp->if_softc; 601 602 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 603 return; 604 605 iot = sc->sc_iot; 606 ioh = sc->sc_ioh; 607 608 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 609 #ifdef IYDEBUG 610 printf("%s: trying to write another packet to the hardware\n", 611 sc->sc_dev.dv_xname); 612 #endif 613 614 /* We need to use m->m_pkthdr.len, so require the header */ 615 if ((m0->m_flags & M_PKTHDR) == 0) 616 panic("iystart: no header mbuf"); 617 618 len = m0->m_pkthdr.len; 619 pad = len & 1; 620 621 #ifdef IYDEBUG 622 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 623 #endif 624 if (len < ETHER_MIN_LEN) { 625 pad = ETHER_MIN_LEN - len; 626 } 627 628 if (len + pad > ETHER_MAX_LEN) { 629 /* packet is obviously too large: toss it */ 630 ++ifp->if_oerrors; 631 IF_DEQUEUE(&ifp->if_snd, m0); 632 m_freem(m0); 633 continue; 634 } 635 636 #if NBPFILTER > 0 637 if (ifp->if_bpf) 638 bpf_mtap(ifp->if_bpf, m0); 639 #endif 640 641 avail = sc->tx_start - sc->tx_end; 642 if (avail <= 0) 643 avail += sc->tx_size; 644 645 #ifdef IYDEBUG 646 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 647 #endif 648 /* 649 * we MUST RUN at splnet here --- 650 * XXX todo: or even turn off the boards ints ??? hm... 651 */ 652 653 /* See if there is room to put another packet in the buffer. */ 654 655 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 656 #ifdef IYDEBUG 657 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 658 sc->sc_dev.dv_xname, len, avail); 659 #endif 660 ifp->if_flags |= IFF_OACTIVE; 661 return; 662 } 663 664 /* we know it fits in the hardware now, so dequeue it */ 665 IF_DEQUEUE(&ifp->if_snd, m0); 666 667 last = sc->tx_end; 668 end = last + pad + len + I595_XMT_HDRLEN; 669 670 if (end >= sc->sram) { 671 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 672 /* keep header in one piece */ 673 last = sc->rx_size; 674 end = last + pad + len + I595_XMT_HDRLEN; 675 } else 676 end -= sc->tx_size; 677 } 678 679 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 680 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 681 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 682 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 683 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 684 685 residual = resval = 0; 686 687 while ((m = m0)!=0) { 688 data = mtod(m, caddr_t); 689 llen = m->m_len; 690 if (residual) { 691 #ifdef IYDEBUG 692 printf("%s: merging residual with next mbuf.\n", 693 sc->sc_dev.dv_xname); 694 #endif 695 resval |= *data << 8; 696 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 697 --llen; 698 ++data; 699 } 700 if (llen > 1) 701 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 702 data, llen>>1); 703 residual = llen & 1; 704 if (residual) { 705 resval = *(data + llen - 1); 706 #ifdef IYDEBUG 707 printf("%s: got odd mbuf to send.\n", 708 sc->sc_dev.dv_xname); 709 #endif 710 } 711 712 MFREE(m, m0); 713 } 714 715 if (residual) 716 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 717 718 pad >>= 1; 719 while (pad-- > 0) 720 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 721 722 #ifdef IYDEBUG 723 printf("%s: new last = 0x%x, end = 0x%x.\n", 724 sc->sc_dev.dv_xname, last, end); 725 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 726 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 727 #endif 728 729 if (sc->tx_start != sc->tx_end) { 730 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 731 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 732 733 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 734 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 735 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 736 #ifdef IYDEBUG 737 printf("%s: setting 0x%x to 0x%x\n", 738 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 739 stat | CHAIN); 740 #endif 741 } 742 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 743 744 /* XXX todo: enable ints here if disabled */ 745 746 ++ifp->if_opackets; 747 748 if (sc->tx_start == sc->tx_end) { 749 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 750 bus_space_write_1(iot, ioh, 0, XMT_CMD); 751 sc->tx_start = last; 752 #ifdef IYDEBUG 753 printf("%s: writing 0x%x to XAR and giving XCMD\n", 754 sc->sc_dev.dv_xname, last); 755 #endif 756 } else { 757 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 758 #ifdef IYDEBUG 759 printf("%s: giving RESUME_XCMD\n", 760 sc->sc_dev.dv_xname); 761 #endif 762 } 763 sc->tx_last = last; 764 sc->tx_end = end; 765 } 766 } 767 768 769 static __inline void 770 eepromwritebit(iot, ioh, what) 771 bus_space_tag_t iot; 772 bus_space_handle_t ioh; 773 int what; 774 { 775 bus_space_write_1(iot, ioh, EEPROM_REG, what); 776 delay(1); 777 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 778 delay(1); 779 bus_space_write_1(iot, ioh, EEPROM_REG, what); 780 delay(1); 781 } 782 783 static __inline int 784 eepromreadbit(iot, ioh) 785 bus_space_tag_t iot; 786 bus_space_handle_t ioh; 787 { 788 int b; 789 790 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 791 delay(1); 792 b = bus_space_read_1(iot, ioh, EEPROM_REG); 793 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 794 delay(1); 795 796 return ((b & EEDO) != 0); 797 } 798 799 static u_int16_t 800 eepromread(iot, ioh, offset) 801 bus_space_tag_t iot; 802 bus_space_handle_t ioh; 803 int offset; 804 { 805 volatile int i; 806 volatile int j; 807 volatile u_int16_t readval; 808 809 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 810 delay(1); 811 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 812 delay(1); 813 814 eepromwritebit(iot, ioh, EECS|EEDI); 815 eepromwritebit(iot, ioh, EECS|EEDI); 816 eepromwritebit(iot, ioh, EECS); 817 818 for (j=5; j>=0; --j) { 819 if ((offset>>j) & 1) 820 eepromwritebit(iot, ioh, EECS|EEDI); 821 else 822 eepromwritebit(iot, ioh, EECS); 823 } 824 825 for (readval=0, i=0; i<16; ++i) { 826 readval<<=1; 827 readval |= eepromreadbit(iot, ioh); 828 } 829 830 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 831 delay(1); 832 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 833 834 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 835 836 return readval; 837 } 838 839 /* 840 * Device timeout/watchdog routine. Entered if the device neglects to generate 841 * an interrupt after a transmit has been started on it. 842 */ 843 void 844 iywatchdog(ifp) 845 struct ifnet *ifp; 846 { 847 struct iy_softc *sc = ifp->if_softc; 848 849 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 850 ++sc->sc_ethercom.ec_if.if_oerrors; 851 iyreset(sc); 852 } 853 854 /* 855 * What to do upon receipt of an interrupt. 856 */ 857 int 858 iyintr(arg) 859 void *arg; 860 { 861 struct iy_softc *sc = arg; 862 bus_space_tag_t iot; 863 bus_space_handle_t ioh; 864 865 register u_short status; 866 867 iot = sc->sc_iot; 868 ioh = sc->sc_ioh; 869 870 status = bus_space_read_1(iot, ioh, STATUS_REG); 871 #ifdef IYDEBUG 872 if (status & ALL_INTS) { 873 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 874 "\020\1RX_STP\2RX\3TX\4EXEC"); 875 if (status & EXEC_INT) 876 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 877 "\020\6ABORT"); 878 else 879 printf("\n"); 880 } 881 #endif 882 if ((status & (RX_INT | TX_INT)) == 0) 883 return 0; 884 885 if (status & RX_INT) { 886 iy_intr_rx(sc); 887 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 888 } 889 if (status & TX_INT) { 890 iy_intr_tx(sc); 891 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 892 } 893 894 #if NRND > 0 895 rnd_add_uint32(&sc->rnd_source, status); 896 #endif 897 898 return 1; 899 } 900 901 void 902 iyget(sc, iot, ioh, rxlen) 903 struct iy_softc *sc; 904 bus_space_tag_t iot; 905 bus_space_handle_t ioh; 906 int rxlen; 907 { 908 struct mbuf *m, *top, **mp; 909 struct ether_header *eh; 910 struct ifnet *ifp; 911 int len; 912 913 ifp = &sc->sc_ethercom.ec_if; 914 915 MGETHDR(m, M_DONTWAIT, MT_DATA); 916 if (m == 0) 917 goto dropped; 918 m->m_pkthdr.rcvif = ifp; 919 m->m_pkthdr.len = rxlen; 920 len = MHLEN; 921 top = 0; 922 mp = ⊤ 923 924 while (rxlen > 0) { 925 if (top) { 926 MGET(m, M_DONTWAIT, MT_DATA); 927 if (m == 0) { 928 m_freem(top); 929 goto dropped; 930 } 931 len = MLEN; 932 } 933 if (rxlen >= MINCLSIZE) { 934 MCLGET(m, M_DONTWAIT); 935 if ((m->m_flags & M_EXT) == 0) { 936 m_free(m); 937 m_freem(top); 938 goto dropped; 939 } 940 len = MCLBYTES; 941 } 942 len = min(rxlen, len); 943 if (len > 1) { 944 len &= ~1; 945 946 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 947 mtod(m, caddr_t), len/2); 948 } else { 949 #ifdef IYDEBUG 950 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 951 #endif 952 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 953 MEM_PORT_REG); 954 } 955 m->m_len = len; 956 rxlen -= len; 957 *mp = m; 958 mp = &m->m_next; 959 } 960 /* XXX receive the top here */ 961 ++ifp->if_ipackets; 962 963 eh = mtod(top, struct ether_header *); 964 965 #if NBPFILTER > 0 966 if (ifp->if_bpf) { 967 bpf_mtap(ifp->if_bpf, top); 968 if ((ifp->if_flags & IFF_PROMISC) && 969 (eh->ether_dhost[0] & 1) == 0 && 970 bcmp(eh->ether_dhost, 971 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 972 sizeof(eh->ether_dhost)) != 0) { 973 974 m_freem(top); 975 return; 976 } 977 } 978 #endif 979 m_adj(top, sizeof(struct ether_header)); 980 ether_input(ifp, eh, top); 981 return; 982 983 dropped: 984 ++ifp->if_ierrors; 985 return; 986 } 987 988 void 989 iy_intr_rx(sc) 990 struct iy_softc *sc; 991 { 992 struct ifnet *ifp; 993 bus_space_tag_t iot; 994 bus_space_handle_t ioh; 995 996 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 997 998 iot = sc->sc_iot; 999 ioh = sc->sc_ioh; 1000 ifp = &sc->sc_ethercom.ec_if; 1001 1002 rxadrs = sc->rx_start; 1003 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1004 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1005 rxnext = 0; 1006 1007 while (rxevnt == RCV_DONE) { 1008 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1009 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1010 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1011 #ifdef IYDEBUG 1012 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 1013 sc->sc_dev.dv_xname, rxadrs, rxstatus, 1014 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1015 "\014CRCERR\015LENERR\016RCVOK\020TYP", 1016 rxnext, rxlen); 1017 #endif 1018 iyget(sc, iot, ioh, rxlen); 1019 1020 /* move stop address */ 1021 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1022 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1023 1024 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1025 rxadrs = rxnext; 1026 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1027 } 1028 sc->rx_start = rxnext; 1029 } 1030 1031 void 1032 iy_intr_tx(sc) 1033 struct iy_softc *sc; 1034 { 1035 bus_space_tag_t iot; 1036 bus_space_handle_t ioh; 1037 struct ifnet *ifp; 1038 u_int txstatus, txstat2, txlen, txnext; 1039 1040 ifp = &sc->sc_ethercom.ec_if; 1041 iot = sc->sc_iot; 1042 ioh = sc->sc_ioh; 1043 1044 while (sc->tx_start != sc->tx_end) { 1045 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1046 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1047 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1048 break; 1049 1050 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1051 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1052 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1053 #ifdef IYDEBUG 1054 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1055 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1056 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1057 txnext, txlen); 1058 #endif 1059 if (txlen & CHAIN) 1060 sc->tx_start = txnext; 1061 else 1062 sc->tx_start = sc->tx_end; 1063 ifp->if_flags &= ~IFF_OACTIVE; 1064 1065 if ((txstat2 & 0x2000) == 0) 1066 ++ifp->if_oerrors; 1067 if (txstat2 & 0x000f) 1068 ifp->if_oerrors += txstat2 & 0x000f; 1069 } 1070 ifp->if_flags &= ~IFF_OACTIVE; 1071 } 1072 1073 int 1074 iyioctl(ifp, cmd, data) 1075 register struct ifnet *ifp; 1076 u_long cmd; 1077 caddr_t data; 1078 { 1079 struct iy_softc *sc; 1080 struct ifaddr *ifa; 1081 struct ifreq *ifr; 1082 int s, error = 0; 1083 1084 sc = ifp->if_softc; 1085 ifa = (struct ifaddr *)data; 1086 ifr = (struct ifreq *)data; 1087 1088 #ifdef IYDEBUG 1089 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1090 ifp, ifp->if_xname, cmd, data); 1091 #endif 1092 1093 s = splnet(); 1094 1095 switch (cmd) { 1096 1097 case SIOCSIFADDR: 1098 ifp->if_flags |= IFF_UP; 1099 1100 switch (ifa->ifa_addr->sa_family) { 1101 #ifdef INET 1102 case AF_INET: 1103 iyinit(sc); 1104 arp_ifinit(ifp, ifa); 1105 break; 1106 #endif 1107 #ifdef NS 1108 /* XXX - This code is probably wrong. */ 1109 case AF_NS: 1110 { 1111 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1112 1113 if (ns_nullhost(*ina)) 1114 ina->x_host = *(union ns_host *) 1115 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1116 else 1117 bcopy(ina->x_host.c_host, 1118 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1119 ETHER_ADDR_LEN); 1120 /* Set new address. */ 1121 iyinit(sc); 1122 break; 1123 } 1124 #endif /* NS */ 1125 default: 1126 iyinit(sc); 1127 break; 1128 } 1129 break; 1130 1131 case SIOCSIFFLAGS: 1132 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1133 if ((ifp->if_flags & IFF_UP) == 0 && 1134 (ifp->if_flags & IFF_RUNNING) != 0) { 1135 /* 1136 * If interface is marked down and it is running, then 1137 * stop it. 1138 */ 1139 iystop(sc); 1140 ifp->if_flags &= ~IFF_RUNNING; 1141 } else if ((ifp->if_flags & IFF_UP) != 0 && 1142 (ifp->if_flags & IFF_RUNNING) == 0) { 1143 /* 1144 * If interface is marked up and it is stopped, then 1145 * start it. 1146 */ 1147 iyinit(sc); 1148 } else { 1149 /* 1150 * Reset the interface to pick up changes in any other 1151 * flags that affect hardware registers. 1152 */ 1153 iystop(sc); 1154 iyinit(sc); 1155 } 1156 #ifdef IYDEBUGX 1157 if (ifp->if_flags & IFF_DEBUG) 1158 sc->sc_debug = IFY_ALL; 1159 else 1160 sc->sc_debug = 0; 1161 #endif 1162 break; 1163 1164 case SIOCADDMULTI: 1165 case SIOCDELMULTI: 1166 error = (cmd == SIOCADDMULTI) ? 1167 ether_addmulti(ifr, &sc->sc_ethercom): 1168 ether_delmulti(ifr, &sc->sc_ethercom); 1169 1170 if (error == ENETRESET) { 1171 /* 1172 * Multicast list has changed; set the hardware filter 1173 * accordingly. 1174 */ 1175 iyreset(sc); /* XXX can't make it work otherwise */ 1176 iy_mc_reset(sc); 1177 error = 0; 1178 } 1179 break; 1180 1181 case SIOCSIFMEDIA: 1182 case SIOCGIFMEDIA: 1183 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1184 break; 1185 default: 1186 error = EINVAL; 1187 } 1188 splx(s); 1189 return error; 1190 } 1191 1192 int 1193 iy_mediachange(ifp) 1194 struct ifnet *ifp; 1195 { 1196 struct iy_softc *sc = ifp->if_softc; 1197 1198 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1199 return EINVAL; 1200 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1201 case IFM_10_5: 1202 case IFM_10_2: 1203 case IFM_10_T: 1204 case IFM_AUTO: 1205 iystop(sc); 1206 iyinit(sc); 1207 return 0; 1208 default: 1209 return EINVAL; 1210 } 1211 } 1212 1213 void 1214 iy_mediastatus(ifp, ifmr) 1215 struct ifnet *ifp; 1216 struct ifmediareq *ifmr; 1217 { 1218 struct iy_softc *sc = ifp->if_softc; 1219 1220 ifmr->ifm_active = sc->iy_media; 1221 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1222 } 1223 1224 1225 static void 1226 iy_mc_setup(sc) 1227 struct iy_softc *sc; 1228 { 1229 struct ether_multi *enm; 1230 struct ether_multistep step; 1231 struct ethercom *ecp; 1232 struct ifnet *ifp; 1233 bus_space_tag_t iot; 1234 bus_space_handle_t ioh; 1235 int avail, last /*, end*/ , len; 1236 int timeout; 1237 u_int8_t temp; 1238 1239 1240 ecp = &sc->sc_ethercom; 1241 ifp = &ecp->ec_if; 1242 1243 iot = sc->sc_iot; 1244 ioh = sc->sc_ioh; 1245 1246 len = 6 * ecp->ec_multicnt + 6; 1247 1248 avail = sc->tx_start - sc->tx_end; 1249 if (avail <= 0) 1250 avail += sc->tx_size; 1251 printf("iy_mc_setup called, %d addresses, %d/%d bytes needed/avail\n", 1252 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1253 1254 last = sc->rx_size; 1255 1256 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1257 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_MULTI); 1258 /* XXX VOODOO */ 1259 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1260 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1261 /* XXX END OF VOODOO */ 1262 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1263 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1264 bus_space_write_2(iot, ioh, MEM_PORT_REG, MC_SETUP_CMD); 1265 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1266 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1267 bus_space_write_2(iot, ioh, MEM_PORT_REG, len); 1268 1269 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1270 LLADDR(ifp->if_sadl), 3); 1271 1272 ETHER_FIRST_MULTI(step, ecp, enm); 1273 while(enm) { 1274 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1275 enm->enm_addrlo, 3); 1276 1277 ETHER_NEXT_MULTI(step, enm); 1278 } 1279 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1280 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1281 1282 1283 sc->tx_start = sc->rx_size; 1284 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1285 1286 for (timeout=0; timeout<100; timeout++) { 1287 DELAY(2); 1288 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1289 continue; 1290 1291 temp = bus_space_read_1(iot, ioh, 0); 1292 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1293 #ifdef DIAGNOSTIC 1294 if (temp & 0x20) { 1295 printf("%s: mc setup failed, %d usec\n", 1296 sc->sc_dev.dv_xname, timeout * 2); 1297 } else if ((temp & 0x0f) == 0x03) { 1298 printf("%s: mc setup done, %d usec\n", 1299 sc->sc_dev.dv_xname, timeout * 2); 1300 } 1301 #endif 1302 break; 1303 } 1304 sc->tx_start = sc->tx_end; 1305 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1306 1307 } 1308 1309 static void 1310 iy_mc_reset(sc) 1311 struct iy_softc *sc; 1312 { 1313 struct ether_multi *enm; 1314 struct ether_multistep step; 1315 struct ethercom *ecp; 1316 struct ifnet *ifp; 1317 bus_space_tag_t iot; 1318 bus_space_handle_t ioh; 1319 u_int16_t temp; 1320 1321 ecp = &sc->sc_ethercom; 1322 ifp = &ecp->ec_if; 1323 1324 iot = sc->sc_iot; 1325 ioh = sc->sc_ioh; 1326 1327 if (ecp->ec_multicnt > 63) { 1328 ifp->if_flags |= IFF_ALLMULTI; 1329 1330 } else if (ecp->ec_multicnt > 0) { 1331 /* 1332 * Step through the list of addresses. 1333 */ 1334 ETHER_FIRST_MULTI(step, ecp, enm); 1335 while(enm) { 1336 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1337 ifp->if_flags |= IFF_ALLMULTI; 1338 goto setupmulti; 1339 } 1340 ETHER_NEXT_MULTI(step, enm); 1341 } 1342 /* OK, we really need to do it now: */ 1343 #if 0 1344 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1345 != IFF_RUNNING) { 1346 ifp->if_flags |= IFF_OACTIVE; 1347 sc->want_mc_setup = 1; 1348 return; 1349 } 1350 #endif 1351 iy_mc_setup(sc); 1352 } else { 1353 ifp->if_flags &= ~IFF_ALLMULTI; 1354 } 1355 1356 setupmulti: 1357 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1358 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1359 temp = MATCH_ALL; 1360 } else if (sc->sc_ethercom.ec_multicnt) { 1361 temp = MATCH_MULTI; 1362 } else 1363 temp = MATCH_ID; 1364 1365 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1366 /* XXX VOODOO */ 1367 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1368 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1369 /* XXX END OF VOODOO */ 1370 1371 /* XXX TBD: setup hardware for all multicasts */ 1372 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1373 return; 1374 } 1375 1376 #ifdef IYDEBUG 1377 void 1378 print_rbd(rbd) 1379 volatile struct ie_recv_buf_desc *rbd; 1380 { 1381 1382 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1383 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1384 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1385 rbd->mbz); 1386 } 1387 #endif 1388 1389 void 1390 iyprobemem(sc) 1391 struct iy_softc *sc; 1392 { 1393 bus_space_tag_t iot; 1394 bus_space_handle_t ioh; 1395 int testing; 1396 1397 iot = sc->sc_iot; 1398 ioh = sc->sc_ioh; 1399 1400 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1401 delay(1); 1402 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1403 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1404 1405 for (testing=65536; testing >= 4096; testing >>= 1) { 1406 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1407 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1408 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1409 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1410 #ifdef IYMEMDEBUG 1411 printf("%s: Didn't keep 0xdead at 0x%x\n", 1412 sc->sc_dev.dv_xname, testing-2); 1413 #endif 1414 continue; 1415 } 1416 1417 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1418 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1419 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1420 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1421 #ifdef IYMEMDEBUG 1422 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1423 sc->sc_dev.dv_xname, testing-2); 1424 #endif 1425 continue; 1426 } 1427 1428 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1429 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1430 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1431 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1432 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1433 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1434 #ifdef IYMEMDEBUG 1435 printf("%s: 0x%x alias of 0x0\n", 1436 sc->sc_dev.dv_xname, testing >> 1); 1437 #endif 1438 continue; 1439 } 1440 1441 break; 1442 } 1443 1444 sc->sram = testing; 1445 1446 switch(testing) { 1447 case 65536: 1448 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1449 sc->rx_size = 44*1024; 1450 break; 1451 1452 case 32768: 1453 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1454 sc->rx_size = 22*1024; 1455 break; 1456 1457 case 16384: 1458 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1459 sc->rx_size = 10*1024; 1460 break; 1461 default: 1462 sc->rx_size = testing/2; 1463 break; 1464 } 1465 sc->tx_size = testing - sc->rx_size; 1466 } 1467 1468 static int 1469 eepromreadall(iot, ioh, wordp, maxi) 1470 bus_space_tag_t iot; 1471 bus_space_handle_t ioh; 1472 u_int16_t *wordp; 1473 int maxi; 1474 { 1475 int i; 1476 u_int16_t checksum, tmp; 1477 1478 checksum = 0; 1479 1480 for (i=0; i<EEPP_LENGTH; ++i) { 1481 tmp = eepromread(iot, ioh, i); 1482 checksum += tmp; 1483 if (i<maxi) 1484 wordp[i] = tmp; 1485 } 1486 1487 if (checksum != EEPP_CHKSUM) { 1488 #ifdef IYDEBUG 1489 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1490 checksum, EEPP_CHKSUM); 1491 #endif 1492 return 1; 1493 } 1494 return 0; 1495 } 1496
Indexes created Wed Oct 01 15:09:59 GMT 2025