if_iy.c revision 1.40
1 /* $NetBSD: if_iy.c,v 1.40 2000/07/14 10:50:50 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include "opt_inet.h" 49 #include "opt_ns.h" 50 #include "bpfilter.h" 51 #include "rnd.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/mbuf.h> 56 #include <sys/buf.h> 57 #include <sys/protosw.h> 58 #include <sys/socket.h> 59 #include <sys/ioctl.h> 60 #include <sys/errno.h> 61 #include <sys/syslog.h> 62 #include <sys/device.h> 63 #if NRND > 0 64 #include <sys/rnd.h> 65 #endif 66 67 #include <net/if.h> 68 #include <net/if_types.h> 69 #include <net/if_dl.h> 70 71 #include <net/if_ether.h> 72 73 #if NBPFILTER > 0 74 #include <net/bpf.h> 75 #include <net/bpfdesc.h> 76 #endif 77 78 #ifdef INET 79 #include <netinet/in.h> 80 #include <netinet/in_systm.h> 81 #include <netinet/in_var.h> 82 #include <netinet/ip.h> 83 #include <netinet/if_inarp.h> 84 #endif 85 86 #ifdef NS 87 #include <netns/ns.h> 88 #include <netns/ns_if.h> 89 #endif 90 91 #if defined(SIOCSIFMEDIA) 92 #include <net/if_media.h> 93 #endif 94 95 #include <machine/cpu.h> 96 #include <machine/bus.h> 97 #include <machine/intr.h> 98 99 #include <dev/isa/isareg.h> 100 #include <dev/isa/isavar.h> 101 #include <dev/ic/i82595reg.h> 102 103 /* 104 * Ethernet status, per interface. 105 */ 106 struct iy_softc { 107 struct device sc_dev; 108 void *sc_ih; 109 110 bus_space_tag_t sc_iot; 111 bus_space_handle_t sc_ioh; 112 113 struct ethercom sc_ethercom; 114 115 struct ifmedia iy_ifmedia; 116 int iy_media; 117 118 int mappedirq; 119 120 int hard_vers; 121 122 int promisc; 123 124 int sram, tx_size, rx_size; 125 126 int tx_start, tx_end, tx_last; 127 int rx_start; 128 129 int doing_mc_setup; 130 #ifdef IYDEBUG 131 int sc_debug; 132 #endif 133 134 #if NRND > 0 135 rndsource_element_t rnd_source; 136 #endif 137 }; 138 139 void iywatchdog __P((struct ifnet *)); 140 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 141 int iyintr __P((void *)); 142 void iyinit __P((struct iy_softc *)); 143 void iystop __P((struct iy_softc *)); 144 void iystart __P((struct ifnet *)); 145 146 void iy_intr_rx __P((struct iy_softc *)); 147 void iy_intr_tx __P((struct iy_softc *)); 148 149 void iyreset __P((struct iy_softc *)); 150 void iy_readframe __P((struct iy_softc *, int)); 151 void iy_drop_packet_buffer __P((struct iy_softc *)); 152 void iy_find_mem_size __P((struct iy_softc *)); 153 void iyrint __P((struct iy_softc *)); 154 void iytint __P((struct iy_softc *)); 155 void iyxmit __P((struct iy_softc *)); 156 static void iy_mc_setup __P((struct iy_softc *)); 157 static void iy_mc_reset __P((struct iy_softc *)); 158 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 159 void iyprobemem __P((struct iy_softc *)); 160 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 161 int)); 162 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 163 164 #ifdef IYDEBUGX 165 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 166 167 int in_ifrint = 0; 168 int in_iftint = 0; 169 #endif 170 171 int iy_mediachange __P((struct ifnet *)); 172 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 173 174 int iyprobe __P((struct device *, struct cfdata *, void *)); 175 void iyattach __P((struct device *, struct device *, void *)); 176 177 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 178 179 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 180 int)); 181 182 struct cfattach iy_ca = { 183 sizeof(struct iy_softc), iyprobe, iyattach 184 }; 185 186 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 187 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 188 189 int 190 iyprobe(parent, match, aux) 191 struct device *parent; 192 struct cfdata *match; 193 void *aux; 194 { 195 struct isa_attach_args *ia = aux; 196 u_int16_t eaddr[8]; 197 198 bus_space_tag_t iot; 199 bus_space_handle_t ioh; 200 201 u_int8_t c, d; 202 203 iot = ia->ia_iot; 204 205 if (ia->ia_iobase == IOBASEUNK) 206 return 0; 207 208 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 209 return 0; 210 211 /* try to find the round robin sig: */ 212 213 c = bus_space_read_1(iot, ioh, ID_REG); 214 if ((c & ID_REG_MASK) != ID_REG_SIG) 215 goto out; 216 217 d = bus_space_read_1(iot, ioh, ID_REG); 218 if ((d & ID_REG_MASK) != ID_REG_SIG) 219 goto out; 220 221 if (((d-c) & R_ROBIN_BITS) != 0x40) 222 goto out; 223 224 d = bus_space_read_1(iot, ioh, ID_REG); 225 if ((d & ID_REG_MASK) != ID_REG_SIG) 226 goto out; 227 228 if (((d-c) & R_ROBIN_BITS) != 0x80) 229 goto out; 230 231 d = bus_space_read_1(iot, ioh, ID_REG); 232 if ((d & ID_REG_MASK) != ID_REG_SIG) 233 goto out; 234 235 if (((d-c) & R_ROBIN_BITS) != 0xC0) 236 goto out; 237 238 d = bus_space_read_1(iot, ioh, ID_REG); 239 if ((d & ID_REG_MASK) != ID_REG_SIG) 240 goto out; 241 242 if (((d-c) & R_ROBIN_BITS) != 0x00) 243 goto out; 244 245 #ifdef IYDEBUG 246 printf("iyprobe verified working ID reg.\n"); 247 #endif 248 249 if (eepromreadall(iot, ioh, eaddr, 8)) 250 goto out; 251 252 if (ia->ia_irq == IRQUNK) 253 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 254 255 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 256 goto out; 257 258 if (eepro_revirqmap[ia->ia_irq] == 0xff) 259 goto out; 260 261 /* now lets reset the chip */ 262 263 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 264 delay(200); 265 266 ia->ia_iosize = 16; 267 268 bus_space_unmap(iot, ioh, 16); 269 return 1; /* found */ 270 out: 271 bus_space_unmap(iot, ioh, 16); 272 return 0; 273 } 274 275 void 276 iyattach(parent, self, aux) 277 struct device *parent, *self; 278 void *aux; 279 { 280 struct iy_softc *sc = (void *)self; 281 struct isa_attach_args *ia = aux; 282 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 283 bus_space_tag_t iot; 284 bus_space_handle_t ioh; 285 unsigned temp; 286 u_int16_t eaddr[8]; 287 u_int8_t myaddr[ETHER_ADDR_LEN]; 288 int eirq; 289 290 iot = ia->ia_iot; 291 292 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 293 printf(": can't map i/o space\n"); 294 return; 295 } 296 297 sc->sc_iot = iot; 298 sc->sc_ioh = ioh; 299 300 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 301 302 /* now let's reset the chip */ 303 304 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 305 delay(200); 306 307 iyprobemem(sc); 308 309 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 310 ifp->if_softc = sc; 311 ifp->if_start = iystart; 312 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 313 | IFF_MULTICAST; 314 315 sc->doing_mc_setup = 0; 316 317 ifp->if_ioctl = iyioctl; 318 ifp->if_watchdog = iywatchdog; 319 320 (void)eepromreadall(iot, ioh, eaddr, 8); 321 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 322 323 #ifdef DIAGNOSTICS 324 if ((eaddr[EEPPEther0] != 325 eepromread(iot, ioh, EEPPEther0a)) && 326 (eaddr[EEPPEther1] != 327 eepromread(iot, ioh, EEPPEther1a)) && 328 (eaddr[EEPPEther2] != 329 eepromread(iot, ioh, EEPPEther2a))) 330 331 printf("EEPROM Ethernet address differs from copy\n"); 332 #endif 333 334 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 335 myaddr[0] = eaddr[EEPPEther0] >> 8; 336 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 337 myaddr[2] = eaddr[EEPPEther1] >> 8; 338 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 339 myaddr[4] = eaddr[EEPPEther2] >> 8; 340 341 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 342 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 343 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 344 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 345 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 346 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 347 /* Attach the interface. */ 348 if_attach(ifp); 349 ether_ifattach(ifp, myaddr); 350 printf(": address %s, rev. %d, %d kB\n", 351 ether_sprintf(myaddr), 352 sc->hard_vers, sc->sram/1024); 353 354 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 355 if (eirq != ia->ia_irq) 356 printf("%s: EEPROM irq setting %d ignored\n", 357 sc->sc_dev.dv_xname, eirq); 358 359 #if NBPFILTER > 0 360 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 361 #endif 362 363 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 364 IPL_NET, iyintr, sc); 365 366 #if NRND > 0 367 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 368 RND_TYPE_NET, 0); 369 #endif 370 371 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 372 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 373 } 374 375 void 376 iystop(sc) 377 struct iy_softc *sc; 378 { 379 bus_space_tag_t iot; 380 bus_space_handle_t ioh; 381 #ifdef IYDEBUG 382 u_int p, v; 383 #endif 384 385 iot = sc->sc_iot; 386 ioh = sc->sc_ioh; 387 388 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 389 390 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 391 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 392 393 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 394 delay(200); 395 #ifdef IYDEBUG 396 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 397 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 398 p = sc->tx_last; 399 if (!p) 400 p = sc->tx_start; 401 do { 402 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 403 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 404 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 405 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 406 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 407 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 408 printf(" 0x%04x", p); 409 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 410 printf(" 0x%b\n", v, "\020\020Ch"); 411 412 } while (v & 0x8000); 413 #endif 414 sc->tx_start = sc->tx_end = sc->rx_size; 415 sc->tx_last = 0; 416 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 417 } 418 419 void 420 iyreset(sc) 421 struct iy_softc *sc; 422 { 423 int s; 424 s = splnet(); 425 iystop(sc); 426 iyinit(sc); 427 splx(s); 428 } 429 430 void 431 iyinit(sc) 432 struct iy_softc *sc; 433 { 434 int i; 435 unsigned temp; 436 struct ifnet *ifp; 437 bus_space_tag_t iot; 438 bus_space_handle_t ioh; 439 440 iot = sc->sc_iot; 441 ioh = sc->sc_ioh; 442 443 ifp = &sc->sc_ethercom.ec_if; 444 #ifdef IYDEBUG 445 printf("ifp is %p\n", ifp); 446 #endif 447 448 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 449 450 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 451 if (temp & 0x10) 452 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 453 454 for (i=0; i<6; ++i) { 455 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 456 } 457 458 temp = bus_space_read_1(iot, ioh, REG1); 459 bus_space_write_1(iot, ioh, REG1, 460 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 461 462 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 463 temp = MATCH_ALL; 464 } else if (sc->sc_ethercom.ec_multicnt) { 465 temp = MATCH_MULTI; 466 } else 467 temp = MATCH_ID; 468 469 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 470 471 #ifdef IYDEBUG 472 printf("%s: RECV_MODES set to %b\n", sc->sc_dev.dv_xname, 473 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 474 #endif 475 /* XXX VOODOO */ 476 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 477 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 478 /* XXX END OF VOODOO */ 479 480 481 delay(500000); /* for the hardware to test for the connector */ 482 483 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 484 #ifdef IYDEBUG 485 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 486 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 487 #endif 488 temp = (temp & TEST_MODE_MASK); 489 490 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 491 case IFM_10_5: 492 temp &= ~ (BNC_BIT | TPE_BIT); 493 break; 494 495 case IFM_10_2: 496 temp = (temp & ~TPE_BIT) | BNC_BIT; 497 break; 498 499 case IFM_10_T: 500 temp = (temp & ~BNC_BIT) | TPE_BIT; 501 break; 502 default: 503 /* nothing; leave as it is */ 504 } 505 switch (temp & (BNC_BIT | TPE_BIT)) { 506 case BNC_BIT: 507 sc->iy_media = IFM_ETHER | IFM_10_2; 508 break; 509 case TPE_BIT: 510 sc->iy_media = IFM_ETHER | IFM_10_T; 511 break; 512 default: 513 sc->iy_media = IFM_ETHER | IFM_10_5; 514 } 515 516 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 517 #ifdef IYDEBUG 518 printf("changed to 0x%b\n", 519 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 520 #endif 521 522 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 523 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 524 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 525 526 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 527 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 528 529 #ifdef IYDEBUG 530 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 531 temp, "\020\4bad_irq\010flash/boot present"); 532 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 533 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 534 temp, "\020\4BAD IRQ\010flash/boot present"); 535 #endif 536 537 538 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 539 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 540 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 541 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 542 543 temp = bus_space_read_1(iot, ioh, REG1); 544 #ifdef IYDEBUG 545 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 546 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 547 #endif 548 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 549 550 #ifdef IYDEBUG 551 temp = bus_space_read_1(iot, ioh, REG1); 552 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 553 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 554 #endif 555 556 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 557 558 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 559 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 560 561 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 562 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 563 sc->rx_start = 0; 564 565 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 566 delay(200); 567 568 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 569 570 sc->tx_start = sc->tx_end = sc->rx_size; 571 sc->tx_last = 0; 572 573 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 574 575 ifp->if_flags |= IFF_RUNNING; 576 ifp->if_flags &= ~IFF_OACTIVE; 577 } 578 579 void 580 iystart(ifp) 581 struct ifnet *ifp; 582 { 583 struct iy_softc *sc; 584 585 586 struct mbuf *m0, *m; 587 u_int len, pad, last, end; 588 u_int llen, residual; 589 int avail; 590 caddr_t data; 591 u_int16_t resval, stat; 592 bus_space_tag_t iot; 593 bus_space_handle_t ioh; 594 595 #ifdef IYDEBUG 596 printf("iystart called\n"); 597 #endif 598 sc = ifp->if_softc; 599 600 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 601 return; 602 603 iot = sc->sc_iot; 604 ioh = sc->sc_ioh; 605 606 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 607 #ifdef IYDEBUG 608 printf("%s: trying to write another packet to the hardware\n", 609 sc->sc_dev.dv_xname); 610 #endif 611 612 /* We need to use m->m_pkthdr.len, so require the header */ 613 if ((m0->m_flags & M_PKTHDR) == 0) 614 panic("iystart: no header mbuf"); 615 616 len = m0->m_pkthdr.len; 617 pad = len & 1; 618 619 #ifdef IYDEBUG 620 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 621 #endif 622 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 623 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 624 } 625 626 if (len + pad > ETHER_MAX_LEN) { 627 /* packet is obviously too large: toss it */ 628 ++ifp->if_oerrors; 629 IF_DEQUEUE(&ifp->if_snd, m0); 630 m_freem(m0); 631 continue; 632 } 633 634 #if NBPFILTER > 0 635 if (ifp->if_bpf) 636 bpf_mtap(ifp->if_bpf, m0); 637 #endif 638 639 avail = sc->tx_start - sc->tx_end; 640 if (avail <= 0) 641 avail += sc->tx_size; 642 643 #ifdef IYDEBUG 644 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 645 #endif 646 /* 647 * we MUST RUN at splnet here --- 648 * XXX todo: or even turn off the boards ints ??? hm... 649 */ 650 651 /* See if there is room to put another packet in the buffer. */ 652 653 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 654 #ifdef IYDEBUG 655 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 656 sc->sc_dev.dv_xname, len, avail); 657 #endif 658 ifp->if_flags |= IFF_OACTIVE; 659 return; 660 } 661 662 /* we know it fits in the hardware now, so dequeue it */ 663 IF_DEQUEUE(&ifp->if_snd, m0); 664 665 last = sc->tx_end; 666 end = last + pad + len + I595_XMT_HDRLEN; 667 668 if (end >= sc->sram) { 669 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 670 /* keep header in one piece */ 671 last = sc->rx_size; 672 end = last + pad + len + I595_XMT_HDRLEN; 673 } else 674 end -= sc->tx_size; 675 } 676 677 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 678 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 679 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 680 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 681 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 682 683 residual = resval = 0; 684 685 while ((m = m0)!=0) { 686 data = mtod(m, caddr_t); 687 llen = m->m_len; 688 if (residual) { 689 #ifdef IYDEBUG 690 printf("%s: merging residual with next mbuf.\n", 691 sc->sc_dev.dv_xname); 692 #endif 693 resval |= *data << 8; 694 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 695 --llen; 696 ++data; 697 } 698 if (llen > 1) 699 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 700 data, llen>>1); 701 residual = llen & 1; 702 if (residual) { 703 resval = *(data + llen - 1); 704 #ifdef IYDEBUG 705 printf("%s: got odd mbuf to send.\n", 706 sc->sc_dev.dv_xname); 707 #endif 708 } 709 710 MFREE(m, m0); 711 } 712 713 if (residual) 714 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 715 716 pad >>= 1; 717 while (pad-- > 0) 718 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 719 720 #ifdef IYDEBUG 721 printf("%s: new last = 0x%x, end = 0x%x.\n", 722 sc->sc_dev.dv_xname, last, end); 723 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 724 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 725 #endif 726 727 if (sc->tx_start != sc->tx_end) { 728 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 729 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 730 731 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 732 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 733 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 734 #ifdef IYDEBUG 735 printf("%s: setting 0x%x to 0x%x\n", 736 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 737 stat | CHAIN); 738 #endif 739 } 740 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 741 742 /* XXX todo: enable ints here if disabled */ 743 744 ++ifp->if_opackets; 745 746 if (sc->tx_start == sc->tx_end) { 747 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 748 bus_space_write_1(iot, ioh, 0, XMT_CMD); 749 sc->tx_start = last; 750 #ifdef IYDEBUG 751 printf("%s: writing 0x%x to XAR and giving XCMD\n", 752 sc->sc_dev.dv_xname, last); 753 #endif 754 } else { 755 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 756 #ifdef IYDEBUG 757 printf("%s: giving RESUME_XCMD\n", 758 sc->sc_dev.dv_xname); 759 #endif 760 } 761 sc->tx_last = last; 762 sc->tx_end = end; 763 } 764 } 765 766 767 static __inline void 768 eepromwritebit(iot, ioh, what) 769 bus_space_tag_t iot; 770 bus_space_handle_t ioh; 771 int what; 772 { 773 bus_space_write_1(iot, ioh, EEPROM_REG, what); 774 delay(1); 775 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 776 delay(1); 777 bus_space_write_1(iot, ioh, EEPROM_REG, what); 778 delay(1); 779 } 780 781 static __inline int 782 eepromreadbit(iot, ioh) 783 bus_space_tag_t iot; 784 bus_space_handle_t ioh; 785 { 786 int b; 787 788 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 789 delay(1); 790 b = bus_space_read_1(iot, ioh, EEPROM_REG); 791 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 792 delay(1); 793 794 return ((b & EEDO) != 0); 795 } 796 797 static u_int16_t 798 eepromread(iot, ioh, offset) 799 bus_space_tag_t iot; 800 bus_space_handle_t ioh; 801 int offset; 802 { 803 volatile int i; 804 volatile int j; 805 volatile u_int16_t readval; 806 807 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 808 delay(1); 809 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 810 delay(1); 811 812 eepromwritebit(iot, ioh, EECS|EEDI); 813 eepromwritebit(iot, ioh, EECS|EEDI); 814 eepromwritebit(iot, ioh, EECS); 815 816 for (j=5; j>=0; --j) { 817 if ((offset>>j) & 1) 818 eepromwritebit(iot, ioh, EECS|EEDI); 819 else 820 eepromwritebit(iot, ioh, EECS); 821 } 822 823 for (readval=0, i=0; i<16; ++i) { 824 readval<<=1; 825 readval |= eepromreadbit(iot, ioh); 826 } 827 828 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 829 delay(1); 830 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 831 832 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 833 834 return readval; 835 } 836 837 /* 838 * Device timeout/watchdog routine. Entered if the device neglects to generate 839 * an interrupt after a transmit has been started on it. 840 */ 841 void 842 iywatchdog(ifp) 843 struct ifnet *ifp; 844 { 845 struct iy_softc *sc = ifp->if_softc; 846 847 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 848 ++sc->sc_ethercom.ec_if.if_oerrors; 849 iyreset(sc); 850 } 851 852 /* 853 * What to do upon receipt of an interrupt. 854 */ 855 int 856 iyintr(arg) 857 void *arg; 858 { 859 struct iy_softc *sc = arg; 860 bus_space_tag_t iot; 861 bus_space_handle_t ioh; 862 863 u_short status; 864 865 iot = sc->sc_iot; 866 ioh = sc->sc_ioh; 867 868 status = bus_space_read_1(iot, ioh, STATUS_REG); 869 #ifdef IYDEBUG 870 if (status & ALL_INTS) { 871 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 872 "\020\1RX_STP\2RX\3TX\4EXEC"); 873 if (status & EXEC_INT) 874 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 875 "\020\6ABORT"); 876 else 877 printf("\n"); 878 } 879 #endif 880 if ((status & (RX_INT | TX_INT)) == 0) 881 return 0; 882 883 if (status & RX_INT) { 884 iy_intr_rx(sc); 885 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 886 } 887 if (status & TX_INT) { 888 iy_intr_tx(sc); 889 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 890 } 891 892 #if NRND > 0 893 rnd_add_uint32(&sc->rnd_source, status); 894 #endif 895 896 return 1; 897 } 898 899 void 900 iyget(sc, iot, ioh, rxlen) 901 struct iy_softc *sc; 902 bus_space_tag_t iot; 903 bus_space_handle_t ioh; 904 int rxlen; 905 { 906 struct mbuf *m, *top, **mp; 907 struct ether_header *eh; 908 struct ifnet *ifp; 909 int len; 910 911 ifp = &sc->sc_ethercom.ec_if; 912 913 MGETHDR(m, M_DONTWAIT, MT_DATA); 914 if (m == 0) 915 goto dropped; 916 m->m_pkthdr.rcvif = ifp; 917 m->m_pkthdr.len = rxlen; 918 len = MHLEN; 919 top = 0; 920 mp = ⊤ 921 922 while (rxlen > 0) { 923 if (top) { 924 MGET(m, M_DONTWAIT, MT_DATA); 925 if (m == 0) { 926 m_freem(top); 927 goto dropped; 928 } 929 len = MLEN; 930 } 931 if (rxlen >= MINCLSIZE) { 932 MCLGET(m, M_DONTWAIT); 933 if ((m->m_flags & M_EXT) == 0) { 934 m_free(m); 935 m_freem(top); 936 goto dropped; 937 } 938 len = MCLBYTES; 939 } 940 len = min(rxlen, len); 941 if (len > 1) { 942 len &= ~1; 943 944 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 945 mtod(m, caddr_t), len/2); 946 } else { 947 #ifdef IYDEBUG 948 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 949 #endif 950 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 951 MEM_PORT_REG); 952 } 953 m->m_len = len; 954 rxlen -= len; 955 *mp = m; 956 mp = &m->m_next; 957 } 958 /* XXX receive the top here */ 959 ++ifp->if_ipackets; 960 961 eh = mtod(top, struct ether_header *); 962 963 #if NBPFILTER > 0 964 if (ifp->if_bpf) { 965 bpf_mtap(ifp->if_bpf, top); 966 if ((ifp->if_flags & IFF_PROMISC) && 967 (eh->ether_dhost[0] & 1) == 0 && 968 bcmp(eh->ether_dhost, 969 LLADDR(ifp->if_sadl), sizeof(eh->ether_dhost)) != 0) { 970 971 m_freem(top); 972 return; 973 } 974 } 975 #endif 976 (*ifp->if_input)(ifp, top); 977 return; 978 979 dropped: 980 ++ifp->if_ierrors; 981 return; 982 } 983 984 void 985 iy_intr_rx(sc) 986 struct iy_softc *sc; 987 { 988 struct ifnet *ifp; 989 bus_space_tag_t iot; 990 bus_space_handle_t ioh; 991 992 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 993 994 iot = sc->sc_iot; 995 ioh = sc->sc_ioh; 996 ifp = &sc->sc_ethercom.ec_if; 997 998 rxadrs = sc->rx_start; 999 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1000 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1001 rxnext = 0; 1002 1003 while (rxevnt == RCV_DONE) { 1004 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1005 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1006 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1007 #ifdef IYDEBUG 1008 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 1009 sc->sc_dev.dv_xname, rxadrs, rxstatus, 1010 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1011 "\014CRCERR\015LENERR\016RCVOK\020TYP", 1012 rxnext, rxlen); 1013 #endif 1014 iyget(sc, iot, ioh, rxlen); 1015 1016 /* move stop address */ 1017 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1018 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1019 1020 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1021 rxadrs = rxnext; 1022 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1023 } 1024 sc->rx_start = rxnext; 1025 } 1026 1027 void 1028 iy_intr_tx(sc) 1029 struct iy_softc *sc; 1030 { 1031 bus_space_tag_t iot; 1032 bus_space_handle_t ioh; 1033 struct ifnet *ifp; 1034 u_int txstatus, txstat2, txlen, txnext; 1035 1036 ifp = &sc->sc_ethercom.ec_if; 1037 iot = sc->sc_iot; 1038 ioh = sc->sc_ioh; 1039 1040 while (sc->tx_start != sc->tx_end) { 1041 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1042 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1043 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1044 break; 1045 1046 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1047 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1048 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1049 #ifdef IYDEBUG 1050 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1051 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1052 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1053 txnext, txlen); 1054 #endif 1055 if (txlen & CHAIN) 1056 sc->tx_start = txnext; 1057 else 1058 sc->tx_start = sc->tx_end; 1059 ifp->if_flags &= ~IFF_OACTIVE; 1060 1061 if ((txstat2 & 0x2000) == 0) 1062 ++ifp->if_oerrors; 1063 if (txstat2 & 0x000f) 1064 ifp->if_oerrors += txstat2 & 0x000f; 1065 } 1066 ifp->if_flags &= ~IFF_OACTIVE; 1067 } 1068 1069 int 1070 iyioctl(ifp, cmd, data) 1071 struct ifnet *ifp; 1072 u_long cmd; 1073 caddr_t data; 1074 { 1075 struct iy_softc *sc; 1076 struct ifaddr *ifa; 1077 struct ifreq *ifr; 1078 int s, error = 0; 1079 1080 sc = ifp->if_softc; 1081 ifa = (struct ifaddr *)data; 1082 ifr = (struct ifreq *)data; 1083 1084 #ifdef IYDEBUG 1085 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1086 ifp, ifp->if_xname, cmd, data); 1087 #endif 1088 1089 s = splnet(); 1090 1091 switch (cmd) { 1092 1093 case SIOCSIFADDR: 1094 ifp->if_flags |= IFF_UP; 1095 1096 switch (ifa->ifa_addr->sa_family) { 1097 #ifdef INET 1098 case AF_INET: 1099 iyinit(sc); 1100 arp_ifinit(ifp, ifa); 1101 break; 1102 #endif 1103 #ifdef NS 1104 /* XXX - This code is probably wrong. */ 1105 case AF_NS: 1106 { 1107 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1108 1109 if (ns_nullhost(*ina)) 1110 ina->x_host = *(union ns_host *) 1111 LLADDR(ifp->if_sadl); 1112 else 1113 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1114 ETHER_ADDR_LEN); 1115 /* Set new address. */ 1116 iyinit(sc); 1117 break; 1118 } 1119 #endif /* NS */ 1120 default: 1121 iyinit(sc); 1122 break; 1123 } 1124 break; 1125 1126 case SIOCSIFFLAGS: 1127 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1128 if ((ifp->if_flags & IFF_UP) == 0 && 1129 (ifp->if_flags & IFF_RUNNING) != 0) { 1130 /* 1131 * If interface is marked down and it is running, then 1132 * stop it. 1133 */ 1134 iystop(sc); 1135 ifp->if_flags &= ~IFF_RUNNING; 1136 } else if ((ifp->if_flags & IFF_UP) != 0 && 1137 (ifp->if_flags & IFF_RUNNING) == 0) { 1138 /* 1139 * If interface is marked up and it is stopped, then 1140 * start it. 1141 */ 1142 iyinit(sc); 1143 } else { 1144 /* 1145 * Reset the interface to pick up changes in any other 1146 * flags that affect hardware registers. 1147 */ 1148 iystop(sc); 1149 iyinit(sc); 1150 } 1151 #ifdef IYDEBUGX 1152 if (ifp->if_flags & IFF_DEBUG) 1153 sc->sc_debug = IFY_ALL; 1154 else 1155 sc->sc_debug = 0; 1156 #endif 1157 break; 1158 1159 case SIOCADDMULTI: 1160 case SIOCDELMULTI: 1161 error = (cmd == SIOCADDMULTI) ? 1162 ether_addmulti(ifr, &sc->sc_ethercom): 1163 ether_delmulti(ifr, &sc->sc_ethercom); 1164 1165 if (error == ENETRESET) { 1166 /* 1167 * Multicast list has changed; set the hardware filter 1168 * accordingly. 1169 */ 1170 iyreset(sc); /* XXX can't make it work otherwise */ 1171 iy_mc_reset(sc); 1172 error = 0; 1173 } 1174 break; 1175 1176 case SIOCSIFMEDIA: 1177 case SIOCGIFMEDIA: 1178 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1179 break; 1180 default: 1181 error = EINVAL; 1182 } 1183 splx(s); 1184 return error; 1185 } 1186 1187 int 1188 iy_mediachange(ifp) 1189 struct ifnet *ifp; 1190 { 1191 struct iy_softc *sc = ifp->if_softc; 1192 1193 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1194 return EINVAL; 1195 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1196 case IFM_10_5: 1197 case IFM_10_2: 1198 case IFM_10_T: 1199 case IFM_AUTO: 1200 iystop(sc); 1201 iyinit(sc); 1202 return 0; 1203 default: 1204 return EINVAL; 1205 } 1206 } 1207 1208 void 1209 iy_mediastatus(ifp, ifmr) 1210 struct ifnet *ifp; 1211 struct ifmediareq *ifmr; 1212 { 1213 struct iy_softc *sc = ifp->if_softc; 1214 1215 ifmr->ifm_active = sc->iy_media; 1216 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1217 } 1218 1219 1220 static void 1221 iy_mc_setup(sc) 1222 struct iy_softc *sc; 1223 { 1224 struct ether_multi *enm; 1225 struct ether_multistep step; 1226 struct ethercom *ecp; 1227 struct ifnet *ifp; 1228 bus_space_tag_t iot; 1229 bus_space_handle_t ioh; 1230 int avail, last /*, end*/ , len; 1231 int timeout; 1232 volatile u_int16_t dum; 1233 u_int8_t temp; 1234 1235 1236 ecp = &sc->sc_ethercom; 1237 ifp = &ecp->ec_if; 1238 1239 iot = sc->sc_iot; 1240 ioh = sc->sc_ioh; 1241 1242 len = 6 * ecp->ec_multicnt + 6; 1243 1244 avail = sc->tx_start - sc->tx_end; 1245 if (avail <= 0) 1246 avail += sc->tx_size; 1247 if (ifp->if_flags & IFF_DEBUG) 1248 printf("%s: iy_mc_setup called, %d addresses, " 1249 "%d/%d bytes needed/avail\n", ifp->if_xname, 1250 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1251 1252 last = sc->rx_size; 1253 1254 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1255 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_MULTI); 1256 /* XXX VOODOO */ 1257 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1258 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1259 /* XXX END OF VOODOO */ 1260 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1261 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1262 bus_space_write_2(iot, ioh, MEM_PORT_REG, MC_SETUP_CMD); 1263 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1264 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1265 bus_space_write_2(iot, ioh, MEM_PORT_REG, len); 1266 1267 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1268 LLADDR(ifp->if_sadl), 3); 1269 1270 ETHER_FIRST_MULTI(step, ecp, enm); 1271 while(enm) { 1272 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 1273 enm->enm_addrlo, 3); 1274 1275 ETHER_NEXT_MULTI(step, enm); 1276 } 1277 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1278 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1279 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1280 1281 1282 sc->tx_start = sc->rx_size; 1283 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1284 1285 for (timeout=0; timeout<100; timeout++) { 1286 DELAY(2); 1287 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1288 continue; 1289 1290 temp = bus_space_read_1(iot, ioh, 0); 1291 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1292 #ifdef DIAGNOSTIC 1293 if (temp & 0x20) { 1294 printf("%s: mc setup failed, %d usec\n", 1295 sc->sc_dev.dv_xname, timeout * 2); 1296 } else if (((temp & 0x0f) == 0x03) && 1297 (ifp->if_flags & IFF_DEBUG)) { 1298 printf("%s: mc setup done, %d usec\n", 1299 sc->sc_dev.dv_xname, timeout * 2); 1300 } 1301 #endif 1302 break; 1303 } 1304 sc->tx_start = sc->tx_end; 1305 ifp->if_flags &= ~IFF_OACTIVE; 1306 1307 } 1308 1309 static void 1310 iy_mc_reset(sc) 1311 struct iy_softc *sc; 1312 { 1313 struct ether_multi *enm; 1314 struct ether_multistep step; 1315 struct ethercom *ecp; 1316 struct ifnet *ifp; 1317 bus_space_tag_t iot; 1318 bus_space_handle_t ioh; 1319 u_int16_t temp; 1320 1321 ecp = &sc->sc_ethercom; 1322 ifp = &ecp->ec_if; 1323 1324 iot = sc->sc_iot; 1325 ioh = sc->sc_ioh; 1326 1327 if (ecp->ec_multicnt > 63) { 1328 ifp->if_flags |= IFF_ALLMULTI; 1329 1330 } else if (ecp->ec_multicnt > 0) { 1331 /* 1332 * Step through the list of addresses. 1333 */ 1334 ETHER_FIRST_MULTI(step, ecp, enm); 1335 while(enm) { 1336 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1337 ifp->if_flags |= IFF_ALLMULTI; 1338 goto setupmulti; 1339 } 1340 ETHER_NEXT_MULTI(step, enm); 1341 } 1342 /* OK, we really need to do it now: */ 1343 #if 0 1344 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1345 != IFF_RUNNING) { 1346 ifp->if_flags |= IFF_OACTIVE; 1347 sc->want_mc_setup = 1; 1348 return; 1349 } 1350 #endif 1351 iy_mc_setup(sc); 1352 } else { 1353 ifp->if_flags &= ~IFF_ALLMULTI; 1354 } 1355 1356 setupmulti: 1357 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1358 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1359 temp = MATCH_ALL; 1360 } else if (sc->sc_ethercom.ec_multicnt) { 1361 temp = MATCH_MULTI; 1362 } else 1363 temp = MATCH_ID; 1364 1365 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1366 /* XXX VOODOO */ 1367 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1368 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1369 /* XXX END OF VOODOO */ 1370 1371 /* XXX TBD: setup hardware for all multicasts */ 1372 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1373 return; 1374 } 1375 1376 #ifdef IYDEBUG 1377 void 1378 print_rbd(rbd) 1379 volatile struct ie_recv_buf_desc *rbd; 1380 { 1381 1382 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1383 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1384 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1385 rbd->mbz); 1386 } 1387 #endif 1388 1389 void 1390 iyprobemem(sc) 1391 struct iy_softc *sc; 1392 { 1393 bus_space_tag_t iot; 1394 bus_space_handle_t ioh; 1395 int testing; 1396 1397 iot = sc->sc_iot; 1398 ioh = sc->sc_ioh; 1399 1400 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1401 delay(1); 1402 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1403 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1404 1405 for (testing=65536; testing >= 4096; testing >>= 1) { 1406 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1407 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1408 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1409 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1410 #ifdef IYMEMDEBUG 1411 printf("%s: Didn't keep 0xdead at 0x%x\n", 1412 sc->sc_dev.dv_xname, testing-2); 1413 #endif 1414 continue; 1415 } 1416 1417 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1418 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1419 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1420 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1421 #ifdef IYMEMDEBUG 1422 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1423 sc->sc_dev.dv_xname, testing-2); 1424 #endif 1425 continue; 1426 } 1427 1428 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1429 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1430 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1431 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1432 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1433 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1434 #ifdef IYMEMDEBUG 1435 printf("%s: 0x%x alias of 0x0\n", 1436 sc->sc_dev.dv_xname, testing >> 1); 1437 #endif 1438 continue; 1439 } 1440 1441 break; 1442 } 1443 1444 sc->sram = testing; 1445 1446 switch(testing) { 1447 case 65536: 1448 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1449 sc->rx_size = 44*1024; 1450 break; 1451 1452 case 32768: 1453 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1454 sc->rx_size = 22*1024; 1455 break; 1456 1457 case 16384: 1458 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1459 sc->rx_size = 10*1024; 1460 break; 1461 default: 1462 sc->rx_size = testing/2; 1463 break; 1464 } 1465 sc->tx_size = testing - sc->rx_size; 1466 } 1467 1468 static int 1469 eepromreadall(iot, ioh, wordp, maxi) 1470 bus_space_tag_t iot; 1471 bus_space_handle_t ioh; 1472 u_int16_t *wordp; 1473 int maxi; 1474 { 1475 int i; 1476 u_int16_t checksum, tmp; 1477 1478 checksum = 0; 1479 1480 for (i=0; i<EEPP_LENGTH; ++i) { 1481 tmp = eepromread(iot, ioh, i); 1482 checksum += tmp; 1483 if (i<maxi) 1484 wordp[i] = tmp; 1485 } 1486 1487 if (checksum != EEPP_CHKSUM) { 1488 #ifdef IYDEBUG 1489 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1490 checksum, EEPP_CHKSUM); 1491 #endif 1492 return 1; 1493 } 1494 return 0; 1495 } 1496
Indexes created Wed Sep 24 22:09:59 GMT 2025